Subject: Latest Indigo2 SCSI patch

From: "Andrew R. Baker" <[email-masked]>
Date: Thu, 1 Jul 1999 09:48:25 -0500 (CDT)

Could Indigo2 and Indy users try this patch out?  It gets the second SCSI
controller up and running on the Indigo2.  If there are no complaints, I
am going to put it into the CVS tree.

-Andrew

---

From: "Andrew R. Baker" <[email-masked]>
Date: Thu, 1 Jul 1999 11:05:19 -0500 (CDT)

OK, eventually I will remember to attach the patch with my announcements.

> am going to put it into the CVS tree.
--- sgiwd93.c.orig	Fri Jun 25 15:31:55 1999
+++ sgiwd93.c	Tue Jun 29 13:21:58 1999
@@ -43,6 +43,7 @@
 };
 
 struct Scsi_Host *sgiwd93_host = NULL;
+struct Scsi_Host *sgiwd93_host1 = NULL;
 
 /* Wuff wuff, wuff, wd33c93.c, wuff wuff, object oriented, bow wow. */
 static inline void write_wd33c93_count(wd33c93_regs *regp, unsigned long value)
@@ -70,7 +71,7 @@
 	unsigned long flags;
 
 	spin_lock_irqsave(&io_request_lock, flags);
-	wd33c93_intr(sgiwd93_host);
+	wd33c93_intr((struct Scsi_Host *) dev_id);
 	spin_unlock_irqrestore(&io_request_lock, flags);
 }
 
@@ -236,9 +237,9 @@
 #endif
 }
 
-void sgiwd93_reset(void)
+void sgiwd93_reset(uchar *base)
 {
-	struct hpc3_scsiregs *hregs = &hpc3c0->scsi_chan0;
+	struct hpc3_scsiregs *hregs = (struct hpc3_scsiregs *) base;
 
 	hregs->ctrl = HPC3_SCTRL_CRESET;
 	udelay (50);
@@ -266,9 +267,11 @@
 {
 	static unsigned char called = 0;
 	struct hpc3_scsiregs *hregs = &hpc3c0->scsi_chan0;
+	struct hpc3_scsiregs *hregs1 = &hpc3c0->scsi_chan1;
 	struct WD33C93_hostdata *hdata;
+	struct WD33C93_hostdata *hdata1;
 	uchar *buf;
-
+	
 	if(called)
 		return 0; /* Should bitch on the console about this... */
 
@@ -281,7 +284,7 @@
 	buf = (uchar *) get_free_page(GFP_KERNEL);
 	init_hpc_chain(buf);
 	dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE);
-
+	/* HPC_SCSI_REG0 | 0x03 | KSEG1 */
 	wd33c93_init(sgiwd93_host, (wd33c93_regs *) 0xbfbc0003,
 		     dma_setup, dma_stop, WD33C93_FS_16_20);
 
@@ -291,6 +294,27 @@
 	dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE);
 
 	request_irq(1, sgiwd93_intr, 0, "SGI WD93", (void *) sgiwd93_host);
+        /* set up second controller on the Indigo2 */
+	if(!sgi_guiness) {
+		sgiwd93_host1 = scsi_register(HPsUX, sizeof(struct WD33C93_hostdata));
+		sgiwd93_host1->base = (unsigned char *) hregs1;
+		sgiwd93_host1->irq = 2;
+
+		buf = (uchar *) get_free_page(GFP_KERNEL);
+		init_hpc_chain(buf);
+		dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE);
+		/* HPC_SCSI_REG1 | 0x03 | KSEG1 */
+		wd33c93_init(sgiwd93_host1, (wd33c93_regs *) 0xbfbc8003,
+			     dma_setup, dma_stop, WD33C93_FS_16_20);
+
+		hdata1 = (struct WD33C93_hostdata *)sgiwd93_host1->hostdata;
+		hdata1->no_sync = 0;
+		hdata1->dma_bounce_buffer = (uchar *) (KSEG1ADDR(buf));
+		dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE);
+
+		request_irq(2, sgiwd93_intr, 0, "SGI WD93", (void *) sgiwd93_host1);
+	}
+	
 	called = 1;
 
 	return 1; /* Found one. */
--- wd33c93.c.orig	Fri Jun 25 15:29:25 1999
+++ wd33c93.c	Tue Jun 29 13:15:46 1999
@@ -1028,7 +1028,7 @@
                            hostdata->sync_xfer[cmd->target] = id;
                            }
 #ifdef SYNC_DEBUG
-printk("sync_xfer=%02x",hostdata->sync_xfer[cmd->target]);
+printk(" sync_xfer=%02x\n",hostdata->sync_xfer[cmd->target]);
 #endif
                         hostdata->sync_stat[cmd->target] = SS_SET;
                         write_wd33c93_cmd(regp,WD_CMD_NEGATE_ACK);
@@ -1362,7 +1362,7 @@
 #ifdef CONFIG_SGI
 {
 int busycount = 0;
-extern void sgiwd93_reset(void);
+extern void sgiwd93_reset(uchar*);
 
    /* wait 'til the chip gets some time for us */
    while (READ_AUX_STAT() & ASR_BSY && busycount++ < 100)
@@ -1376,7 +1376,7 @@
     */
    /* still busy ? */
    if (READ_AUX_STAT() & ASR_BSY)
-	sgiwd93_reset(); /* yeah, give it the hard one */
+	sgiwd93_reset(instance->base); /* yeah, give it the hard one */
 }
 #endif