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Date:   Wed, 1 Dec 1999 15:20:27 -0800 (PST)
From:   Khaled Labib <labibk@taec.toshiba.com>
Message-Id: <199912012320.PAA14951@stafford.taec.com>
To:     linux@cthulhu.engr.sgi.com
Subject: Problems with glibc RPM
Cc:     labibk@taec.toshiba.com
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Hi,

I downloaded glibc-2.0.6-4.src.rpm and glibc-2.0.6-3.src.rpm from 
ftp.linux.sgi.com.

When I tried to use the rpm tool to install them, I got the following error 
message:

unpacking of archive failed on file glibc-2.0.6.tar.gz: cpio: read failed - 
Success


Can someone help ? I really need these sources from the rpm.

I am using RedHat Linux 6.0 on a PC.

Thank you for your help.



Khaled

From owner-linuxmips@oss.sgi.com Wed Dec  1 16:17:39 1999
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To:     Khaled Labib <labibk@taec.toshiba.com>, linux@cthulhu.engr.sgi.com
Subject: Re: Problems with glibc RPM
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Khaled Labib wrote:
 
> unpacking of archive failed on file glibc-2.0.6.tar.gz: cpio: read failed -
> Success
> 
> Can someone help ? I really need these sources from the rpm.
> 
> I am using RedHat Linux 6.0 on a PC.
> 
> Thank you for your help.
> 
> Khaled

might you have a) run out of disk space?  b) retrieved teh file in ASCII
(as opposed to BIN) mode?

I'd guess 'a'

-- 
Tim Hockin
Software Engineer / OS Engineer
Cobalt Networks
thockin@cobalt.com

From owner-linuxmips@oss.sgi.com Thu Dec  2 00:19:09 1999
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From:   "Kevin D. Kissell" <kevink@mips.com>
To:     "Khaled Labib" <labibk@taec.toshiba.com>,
        <linux@cthulhu.engr.sgi.com>
Cc:     <labibk@taec.toshiba.com>
Subject: Re: Problems with glibc RPM
Date:   Thu, 2 Dec 1999 09:23:09 +0100
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>
>I downloaded glibc-2.0.6-4.src.rpm and glibc-2.0.6-3.src.rpm from 
>ftp.linux.sgi.com.
>
>When I tried to use the rpm tool to install them, I got the following error 
>message:
>
>unpacking of archive failed on file glibc-2.0.6.tar.gz: cpio: read failed - 
>Success
>
>
>Can someone help ? I really need these sources from the rpm.
>
>I am using RedHat Linux 6.0 on a PC.


I believe there are some interoperatbility problems between
Red Hat 5.2 and 6.0 rpm programs.   When I did a port of
mipsel linux to a MIPS development board, I started by
booting the RH 6.0 mipsel root file system, with the 6.0
rpm program, and found that I could not reliably install
the 5.2 gcc/glibc binary RPMs on the SGI server.  I
backed off to a 5.2 level root file system and rpm program,
and the problems went away.

__

Kevin D. Kissell
MIPS Technologies European Architecture Lab
kevink@mips.com
Tel. +33.4.78.38.70.67
FAX. +33.4.78.38.70.68


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From:   "Jakma, Paul" <Paul.Jakma@compaq.com>
To:     "'linux@engr.sgi.com'" <linux@cthulhu.engr.sgi.com>
Subject: Indy ISDN on linux?
Date:   Thu, 2 Dec 1999 15:06:26 -0000 
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Hi,

I was wondering if the onboard Indy ISDN is supported by linux? I'm
considering turning my indy into a linux dial-up isdn, masq, firewall box.

If not supported is anyone considering working on it? and what kind of
hardware is it? (Doc's/references/pointers appreciated)

regards,

Paul Jakma
paul@clubi.ie

From owner-linuxmips@oss.sgi.com Fri Dec  3 05:00:08 1999
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From:   Ralf Baechle <ralf@oss.sgi.com>
To:     SeungHoon Jung <shjung@sysmail.sec.samsung.co.kr>
Cc:     linux@cthulhu.engr.sgi.com, linux-mips@fnet.fr
Subject: Re: linux/mips cross compiling error
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On Wed, Dec 01, 1999 at 05:30:55PM +0900, SeungHoon Jung wrote:

> I'm Seunghoon Jung. I'm currently working on mips based emdedded linux
> system.  In the porting process, we are helped very much by your
> linux/MIPS howto document.  Thank you very much for your efforts.
> 
> We use cross-compilers and binutils from ftp.linux.sgi.com.
> And we successfully made linux 2.2.12 kernel.
> 
> After making kernel, we are trying to make glibc and mips applications.
> 
> We are following your steps with glibc-2.1.2.

This is a genuine linker bug which is rather difficult to fix.  Also the
MIPS support for glib 2.1 isn't complete, somebody is working on it.

(Due to size constraints glibc 2.1 is a bad choice for most MIPS systems
anyway; the recommendation is to use glibc 2.0.)

  Ralf

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Date:   Fri, 3 Dec 1999 10:50:45 -0200
From:   Ralf Baechle <ralf@oss.sgi.com>
To:     Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc:     Marc Esipovich <marc@mucom.co.il>, e1097757@ceng.metu.edu.tr,
        linux@cthulhu.engr.sgi.com
Subject: Re: EXT2 fs error
Message-ID: <19991203105045.B982@uni-koblenz.de>
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On Tue, Nov 30, 1999 at 07:52:04PM +0000, Alan Cox wrote:

> If there is a scsi error before the ext2fs error then yes probably so
> You are looking for a "media error" probably.
> 
> > > 	SCSI bus is being reset for 0 channel 0.
> > > 	scsi0 reset. sending SDTR
> > 
> > SCSI reset is due to repeated attempts to read a block, or I might be
> > wrong and it it's due to a malfunction of the controller on your HD.
> 
> You can get it off some working sane hardware if you try and ask for stupid
> block numbers. It is worth doing a full fsck on the drive before assuming
> hardware. Also check the cabling seems sound and is well attached and that
> parity is enabled on the controller if the bios sets it.

I've seen this happening on my Indy as well like once every month or even
more rarely.  It only happens very rarely but it happens.  I think the
hardware of my Indy is fine as all my attempts to reduce the problems I'm
experiencing during my development to a hardware problem have failed.

  Ralf

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To:     "Jakma, Paul" <Paul.Jakma@compaq.com>
Cc:     "'linux@engr.sgi.com'" <linux@cthulhu.engr.sgi.com>
Subject: Re: Indy ISDN on linux?
Message-ID: <19991203105705.D982@uni-koblenz.de>
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On Thu, Dec 02, 1999 at 03:06:26PM -0000, Jakma, Paul wrote:

> I was wondering if the onboard Indy ISDN is supported by linux? I'm
> considering turning my indy into a linux dial-up isdn, masq, firewall box.
> 
> If not supported is anyone considering working on it? and what kind of
> hardware is it? (Doc's/references/pointers appreciated)

Thomas Bogendörfer has implemented the full ISDN support for the IP22.  The
bad news is that his job keeps him to busy to add some finishing touches
and contribute the code back.

  Ralf

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To:     "'Ralf Baechle'" <ralf@oss.sgi.com>
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Subject: RE: Indy ISDN on linux?
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> Thomas Bogendörfer has implemented the full ISDN support for 
> the IP22.  The
> bad news is that his job keeps him to busy to add some 
> finishing touches
> and contribute the code back.
> 
>   Ralf
> 

Great..

I assume his work will be rolled into isdn4linux? Would anyone know of a
timeframe?

ta,

Paul Jakma.

(hoping to avoid having to buy an ISDN TA)

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From:   "Kevin D. Kissell" <kevink@mips.com>
To:     "Ralf Baechle" <ralf@oss.sgi.com>,
        "Alan Cox" <alan@lxorguk.ukuu.org.uk>
Cc:     "Marc Esipovich" <marc@mucom.co.il>, <e1097757@ceng.metu.edu.tr>,
        <linux@cthulhu.engr.sgi.com>
Subject: Re: EXT2 fs error
Date:   Fri, 3 Dec 1999 16:26:42 +0100
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>On Tue, Nov 30, 1999 at 07:52:04PM +0000, Alan Cox wrote:
>
>> If there is a scsi error before the ext2fs error then yes probably so
>> You are looking for a "media error" probably.
>>
>> > > SCSI bus is being reset for 0 channel 0.
>> > > scsi0 reset. sending SDTR
>> >
>> > SCSI reset is due to repeated attempts to read a block, or I might be
>> > wrong and it it's due to a malfunction of the controller on your HD.
>>
>> You can get it off some working sane hardware if you try and ask for
stupid
>> block numbers. It is worth doing a full fsck on the drive before assuming
>> hardware. Also check the cabling seems sound and is well attached and
that
>> parity is enabled on the controller if the bios sets it.
>
>I've seen this happening on my Indy as well like once every month or even
>more rarely.  It only happens very rarely but it happens.  I think the
>hardware of my Indy is fine as all my attempts to reduce the problems I'm
>experiencing during my development to a hardware problem have failed.
>
>  Ralf

By any chance are you guys seeing this on R5000 Indys?
There is an assumption in arch/mips/mm/r4xx0.c that
flushing the secondary cache automagically flushes
the same address in the primary data cache, but that
assumption is not universally valid and there is no
reason to believe that it is true on the R5K.   This
could cause periodic random corruptions of DMA
transfers, which could in turn manifest themselves
as corrupted files or file system meta-data.  The
R4000/R4400SC systems, and the entry-level
Indy's without secondary caches should not be
at risk.

            Kevin K.


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To:     "Kevin D. Kissell" <kevink@mips.com>
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On Fri, Dec 03, 1999 at 04:26:42PM +0100, Kevin D. Kissell wrote:

> >I've seen this happening on my Indy as well like once every month or even
> >more rarely.  It only happens very rarely but it happens.  I think the
> >hardware of my Indy is fine as all my attempts to reduce the problems I'm
> >experiencing during my development to a hardware problem have failed.

> By any chance are you guys seeing this on R5000 Indys?

Yes.

> There is an assumption in arch/mips/mm/r4xx0.c that flushing the secondary
> cache automagically flushes the same address in the primary data cache,
> but that assumption is not universally valid and there is no reason to
> believe that it is true on the R5K.

We make this assumption for R[04]00[SM]C CPUs only.  For R5000SC CPU modules
as in the Indy the assumption is that we don't need to flush the l2 caches
unless we do a DMA operation in which case the special r4k_dma_*
functions will take care of the whatever might be necessary to keep caches
consistent with DMA.

  Ralf

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Subject: Re: RM200, off topic?
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I have a friend at Siemens who may be able to help you with this.

Here are some of his suggestions.  Good Luck,  I'd like to see Linux on
MIPS succeed.

Thanks,



>         drivers/block/block.a drivers/char/char.a drivers/misc/misc.a
> drivers/net/net.a \
>         arch/mips/lib/lib.a /usr/src/kernel-source-2.2.1/lib/lib.a
> arch/mips/lib/lib.a \
>         --end-group \
>         -o vmlinux
> arch/mips/kernel/head.o: In function `except_vec3_r4000':
> head.S(.text+0x580): undefined reference to `vced_count'
> head.S(.text+0x584): undefined reference to `vced_count'
> head.S(.text+0x58c): undefined reference to `vced_count'
> head.S(.text+0x59c): undefined reference to `vcei_count'
> head.S(.text+0x5a0): undefined reference to `vcei_count'
> head.S(.text+0x5a8): undefined reference to `vcei_count'

Looks like this kernel's bottom-half doesn't support being compiled with
the options he selected. Chances are he should start with the kernels
used
on Cobalt machines. 2.0.3x and start from there. 

FWIW, this is complaining because an exception handler doesn't have an
associated count variable (used for things like /proc/interrupts). Since
the interrupt stubs are mechanically generated, you just need to declare
teh varable to make it happy (you don't need to use it).

In irq.c, add:

int  vced_count = 0;

In addition, he should contact Siemens directly as they are beginning to
support Linux to a degree. 

> arch/mips/kernel/head.o: In function `kernel_entry':
> head.S(.text+0x604): undefined reference to `prom_init'
> head.S(.text+0x604): relocation truncated to fit: R_MIPS_26 prom_init
> arch/mips/mm/mm.o: In function `free_initmem':
> init.c(.text+0x5f0): undefined reference to `prom_free_prom_memory'
> init.c(.text+0x5f0): relocation truncated to fit: R_MIPS_26
> prom_free_prom_memory
> arch/mips/mm/mm.o: In function `get_pte_kernel_slow':
> init.c(.text.init+0x138): undefined reference to `prom_fixup_mem_map'
> init.c(.text.init+0x138): relocation truncated to fit: R_MIPS_26
> prom_fixup_mem_map
> make: *** [vmlinux] Error 1

I don't have anything like that (I don't have the patched kernel -- nor
do
I have -- or like the MIPS processor); but it looks like your make files
just need some havking to compile the MIPS prom interface code in.

Most MIPS-based computers, SGI and RM included, use variations on the
ROM
provided by MIPS. This is the interface to that. Chances aren, it isn't
being compiled/or linked properly.
 
> I'm willing to learn to hack the RM specific code and to try to do lot
> of
> things by myself, but right now, I'm not even able to compile the
> kernel!

I respect this. Not that I work on the RM division or anything.





Ralf Baechle wrote:
> 
> On Thu, Nov 25, 1999 at 11:30:52AM +0100, Radim Gelner wrote:
> 
> > I've read in SGI/howto that this is list for SGI based computers, so
> > sorry about this quite off-topic letter, but I'm really desperate.
> >
> > I'm very interested in setting up Linux on SNI RM200. I have RM200 in my
> > office and I want to see Linux running on it, but my knowledge about this
> > subject is quite limited. I have no one to learn from. I mean there are
> > lot of peoples in mailing lists who are willing to help me, but nobody
> > owns this particular hardware, so the hints I get are quite general. Is
> > out there someone who is able to provide me some information on Linux on
> > RMs? Or on someone who does this?
> >
> > I've hopefully compiled both binutils and egcs for cross-devel, now I'm
> > ready for kernel. I've tried mips patched 2.2.1 found on
> > decstation.unix-ag.org but althought it's said to support RMs, I'm unable
> > to get over rm200-pci part of compilation. If I disable the support for
> > RM200 PCI, which is nonsense, but just to see what is going on, I get
> > various linker errors:
> >
> > make[1]: Leaving directory `/usr/src/kernel-source-2.2.1/arch/mips/tools'
> > mipsel-linux-ld -static -G 0 -T arch/mips/ld.script.little
> > arch/mips/kernel/head.o arch/mips/kernel/init_task.o init/main.o
> > init/version.o \
> >         --start-group \
> >         arch/mips/kernel/kernel.o arch/mips/mm/mm.o kernel/kernel.o
> > mm/mm.o fs/fs.o ipc/ipc.o \
> >         fs/filesystems.a \
> >         net/network.a \
> >         drivers/block/block.a drivers/char/char.a drivers/misc/misc.a
> > drivers/net/net.a \
> >         arch/mips/lib/lib.a /usr/src/kernel-source-2.2.1/lib/lib.a
> > arch/mips/lib/lib.a \
> >         --end-group \
> >         -o vmlinux
> > arch/mips/kernel/head.o: In function `except_vec3_r4000':
> > head.S(.text+0x580): undefined reference to `vced_count'
> > head.S(.text+0x584): undefined reference to `vced_count'
> > head.S(.text+0x58c): undefined reference to `vced_count'
> > head.S(.text+0x59c): undefined reference to `vcei_count'
> > head.S(.text+0x5a0): undefined reference to `vcei_count'
> > head.S(.text+0x5a8): undefined reference to `vcei_count'
> 
> This is a minor braino in proc.c.  Just enable procfs support and recompile.
> 
> > arch/mips/kernel/head.o: In function `kernel_entry':
> > head.S(.text+0x604): undefined reference to `prom_init'
> > head.S(.text+0x604): relocation truncated to fit: R_MIPS_26 prom_init
> > arch/mips/mm/mm.o: In function `free_initmem':
> > init.c(.text+0x5f0): undefined reference to `prom_free_prom_memory'
> > init.c(.text+0x5f0): relocation truncated to fit: R_MIPS_26
> > prom_free_prom_memory
> > arch/mips/mm/mm.o: In function `get_pte_kernel_slow':
> > init.c(.text.init+0x138): undefined reference to `prom_fixup_mem_map'
> > init.c(.text.init+0x138): relocation truncated to fit: R_MIPS_26
> > prom_fixup_mem_map
> > make: *** [vmlinux] Error 1
> 
> > I'm willing to learn to hack the RM specific code and to try to do lot of
> > things by myself, but right now, I'm not even able to compile the kernel!
> 
> Sorry for not answering your emails earlier, I've been busy with hacking
> the MIPS64 code.  The RM200 support got broken by the changes to the ARC
> code above and a minor procfs dumbne
> 
> Fixing would actually be easy ... IF SNI's firmware wouldn't use the
> freedom granted by the ARC spec and ignore the load address of every
> executable.  As it seems every executable gets loaded to the load address
> plus 8 bytes.  The simplest fix it looks like would be to write some
> relocatable code directly at the start of the kernel binary which moves
> everything around to the right place.
> 
> The other SNI bug which I've reported some time ago to this list, the
> interrupt system dying seems to be fixed.  It is caused by an interupt
> hardware foobar.  SNI pointed out a workaround and that one seems to
> be stable in 2.1.131 for me, I've done my entire Linux/MIPS64 work using
> the RM200 as the console for my Origin.
> 
> More later ...
> 
>   Ralf

-- 
_______________________________________________________________
Frank B. Pound

From owner-linuxmips@oss.sgi.com Mon Dec  6 02:40:08 1999
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Subject: Re: Question for David Miller or anyone else about R6000 code
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Hello,

	How about R10000 on O2 ? are you working on that aswell?
	Do you have or know where to get documentation of O2's hardware,
	I've opened mine up, the only thing I was able to recognize were
	two Adaptec 7880P controllers (if I recall the model number
	correctly),  could you point me to some place which has docs?

	Thanks,
		Marc Esipovich.

--
root is only a few clicks away...



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From:   Thomas Bogendoerfer <tsbogend@hub-fue.franken.de>
To:     "Jakma, Paul" <Paul.Jakma@compaq.com>
Cc:     "'Ralf Baechle'" <ralf@oss.sgi.com>,
        "'linux@engr.sgi.com'" <linux@cthulhu.engr.sgi.com>
Subject: Re: Indy ISDN on linux?
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On Fri, Dec 03, 1999 at 01:43:11PM -0000, Jakma, Paul wrote:
> > Thomas Bogendörfer has implemented the full ISDN support for 
> > the IP22.  The bad news is that his job keeps him to busy to add some 
> > finishing touches and contribute the code back.

thanks Ralf for answering.

> I assume his work will be rolled into isdn4linux? Would anyone know of a
> timeframe?

my plan is to integrate my changes into isdn4linux. My current patches
are based on an older isdn4linux version, so I have figure out, what I
need to update and see how a clean integration will be possible (the
Indy ISDN hardware is based on the "normal" Siemens ISDN chips, which could
be found on many cheap ISDN cards. But unlike PC boards it uses two interrupts
instead of one, which makes integration a little bit hairy).

At the moment I don´t have a clue, when I'll find time to even bring up 
my Linux Indy kernel to the current version. I could generate a diff file,
if you want to see, what needs to be done.

Thomas.


From owner-linuxmips@oss.sgi.com Mon Dec  6 02:05:48 1999
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From:   "Kevin D. Kissell" <kevink@mips.com>
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Subject: Question for David Miller or anyone else about R6000 code
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I tried sending this to David Miller at his SGI email
address, just in case it would work.  Of course, it
didn't.  David, if you are reading this mailing list,
I'd appreciate your comments.  And anyone else
having knowledge should feel free to respond as
well!

David:

I don't know that you are still at SGI - indeed, with
all the changes in recent months, I would be a bit
surprised if you were - but this is the last email
address I have for you.

I'm working on cleaning up and enhancing the
MIPS/Linux code to support the new families
of CPUs coming out of MIPS Technologies Inc.
In doing so, I've come across and fixed a number
of bugs, most of which I've also passed back to
Ralf Baechle for integration with the moving
target at linux.sgi.com.   But I came across 
something this morning that, while not a problem
for us, puzzles me.   In arch/mips/mm/r6000.c,
which has your name on it, there is a compiler
directive to use MIPS III instructions, and the
resulting code does indeed end up containing
64-bit (daddiu, etc.) instructions.   I've never
actually programmed an R6000, but all of the
information I have on that processor indicates
that it is a MIPS II, 32-bit design, and that those
instructions should therefore cause exceptions.

Am I mistaken, or is that directive a bug?

            Regards,

            Kevin K.
__

Kevin D. Kissell
MIPS Technologies European Architecture Lab
kevink@mips.com
Tel. +33.4.78.38.70.67
FAX. +33.4.78.38.70.68



From owner-linuxmips@oss.sgi.com Mon Dec  6 03:18:38 1999
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To:     tsbogend@alpha.franken.de
Cc:     "Jakma, Paul" <Paul.Jakma@compaq.com>,
        "'Ralf Baechle'" <ralf@oss.sgi.com>,
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On Sun, Dec 05, 1999 at 07:35:39PM +0100, Thomas Bogendoerfer wrote:

> > I assume his work will be rolled into isdn4linux? Would anyone know of a
> > timeframe?
> 
> my plan is to integrate my changes into isdn4linux. My current patches
> are based on an older isdn4linux version, so I have figure out, what I
> need to update and see how a clean integration will be possible (the
> Indy ISDN hardware is based on the "normal" Siemens ISDN chips, which could
> be found on many cheap ISDN cards. But unlike PC boards it uses two interrupts
> instead of one, which makes integration a little bit hairy).
> 
> At the moment I don´t have a clue, when I'll find time to even bring up 
> my Linux Indy kernel to the current version. I could generate a diff file,
> if you want to see, what needs to be done.

I won't be able to do this as I only have POTS, not ISDN at home and anyway
the other works that I have to do is going slower than expected :-(

Could the two ISDN interrupts be just combined into a single one thereby
hiding the Indy special features completly from the ISDN code?

  Ralf

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To:     "Kevin D. Kissell" <kevink@mips.com>
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Subject: Re: Question for David Miller or anyone else about R6000 code
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On Mon, Dec 06, 1999 at 10:58:10AM +0100, Kevin D. Kissell wrote:

> I'm working on cleaning up and enhancing the
> MIPS/Linux code to support the new families
> of CPUs coming out of MIPS Technologies Inc.
> In doing so, I've come across and fixed a number
> of bugs, most of which I've also passed back to
> Ralf Baechle for integration with the moving
> target at linux.sgi.com.   But I came across 
> something this morning that, while not a problem
> for us, puzzles me.   In arch/mips/mm/r6000.c,
> which has your name on it, there is a compiler
> directive to use MIPS III instructions, and the
> resulting code does indeed end up containing
> 64-bit (daddiu, etc.) instructions.   I've never
> actually programmed an R6000, but all of the
> information I have on that processor indicates
> that it is a MIPS II, 32-bit design, and that those
> instructions should therefore cause exceptions.
> 
> Am I mistaken, or is that directive a bug?

It obviously is.  The R6000 code isn't supposed to work and given that
currently none of the Linux/MIPS hackers has a) R6000 documentation and
b) an R6000 machine an R6000 port ever happening is highly unprobable.
As the result of this I think I'm going to just burry the R6000 support
and while I'm at it also the R8000.

  Ralf

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Message-ID: <006801bf3fde$cd110ec0$0ceca8c0@satanas.mips.com>
From:   "Kevin D. Kissell" <kevink@mips.com>
To:     "Marc Esipovich" <marc@mucom.co.il>
Cc:     "Linux SGI" <linux@cthulhu.engr.sgi.com>
Subject: Re: Question for David Miller or anyone else about R6000 code
Date:   Mon, 6 Dec 1999 12:41:08 +0100
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The R10000/R12000 programs are still within SGI,
and are not supported directly by MIPS Technologies
Inc.   The MIPS/Linux kernel today does not support
the R10000 (there's a panic("CPU too expensive");
somewhere if the Processor ID for R10K is detected),
but the CPU should not be at all difficult to support in
the kernel - it was a design constraint of the R10K
that it run the same Windows NT kernel as the
R4400, so the CP0 is a pretty strict superset of 
the R4K.   The hard part of an R10K/O2 port would
be more in the drivers than in the CPU support.
The O2 went for a high-bandwidth "unified memory
architecture" design which has very little resemblence
to any other Linux platform of which I am aware.
I've seen references on this and other mailing lists
to people working on getting Linux onto the O2.
Hopefully, they will respond.

            Regards,

            Kevin K.

-----Original Message-----
From: Marc Esipovich <marc@mucom.co.il>
To: Kevin D. Kissell <kevink@mips.com>
Cc: Linux SGI <linux@cthulhu.engr.sgi.com>
Date: Monday, December 06, 1999 11:33 AM
Subject: Re: Question for David Miller or anyone else about R6000 code


>Hello,
>
> How about R10000 on O2 ? are you working on that aswell?
> Do you have or know where to get documentation of O2's hardware,
> I've opened mine up, the only thing I was able to recognize were
> two Adaptec 7880P controllers (if I recall the model number
> correctly),  could you point me to some place which has docs?
>
> Thanks,
> Marc Esipovich.
>
>--
>root is only a few clicks away...
>
>


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To:     "Kevin D. Kissell" <kevink@mips.com>
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On Mon, Dec 06, 1999 at 12:41:08PM +0100, Kevin D. Kissell wrote:

> The R10000/R12000 programs are still within SGI,
> and are not supported directly by MIPS Technologies
> Inc.   The MIPS/Linux kernel today does not support
> the R10000 (there's a panic("CPU too expensive");
> somewhere if the Processor ID for R10K is detected),

MIPS64 has R10k support.  I didn't even try to fix it for MIPS32 because
that kernel only supports upto 512mb memory.  And as you say it was
easy to implement.

  Ralf

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From:   Thomas Bogendoerfer <tsbogend@hub-fue.franken.de>
To:     Ralf Baechle <ralf@oss.sgi.com>
Cc:     tsbogend@alpha.franken.de, "Jakma, Paul" <Paul.Jakma@compaq.com>,
        "'linux@engr.sgi.com'" <linux@cthulhu.engr.sgi.com>
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On Mon, Dec 06, 1999 at 09:08:50AM -0200, Ralf Baechle wrote:
> Could the two ISDN interrupts be just combined into a single one thereby
> hiding the Indy special features completly from the ISDN code?

sure, but I don't think this kludge will be necessary. Since all of the PC
boards differ from each other, there is already a custom setup routine
which deals with these differences. I'm already using it, but I still
needed to change common code. I've already talked to Karsten Keil
(isdn4linux Maintainer) about that issue, and I'm sure is solvable.

Thomas.


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From:   "Kevin D. Kissell" <kevink@mips.com>
To:     "Linux SGI" <linux@cthulhu.engr.sgi.com>
Subject: Nomenclature: "MIPS32", "MIPS64"
Date:   Mon, 6 Dec 1999 13:44:55 +0100
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I note that various people involved in this effort
refer to the 32-bit version of the MIPS/Linux
port as "MIPS32" and the 64-bit version as
"MIPS64".   Thus far, I have not observed those
strings making it into the source repositories,
but before they do, there's something I must
point out.

"MIPS32" and "MIPS64" have a very specific
meaning now, and for all I know are already
trademarked/brandmarked/whatever by
MIPS Technologies Inc. to describe the new
baseline ISA and privileged resource architecture
(CP0, in other words) standards for 32-bit
and 64-bit MIPS devices.   It's no big deal
for informal discussion, but *please* do not
use the strings "MIPS32" or "MIPS64" in the
code or documentation unless you are really
and truly referring to MIPS32 and MIPS64
as defined by MIPS.   If you want to refer to
the 64-bit versus 32-bit Linux ports, please
express it otherwise, e.g. MIPS64bit,
MIPS_64_bit, 64bitMIPS, etc.   Otherwise
there is going to be a lot of needless confusion
and a further source schism.

            Regards,

            Kevin K.
__

Kevin D. Kissell
MIPS Technologies European Architecture Lab
kevink@mips.com
Tel. +33.4.78.38.70.67
FAX. +33.4.78.38.70.68


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To:     "Kevin D. Kissell" <kevink@mips.com>
Cc:     Linux SGI <linux@cthulhu.engr.sgi.com>
Subject: Re: Nomenclature: "MIPS32", "MIPS64"
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On Mon, Dec 06, 1999 at 01:44:55PM +0100, Kevin D. Kissell wrote:

> "MIPS32" and "MIPS64" have a very specific
> meaning now, and for all I know are already
> trademarked/brandmarked/whatever by
> MIPS Technologies Inc. to describe the new
> baseline ISA and privileged resource architecture
> (CP0, in other words) standards for 32-bit
> and 64-bit MIPS devices.   It's no big deal
> for informal discussion, but *please* do not
> use the strings "MIPS32" or "MIPS64" in the
> code or documentation unless you are really
> and truly referring to MIPS32 and MIPS64
> as defined by MIPS.   If you want to refer to
> the 64-bit versus 32-bit Linux ports, please
> express it otherwise, e.g. MIPS64bit,
> MIPS_64_bit, 64bitMIPS, etc.   Otherwise
> there is going to be a lot of needless confusion
> and a further source schism.

The use of these terms is pretty coherent with their meaning as given by
Mips, Inc.  Linux/MIPS32 is a implementation of Linux (mostly) for MIPS32
processors, Linux/MIPS64 for MIPS64 processors, so I don't see the problem.

  Ralf

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From:   "Kevin D. Kissell" <kevink@mips.com>
To:     "Ralf Baechle" <ralf@oss.sgi.com>
Cc:     "Linux SGI" <linux@cthulhu.engr.sgi.com>
Subject: Re: Nomenclature: "MIPS32", "MIPS64"
Date:   Mon, 6 Dec 1999 14:29:06 +0100
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>On Mon, Dec 06, 1999 at 01:44:55PM +0100, Kevin D. Kissell wrote:
>
>> "MIPS32" and "MIPS64" have a very specific
>> meaning now, and for all I know are already
>> trademarked/brandmarked/whatever by
>> MIPS Technologies Inc. to describe the new
>> baseline ISA and privileged resource architecture
>> (CP0, in other words) standards for 32-bit
>> and 64-bit MIPS devices.   It's no big deal
>> for informal discussion, but *please* do not
>> use the strings "MIPS32" or "MIPS64" in the
>> code or documentation unless you are really
>> and truly referring to MIPS32 and MIPS64
>> as defined by MIPS.   If you want to refer to
>> the 64-bit versus 32-bit Linux ports, please
>> express it otherwise, e.g. MIPS64bit,
>> MIPS_64_bit, 64bitMIPS, etc.   Otherwise
>> there is going to be a lot of needless confusion
>> and a further source schism.
>
>The use of these terms is pretty coherent with their meaning as given by
>Mips, Inc.  Linux/MIPS32 is a implementation of Linux (mostly) for MIPS32
>processors, Linux/MIPS64 for MIPS64 processors, so I don't see the problem.
>
>  Ralf

The problems are twofold.  First, while it is of course possible to create
a kernel that will run on both MIPS64 and pre-MIPS64 MIPS-III and
MIPS-IV CPUs, it is also possible to create a MIPS64 kernel that
would not necessarily run on R10000s and vice versa.  Secondly,
we are referring to two distinct things that ought to be distinguished
at the source and documentation level.   We need a name for something 
that is 64-bit-MIPS but not necessarily tied up with any particular CPU 
and a distinct name for something that is compatible with a particular 
CPU type.  "MIPS32" and "MIPS64" are already trademarked
by MIPS to describe the CPUs, so we need another name for the 
generic OS infrastructure for 64-bit MIPS registers/addresses.


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Subject: Re: Nomenclature: "MIPS32", "MIPS64"
To:     kevink@mips.com (Kevin D. Kissell)
Date:   Mon, 6 Dec 1999 13:35:54 +0000 (GMT)
Cc:     ralf@oss.sgi.com, linux@cthulhu.engr.sgi.com
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> The problems are twofold.  First, while it is of course possible to create
> a kernel that will run on both MIPS64 and pre-MIPS64 MIPS-III and
> MIPS-IV CPUs, it is also possible to create a MIPS64 kernel that
> would not necessarily run on R10000s and vice versa.  Secondly,
> we are referring to two distinct things that ought to be distinguished
> at the source and documentation level.   We need a name for something 
> that is 64-bit-MIPS but not necessarily tied up with any particular CPU 
> and a distinct name for something that is compatible with a particular 
> CPU type.  "MIPS32" and "MIPS64" are already trademarked
> by MIPS to describe the CPUs, so we need another name for the 
> generic OS infrastructure for 64-bit MIPS registers/addresses.

I would suggest that until someone from MIPS legal specifically raises an issue
you don't worry about it. With the sparc people they were quite happy with
Linux/sparc - which denotes Linux for sparc systems (they objected to 
sparclinux as that implied it was their product). In fact given the "/" is
'for' then I don't think there is even a valid trademark issue to be raised.

Its also not in MIPS interest to cause trouble. Its a product for their
system. If they started being silly then everyones lawyers would be advising
them to pull their "xyz product for mips" as a legal precaution.




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To:     Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc:     "Kevin D. Kissell" <kevink@mips.com>, ralf@oss.sgi.com,
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Subject: Re: Nomenclature: "MIPS32", "MIPS64"
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On Mon, Dec 06, 1999 at 01:35:54PM +0000, Alan Cox wrote:

> I would suggest that until someone from MIPS legal specifically raises an issue
> you don't worry about it. With the sparc people they were quite happy with
> Linux/sparc - which denotes Linux for sparc systems (they objected to 
> sparclinux as that implied it was their product). In fact given the "/" is
> 'for' then I don't think there is even a valid trademark issue to be raised.
> 
> Its also not in MIPS interest to cause trouble. Its a product for their
> system. If they started being silly then everyones lawyers would be advising
> them to pull their "xyz product for mips" as a legal precaution.

I wouldn't expect MIPS to create any legal problems for anybody; you should
consider this no more than an advice.

  Ralf

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        "Alan Cox" <alan@lxorguk.ukuu.org.uk>
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Subject: Re: Nomenclature: "MIPS32", "MIPS64"
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>On Mon, Dec 06, 1999 at 01:35:54PM +0000, Alan Cox wrote:
>
>> I would suggest that until someone from MIPS legal specifically raises an
issue
>> you don't worry about it. With the sparc people they were quite happy with
>> Linux/sparc - which denotes Linux for sparc systems (they objected to
>> sparclinux as that implied it was their product). In fact given the "/" is
>> 'for' then I don't think there is even a valid trademark issue to be raised.
>>
>> Its also not in MIPS interest to cause trouble. Its a product for their
>> system. If they started being silly then everyones lawyers would be advising
>> them to pull their "xyz product for mips" as a legal precaution.
>
>I wouldn't expect MIPS to create any legal problems for anybody; you should
>consider this no more than an advice.
>
>  Ralf

Exactly.  The point is that there are two different concepts to be represented
in the kernel for which we risk having a name collision, and that the
registration
of the trademark provides an argument somewhat stronger than a coin toss
for resolving it one way and not the other.




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Message-ID: <00b901bf4003$3f583c50$0ceca8c0@satanas.mips.com>
From:   "Kevin D. Kissell" <kevink@mips.com>
To:     "Linux SGI" <linux@cthulhu.engr.sgi.com>
Subject: Kernel Semaphores
Date:   Mon, 6 Dec 1999 17:02:06 +0100
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This is for Ralf and any other MIPS/Linux kernel
hackers who may be on the list.

Some time ago, I fixed the assembler macros
for waking_non_zero_interruptable and down_trylock
to be correct(ish) for MIPSEL and MIPSEB, but
there remained the issue of their requiring the use
of 64-bit instructions to work - they "cheat" by using
the same ll/sc pair to update both the count and the
waking field of the semaphore.

To make it work on 32-bit CPUs, I looked at using
the x386 model, but that one uses interrupt disables
and is intrinsically SMP-unsafe.  Now, looking at 
the comments and studying the code a bit,
it *seems* that the issue is not so much a race
condition between updates of the waking and
count fields, but a race with other functions that
may be updating the waking field.   CAN ANYONE
CONFIRM OR DENY THAT?

If it's true, it looks to me that by inventing one
new primitive in atomic.h, atomic_sub_and_return_if_gtz(),
one can:

    a) Eliminate the need for an assembly macro dedicated
        to waking_non_zero, which maps directly to the new macro.
    b) Make it possible to do waking_non_zero_interruptible in
        C, as all the examinations/updates of sem->waking can
        be made atomic
    c) Likewise simplify down_trylock() and
    d) Make waking_non_zero_trylock() SMP safe.

I've coded this up for experimentation, and will provide
the sources (at least relative to 2.2.12) to any interested
parties, but I'd really like someone who has worked
intimately with the kernel semaphores to tell me if
there really are races between updates of sem->waking
and sem->count, and if they exist, what they are!
__

Kevin D. Kissell
MIPS Technologies European Architecture Lab
kevink@mips.com
Tel. +33.4.78.38.70.67
FAX. +33.4.78.38.70.68


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Ralf Baechle writes:
...
 > Could the two ISDN interrupts be just combined into a single one thereby
 > hiding the Indy special features completly from the ISDN code?

     That ought to be possible, at the very least by tieing the enable
and disable of the ISDN interrupts together.

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To:     "Kevin D. Kissell" <kevink@mips.com>
Cc:     Linux SGI <linux@cthulhu.engr.sgi.com>
Subject: Re: Kernel Semaphores
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On Mon, Dec 06, 1999 at 05:02:06PM +0100, Kevin D. Kissell wrote:

> Some time ago, I fixed the assembler macros
> for waking_non_zero_interruptable and down_trylock
> to be correct(ish) for MIPSEL and MIPSEB, but
> there remained the issue of their requiring the use
> of 64-bit instructions to work - they "cheat" by using
> the same ll/sc pair to update both the count and the
> waking field of the semaphore.

Btw, we have two variants for all the semaphore code as you know.  We
can eleminate the little endian variant by just swapping the order of
the two atomic_t members in struct semaphore which will eleminate the
maintenance problems.

> To make it work on 32-bit CPUs, I looked at using
> the x386 model, but that one uses interrupt disables
> and is intrinsically SMP-unsafe.

semaphore-helper.h uses spin_lock_irqsave which is smp-safe.  The way
we do things for 64-bit MIPS is just more performant.

  Ralf

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To:     "Ralf Baechle" <ralf@oss.sgi.com>
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>> To make it work on 32-bit CPUs, I looked at using
>> the x386 model, but that one uses interrupt disables
>> and is intrinsically SMP-unsafe.
>
>semaphore-helper.h uses spin_lock_irqsave which is smp-safe.  The way
>we do things for 64-bit MIPS is just more performant.


spin_lock_irqsave() in 2.2.12 for MIPS is just a save_and_cli().
The MIPS spin_lock macros all collapse the lock into nothingness.



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On Mon, Dec 06, 1999 at 09:33:38PM +0100, Kevin D. Kissell wrote:

> >> To make it work on 32-bit CPUs, I looked at using
> >> the x386 model, but that one uses interrupt disables
> >> and is intrinsically SMP-unsafe.
> >
> >semaphore-helper.h uses spin_lock_irqsave which is smp-safe.  The way
> >we do things for 64-bit MIPS is just more performant.
> 
> spin_lock_irqsave() in 2.2.12 for MIPS is just a save_and_cli().
> The MIPS spin_lock macros all collapse the lock into nothingness.

Spinlocks are SMP safe; it's just the MIPS implementation which doesn't
get this right so far.

  Ralf

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I've put a snapshot of current CVS kernel sources into
oss.sgi.com:/pub/linux/mips/src/kernel/linux-19991206.tar.gz.

  Ralf

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On Mon, Dec 06, 1999 at 09:44:29PM -0200, Ralf Baechle wrote:
> I've put a snapshot of current CVS kernel sources into
> oss.sgi.com:/pub/linux/mips/src/kernel/linux-19991206.tar.gz.
                                        ^
     Put in v2.3/ and you find it.    --+
> 
>   Ralf


Raz

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To:     Ryan Rafferty <rraffer1@osf1.gmu.edu>
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On Mon, Dec 06, 1999 at 10:14:12PM -0500, Ryan Rafferty wrote:

> Any highlights about important changes present in this snapshot?

Most important for you guys out there the upgrade to 2.3.21 and a number
of bug fixes.  Try it, break it.  Again ;-)  Aside of this this kernel
also has a good part of the 64-bit stuff.  Not all of it, I'm maintaining
the 32-bit kernel, the Indy 64-bit and the Origin kernel as separate
trees to prevent bugs from creeping from on tree in the other.

> On Mon, 6 Dec 1999, Ralf Baechle wrote:
> 
> > I've put a snapshot of current CVS kernel sources into
> > oss.sgi.com:/pub/linux/mips/src/kernel/linux-19991206.tar.gz.

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From:   Mike Hill <mikehill@hgeng.com>
To:     "'Ralf Baechle'" <ralf@oss.sgi.com>
Cc:     linux@cthulhu.engr.sgi.com
Subject: RE: Snapshot
Date:   Tue, 7 Dec 1999 15:05:43 -0500 
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Hi Ralf,

This compiles very well (i386 cross-compiled) unless I add serial console
support, in which case it finishes like this:

mips-linux-ld -static -G 0 -T arch/mips/ld.script.big -Ttext 0x88002000
arch/mips/kernel/head.o arch/mips/kernel/init_task.o init/main.o
init/version.o \
   --start-group \
   arch/mips/kernel/kernel.o arch/mips/mm/mm.o kernel/kernel.o mm/mm.o
fs/fs.o ipc/ipc.o \
   fs/filesystems.a \
   net/network.a \
   drivers/block/block.a drivers/char/char.o drivers/misc/misc.o
drivers/parport/parport.a drivers/net/net.a drivers/scsi/scsi.a
drivers/cdrom/cdrom.a drivers/sound/sounddrivers.o drivers/sgi/sgi.a
drivers/video/video.a \
   arch/mips/lib/lib.a /usr/src/mips/linux-19991206/lib/lib.a
arch/mips/sgi/kernel/sgikern.a arch/mips/arc/arclib.a \
   --end-group \
   -o vmlinux
arch/mips/sgi/kernel/sgikern.a(setup.o): In function `sgi_write_output':
setup.c(.text.init+0x84): undefined reference to `console_setup'
setup.c(.text.init+0x84): relocation truncated to fit: R_MIPS_26
console_setup
make: *** [vmlinux] Error 1

The CVS 2.2 source still compiles.

Regards,

Mike


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From:   fisher@hollywood.engr.sgi.com (William Fisher)
Message-Id: <199912080313.TAA24823@hollywood.engr.sgi.com>
Subject: Re: Question for David Miller or anyone else about R6000 code
To:     ralf@oss.sgi.com, kevink@mips.com
Date:   Tue, 7 Dec 1999 19:13:05 -0800 (PST)
Cc:     linux@hollywood.engr.sgi.com,
        fisher@hollywood.engr.sgi.com (William Fisher)
In-Reply-To: <19991206092830.C765@uni-koblenz.de> from "Ralf Baechle" at Dec 6, 99 09:28:30 am
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> 
> On Mon, Dec 06, 1999 at 10:58:10AM +0100, Kevin D. Kissell wrote:
> 
> > I'm working on cleaning up and enhancing the
> > MIPS/Linux code to support the new families
> > of CPUs coming out of MIPS Technologies Inc.
> > In doing so, I've come across and fixed a number
> > of bugs, most of which I've also passed back to
> > Ralf Baechle for integration with the moving
> > target at linux.sgi.com.   But I came across 
> > something this morning that, while not a problem
> > for us, puzzles me.   In arch/mips/mm/r6000.c,
> > which has your name on it, there is a compiler
> > directive to use MIPS III instructions, and the
> > resulting code does indeed end up containing
> > 64-bit (daddiu, etc.) instructions.   I've never
> > actually programmed an R6000, but all of the
> > information I have on that processor indicates
> > that it is a MIPS II, 32-bit design, and that those
> > instructions should therefore cause exceptions.
> > 
> > Am I mistaken, or is that directive a bug?
> 
> It obviously is.  The R6000 code isn't supposed to work and given that
> currently none of the Linux/MIPS hackers has a) R6000 documentation and
> b) an R6000 machine an R6000 port ever happening is highly unprobable.
> As the result of this I think I'm going to just burry the R6000 support
> and while I'm at it also the R8000.
> 
>   Ralf
> 
	Since the R6000 was an ECL machine produced in late 1992, just
	before the MIPS/SGI merger. There were only a few machines sold
	and the machine was designed to be a Fortran FP specialist.

	Hence the R6000 is long since dead. We still have the MIPS risc/os 5.01
	operating system source code, so if anybody has lots of free cycles
	to waste, I'm sure we can send them locore.

-- Bill


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From:   Alistair Lambie <alambie@rock.csd.sgi.com>
Organization: SGI
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Subject: Re: Question for David Miller or anyone else about R6000 code
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William Fisher wrote:
> 
> >
> > On Mon, Dec 06, 1999 at 10:58:10AM +0100, Kevin D. Kissell wrote:
> >
> > > I'm working on cleaning up and enhancing the
> > > MIPS/Linux code to support the new families
> > > of CPUs coming out of MIPS Technologies Inc.
> > > In doing so, I've come across and fixed a number
> > > of bugs, most of which I've also passed back to
> > > Ralf Baechle for integration with the moving
> > > target at linux.sgi.com.   But I came across
> > > something this morning that, while not a problem
> > > for us, puzzles me.   In arch/mips/mm/r6000.c,
> > > which has your name on it, there is a compiler
> > > directive to use MIPS III instructions, and the
> > > resulting code does indeed end up containing
> > > 64-bit (daddiu, etc.) instructions.   I've never
> > > actually programmed an R6000, but all of the
> > > information I have on that processor indicates
> > > that it is a MIPS II, 32-bit design, and that those
> > > instructions should therefore cause exceptions.
> > >
> > > Am I mistaken, or is that directive a bug?
> >
> > It obviously is.  The R6000 code isn't supposed to work and given that
> > currently none of the Linux/MIPS hackers has a) R6000 documentation and
> > b) an R6000 machine an R6000 port ever happening is highly unprobable.
> > As the result of this I think I'm going to just burry the R6000 support
> > and while I'm at it also the R8000.
> >
> >   Ralf
> >
>         Since the R6000 was an ECL machine produced in late 1992, just
>         before the MIPS/SGI merger. There were only a few machines sold
>         and the machine was designed to be a Fortran FP specialist.
> 
>         Hence the R6000 is long since dead. We still have the MIPS risc/os 5.01
>         operating system source code, so if anybody has lots of free cycles
>         to waste, I'm sure we can send them locore.
> 

Don't forget CDC used the R6000 and ramped it to 90MHz.  They also got
it going in an SMP configuration with 4 processors from what I can
remember.  I guess it is possible that someone could actually want to
burn some cycles on this, although they had better have a cheap source
of power and good airconditioning :-)

Alistair

-- 
Alistair Lambie                                alambie@csd.sgi.com
SGI Global Product Support
Level 5, Cigna House,                                M/S: INZ-3780
PO Box 24 093,                                  Ph: +64-4-494 6325
40 Mercer St, Wellington,                      Fax: +64-4-494 6321
New Zealand                                 Mobile: +64-21-635 262

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Cc:     ralf@oss.sgi.com, kevink@mips.com, linux@hollywood.engr.sgi.com,
        fisher@hollywood.engr.sgi.com (William Fisher)
Subject: Re: Question for David Miller or anyone else about R6000 code
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William Fisher writes:
...
 > 	Since the R6000 was an ECL machine produced in late 1992, just
 > 	before the MIPS/SGI merger. There were only a few machines sold
 > 	and the machine was designed to be a Fortran FP specialist.
 > 
 > 	Hence the R6000 is long since dead. We still have the MIPS risc/os 5.01
 > 	operating system source code, so if anybody has lots of free cycles
 > 	to waste, I'm sure we can send them locore.

      Actually, CDC later sold quite a few multiple-processor machines, after
MIPS was merged into SGI.  They are not very practical, however, as they
use a lot of power and are only a little faster than a 100 MHZ R4000SC.

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To:     Alistair Lambie <alambie@rock.csd.sgi.com>
Cc:     fisher@sgi.com, kevink@mips.com, linux@hollywood.engr.sgi.com,
        William Fisher <fisher@hollywood.engr.sgi.com>
Subject: Re: Question for David Miller or anyone else about R6000 code
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On Wed, Dec 08, 1999 at 05:30:49PM +1300, Alistair Lambie wrote:

> Don't forget CDC used the R6000 and ramped it to 90MHz.  They also got
> it going in an SMP configuration with 4 processors from what I can
> remember.  I guess it is possible that someone could actually want to
> burn some cycles on this, although they had better have a cheap source
> of power and good airconditioning :-)

At one time some Linux/m68k hacker was seriously looking into porting
Linux to a 3-CPU 256mb CDC which at that time was used as
ftp.uni-erlangen.de.

As usual the largest problem was technical documentation for the machine
and the CPU; the R6k is covered very badly by the freely available
documentation.

  Ralf

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Date:   Wed, 08 Dec 1999 15:46:29 -0700
From:   Jeff Harrell <jharrell@ti.com>
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Subject: Exceptions
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I have been working through the initialization code for the MIPS/Linux
kernel and have traced through to the point
where the MIPS exceptions are installed.  I have not been able to locate
the following routines

        handle_adel
        handle_ades
        handle_sys
        handle_bp
        handle_n
        handle_cpu
        handle_ov
        handle_tr
        handle_fpe

I see where these are defined by "extern asmlinkage" references but
can't locate the actual implementation of these
exceptions.  Any idea what files these routines might be located in?
Any help would be greatly appreciated

Thank you,
Jeff Harrell


---------8< excerpt from kernel/traps.c -----

 set_except_vector(1, handle_mod);
 set_except_vector(2, handle_tlbl);
 set_except_vector(3, handle_tlbs);
 set_except_vector(4, handle_adel);
 set_except_vector(5, handle_ades);
 /*
  * The Data Bus Error/ Instruction Bus Errors are signaled
  * by external hardware.  Therefore these two expection have
  * board specific handlers.
  */
 set_except_vector(6, handle_ibe);
 set_except_vector(7, handle_dbe);
 ibe_board_handler = default_be_board_handler;
 dbe_board_handler = default_be_board_handler;

 set_except_vector(8, handle_sys);
 set_except_vector(9, handle_bp);
 set_except_vector(10, handle_ri);
 set_except_vector(11, handle_cpu);
 set_except_vector(12, handle_ov);
 set_except_vector(13, handle_tr);
 set_except_vector(15, handle_fpe);


--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jeff Harrell                    Work:  (801) 619-6104
Broadband Access group/TI
jharrell@ti.com
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~




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Message-ID: <384F62DB.8DE09E3B@mips.com>
Date:   Thu, 09 Dec 1999 09:05:47 +0100
From:   Carsten Langgaard <carstenl@mips.com>
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Jeff Harrell wrote:

> I have been working through the initialization code for the MIPS/Linux
> kernel and have traced through to the point
> where the MIPS exceptions are installed.  I have not been able to locate
> the following routines
>
>         handle_adel
>         handle_ades
>         handle_sys
>         handle_bp
>         handle_n
>         handle_cpu
>         handle_ov
>         handle_tr
>         handle_fpe
>
> I see where these are defined by "extern asmlinkage" references but
> can't locate the actual implementation of these
> exceptions.  Any idea what files these routines might be located in?
> Any help would be greatly appreciated

They are located in arch/mips/kernel/entry.S
They are a little hard to find as they use the BUILD_HANDLER macro to
extract the routines.

>
>
> Thank you,
> Jeff Harrell
>
> ---------8< excerpt from kernel/traps.c -----
>
>  set_except_vector(1, handle_mod);
>  set_except_vector(2, handle_tlbl);
>  set_except_vector(3, handle_tlbs);
>  set_except_vector(4, handle_adel);
>  set_except_vector(5, handle_ades);
>  /*
>   * The Data Bus Error/ Instruction Bus Errors are signaled
>   * by external hardware.  Therefore these two expection have
>   * board specific handlers.
>   */
>  set_except_vector(6, handle_ibe);
>  set_except_vector(7, handle_dbe);
>  ibe_board_handler = default_be_board_handler;
>  dbe_board_handler = default_be_board_handler;
>
>  set_except_vector(8, handle_sys);
>  set_except_vector(9, handle_bp);
>  set_except_vector(10, handle_ri);
>  set_except_vector(11, handle_cpu);
>  set_except_vector(12, handle_ov);
>  set_except_vector(13, handle_tr);
>  set_except_vector(15, handle_fpe);
>
> --
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> Jeff Harrell                    Work:  (801) 619-6104
> Broadband Access group/TI
> jharrell@ti.com
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

--
_    _ ____  ___   Carsten Langgaard   mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 2B      Switch: +45 4486 5555
TECHNOLOGIES INC   2750 Ballerup       Fax...: +45 4486 5556
                   Denmark               http://www.mips.com




From owner-linuxmips@oss.sgi.com Thu Dec  9 02:49:43 1999
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From:   Ralf Baechle <ralf@oss.sgi.com>
To:     Carsten Langgaard <carstenl@mips.com>
Cc:     sgi-mips <linux@cthulhu.engr.sgi.com>
Subject: Re: Exceptions
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On Thu, Dec 09, 1999 at 09:05:47AM +0100, Carsten Langgaard wrote:

> > I have been working through the initialization code for the MIPS/Linux
> > kernel and have traced through to the point
> > where the MIPS exceptions are installed.  I have not been able to locate
> > the following routines
> >
> >         handle_adel
> >         handle_ades
> >         handle_sys
> >         handle_bp
> >         handle_n
> >         handle_cpu
> >         handle_ov
> >         handle_tr
> >         handle_fpe
> >
> > I see where these are defined by "extern asmlinkage" references but
> > can't locate the actual implementation of these
> > exceptions.  Any idea what files these routines might be located in?
> > Any help would be greatly appreciated
> 
> They are located in arch/mips/kernel/entry.S
> They are a little hard to find as they use the BUILD_HANDLER macro to
> extract the routines.

No wonder why I haven't ever received a patch for these routines since
the MIPS port exists :-)

They should be rewritten anyway; the current code expands the macro
SAVE_ALL quite often, so has a bad cache performance.

  Ralf

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Date:   Thu, 9 Dec 1999 16:49:08 +0100
From:   Florian Lohoff <flo@rfc822.org>
To:     Ralf Baechle <ralf@oss.sgi.com>
Cc:     linux@cthulhu.engr.sgi.com, linux-mips@fnet.fr,
        linux-mips@vger.rutgers.edu
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On Mon, Dec 06, 1999 at 09:44:29PM -0200, Ralf Baechle wrote:
> I've put a snapshot of current CVS kernel sources into
> oss.sgi.com:/pub/linux/mips/src/kernel/linux-19991206.tar.gz.

Short resume:

Doesnt work on Decstation 5000/150 Mips R4000 ...
Reboots immediatly after end of tftp download ...

KN04 V2.1k    (PC: 0x8005c044, SP: 0x838a9de0)

-tftp boot(3), bootp 193.189.250.46:/boot/vmlinux-2.3.21-decR4k.ecoff
-tftp load 1222624+0+369568

KN04 V2.1k    (PC: 0x8005c044, SP: 0x80047f78)

-tftp boot(3), bootp 193.189.250.46:/boot/vmlinux-2.3.21-decR4k.ecoff
-tftp load 1222624+0+369568

So long ...

Flo
-- 
Florian Lohoff		flo@rfc822.org		      	+49-5241-470566
  ...  The failure can be random; however, when it does occur, it is
  catastrophic and is repeatable  ...             Cisco Field Notice


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On Thu, Dec 09, 1999 at 04:49:08PM +0100, Florian Lohoff wrote:

> On Mon, Dec 06, 1999 at 09:44:29PM -0200, Ralf Baechle wrote:
> > I've put a snapshot of current CVS kernel sources into
> > oss.sgi.com:/pub/linux/mips/src/kernel/linux-19991206.tar.gz.
> 
> Short resume:
> 
> Doesnt work on Decstation 5000/150 Mips R4000 ...
> Reboots immediatly after end of tftp download ...
> 
> KN04 V2.1k    (PC: 0x8005c044, SP: 0x838a9de0)
> 
> -tftp boot(3), bootp 193.189.250.46:/boot/vmlinux-2.3.21-decR4k.ecoff
> -tftp load 1222624+0+369568
> 
> KN04 V2.1k    (PC: 0x8005c044, SP: 0x80047f78)
> 
> -tftp boot(3), bootp 193.189.250.46:/boot/vmlinux-2.3.21-decR4k.ecoff
> -tftp load 1222624+0+369568

The CVS now has a couple of fixes, could you retry?

  Ralf

From owner-linuxmips@oss.sgi.com Thu Dec  9 13:02:14 1999
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Date:   Thu, 09 Dec 1999 22:00:02 +0100 (MET)
Reply-To: "Harald Koerfgen" <Harald.Koerfgen@home.ivm.de>
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From:   Harald Koerfgen <Harald.Koerfgen@home.ivm.de>
To:     Florian Lohoff <flo@rfc822.org>
Subject: Re: Snapshot
Cc:     linux-mips@vger.rutgers.edu, linux-mips@fnet.fr,
        linux@cthulhu.engr.sgi.com, Ralf Baechle <ralf@oss.sgi.com>
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On 09-Dec-99 Florian Lohoff wrote:
> On Mon, Dec 06, 1999 at 09:44:29PM -0200, Ralf Baechle wrote:
>> I've put a snapshot of current CVS kernel sources into
>> oss.sgi.com:/pub/linux/mips/src/kernel/linux-19991206.tar.gz.
> 
> Short resume:
> 
> Doesnt work on Decstation 5000/150 Mips R4000 ...
> Reboots immediatly after end of tftp download ...
> 
> KN04 V2.1k    (PC: 0x8005c044, SP: 0x838a9de0)
> 
> -tftp boot(3), bootp 193.189.250.46:/boot/vmlinux-2.3.21-decR4k.ecoff
> -tftp load 1222624+0+369568
> 
> KN04 V2.1k    (PC: 0x8005c044, SP: 0x80047f78)
> 
> -tftp boot(3), bootp 193.189.250.46:/boot/vmlinux-2.3.21-decR4k.ecoff
> -tftp load 1222624+0+369568
> 
> So long ...

http://oss.sgi.com/www.linux.sgi.com/mips/mips-howto.html

" 6.2 Self compiled kernels crash when booting.

When I build my own kernel, it crashes. On an Indy the crash message looks like
the following; the same problem hits other machines as well but may look
completely different. 

 [...]

This problem is caused by a still unfixed bug in Binutils newer than version
2.7. As a workaround, change the following line in arch/mips/Makefile from: 

   LINKFLAGS       = -static -N
 
to: 

   LINKFLAGS       = -static"

BTW, little endian semaphores for R4xxx and TLB miss handlers for R3xxx are
broken in this snapshot. This is fixed since yesterday and 2.3.21 is happily
running on a /260 and a /133. If you want to play around with recent kernels I
suggest a fresh cvs checkout. Instructions can be found at the above URL.

Hope this helps.

---
Regards,
Harald

From owner-linuxmips@oss.sgi.com Thu Dec  9 14:46:46 1999
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Serial console is not working in 2.3 yet.  I know how to fix it for when
it is included on the command line, but what I came up with for detecting
it from the PROM enviroment is a bit strange.

On Tue, 7 Dec 1999, Mike Hill wrote:
> Hi Ralf,
> 
> This compiles very well (i386 cross-compiled) unless I add serial console
> support, in which case it finishes like this:


From owner-linuxmips@oss.sgi.com Mon Dec 13 12:43:42 1999
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Date:   Mon, 13 Dec 1999 21:27:04 +0100
To:     sgilinux <linux@cthulhu.engr.sgi.com>
From:   Enrique Alonso de Armas <ealonso@alum.etsii.upm.es>
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Hi all.
I have just installed Linux on an Indy 4600.
I have selected 80 packages the minimun I think.

The instalation was ok until the last options.
I was no able to configure timezone, configure services, configure printers.

Now when I boot from Irix ( boot vmlinux root=/dev/sdb1) , kernel loads and stops or appears to be stopped
showing warning: mounting unchecked fs, running e2fsck is recomended
The kernel is the one I used for installation. I mean It takes the IP from de bootp server.
Ah and It says unable to open an initial console.
It does not hung up it is like waiting
Do I need other kernel without bootp?
I can ping it

Thak you in advance


----------------------------
Enrique Alonso de Armas
ealonso@disam.upm.es
http://www.alum.etsii.upm.es
Network/Unix System Admin
----------------------------
Type Bits/KeyID    Date       User ID
pub  1024/A83ECA45 1999/11/29 Enrique Alonso de Armas
<ealonso@disam.upm.es>
                              Enrique Alonso de Armas
<ealonso@alum.etsii.upm.es>

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From owner-linuxmips@oss.sgi.com Mon Dec 13 13:01:53 1999
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Subject: linuxmips almost rules
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Hi all.
    I have just installed Linux on an Indy 4600.
    I have selected 80 packages the minimun I think.

    The instalation was ok until the last options.
    I was no able to configure timezone, configure services, configure printers.

    Now when I boot from Irix ( boot vmlinux root=/dev/sdb1) , kernel loads and stops or
    appears to be stopped
    showing warning: mounting unchecked fs, running e2fsck is recomended
    The kernel is the one I used for installation. I mean It takes the IP from de bootp
    server.
    Ah and It says unable to open an initial console.
    It does not hung up it is like waiting
    Do I need other kernel without bootp?
    I can ping it

    Thak you in advance



----------------------------
Enrique Alonso de Armas
ealonso@disam.upm.es
http://www.alum.etsii.upm.es
Network/Unix System Admin
----------------------------
Type Bits/KeyID    Date       User ID
pub  1024/A83ECA45 1999/11/29 Enrique Alonso de Armas
<ealonso@disam.upm.es>
                              Enrique Alonso de Armas
<ealonso@alum.etsii.upm.es>

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From owner-linuxmips@oss.sgi.com Fri Dec 17 12:28:29 1999
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Date:   Fri, 17 Dec 1999 12:08:51 -0800 (PST)
From:   Khaled Labib <labibk@taec.toshiba.com>
Message-Id: <199912172008.MAA22757@stafford.taec.com>
To:     linux@cthulhu.engr.sgi.com
Subject: Milo
Cc:     labibk@taec.toshiba.com
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Hi,

I am using linux/MIPS kernel v2.2.1 and I am now considering loading it. I 
looked at the Milo 0.27. 

There is very little documentation for Milo, basically, a single README file. 

Can some one point me on where to get more info about Milo. I need basically the 
following:

1- How exactly does Milo boot the kernel ?
2- Where should the Milo executable reside. On Disk, ROM ...etc. ?
3- What functions does Milo perform ?
4- Do I still need BIOS support with Milo ?
5- What is this ARC firmware ?
6- Where is the latest Milo ?

I'll be booting this kernel on a harware Emulator with a limited functionality 
target board. The Target board itself is a PCI-based board that sits in a 
regular PC and contains memory (system memory).

I would appreciate pointers to information related to the above.


Thank you.


Khaled Labib

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From:   Ralf Baechle <ralf@oss.sgi.com>
To:     Khaled Labib <labibk@taec.toshiba.com>
Cc:     linux@cthulhu.engr.sgi.com
Subject: Re: Milo
Message-ID: <19991218110330.B838@uni-koblenz.de>
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On Fri, Dec 17, 1999 at 12:08:51PM -0800, Khaled Labib wrote:

> I am using linux/MIPS kernel v2.2.1 and I am now considering loading it. I 
> looked at the Milo 0.27. 
> 
> There is very little documentation for Milo, basically, a single README
> file.  Can some one point me on where to get more info about Milo. I need
> basically the following:
> 
> 1- How exactly does Milo boot the kernel ?
> 2- Where should the Milo executable reside. On Disk, ROM ...etc. ?

On any medium that is supporte by the ARC firmware implementation.  In
practice that means a TFTP/BOOTP server, CDROM, FAT fs on a local harddisk.

> 3- What functions does Milo perform ?
> 4- Do I still need BIOS support with Milo ?
> 5- What is this ARC firmware ?

Basically a very primitive OS or BIOS for PC-oid brains.

> 6- Where is the latest Milo ?

0.27.1 is the latest, from oss.sgi.com or other places that collect antique
stuff.

> I'll be booting this kernel on a harware Emulator with a limited
> functionality target board. The Target board itself is a PCI-based board
> that sits in a regular PC and contains memory (system memory).
> 
> I would appreciate pointers to information related to the above.

I recommend to not use Milo.  The normal build process will provide you an
ELF kernel binary; with elf2ecoff the kernel sources also provide you with
a tool to convert this into ECOFF.  That is what more than 95% of embedded
and evaluation systems will need.  Milo was only used in the early stages
of Linux/MIPS development has been abandomed like two years ago.

  Ralf

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To:     linux@cthulhu.engr.sgi.com
Subject: patch for glibc-2.0.6
From:   Jun Matsuda <jmatsu@cse.canon.co.jp>
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Hi,

I plan to construct the cross compilation environment as
described in the Linux/MIPS-HOWTO. But I could not find the
patch for glibc-2.0.6 (glibc-2.0.6-mips.patch) and without
this patch, I failed to compile glibc-2.0.6.

Does anyone tell me the place where to find it?

--
Best regards,
Jun Matsuda (jmatsu@cse.canon.co.jp)

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From:   Ralf Baechle <ralf@oss.sgi.com>
To:     Jun Matsuda <jmatsu@cse.canon.co.jp>
Cc:     linux@cthulhu.engr.sgi.com
Subject: Re: patch for glibc-2.0.6
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On Tue, Dec 21, 1999 at 09:02:56PM +0900, Jun Matsuda wrote:

> I plan to construct the cross compilation environment as
> described in the Linux/MIPS-HOWTO. But I could not find the
> patch for glibc-2.0.6 (glibc-2.0.6-mips.patch) and without
> this patch, I failed to compile glibc-2.0.6.
> 
> Does anyone tell me the place where to find it?

In the SRPM package of glibc.

  Ralf

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To:     Jun Matsuda <jmatsu@cse.canon.co.jp>
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Subject: Re: patch for glibc-2.0.6
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On Tue, Dec 21, 1999 at 09:02:56PM +0900, Jun Matsuda wrote:
> Hi,
> 
> I plan to construct the cross compilation environment as
> described in the Linux/MIPS-HOWTO. But I could not find the
> patch for glibc-2.0.6 (glibc-2.0.6-mips.patch) and without
> this patch, I failed to compile glibc-2.0.6.
> 
> Does anyone tell me the place where to find it?

There is a source rpm for it somewhere - Or a debian source package
for 2.0.7.981112 or something at

ftp://ftp.rfc822.org/pub/local/debian/debian/experimental 

or something like that - It doesnt compile out of the box because
the tic and rpcgen get linked to the wrong lib ...

Flo
-- 
Florian Lohoff		flo@rfc822.org		      	+49-5241-470566
  ...  The failure can be random; however, when it does occur, it is
  catastrophic and is repeatable  ...             Cisco Field Notice


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To:     linux@cthulhu.engr.sgi.com
Subject: Re: patch for glibc-2.0.6
From:   Jun Matsuda <jmatsu@cse.canon.co.jp>
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Hi,

  Ralf Baechle <ralf@oss.sgi.com> wrote:
> > Does anyone tell me the place where to find it?
> 
> In the SRPM package of glibc.

I found the SPRM package for egcs and binutils, but I could not
find package for glibc.

I expect the SPRM package for glibc is in:
ftp://ftp.linux.sgi.com/pub/linux/mips/crossdev/src/

Does anyone know the exact place of the SPRM package for
glibc in ftp.linux.sgi.com?

  Florian Lohoff <flo@rfc822.org> wrote:
> There is a source rpm for it somewhere - Or a debian source package
> for 2.0.7.981112 or something at
> 
> ftp://ftp.rfc822.org/pub/local/debian/debian/experimental 

Thanks! I will try it.

--
Best regards,
Jun Matsuda (jmatsu@cse.canon.co.jp)

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From:   "Charles Cosby" <chuckc@sentex.net>
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Subject: Linux for a Personal Iris
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Hello:

I have several Personal Iris' (from 4D/20's with entry graphics and 8 =
meg up to 4D/35's with Turbo Graphics with 104 meg) and would love to =
play with Linux on them.  I am using Linux now (red Hat 6.0) on an Intel =
box but the tought of putting it on one (or more) of my Iris' is very =
intriguing.  I realize that SGI has long since dropped support for these =
boxes but since I am the proud owner of 10 of them I would love to see =
this new OS ported to them.  I am also willing to help.  I am located =
just outside of guelph Ontario Canada.  If anyone has any info about =
this please let me know.

thanks
Chuck

------=_NextPart_000_0019_01BF4CBD.7C63ABE0
Content-Type: text/html;
	charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable

<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META content=3D"text/html; charset=3Diso-8859-1" =
http-equiv=3DContent-Type>
<META content=3D"MSHTML 5.00.2614.3500" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#c0c0c0>
<DIV><FONT size=3D2>Hello:</FONT></DIV>
<DIV>&nbsp;</DIV>
<DIV><FONT size=3D2>I have several Personal Iris' (from 4D/20's with =
entry=20
graphics and 8 meg up to 4D/35's with Turbo Graphics with 104 meg) and =
would=20
love to play with Linux on them.&nbsp; I am using Linux now (red Hat =
6.0) on an=20
Intel box but the tought of putting it on one (or more) of my Iris' is =
very=20
intriguing.&nbsp; I realize that SGI has long since dropped support for =
these=20
boxes but since I am the proud owner of 10 of them I would love to see =
this new=20
OS ported to them.&nbsp; I am also willing to help.&nbsp; I am located =
just=20
outside of guelph Ontario Canada.&nbsp; If anyone has any info about =
this please=20
let me know.</FONT></DIV>
<DIV>&nbsp;</DIV>
<DIV><FONT size=3D2>thanks</FONT></DIV>
<DIV><FONT size=3D2>Chuck</FONT></DIV></BODY></HTML>

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From owner-linuxmips@oss.sgi.com Wed Dec 29 11:44:32 1999
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Message-ID: <386A5F9B.50B4AFEF@ti.com>
Date:   Wed, 29 Dec 1999 12:23:07 -0700
From:   Jeff Harrell <jharrell@ti.com>
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Subject: question concerning serial console setup
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I wonder if anybody might have some information concerning the setup of
a serial console device
on the MIPS/Linux platform.  I have been looking at the sgi (indy)
source code to determine how to
setup a serial console device.  The file arch/mips/sgi/kernel/setup.c
contains a call to "console_setup"
passing the parameters "ttys0" and NULL.  I have had some trouble
locating the routine that this is
actually calling (file, directory?).  It looks like there is a version
in printk.c and in one of  the char drivers (serial167.c).
These do not seem like the correct routines.  In our architecture we are
using the 85C30 (SCC) driver
(zs.c, zs.h),  can I use the serial_console_init routines from this code
to accomplish the same thing?  Is
serial_console setting up additional information that won't get setup
elsewhere?   Any help would be
greatly appreciated.

Thanks,
Jeff



--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jeff Harrell                    Work:  (801) 619-6104
Broadband Access group/TI
jharrell@ti.com
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~




From owner-linuxmips@oss.sgi.com Wed Dec 29 16:58:27 1999
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From:   Conrad Parker <conradp@cse.unsw.edu.au>
To:     Jeff Harrell <jharrell@ti.com>, linux@cthulhu.engr.sgi.com
Date:   Thu, 30 Dec 1999 11:47:36 +1100
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Subject: Re: question concerning serial console setup
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On Wed, Dec 29, 1999 at 12:23:07PM -0700, Jeff Harrell wrote:
> I wonder if anybody might have some information concerning the setup of
> a serial console device
> on the MIPS/Linux platform.  I have been looking at the sgi (indy)
> source code to determine how to
> setup a serial console device.  The file arch/mips/sgi/kernel/setup.c
> contains a call to "console_setup"
> passing the parameters "ttys0" and NULL.  I have had some trouble
> locating the routine that this is
> actually calling (file, directory?).  It looks like there is a version
> in printk.c and in one of  the char drivers (serial167.c).
> These do not seem like the correct routines.

the version in serial167.c is commented out and looks like it was once
there only as a placeholder.

console_setup() in printk.c is the correct one, but it doesn't do everything
you want. It simply determines which of the possible consoles is the system
("preferred") console. Normally this is called via parse_options in
init/main.c so you can set it on booting by passing the kernel parameter
console=blah, but it can be called any time before the kernel calls
console_init() (which it does immediately after calling parse_options, in
order to get the console up asap). If you've configured the kernel to run a
serial console, console_init() (which is in drivers/char/tty_io.c) will call
serial_console_init().

For the SGI/MIPS, (the code you're looking at in
arch/mips/sgi/kernel/setup.c) the choice of serial console can be
determined by querying the prom settings, so rather than forcing this to be
a boot parameter the correct console is set up at runtime. (If I'm not
mistaken, this can still be overriden by passing a kernel parameter, as
this bit of setup is called way before init/main.c calls parse_options()).
However, you don't need to call console_setup() in your platform setup
routine -- it's only done here for convenience.

> In our architecture we are
> using the 85C30 (SCC) driver
> (zs.c, zs.h),  can I use the serial_console_init routines from this code
> to accomplish the same thing?  Is
> serial_console setting up additional information that won't get setup
> elsewhere?   Any help would be
> greatly appreciated.
> 

using zs.c and zs.h from where? (ie. your own code, or from somewhere like
drivers/tc?) drivers/sgi/char/sgiserial.c also implements Z8530 support
nicely.

The serial console routines set up linux console functions that happen
to use the serial device; a console is something that basically provides
a write function, possibly a read function, and some other stuff like
special key settings. So, eg. your console write function (like
zs_console_write in sgiserial.c) does a few serial put_chars and so on.

You need to set up a struct console with these fields (as defined in
<linux/console.h>), then make a serial_console_init() function that
calls register_console (defined in printk.c). It'll become the default
system console if it's the first console to be registered (and nothing
then calls console_setup), or if you pass the console=ttyS? parameter to
the kernel.

Conrad.