From owner-linux-mips@oss.sgi.com Mon Jan  1 06:25:47 2001
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Date:   Mon, 01 Jan 2001 08:22:31 -0600
From:   Joe deBlaquiere <jadb@redhat.com>
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Subject: Re: Simple problem with second stage MIPS GCC compiler...
References: <3A2FB3CB.3566F805@mips.com> <3A5018A0.6B43960B@cotw.com>
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The problem you have is that gcc doesn't know where the glibc headers 
are. You probably need to pass 
"--with-includes=/usr/local/mips/mipsel-linux-include" or alternatively 
put the headers in {prefix}/sys-include .

There is also another list for cross compiling with gcc 
(crossgcc@sources.redhat.com) which might give more informative answers 
than the simple one I have...

good luck with it!

Steven J. Hill wrote:

> Well, I almost have a complete toolchain. I succesfully got binutils,
> first stage GCC-2.95.2 and GLIBC-2.2 installed just fine. I am having
> problems with rebuilding GCC. Below is the configuration and make
> directives that I am currently using along with the output. I have
> verified that the header files are in /usr/local/mips/mipsel-linux-include.
> Any help or thoughts are need and appreciated. Yes, I read the mailing
> list archives. TIA.
> 
> -Steve
> 
> *************************************************************
> AR=mipsel-linux-ar RANLIB=mipsel-linux-ranlib ../gcc-2.95.2/configure
> --prefix=/usr/local/mips --target=mipsel-linux i686-pc-linux-gnu --enable-shared
> --enable-threads --enable-languages=c
> 
> make LANGUAGES=c ALL_TARGET_MODULES= CONFIGURE_TARGET_MODULES=
> INSTALL_TARGET_MODULES= SUBDIRS="libiberty gcc"
> 
> *************************************************************
> make[2]: Leaving directory `/data/mips-stuff/build-gcc2/gcc/intl'
> rm -f tmplibgcc2.a
> for name in _muldi3 _divdi3 _moddi3 _udivdi3 _umoddi3 _negdi2 _lshrdi3 _ashldi3
> _ashrdi3 _ffsdi2 _udiv_w_sdiv _udivmoddi4 _cmpdi2 _ucmpdi2 _floatdidf _floatdisf
> _fixunsdfsi _fixunssfsi _fixunsdfdi _fixdfdi _fixunssfdi _fixsfdi _fixxfdi
> _fixunsxfdi _floatdixf _fixunsxfsi _fixtfdi _fixunstfdi _floatditf __gcc_bcmp
> _varargs __dummy _eprintf _bb _shtab _clear_cache _trampoline __main _exit
> _ctors _pure; \
> do \
>   echo ${name}; \
>   /data/mips-stuff/build-gcc2/gcc/xgcc -B/data/mips-stuff/build-gcc2/gcc/
> -B/usr/local/mips/mipsel-linux/bin/ -I/usr/local/mips/mipsel-linux/include -O2 
> -DCROSS_COMPILE -DIN_GCC     -g -O2 -I./include  -fPIC -g1 -DHAVE_GTHR_DEFAULT
> -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED   -I. -I../../gcc-2.95.2/gcc
> -I../../gcc-2.95.2/gcc/config -I../../gcc-2.95.2/gcc/../include -c -DL${name} \
>        ../../gcc-2.95.2/gcc/libgcc2.c -o ${name}.o; \
>   if [ $? -eq 0 ] ; then true; else exit 1; fi; \
>   mipsel-linux-ar rc tmplibgcc2.a ${name}.o; \
>   rm -f ${name}.o; \
> done
> _muldi3
> .../../gcc-2.95.2/gcc/libgcc2.c:41: stdlib.h: No such file or directory
> .../../gcc-2.95.2/gcc/libgcc2.c:42: unistd.h: No such file or directory
> make[1]: *** [libgcc2.a] Error 1
> make[1]: Leaving directory `/data/mips-stuff/build-gcc2/gcc'
> make: *** [all-gcc] Error 2


-- 
Joe deBlaquiere
Red Hat, Inc.
307 Wynn Drive
Huntsville AL, 35805
voice : (256)-704-9200
fax   : (256)-837-3839


From owner-linux-mips@oss.sgi.com Tue Jan  2 10:24:25 2001
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Date:   Tue, 2 Jan 2001 19:12:57 +0100 (MET)
From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Harald Koerfgen <Harald.Koerfgen@home.ivm.de>
cc:     ralf@uni-koblenz.de, linux-mips@fnet.fr, linux-mips@oss.sgi.com
Subject: Re: SGI/ARCS related fixes
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On Sun, 31 Dec 2000, Harald Koerfgen wrote:

> wanting to bring my O2 patches up to date I stumbled over some minor hickups.
[...]
> --- /nfs/cvs/linux-2.3/linux/arch/mips/arc/memory.c     Mon Dec 11 18:07:34 2000
> +++ linux/arch/mips/arc/memory.c        Sat Dec 30 21:49:32 2000
> @@ -124,7 +124,7 @@
>                 size = p->pages << PAGE_SHIFT;
>                 type = prom_memtype_classify(p->type);
>  
> -               add_memory_region(base, pages, type);
> +               add_memory_region(base, size, type);
>         }
>  }
>  

 That is fine.  I actually included the fix in my set of memory map
patches (patch-mips-2.4.0-test11-20001212-mem_map-37) I sent Ralf a few
days ago.  They still appear to wait to be applied.

> @@ -143,12 +143,13 @@
>                 addr = boot_mem_map.map[i].addr;
>                 while (addr < boot_mem_map.map[i].addr
>                               + boot_mem_map.map[i].size) {
> -                       ClearPageReserved(virt_to_page(__va(addr)));
> -                       set_page_count(virt_to_page(__va(addr)), 1);
> -                       free_page(__va(addr));
> +                       ClearPageReserved(virt_to_page(addr));
> +                       set_page_count(virt_to_page(addr), 1);
> +                       free_page(addr);
>                         addr += PAGE_SIZE;
>                         freed += PAGE_SIZE;
>                 }
>         }
>         printk("Freeing prom memory: %ldkb freed\n", freed >> 10);
>  }
> +

 That's probably incorrect.  These functions expect a virtual address
while "addr" is a physical address.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Tue Jan  2 16:52:17 2001
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Ralf,

Someone reported this bug to me.  I think it is a valid one.  Basically
trap_init() installs the vectors through kseg0 address and then flushes
icache.  It is possible that the vectors are still in the data cache and not
written back to memory yet.  If an exception happens it may get the corrupted
the vector value.

The following patch should fix it.  I am not sure if I can use
flush_cache_range() to have potentially better performance.

Jun


--- linux/arch/mips/kernel/traps.c.orig Tue Jan  2 16:24:16 2001
+++ linux/arch/mips/kernel/traps.c      Tue Jan  2 16:50:59 2001
@@ -767,7 +767,7 @@
        default:
                panic("Unknown CPU type");
        }
-       flush_icache_range(KSEG0, KSEG0 + 0x200);
+       flush_cache_all();
 
        atomic_inc(&init_mm.mm_count);  /* XXX  UP?  */
        current->active_mm = &init_mm;

From owner-linux-mips@oss.sgi.com Wed Jan  3 03:32:33 2001
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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Jun Sun <jsun@mvista.com>
cc:     linux-mips@oss.sgi.com, ralf@oss.sgi.com
Subject: Re: missing data cache flush in trap_init?
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On Tue, 2 Jan 2001, Jun Sun wrote:

> The following patch should fix it.  I am not sure if I can use
> flush_cache_range() to have potentially better performance.

 Yes, flush_cache_range() is the right function and it should be used even
if no performance gain is achieved (it is in this case, though).  I can't
comment if that's needed at all, though.  R3k which I use has its data
cache write-through so it doesn't need such a change.  I might check IDT
R4k and possibly IDT R5k docs yet but I have no idea about other
implementations. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Wed Jan  3 09:15:07 2001
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To:	Jun Sun <jsun@mvista.com>
Cc:	linux-mips@oss.sgi.com
Subject: Re: missing data cache flush in trap_init?
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On Tue, Jan 02, 2001 at 04:52:22PM -0800, Jun Sun wrote:

> Someone reported this bug to me.  I think it is a valid one.  Basically
> trap_init() installs the vectors through kseg0 address and then flushes
> icache.  It is possible that the vectors are still in the data cache and not
> written back to memory yet.  If an exception happens it may get the corrupted
> the vector value.
> 
> The following patch should fix it.  I am not sure if I can use
> flush_cache_range() to have potentially better performance.

Flush_icache_range is correct;  the function is expected to do any dcache
writebacks etc. to make dcache / icache / memory coherent.

Is it possible that you're using a CPU with additional vectors that aren't
flushed by this flush_icache_call or?

  Ralf

From owner-linux-mips@oss.sgi.com Wed Jan  3 10:18:57 2001
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To:	"Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc:	Harald Koerfgen <Harald.Koerfgen@home.ivm.de>, linux-mips@fnet.fr,
        linux-mips@oss.sgi.com
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On Tue, Jan 02, 2001 at 07:12:57PM +0100, Maciej W. Rozycki wrote:

> > --- /nfs/cvs/linux-2.3/linux/arch/mips/arc/memory.c     Mon Dec 11 18:07:34 2000
> > +++ linux/arch/mips/arc/memory.c        Sat Dec 30 21:49:32 2000
> > @@ -124,7 +124,7 @@
> >                 size = p->pages << PAGE_SHIFT;
> >                 type = prom_memtype_classify(p->type);
> >  
> > -               add_memory_region(base, pages, type);
> > +               add_memory_region(base, size, type);
> >         }
> >  }
> >  
> 
>  That is fine.  I actually included the fix in my set of memory map
> patches (patch-mips-2.4.0-test11-20001212-mem_map-37) I sent Ralf a few
> days ago.  They still appear to wait to be applied.

I suspect your patch got lost from cvs in the recent disk crash.  I reapplied
it now.

  Ralf

From owner-linux-mips@oss.sgi.com Wed Jan  3 10:22:37 2001
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On Sun, Dec 31, 2000 at 12:41:11PM +0100, Harald Koerfgen wrote:

> 
> wanting to bring my O2 patches up to date I stumbled over some minor hickups.
> 
> I don't have the appropriate hardware to test, ok to commit?

I've applied the sgialib.h and misc.c parts.

  Ralf

From owner-linux-mips@oss.sgi.com Wed Jan  3 17:39:31 2001
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Hello,

I downloaded cross-all-001027.tar from
oss.sgi.com/pub/linux/mips/mips-linux/simple/crossdev,
built it on my ix86 Linux box, and have tried to use it on our Linux
application and Linux kernel.
I'm getting errors which we didn't see when we were using
binutils-mips-linux-2.8.1 and
egcs-mips-linux-1.0.3a.

First, while the kernel builds just fine, when we use objcopy to convert the
elf image into a binary
image which we can download to our target, objcopy fails with warnings
saying that it is writing
sections to huge (i.e. negative) file offsets. When I use objdump to analyze
the kernel image,
I see that our start address of 0x80102584 has been turned into
0xffffffff80102584. I'm thinking that
I need to tell ld something to stop it from doing this. Any ideas?

Second, the way we build our application, we first create a partially linked
image, with the -r flag. Then 
we run ld on this (and an additional object file). When we do this with the
tools from cross-all-001027
we get the following error on the second link step:

mips-linux-ld:  BFD internal error, aborting at
/homes/local/mips-cross/crossdev-build/src/binutils-001027/bfd/elf32-mips.c
line 6942 in _bfd_mips_elf_relocate_section

mips-linux-ld: Please report this bug.

Actually, on the application we didn't get this far using
binutils-mips-linux-2.8.1 and egcs-mips-linux-1.0.3a,
so I have nothing to compare it to.  I'm not sure if this is a bug or if I
should be passing some flags to gcc or ld.

Any help you can provide would be appreciated.

Thanks,
-John



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<P><FONT SIZE=3D2 FACE=3D"Arial">Hello,</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">I downloaded cross-all-001027.tar from =
oss.sgi.com/pub/linux/mips/mips-linux/simple/crossdev,</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">built it on my ix86 Linux box, and =
have tried to use it on our Linux application and Linux kernel.</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">I'm getting errors which we didn't =
see when we were using binutils-mips-linux-2.8.1 and</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">egcs-mips-linux-1.0.3a.</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">First, while the kernel builds just =
fine, when we use objcopy to convert the elf image into a binary</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">image which we can download to our =
target, objcopy fails with warnings saying that it is writing</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">sections to huge (i.e. negative) file =
offsets. When I use objdump to analyze the kernel image,</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">I see that our start address of =
0x80102584 has been turned into 0xffffffff80102584. I'm thinking =
that</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">I need to tell ld something to stop =
it from doing this. Any ideas?</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">Second, the way we build our =
application, we first create a partially linked image, with the -r =
flag. Then </FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">we run ld on this (and an additional =
object file). When we do this with the tools from =
cross-all-001027</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">we get the following error on the =
second link step:</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">mips-linux-ld:&nbsp; BFD internal =
error, aborting at =
/homes/local/mips-cross/crossdev-build/src/binutils-001027/bfd/elf32-mip=
s.c line 6942 in _bfd_mips_elf_relocate_section</FONT></P>

<P><FONT SIZE=3D2 FACE=3D"Arial">mips-linux-ld: Please report this =
bug.</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">Actually, on the application we didn't =
get this far using binutils-mips-linux-2.8.1 and =
egcs-mips-linux-1.0.3a,</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">so I have nothing to compare it =
to.&nbsp; I'm not sure if this is a bug or if I should be passing some =
flags to gcc or ld.</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">Any help you can provide would be =
appreciated.</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">Thanks,</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">-John</FONT>
</P>
<BR>

</BODY>
</HTML>
------_=_NextPart_001_01C075EE.CBD95CA0--

From owner-linux-mips@oss.sgi.com Wed Jan  3 19:26:22 2001
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Subject: Re: missing data cache flush in trap_init?
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Ralf Baechle wrote:
> 
> On Tue, Jan 02, 2001 at 04:52:22PM -0800, Jun Sun wrote:
> 
> > Someone reported this bug to me.  I think it is a valid one.  Basically
> > trap_init() installs the vectors through kseg0 address and then flushes
> > icache.  It is possible that the vectors are still in the data cache and not
> > written back to memory yet.  If an exception happens it may get the corrupted
> > the vector value.
> >
> > The following patch should fix it.  I am not sure if I can use
> > flush_cache_range() to have potentially better performance.
> 
> Flush_icache_range is correct;  the function is expected to do any dcache
> writebacks etc. to make dcache / icache / memory coherent.
> 
> Is it possible that you're using a CPU with additional vectors that aren't
> flushed by this flush_icache_call or?
> 
>   Ralf

You are right - flush_icache_range() practically flushes both caches in the
current implementation.  There might be some other problems.

Aside of that, the name of flush_icache_range() seems to be misleading.  Also
in general how does it know which part of dcache to flush() without a given
process mm struct?  If it does not know, the only choice is to flush the whole
dcache, which seems to make this function very close to flush_all().  

Is this function introduced by other CPU platforms?  How would it make a
difference there?  I am just curious ...

Jun

From owner-linux-mips@oss.sgi.com Thu Jan  4 07:46:22 2001
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On Wed, Jan 03, 2001 at 05:36:44PM -0800, John Van Horne wrote:

> First, while the kernel builds just fine, when we use objcopy to convert the
> elf image into a binary
> image which we can download to our target, objcopy fails with warnings
> saying that it is writing
> sections to huge (i.e. negative) file offsets. When I use objdump to analyze
> the kernel image,
> I see that our start address of 0x80102584 has been turned into
> 0xffffffff80102584. I'm thinking that
> I need to tell ld something to stop it from doing this. Any ideas?

That's be ok.  32-bit MIPS addresses are sign-extended into 64-bit addresses.
Older binutils used to zero-extend addresses which was broken.  So what
you observe is actually the sympthom of a bug that got fixed.

> Second, the way we build our application, we first create a partially linked
> image, with the -r flag. Then 
> we run ld on this (and an additional object file). When we do this with the
> tools from cross-all-001027
> we get the following error on the second link step:
> 
> mips-linux-ld:  BFD internal error, aborting at
> /homes/local/mips-cross/crossdev-build/src/binutils-001027/bfd/elf32-mips.c
> line 6942 in _bfd_mips_elf_relocate_section
> 
> mips-linux-ld: Please report this bug.

Not good ...  Two possibilities.

 - it's fairly easy to make ld die in funny ways by feeding it with nonsense
   options, linker scripts or similar.
 - it's really a bug.

Assuming it's really a bug, can you extract a small test case that
demonstrate this bug?

> Actually, on the application we didn't get this far using
> binutils-mips-linux-2.8.1 and egcs-mips-linux-1.0.3a,
> so I have nothing to compare it to.  I'm not sure if this is a bug or if I
> should be passing some flags to gcc or ld.

It may well be a bug; especially -r is used relativly rarely so the code
isn't getting excercised too well.  I'd like to see it get fixed in the
current linker, though.

  Ralf

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On Thu, 4 Jan 2001, Ralf Baechle wrote:

> > I see that our start address of 0x80102584 has been turned into
> > 0xffffffff80102584. I'm thinking that
> > I need to tell ld something to stop it from doing this. Any ideas?
> 
> That's be ok.  32-bit MIPS addresses are sign-extended into 64-bit addresses.
> Older binutils used to zero-extend addresses which was broken.  So what
> you observe is actually the sympthom of a bug that got fixed.

 I'm not sure that's the best solution, I'm afraid.  For elf32-mips
addresses should be 32-bit and not 64-bit.  It would be consistent with
other 32-bit platforms, it would make interoperability easier (ksymoops
cannot make use of System.map to grok kernel oopses which provide 32-bit
addresses) and it would make objdump outputs more readable.

 Fixing this problem with BFD is on my to do list (but has a low priority
assigned). 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Thu Jan  4 08:49:53 2001
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If the BFD stuff is built with any support for 64 bit (even as an 
optional target) it will maintain all addresses as 64-bit values, even 
if the file is 32 bit.

There is a bug in that "some" newer versions of objcopy will not allow 
you to translate these sign-extended 32 bit addresses into Intel Hex 
format.

If you're really only doing 32-bit mips you might consider removing the 
64 bit targets in the config.bfd... I think that will solve the problems.

Maciej W. Rozycki wrote:

> On Thu, 4 Jan 2001, Ralf Baechle wrote:
> 
> 
>>> I see that our start address of 0x80102584 has been turned into
>>> 0xffffffff80102584. I'm thinking that
>>> I need to tell ld something to stop it from doing this. Any ideas?
>> 
>> That's be ok.  32-bit MIPS addresses are sign-extended into 64-bit addresses.
>> Older binutils used to zero-extend addresses which was broken.  So what
>> you observe is actually the sympthom of a bug that got fixed.
> 
> 
>  I'm not sure that's the best solution, I'm afraid.  For elf32-mips
> addresses should be 32-bit and not 64-bit.  It would be consistent with
> other 32-bit platforms, it would make interoperability easier (ksymoops
> cannot make use of System.map to grok kernel oopses which provide 32-bit
> addresses) and it would make objdump outputs more readable.
> 
>  Fixing this problem with BFD is on my to do list (but has a low priority
> assigned). 



From owner-linux-mips@oss.sgi.com Thu Jan  4 09:23:13 2001
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On Thu, Jan 04, 2001 at 10:40:41AM -0600, Joe deBlaquiere wrote:

> There is a bug in that "some" newer versions of objcopy will not allow 
> you to translate these sign-extended 32 bit addresses into Intel Hex 
> format.

I couldn't care less ...

> If you're really only doing 32-bit mips you might consider removing the 
> 64 bit targets in the config.bfd... I think that will solve the problems.

Doesn't really solve the problem.  For example on an Origin we have a 32-bit
userland but 64-bit kernel addresses which confuses ksymops and procps.

  Ralf

From owner-linux-mips@oss.sgi.com Thu Jan  4 09:32:43 2001
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On Thu, 4 Jan 2001, Joe deBlaquiere wrote:

> If the BFD stuff is built with any support for 64 bit (even as an 
> optional target) it will maintain all addresses as 64-bit values, even 
> if the file is 32 bit.

 I do consider it fine BFD handles all addresses as 64-bit internally.  I
just think it should truncate them to 32-bits upon printing (and always
whenever appropriate) when the selected target is 32-bit.  It does so (it
has to!) for output anyway, so what's the deal? 

> If you're really only doing 32-bit mips you might consider removing the 
> 64 bit targets in the config.bfd... I think that will solve the problems.

 Nope, I insist 32-bit targets need to work correctly regardless of
whether there are any 64-bit ones supported by a particular BFD binary or
not.  Do you think elf32-i386 should switch to printing 64-bit addresses
if elf64-alpha is also supported by a given configuration of BFD?  I
don't.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Thu Jan  4 09:35:13 2001
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To:	Jun Sun <jsun@mvista.com>
Cc:	linux-mips@oss.sgi.com
Subject: Re: missing data cache flush in trap_init?
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On Wed, Jan 03, 2001 at 07:26:23PM -0800, Jun Sun wrote:

> Aside of that, the name of flush_icache_range() seems to be misleading.  Also
> in general how does it know which part of dcache to flush() without a given
> process mm struct?

The function is only intended to flush kernel addresses for which no mm
exists.  Yes, it's being abused in creative ways but that's the purpose
it was designed for ...

>  If it does not know, the only choice is to flush the whole
> dcache, which seems to make this function very close to flush_all().  
> 
> Is this function introduced by other CPU platforms?  How would it make a
> difference there?  I am just curious ...

Others such as for example m68k need it as well.

  Ralf

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Ralf Baechle wrote:

> On Thu, Jan 04, 2001 at 10:40:41AM -0600, Joe deBlaquiere wrote:
> 
> If you're really only doing 32-bit mips you might consider removing the 
>> 64 bit targets in the config.bfd... I think that will solve the problems.
> 
> 
> Doesn't really solve the problem.  For example on an Origin we have a 32-bit
> userland but 64-bit kernel addresses which confuses ksymops and procps.
> 
>   Ralf


It was meant as a workaround...

Perhaps we could have an option to objcopy that would allow you to copy 
the addresses without sign extension?

Joe


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Date:   Thu, 4 Jan 2001 19:12:20 +0100 (MET)
From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Reply-To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Joe deBlaquiere <jadb@redhat.com>
cc:     Ralf Baechle <ralf@oss.sgi.com>,
        John Van Horne <JohnVan.Horne@cosinecom.com>,
        "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>,
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Subject: Re: your mail
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On Thu, 4 Jan 2001, Joe deBlaquiere wrote:

> It was meant as a workaround...
> 
> Perhaps we could have an option to objcopy that would allow you to copy 
> the addresses without sign extension?

 Please do either implement a clean solution or wait until someone else
(possibly me) does.  We don't want any more hacks -- MIPS/Linux already
has enough of them.  This is my view of the situation at present. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Thu Jan  4 11:02:34 2001
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Subject: Cross-gdb for mipsel on i386?
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Good morning,

Does anyone know where I can get a precompiled cross-gdb for a mipsel 
target hosted on an i386 (Redhat 7.0)?  I didn't see one on the 
oss.sgi.com, but maybe I was just looking in the wrong place.

Thanks!
--Glenn S.


From owner-linux-mips@oss.sgi.com Thu Jan  4 11:37:34 2001
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Glenn Serre wrote:
> 
> Good morning,
> 
> Does anyone know where I can get a precompiled cross-gdb for a mipsel
> target hosted on an i386 (Redhat 7.0)?  I didn't see one on the
> oss.sgi.com, but maybe I was just looking in the wrong place.

ftp.mvista.com:/pub/Area51/ddb-5476

The names of the packages will probably change by the time we officially
release this and other mips boards, but that shouldn't matter for you.
Note that Redhat 7.0 is not yet one of our supported hosts,  but it
should work.

Pete

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Subject: objcopy error -- was RE: your mail
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Is there anyway to get more information out of objcopy?  When I run it,
I get the warnings I mentioned before, but no errors, however the target
file is empty.  Here is an abridged copy of what I get:

[jvhorne@guava-lx linux]$ make orionboot
make -C arch/mips/orion orionboot
make[1]: Entering directory
`/dvlp/jvhorne/jvh_21_lx_mips_cross_test_sv/vobs/gpl/linux/arch/mips/orion'
mips-linux-objcopy -Obinary --verbose ../../../vmlinux orion.nosym
copy from ../../../vmlinux(elf32-bigmips) to orion.nosym(binary)
BFD: Warning: Writing section `.app_header' to huge (ie negative) file
offset 0x800fec30.
BFD: Warning: Writing section `.text' to huge (ie negative) file offset
0x80100c30.
BFD: Warning: Writing section `.fixup' to huge (ie negative) file offset
0x80236930.
BFD: Warning: Writing section `.text.exit' to huge (ie negative) file offset
0x80237830.
.
.
.
mips-linux-objcopy: orion.nosym: File truncated


Do you think that the reason objcopy fails is because it isn't treating
the addresses as 32 bit addresses, or could it be something else?

Thanks,
-John


-----Original Message-----
From: Maciej W. Rozycki [mailto:macro@ds2.pg.gda.pl]
Sent: Thursday, January 04, 2001 8:23 AM
To: Ralf Baechle
Cc: John Van Horne; 'linux-mips@oss.sgi.com'; 'wesolows@foobazco.org'
Subject: Re: your mail


On Thu, 4 Jan 2001, Ralf Baechle wrote:

> > I see that our start address of 0x80102584 has been turned into
> > 0xffffffff80102584. I'm thinking that
> > I need to tell ld something to stop it from doing this. Any ideas?
> 
> That's be ok.  32-bit MIPS addresses are sign-extended into 64-bit
addresses.
> Older binutils used to zero-extend addresses which was broken.  So what
> you observe is actually the sympthom of a bug that got fixed.

 I'm not sure that's the best solution, I'm afraid.  For elf32-mips
addresses should be 32-bit and not 64-bit.  It would be consistent with
other 32-bit platforms, it would make interoperability easier (ksymoops
cannot make use of System.map to grok kernel oopses which provide 32-bit
addresses) and it would make objdump outputs more readable.

 Fixing this problem with BFD is on my to do list (but has a low priority
assigned). 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

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<TITLE>objcopy error -- was RE: your mail</TITLE>
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<P><FONT SIZE=2>Is there anyway to get more information out of objcopy?&nbsp; When I run it,</FONT>
<BR><FONT SIZE=2>I get the warnings I mentioned before, but no errors, however the target</FONT>
<BR><FONT SIZE=2>file is empty.&nbsp; Here is an abridged copy of what I get:</FONT>
</P>

<P><FONT SIZE=2>[jvhorne@guava-lx linux]$ make orionboot</FONT>
<BR><FONT SIZE=2>make -C arch/mips/orion orionboot</FONT>
<BR><FONT SIZE=2>make[1]: Entering directory `/dvlp/jvhorne/jvh_21_lx_mips_cross_test_sv/vobs/gpl/linux/arch/mips/orion'</FONT>
<BR><FONT SIZE=2>mips-linux-objcopy -Obinary --verbose ../../../vmlinux orion.nosym</FONT>
<BR><FONT SIZE=2>copy from ../../../vmlinux(elf32-bigmips) to orion.nosym(binary)</FONT>
<BR><FONT SIZE=2>BFD: Warning: Writing section `.app_header' to huge (ie negative) file offset 0x800fec30.</FONT>
<BR><FONT SIZE=2>BFD: Warning: Writing section `.text' to huge (ie negative) file offset 0x80100c30.</FONT>
<BR><FONT SIZE=2>BFD: Warning: Writing section `.fixup' to huge (ie negative) file offset 0x80236930.</FONT>
<BR><FONT SIZE=2>BFD: Warning: Writing section `.text.exit' to huge (ie negative) file offset 0x80237830.</FONT>
<BR><FONT SIZE=2>.</FONT>
<BR><FONT SIZE=2>.</FONT>
<BR><FONT SIZE=2>.</FONT>
<BR><FONT SIZE=2>mips-linux-objcopy: orion.nosym: File truncated</FONT>
</P>
<BR>

<P><FONT SIZE=2>Do you think that the reason objcopy fails is because it isn't treating</FONT>
<BR><FONT SIZE=2>the addresses as 32 bit addresses, or could it be something else?</FONT>
</P>

<P><FONT SIZE=2>Thanks,</FONT>
<BR><FONT SIZE=2>-John</FONT>
</P>
<BR>

<P><FONT SIZE=2>-----Original Message-----</FONT>
<BR><FONT SIZE=2>From: Maciej W. Rozycki [<A HREF="mailto:macro@ds2.pg.gda.pl">mailto:macro@ds2.pg.gda.pl</A>]</FONT>
<BR><FONT SIZE=2>Sent: Thursday, January 04, 2001 8:23 AM</FONT>
<BR><FONT SIZE=2>To: Ralf Baechle</FONT>
<BR><FONT SIZE=2>Cc: John Van Horne; 'linux-mips@oss.sgi.com'; 'wesolows@foobazco.org'</FONT>
<BR><FONT SIZE=2>Subject: Re: your mail</FONT>
</P>
<BR>

<P><FONT SIZE=2>On Thu, 4 Jan 2001, Ralf Baechle wrote:</FONT>
</P>

<P><FONT SIZE=2>&gt; &gt; I see that our start address of 0x80102584 has been turned into</FONT>
<BR><FONT SIZE=2>&gt; &gt; 0xffffffff80102584. I'm thinking that</FONT>
<BR><FONT SIZE=2>&gt; &gt; I need to tell ld something to stop it from doing this. Any ideas?</FONT>
<BR><FONT SIZE=2>&gt; </FONT>
<BR><FONT SIZE=2>&gt; That's be ok.&nbsp; 32-bit MIPS addresses are sign-extended into 64-bit addresses.</FONT>
<BR><FONT SIZE=2>&gt; Older binutils used to zero-extend addresses which was broken.&nbsp; So what</FONT>
<BR><FONT SIZE=2>&gt; you observe is actually the sympthom of a bug that got fixed.</FONT>
</P>

<P><FONT SIZE=2>&nbsp;I'm not sure that's the best solution, I'm afraid.&nbsp; For elf32-mips</FONT>
<BR><FONT SIZE=2>addresses should be 32-bit and not 64-bit.&nbsp; It would be consistent with</FONT>
<BR><FONT SIZE=2>other 32-bit platforms, it would make interoperability easier (ksymoops</FONT>
<BR><FONT SIZE=2>cannot make use of System.map to grok kernel oopses which provide 32-bit</FONT>
<BR><FONT SIZE=2>addresses) and it would make objdump outputs more readable.</FONT>
</P>

<P><FONT SIZE=2>&nbsp;Fixing this problem with BFD is on my to do list (but has a low priority</FONT>
<BR><FONT SIZE=2>assigned). </FONT>
</P>

<P><FONT SIZE=2>-- </FONT>
<BR><FONT SIZE=2>+&nbsp; Maciej W. Rozycki, Technical University of Gdansk, Poland&nbsp;&nbsp; +</FONT>
<BR><FONT SIZE=2>+--------------------------------------------------------------+</FONT>
<BR><FONT SIZE=2>+&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; e-mail: macro@ds2.pg.gda.pl, PGP key available&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +</FONT>
</P>

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From owner-linux-mips@oss.sgi.com Thu Jan  4 12:43:25 2001
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Cc:     Christoph.Martin@uni-mainz.de, linux-mips@oss.sgi.com,
        linux-mips@fnet.fr, debian-mips@lists.debian.org,
        Andreas Jaeger <aj@suse.de>
Subject: glibc 2.2 on MIPS
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Hi Ralf,

On Thu, 12 Oct 2000 04:04:44 +0200, Ralf Baechle wrote:

> On Thu, Oct 12, 2000 at 12:24:21AM +0200, Florian Lohoff wrote:

> > We are trying :) I am currently basing all my Debian-mips(el) things
> > on glibc 2.0.6. It is the only stable solution right now. I am experimenting
> > with the glibc 2.1.94-3 debian source package which i managed to get
> > compiled with unmodified cvs binutils and gcc + the gcse patch.
> > 
> > Ralf reported bugs in the ld where he send me a patch. With that patch
> > i get a "Bus Error" from the ld.so within the glibc build.

> There patch is ok; you get those bus errors because there are bugs in
> both ld and binutils that in most cases compensate each other.  If you
> fix only one of them you get all sorts of funnies ...

I just tried to build glibc-2.2 (CVS-2000-12-28) for debian-mips and
it still has the "Bus Error" problem. We are currently using binutils
2.10.1.0.2 and gcc 2.95.2 + CVS from 2.95 branch. 

Can you please post both patches, so that we can verify which one is
missing in our build.

> Even with the fixes ld is not yet perfect - for example emacs and X still
> fail.

The gcc/binutils combination seams to work correctly as far as I can
see. I managed to compile xfree 4.0.2 linked agains 2.1.95-1.1. What
problems did you have with X?

Christoph

From owner-linux-mips@oss.sgi.com Thu Jan  4 13:17:55 2001
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Date:   Thu, 4 Jan 2001 22:17:33 +0100 (MET)
From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     John Van Horne <JohnVan.Horne@cosinecom.com>
cc:     "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>
Subject: Re: objcopy error -- was RE: your mail
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On Thu, 4 Jan 2001, John Van Horne wrote:

> [jvhorne@guava-lx linux]$ make orionboot
> make -C arch/mips/orion orionboot
> make[1]: Entering directory
> `/dvlp/jvhorne/jvh_21_lx_mips_cross_test_sv/vobs/gpl/linux/arch/mips/orion'
> mips-linux-objcopy -Obinary --verbose ../../../vmlinux orion.nosym
> copy from ../../../vmlinux(elf32-bigmips) to orion.nosym(binary)
> BFD: Warning: Writing section `.app_header' to huge (ie negative) file
> offset 0x800fec30.
> BFD: Warning: Writing section `.text' to huge (ie negative) file offset
> 0x80100c30.
> BFD: Warning: Writing section `.fixup' to huge (ie negative) file offset
> 0x80236930.
> BFD: Warning: Writing section `.text.exit' to huge (ie negative) file offset
> 0x80237830.
> .
> .
> .
> mips-linux-objcopy: orion.nosym: File truncated
> 
> 
> Do you think that the reason objcopy fails is because it isn't treating
> the addresses as 32 bit addresses, or could it be something else?

 Note that the binary BFD target fills all "holes" with zeroes.  I suspect
one or more sections are placed at an offset lower than 0x80000000. 
Objcopy would have to make a huge file in this case and it gives up.  You
probably need to fix your linker script.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Thu Jan  4 13:35:45 2001
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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Christoph Martin <martin@uni-mainz.de>
cc:     ralf@oss.sgi.com, Christoph.Martin@uni-mainz.de,
        linux-mips@oss.sgi.com, linux-mips@fnet.fr,
        debian-mips@lists.debian.org, Andreas Jaeger <aj@suse.de>
Subject: Re: glibc 2.2 on MIPS
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On Thu, 4 Jan 2001, Christoph Martin wrote:

> I just tried to build glibc-2.2 (CVS-2000-12-28) for debian-mips and
> it still has the "Bus Error" problem. We are currently using binutils
> 2.10.1.0.2 and gcc 2.95.2 + CVS from 2.95 branch. 
> 
> Can you please post both patches, so that we can verify which one is
> missing in our build.

 The 2.2 release of glibc needs no patches.  The current CVS version is
even better as a few unrelated fixes has been applied meanwhile.

 For binutils 2.10.1 the following fix makes binaries be built as ld.so
expects.  Other fixes might be needed for 2.10.1 to work at all -- they
are all available from: 
ftp://ftp.ds2.pg.gda.pl/pub/macro/SRPMS/binutils-2.10.1-3.src.rpm (or use
a mirror at: ftp://ftp.rfc822.org/pub/mirror/ftp.ds2.pg.gda.pl/...).

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

binutils-2.10-mips-dyn-addend.patch
diff -up --recursive --new-file binutils-2.10.macro/bfd/elf32-mips.c binutils-2.10/bfd/elf32-mips.c
--- binutils-2.10.macro/bfd/elf32-mips.c	Sat Mar 11 02:23:10 2000
+++ binutils-2.10/bfd/elf32-mips.c	Sat Oct 28 17:19:52 2000
@@ -5675,15 +5675,16 @@ mips_elf_create_dynamic_relocation (outp
 	  /* The relocation we're building is section-relative.
 	     Therefore, the original addend must be adjusted by the
 	     section offset.  */
-	  *addendp += symbol - sec->output_section->vma;
+	  *addendp += section_offset;
 	  /* Now, the relocation is just against the section.  */
 	  symbol = sec->output_section->vma;
 	}
       
-      /* If the relocation was previously an absolute relocation, we
-	 must adjust it by the value we give it in the dynamic symbol
-	 table.  */
-      if (r_type != R_MIPS_REL32)
+      /* If the relocation was previously an absolute relocation and
+	 this symbol will not be referred to by the relocation, we must
+	 adjust it by the value we give it in the dynamic symbol table.
+	 Otherwise leave the job up to the dynamic linker.  */
+      if (!indx && r_type != R_MIPS_REL32)
 	*addendp += symbol;
 
       /* The relocation is always an REL32 relocation because we don't


From owner-linux-mips@oss.sgi.com Thu Jan  4 14:03:45 2001
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From:   John Van Horne <JohnVan.Horne@cosinecom.com>
To:     "'Maciej W. Rozycki'" <macro@ds2.pg.gda.pl>
Cc:     "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>
Subject: RE: objcopy error -- was RE: your mail
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This is the same script that worked fine when we were using 
egcs-mips-linux-1.0.3a and binutils-mips-linux-2.8.1.  Have
there been any changes in the linker that would affect how
we write our linker script?

Thanks,
-John

-----Original Message-----
From: Maciej W. Rozycki [mailto:macro@ds2.pg.gda.pl]
Sent: Thursday, January 04, 2001 1:18 PM
To: John Van Horne
Cc: 'linux-mips@oss.sgi.com'
Subject: Re: objcopy error -- was RE: your mail


On Thu, 4 Jan 2001, John Van Horne wrote:

> [jvhorne@guava-lx linux]$ make orionboot
> make -C arch/mips/orion orionboot
> make[1]: Entering directory
>
`/dvlp/jvhorne/jvh_21_lx_mips_cross_test_sv/vobs/gpl/linux/arch/mips/orion'
> mips-linux-objcopy -Obinary --verbose ../../../vmlinux orion.nosym
> copy from ../../../vmlinux(elf32-bigmips) to orion.nosym(binary)
> BFD: Warning: Writing section `.app_header' to huge (ie negative) file
> offset 0x800fec30.
> BFD: Warning: Writing section `.text' to huge (ie negative) file offset
> 0x80100c30.
> BFD: Warning: Writing section `.fixup' to huge (ie negative) file offset
> 0x80236930.
> BFD: Warning: Writing section `.text.exit' to huge (ie negative) file
offset
> 0x80237830.
> .
> .
> .
> mips-linux-objcopy: orion.nosym: File truncated
> 
> 
> Do you think that the reason objcopy fails is because it isn't treating
> the addresses as 32 bit addresses, or could it be something else?

 Note that the binary BFD target fills all "holes" with zeroes.  I suspect
one or more sections are placed at an offset lower than 0x80000000. 
Objcopy would have to make a huge file in this case and it gives up.  You
probably need to fix your linker script.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

------_=_NextPart_001_01C07699.D1E8E970
Content-Type: text/html;
	charset="iso-8859-1"
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN">
<HTML>
<HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META NAME=3D"Generator" CONTENT=3D"MS Exchange Server version =
5.5.2652.35">
<TITLE>RE: objcopy error -- was RE: your mail</TITLE>
</HEAD>
<BODY>

<P><FONT SIZE=3D2>This is the same script that worked fine when we were =
using </FONT>
<BR><FONT SIZE=3D2>egcs-mips-linux-1.0.3a and =
binutils-mips-linux-2.8.1.&nbsp; Have</FONT>
<BR><FONT SIZE=3D2>there been any changes in the linker that would =
affect how</FONT>
<BR><FONT SIZE=3D2>we write our linker script?</FONT>
</P>

<P><FONT SIZE=3D2>Thanks,</FONT>
<BR><FONT SIZE=3D2>-John</FONT>
</P>

<P><FONT SIZE=3D2>-----Original Message-----</FONT>
<BR><FONT SIZE=3D2>From: Maciej W. Rozycki [<A =
HREF=3D"mailto:macro@ds2.pg.gda.pl">mailto:macro@ds2.pg.gda.pl</A>]</FON=
T>
<BR><FONT SIZE=3D2>Sent: Thursday, January 04, 2001 1:18 PM</FONT>
<BR><FONT SIZE=3D2>To: John Van Horne</FONT>
<BR><FONT SIZE=3D2>Cc: 'linux-mips@oss.sgi.com'</FONT>
<BR><FONT SIZE=3D2>Subject: Re: objcopy error -- was RE: your =
mail</FONT>
</P>
<BR>

<P><FONT SIZE=3D2>On Thu, 4 Jan 2001, John Van Horne wrote:</FONT>
</P>

<P><FONT SIZE=3D2>&gt; [jvhorne@guava-lx linux]$ make orionboot</FONT>
<BR><FONT SIZE=3D2>&gt; make -C arch/mips/orion orionboot</FONT>
<BR><FONT SIZE=3D2>&gt; make[1]: Entering directory</FONT>
<BR><FONT SIZE=3D2>&gt; =
`/dvlp/jvhorne/jvh_21_lx_mips_cross_test_sv/vobs/gpl/linux/arch/mips/ori=
on'</FONT>
<BR><FONT SIZE=3D2>&gt; mips-linux-objcopy -Obinary --verbose =
../../../vmlinux orion.nosym</FONT>
<BR><FONT SIZE=3D2>&gt; copy from ../../../vmlinux(elf32-bigmips) to =
orion.nosym(binary)</FONT>
<BR><FONT SIZE=3D2>&gt; BFD: Warning: Writing section `.app_header' to =
huge (ie negative) file</FONT>
<BR><FONT SIZE=3D2>&gt; offset 0x800fec30.</FONT>
<BR><FONT SIZE=3D2>&gt; BFD: Warning: Writing section `.text' to huge =
(ie negative) file offset</FONT>
<BR><FONT SIZE=3D2>&gt; 0x80100c30.</FONT>
<BR><FONT SIZE=3D2>&gt; BFD: Warning: Writing section `.fixup' to huge =
(ie negative) file offset</FONT>
<BR><FONT SIZE=3D2>&gt; 0x80236930.</FONT>
<BR><FONT SIZE=3D2>&gt; BFD: Warning: Writing section `.text.exit' to =
huge (ie negative) file offset</FONT>
<BR><FONT SIZE=3D2>&gt; 0x80237830.</FONT>
<BR><FONT SIZE=3D2>&gt; .</FONT>
<BR><FONT SIZE=3D2>&gt; .</FONT>
<BR><FONT SIZE=3D2>&gt; .</FONT>
<BR><FONT SIZE=3D2>&gt; mips-linux-objcopy: orion.nosym: File =
truncated</FONT>
<BR><FONT SIZE=3D2>&gt; </FONT>
<BR><FONT SIZE=3D2>&gt; </FONT>
<BR><FONT SIZE=3D2>&gt; Do you think that the reason objcopy fails is =
because it isn't treating</FONT>
<BR><FONT SIZE=3D2>&gt; the addresses as 32 bit addresses, or could it =
be something else?</FONT>
</P>

<P><FONT SIZE=3D2>&nbsp;Note that the binary BFD target fills all =
&quot;holes&quot; with zeroes.&nbsp; I suspect</FONT>
<BR><FONT SIZE=3D2>one or more sections are placed at an offset lower =
than 0x80000000. </FONT>
<BR><FONT SIZE=3D2>Objcopy would have to make a huge file in this case =
and it gives up.&nbsp; You</FONT>
<BR><FONT SIZE=3D2>probably need to fix your linker script.</FONT>
</P>

<P><FONT SIZE=3D2>-- </FONT>
<BR><FONT SIZE=3D2>+&nbsp; Maciej W. Rozycki, Technical University of =
Gdansk, Poland&nbsp;&nbsp; +</FONT>
<BR><FONT =
SIZE=3D2>+--------------------------------------------------------------=
+</FONT>
<BR><FONT SIZE=3D2>+&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; e-mail: =
macro@ds2.pg.gda.pl, PGP key =
available&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +</FONT>
</P>

</BODY>
</HTML>
------_=_NextPart_001_01C07699.D1E8E970--

From owner-linux-mips@oss.sgi.com Thu Jan  4 16:44:37 2001
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From:   Keith Owens <kaos@ocs.com.au>
To:     Ralf Baechle <ralf@oss.sgi.com>
cc:     "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>
Subject: ksymoops on origin
In-reply-to: Your message of "Thu, 04 Jan 2001 15:13:34 -0200."
             <20010104151334.C2525@bacchus.dhis.org> 
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On Thu, 4 Jan 2001 15:13:34 -0200, 
Ralf Baechle <ralf@oss.sgi.com> wrote:
>Doesn't really solve the problem.  For example on an Origin we have a 32-bit
>userland but 64-bit kernel addresses which confuses ksymops and procps.

In what way does ksymoops get confused?  All its address handling
should be 64 bit.  As long as the kernel prints its addresses in full,
without removing the high order word, then the text handling should be
OK.  The only problem will be the default object format which is taken
from ksymoops itself.  Sparc also has this problem, from oops.c,
function Oops_eip.

        /* Special case for sparc64.  If the output target is defaulting to the
         * same format as ksymoops then the default is wrong, kernel is 64 bit,
         * ksymoops is 32 bit.  When we see an EIP from sparc64, set the correct
         * default.
         */
        if (!options->target && !options->architecture &&
            strcmp(bfd_get_target(ibfd), "elf32-sparc")) {
            options->target = "elf64-sparc";
            options->architecture = "sparc:v9a";
        }

I will add a special case for Origin if somebody can tell me:

  What oops string identifies a 64 bit kernel instead of 32 bit.
  What bfd_get_target() reports for a 32 bit ksymoops on Origin.
  What target and architecture to use for a 64 bit kernel.

Even without special case code for Origin, you can run ksymoops with
the -t and -a options to force the desired format, instead of
defaulting to the format of ksymoops.


From owner-linux-mips@oss.sgi.com Thu Jan  4 17:50:27 2001
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Dear All,

I am working on our TX39xx(32-bit MIPS) reference board .  The problem
occurs in the assembly code generation for "la" instruction.

The line,  "la t3, mips_cputype" ,  generated the following two assembly
codes:

     lui          $t3,0x8019
     daddiu   $t3,$t3,14712    <---- my system crashed at this 64-bit
instruction

I would like to know why the "daddiu" instruction is generated instead of
"addiu" for MIP1 code.

The following lists my development environment:
1. Cross compiler:  binutils-mips-linux-2.8.1-1.i386 and
egcs-mips-linux-1.0.3a-2.i386
2. Linux Kernel source:  linux-2.2.13-20000211
3. The gcc command line display by specify -v option:

gcc version egcs-2.90.29 980515 (egcs-1.0.3 release)
/usr/lib/gcc-lib/mips-linux/egcs-2.90.29/cpp -lang-asm -v
-I/work/adhawk/linux-2.2.13-20000211/include -undef -$ -D__ELF__ -D__PIC__
-D__pic__ -Dunix -Dmips -DR3000 -DMIPSEB -Dlinux -D__ELF__ -D__PIC__
-D__pic__ -D__unix__ -D__mips__ -D__R3000__ -D__MIPSEB__ -D__linux__
-D__unix -D__mips -D__R3000 -D__MIPSEB -D__linux -Asystem(linux)
-Asystem(posix) -Acpu(mips) -Amachine(mips) -D__ASSEMBLER__ -D__OPTIMIZE__
-Wall -Wstrict-prototypes -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY
-DLANGUAGE_ASSEMBLY -D__SIZE_TYPE__=unsigned int -D__PTRDIFF_TYPE__=int
-D_MIPS_FPSET=16 -D_MIPS_ISA=_MIPS_ISA_MIPS1 -D_MIPS_SIM=_MIPS_SIM_ABI32
-D_MIPS_SZINT=32 -D__SIZE_TYPE__=unsigned int -D__SSIZE_TYPE__=int
-D__PTRDIFF_TYPE__=int -D_MIPS_SZLONG=32 -D_MIPS_SZPTR=32 -D_MIPS_SZLONG=32
-D_MIPS_SZPTR=32 -U__mips64 -U__PIC__ -U__pic__ -D__KERNEL__ -DADHAWK
head.S

I am quite new to the Linux world.  There are definitely something that I
did not setup properly.  If anyone know the reason, your help is highly
appreciated.  Also, what are the latest and stable tool-chain for MIP1
big-endian development?

Thanks,

Lisa Hsu

Multimedia Application Group
TAEC, Toshiba
408-526-2771
lisa.hsu@taec.toshiba.com



From owner-linux-mips@oss.sgi.com Fri Jan  5 00:49:48 2001
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Date:   Fri, 05 Jan 2001 11:38:27 -0500
From:   Nicu Popovici <octavp@isratech.ro>
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        linux-mips@oss.sgi.com, linux-mips@fnet.fr,
        debian-mips@lists.debian.org, Andreas Jaeger <aj@suse.de>
Subject: Re: glibc 2.2 on MIPS
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Hello all,

My question is somehow related on the problems showed in this email. Sorry if this
will bother you.
I am trying to setup a cross toolchain for mips and  I have to use binutils 2.10
and gcc 2.95.2 and glibc2.1.3. Currently I am trying to setup binutils 2.10 with
egcs1.0.3a and with glibc.2.0.6 . Do you have any patches for binutils 2.10 or for
gcc2.95.2 for mips ? If you have and if you have some ideeas please tell me ..

Thank You
Nicu

Christoph Martin wrote:

> Hi Ralf,
>
> On Thu, 12 Oct 2000 04:04:44 +0200, Ralf Baechle wrote:
>
> > On Thu, Oct 12, 2000 at 12:24:21AM +0200, Florian Lohoff wrote:
>
> > > We are trying :) I am currently basing all my Debian-mips(el) things
> > > on glibc 2.0.6. It is the only stable solution right now. I am experimenting
> > > with the glibc 2.1.94-3 debian source package which i managed to get
> > > compiled with unmodified cvs binutils and gcc + the gcse patch.
> > >
> > > Ralf reported bugs in the ld where he send me a patch. With that patch
> > > i get a "Bus Error" from the ld.so within the glibc build.
>
> > There patch is ok; you get those bus errors because there are bugs in
> > both ld and binutils that in most cases compensate each other.  If you
> > fix only one of them you get all sorts of funnies ...
>
> I just tried to build glibc-2.2 (CVS-2000-12-28) for debian-mips and
> it still has the "Bus Error" problem. We are currently using binutils
> 2.10.1.0.2 and gcc 2.95.2 + CVS from 2.95 branch.
>
> Can you please post both patches, so that we can verify which one is
> missing in our build.
>
> > Even with the fixes ld is not yet perfect - for example emacs and X still
> > fail.
>
> The gcc/binutils combination seams to work correctly as far as I can
> see. I managed to compile xfree 4.0.2 linked agains 2.1.95-1.1. What
> problems did you have with X?
>
> Christoph

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From owner-linux-mips@oss.sgi.com Fri Jan  5 02:30:09 2001
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To:     Nicu Popovici <octavp@isratech.ro>
Cc:     Christoph Martin <martin@uni-mainz.de>, linux-mips@oss.sgi.com,
        linux-mips@fnet.fr, debian-mips@lists.debian.org
Subject: Re: glibc 2.2 on MIPS
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	<3A55F882.4B693DE3@isratech.ro>
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Nicu Popovici writes:
 > Hello all,
 > 
 > My question is somehow related on the problems showed in this email. Sorry if this
 > will bother you.
 > I am trying to setup a cross toolchain for mips and  I have to use binutils 2.10
 > and gcc 2.95.2 and glibc2.1.3. Currently I am trying to setup binutils 2.10 with
 > egcs1.0.3a and with glibc.2.0.6 . Do you have any patches for binutils 2.10 or for
 > gcc2.95.2 for mips ? If you have and if you have some ideeas please tell me ..
 > 

Look for the patches in the respective archives on:

ftp.ds2.pg.gda.pl/pub/macro/SRPMS/

Christoph

From owner-linux-mips@oss.sgi.com Fri Jan  5 04:04:00 2001
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Date:   Fri, 5 Jan 2001 12:55:41 +0100 (MET)
From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     John Van Horne <JohnVan.Horne@cosinecom.com>
cc:     "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>
Subject: RE: objcopy error -- was RE: your mail
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On Thu, 4 Jan 2001, John Van Horne wrote:

> This is the same script that worked fine when we were using 
> egcs-mips-linux-1.0.3a and binutils-mips-linux-2.8.1.  Have
> there been any changes in the linker that would affect how
> we write our linker script?

 It's possible the linker emits unnecessary sections.  Try the following
patch to see if it helps.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

2000-11-30  Ralf Baechle  <ralf@gnu.org>

        * elf32-mips.c (elf32_mips_merge_private_bfd_data): Always permit
        BFDs containing no sections or empty .text, .data or .bss sections
	to be merged, regardless of their flags.

diff -urN binutils-cygnus/bfd/elf32-mips.c binutils/bfd/elf32-mips.c
--- binutils-cygnus/bfd/elf32-mips.c	Sat Oct 14 14:21:14 2000
+++ binutils/bfd/elf32-mips.c	Thu Nov 30 16:13:09 2000
@@ -2475,6 +2475,8 @@
   flagword old_flags;
   flagword new_flags;
   boolean ok;
+  boolean null_input_bfd = true;
+  asection *sec;
 
   /* Check if we have the same endianess */
   if (_bfd_generic_verify_endian_match (ibfd, obfd) == false)
@@ -2512,6 +2514,27 @@
   old_flags &= ~EF_MIPS_NOREORDER;
 
   if (new_flags == old_flags)
+    return true;
+
+  /* Check to see if the input BFD actually contains any sections.
+     If not, its flags may not have been initialised either, but it cannot
+     actually cause any incompatibility.  */
+  for (sec = ibfd->sections; sec != NULL; sec = sec->next)
+    {
+      /* Ignore synthetic sections and empty .text, .data and .bss sections
+	  which are automatically generated by gas.  */
+      if (strcmp (sec->name, ".reginfo")
+	  && strcmp (sec->name, ".mdebug")
+	  && ((!strcmp (sec->name, ".text")
+	       || !strcmp (sec->name, ".data")
+	       || !strcmp (sec->name, ".bss"))
+	      && sec->_raw_size != 0))
+	{
+	  null_input_bfd = false;
+	  break;
+	}
+    }
+  if (null_input_bfd)
     return true;
 
   ok = true;


From owner-linux-mips@oss.sgi.com Fri Jan  5 07:07:22 2001
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Date:   Fri, 05 Jan 2001 17:18:37 -0500
From:   Nicu Popovici <octavp@isratech.ro>
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Subject: Kernel compile error.
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Hello to you all,

I have the folowing cross toolchain ( binutils-2.10.1, egcs-1.0.3a , and
glibc-2.0.6) and I can crosscompile some c c++ files on my intel machine
and run the executables on the mips. BUT I can not cross compile the
kernel for mips. I get the following error

=======================================================================
/crossdev/bin/mips-linux-gcc -D__KERNEL__
-I/home/nicu/JUNGO/linux/include -Wall -Wstrict-prototypes -O2
-fomit-frame-pointer  -mno-split-addresses -D__SMP__ -pipe  -c -o
init/main.o init/main.c
/home/nicu/JUNGO/linux/include/asm/io.h: In function `copro_timeout':
/home/nicu/JUNGO/linux/include/asm/io.h:87: `asm' operand requires
impossible reload
/home/nicu/JUNGO/linux/include/asm/io.h:87: `asm' operand requires
impossible reload
/home/nicu/JUNGO/linux/include/asm/bugs.h: In function `check_fpu':
In file included from init/main.c:34:
/home/nicu/JUNGO/linux/include/asm/bugs.h:137: internal error--insn does
not satisfy its constraints:
(insn 244 241 250 (set (reg:SI 66 accum)
        (reg:SI 6 a2)) 170 {movsi_internal2} (insn_list 241
(insn_list:REG_DEP_ANTI 98 (insn_list:REG_DEP_OUTPUT 138
(insn_list:REG_DEP_ANTI 247 (insn_list:REG_DEP_ANTI 150 (nil))))))
            (nil))
            mips-linux-gcc: Internal compiler error: program cc1 got
fatal signal 6
            make: *** [init/main.o] Error 1
            [nicu@ares linux]$ {standard input}: Assembler messages:
            {standard input}:47: Error: unrecognized opcode `movl
%cr0,$2'
            {standard input}:52: Error: unrecognized opcode `movl
$2,%cr0'
            {standard input}:100: Error: unrecognized opcode `andl
%esp,$5'
            {standard input}:108: Error: unrecognized opcode `outb
accum,$7'
            {standard input}:109: Error: unrecognized opcode `outb
%al,$0x80'
            {standard input}:114: Error: unrecognized opcode `outb
accum,$7'
=======================================================================

I have to mention that egcs and glibc are tested and I know for sure
that this one are good.

Does anyone know something related to this ?

Regards,
Octav



From owner-linux-mips@oss.sgi.com Fri Jan  5 07:14:02 2001
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From:   Nicu Popovici <octavp@isratech.ro>
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To:     Christoph Martin <martin@uni-mainz.de>
CC:     ralf@oss.sgi.com, Christoph.Martin@uni-mainz.de,
        linux-mips@oss.sgi.com, linux-mips@fnet.fr,
        debian-mips@lists.debian.org, Andreas Jaeger <aj@suse.de>
Subject: Re: glibc 2.2 on MIPS
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Hello ,

I am bothering you again.
Related to gcc 2.95.2 --- it has any patches for porting to mips or not ? I mean ,
where do I find the patches for gcc-2.95.2 for mips if there are some files. I saw
that you said something like that "gcc 2.95.2 + CVS from 2.95 branch." What do you
mean ?

Regards,
Nicu

Christoph Martin wrote:

> Hi Ralf,
>
> On Thu, 12 Oct 2000 04:04:44 +0200, Ralf Baechle wrote:
>
> > On Thu, Oct 12, 2000 at 12:24:21AM +0200, Florian Lohoff wrote:
>
> > > We are trying :) I am currently basing all my Debian-mips(el) things
> > > on glibc 2.0.6. It is the only stable solution right now. I am experimenting
> > > with the glibc 2.1.94-3 debian source package which i managed to get
> > > compiled with unmodified cvs binutils and gcc + the gcse patch.
> > >
> > > Ralf reported bugs in the ld where he send me a patch. With that patch
> > > i get a "Bus Error" from the ld.so within the glibc build.
>
> > There patch is ok; you get those bus errors because there are bugs in
> > both ld and binutils that in most cases compensate each other.  If you
> > fix only one of them you get all sorts of funnies ...
>
> I just tried to build glibc-2.2 (CVS-2000-12-28) for debian-mips and
> it still has the "Bus Error" problem. We are currently using binutils
> 2.10.1.0.2 and gcc 2.95.2 + CVS from 2.95 branch.
>
> Can you please post both patches, so that we can verify which one is
> missing in our build.
>
> > Even with the fixes ld is not yet perfect - for example emacs and X still
> > fail.
>
> The gcc/binutils combination seams to work correctly as far as I can
> see. I managed to compile xfree 4.0.2 linked agains 2.1.95-1.1. What
> problems did you have with X?
>
> Christoph


From owner-linux-mips@oss.sgi.com Fri Jan  5 12:37:24 2001
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Subject: Re: questions on the cross-compiler
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With the help from Kevin Kissell,  I've found out that  the compilation
directives "set .mips3[4]" were turned on before cpu_probe() and cpu_probe
() functions in my head.S file.  This is the reason why I've got that wrong
code generated although I've specified mip1 in the gcc options.

I 've temporarily used #define to add "set .mips1" in the code to fix the
problem.   My question now,  is: how can we make the kernel code flexible
to free from the problem of the one that I've got?

Thanks,

Lisa



                                                                                                                   
                    "Kevin D.                                                                                      
                    Kissell"             To:     <Lisa.Hsu@taec.toshiba.com>                                       
                    <kevink@mips.        cc:                                                                       
                    com>                 Subject:     Re: questions on the cross-compiler                          
                                                                                                                   
                    01/05/01                                                                                       
                    11:14 AM                                                                                       
                                                                                                                   
                                                                                                                   




> Thanks so much for replying my email.   From the specs file, I did see
> -U__mips64 which means it was undefined.

But undefining the symbol __mips64 is not really the same
thing as setting the internal compiler state to generate mips1,
mips2, or whatever.  In assembler code, one can generally
control this with something like ".set mips1"  or "set .mips1"
(I forget the semantics), but I didn't think that the code generator
or assembler paid any attention to __mips64 or any other
compile-time symbol.

> We have another reference board uses the same processor but is running in
> little-endian.  I've checked the gcc -v output on it and compare with
mine.
> The options are the same but it correctly generated "addiu" instruction
> instead of the wrong "daddiu" instruction.   I've tried to configure to
> little-endian and re-compiled.  The result of the "la" instruction still
> the same.  So the tool chain is not the problem.

At some level, there is an option being fed to the tool
chain in one environment that is not being supplied in
the other.  The behavior you are seeing is completely
correct behavior for 64-bit code generation, but 64-bit
is not normally the default.  *Something* is turning it on,
either in the gcc specs, a makefile or make-include file,
or in the source code itself.  It's not out of the question,
by the way, that your source code is really doing this
to you.  Is there a "mips3" or "mips4" string anywhere
in the head.S file, or in anything it includes?  It may be
that there's some set of conditional compilation directives
such that a .mips3 directive is being turned on by mistake
for your particular platform.  It wouldn't be the first time I
came across Linux kernel code that was allegedly for MIPS
in general, but which was in fact specific to R4000-and-above
CPUs.

> The gcc -v listed out all the options as shown in my original email under
> #3.  Do you know what else I can check?

Well, you can eliminate the specs file and compiler defaults
as suspects if you just generate a file containing just the "la"
instruction  and run "gcc-mips -c foo.S" with no fancy flags,
includes, or make artifacts, and see what instructions it generates.

>
> Thanks and Best Regards,
>
> Lisa
>
>
>
>
>                     "Kevin D.
>                     Kissell"             To:
<Lisa.Hsu@taec.toshiba.com>
>                     <kevink@mips.        cc:
>                     com>                 Subject:     Re: questions on
the
cross-compiler
>
>                     01/04/01
>                     11:47 PM
>
>
>
>
>
>
> Hi Lisa,
>
> Sounds like someone has set the default compiler/assembler
> options in gcc to default to 64-bit ISA code generation, which
> is rather unusual.  Normally, the default should be "mips1",
> which is the lowest-common-denominator 32-bit ISA of the
> R2000/R3000.  The TX39 is more like MIPS II, in fact.  In
> general, in gcc this is controlled by a command line option:
>
> -mips1      R2000/3000/3081
> -mips2      R6000.  R39xx should be a subset
> -mips3      Basic 64-bit: R4x00
> -mips4      R5000/8000/10000/12000
> -mips32    New 32-bit ISA standard
> -mips64    New 64-bit ISA standard
> -mips16    Compressed ISA
>
> So you either need to figure out where in the gcc configuration
> this is being set to "mips3", "mips4", or "mips64" (check the
> specs file that you will find by running "gcc -v"), or you need
> to make -mips1 or -mips2 explicit in your makefile.
>
>             Regards,
>
>             Kevin K.
>
> ----- Original Message -----
> From: <Lisa.Hsu@taec.toshiba.com>
> To: <linux-mips@oss.sgi.com>
> Sent: Friday, January 05, 2001 2:44 AM
> Subject: questions on the cross-compiler
>
>
> >
> > Dear All,
> >
> > I am working on our TX39xx(32-bit MIPS) reference board .  The problem
> > occurs in the assembly code generation for "la" instruction.
> >
> > The line,  "la t3, mips_cputype" ,  generated the following two
assembly
> > codes:
> >
> >      lui          $t3,0x8019
> >      daddiu   $t3,$t3,14712    <---- my system crashed at this 64-bit
> > instruction
> >
> > I would like to know why the "daddiu" instruction is generated instead
of
> > "addiu" for MIP1 code.
> >
> > The following lists my development environment:
> > 1. Cross compiler:  binutils-mips-linux-2.8.1-1.i386 and
> > egcs-mips-linux-1.0.3a-2.i386
> > 2. Linux Kernel source:  linux-2.2.13-20000211
> > 3. The gcc command line display by specify -v option:
> >
> > gcc version egcs-2.90.29 980515 (egcs-1.0.3 release)
> > /usr/lib/gcc-lib/mips-linux/egcs-2.90.29/cpp -lang-asm -v
> > -I/work/adhawk/linux-2.2.13-20000211/include -undef -$ -D__ELF__
> -D__PIC__
> > -D__pic__ -Dunix -Dmips -DR3000 -DMIPSEB -Dlinux -D__ELF__ -D__PIC__
> > -D__pic__ -D__unix__ -D__mips__ -D__R3000__ -D__MIPSEB__ -D__linux__
> > -D__unix -D__mips -D__R3000 -D__MIPSEB -D__linux -Asystem(linux)
> > -Asystem(posix) -Acpu(mips) -Amachine(mips) -D__ASSEMBLER__
> -D__OPTIMIZE__
> > -Wall -Wstrict-prototypes -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY
> > -DLANGUAGE_ASSEMBLY -D__SIZE_TYPE__=unsigned int -D__PTRDIFF_TYPE__=int
> > -D_MIPS_FPSET=16 -D_MIPS_ISA=_MIPS_ISA_MIPS1 -D_MIPS_SIM
=_MIPS_SIM_ABI32
> > -D_MIPS_SZINT=32 -D__SIZE_TYPE__=unsigned int -D__SSIZE_TYPE__=int
> > -D__PTRDIFF_TYPE__=int -D_MIPS_SZLONG=32 -D_MIPS_SZPTR=32
> -D_MIPS_SZLONG=3
> 2
> > -D_MIPS_SZPTR=32 -U__mips64 -U__PIC__ -U__pic__ -D__KERNEL__ -DADHAWK
> > head.S
> >
> > I am quite new to the Linux world.  There are definitely something that
I
> > did not setup properly.  If anyone know the reason, your help is highly
> > appreciated.  Also, what are the latest and stable tool-chain for MIP1
> > big-endian development?
> >
> > Thanks,
> >
> > Lisa Hsu
> >
> > Multimedia Application Group
> > TAEC, Toshiba
> > 408-526-2771
> > lisa.hsu@taec.toshiba.com
> >
> >
>
>
>
>





From owner-linux-mips@oss.sgi.com Fri Jan  5 12:40:34 2001
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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Reply-To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Nicu Popovici <octavp@isratech.ro>
cc:     linux-mips@oss.sgi.com
Subject: Re: Kernel compile error.
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On Fri, 5 Jan 2001, Nicu Popovici wrote:

> /home/nicu/JUNGO/linux/include/asm/bugs.h:137: internal error--insn does
> not satisfy its constraints:
> (insn 244 241 250 (set (reg:SI 66 accum)
>         (reg:SI 6 a2)) 170 {movsi_internal2} (insn_list 241
> (insn_list:REG_DEP_ANTI 98 (insn_list:REG_DEP_OUTPUT 138
> (insn_list:REG_DEP_ANTI 247 (insn_list:REG_DEP_ANTI 150 (nil))))))
>             (nil))
>             mips-linux-gcc: Internal compiler error: program cc1 got
> fatal signal 6
>             make: *** [init/main.o] Error 1
>             [nicu@ares linux]$ {standard input}: Assembler messages:
>             {standard input}:47: Error: unrecognized opcode `movl
> %cr0,$2'

 You are trying to assemble i386 instructions -- probably your include/asm
symlink is incorrect.  Make sure the ARCH make variable is set to "mips",
i.e. either run `make ARCH=mips <whatever>' or modify the top-level
Makefile (the one from our CVS appears to have ARCH hardcoded to "mips"
already). 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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cc:     linux-mips@oss.sgi.com
Subject: Re: questions on the cross-compiler
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On Fri, 5 Jan 2001 Lisa.Hsu@taec.toshiba.com wrote:

> With the help from Kevin Kissell,  I've found out that  the compilation
> directives "set .mips3[4]" were turned on before cpu_probe() and cpu_probe
> () functions in my head.S file.  This is the reason why I've got that wrong
> code generated although I've specified mip1 in the gcc options.
> 
> I 've temporarily used #define to add "set .mips1" in the code to fix the
> problem.   My question now,  is: how can we make the kernel code flexible
> to free from the problem of the one that I've got?

1. Don't use "set .mips*" unless absolutely needed.  The right ISA level
is already set via a compiler option depending on the host CPU selected
upon kernel configuration.

2. If you can't avoid "set .mips*" for some reason, then always restore
the default state after the relevant code, either by ".set mips0" or by
".set push" and ".set pop". 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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To:     Nicu Popovici <octavp@isratech.ro>
Cc:     Christoph Martin <martin@uni-mainz.de>, linux-mips@oss.sgi.com,
        linux-mips@fnet.fr, debian-mips@lists.debian.org
Subject: Re: glibc 2.2 on MIPS
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Nicu Popovici writes:
 > Hello ,
 > 
 > I am bothering you again.
 > Related to gcc 2.95.2 --- it has any patches for porting to mips or not ? I mean ,
 > where do I find the patches for gcc-2.95.2 for mips if there are some files. I saw
 > that you said something like that "gcc 2.95.2 + CVS from 2.95 branch." What do you
 > mean ?

"gcc 2.95.2 + CVS from 2.95 branch." is what debian has in its
gcc-2.95.2. The mips patches are - as I said - in the src.rpm's on
ftp.ds2.pg.gda.pl/pub/macro/SRPMS/ 

C

From owner-linux-mips@oss.sgi.com Fri Jan  5 14:19:26 2001
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From:   "Kevin D. Kissell" <kevink@mips.com>
To:     "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>,
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Subject: Re: questions on the cross-compiler
Date:   Fri, 5 Jan 2001 23:22:06 +0100
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> > With the help from Kevin Kissell,  I've found out that  the compilation
> > directives "set .mips3[4]" were turned on before cpu_probe() and
cpu_probe
> > () functions in my head.S file.  This is the reason why I've got that
wrong
> > code generated although I've specified mip1 in the gcc options.
> >
> > I 've temporarily used #define to add "set .mips1" in the code to fix
the
> > problem.   My question now,  is: how can we make the kernel code
flexible
> > to free from the problem of the one that I've got?
>
> 1. Don't use "set .mips*" unless absolutely needed.  The right ISA level
> is already set via a compiler option depending on the host CPU selected
> upon kernel configuration.

Lisa's underlying problem may be that there isn't a Config
option for the R39xx CPUs, and she's ended up getting an
R4000 (or whatever) configuration by default.

At some point specific support for the R3900 features
(MIPS II ISA, seperate hardware interrupt vector, etc.)
should go into the kernel, but for the moment, you should
make sure that when you do the initial "make config"
(or xconfig or menuconfig or whatever) you select an
R3000 CPU.  You won't get it by default.  You may
also need to hack the head.S code to detect an R39xx PrID
value and replace it with an R3000  value before it gets used
by the kernel.  Otherwise, you may need to generate additional
cases/conditionals for R3900 wherever you see R3000 called
out in the existing code.  If your kernel base has my cpu_probe()
in C, adding R39xx support will be much easier, but while
I *think* I set it up such that, if the R4K_EXCEPTION_MODEL
option bit isn't set, the kernel assumes an R3K model, I never
tested that option - not having any R3xxx platforms in
the lab!

            Kevin K.


From owner-linux-mips@oss.sgi.com Fri Jan  5 14:42:26 2001
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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Reply-To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     "Kevin D. Kissell" <kevink@mips.com>
cc:     Lisa.Hsu@taec.toshiba.com, linux-mips@oss.sgi.com
Subject: Re: questions on the cross-compiler
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On Fri, 5 Jan 2001, Kevin D. Kissell wrote:

> Lisa's underlying problem may be that there isn't a Config
> option for the R39xx CPUs, and she's ended up getting an
> R4000 (or whatever) configuration by default.

 It's easy to add right options for yet another CPU -- see
arch/mips/Makefile.  Anyway, for the mips port (as opposed to mips64)
you'll never get anything beyond "-mips2" passed to the toolchain. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +



From owner-linux-mips@oss.sgi.com Fri Jan  5 17:47:27 2001
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From:   "Jay Carlson" <nop@nop.com>
To:     "Kevin D. Kissell" <kevink@mips.com>,
        "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>,
        <Lisa.Hsu@taec.toshiba.com>
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Subject: RE: questions on the cross-compiler
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Kevin D. Kissell writes:

> Lisa's underlying problem may be that there isn't a Config
> option for the R39xx CPUs, and she's ended up getting an
> R4000 (or whatever) configuration by default.
>
> At some point specific support for the R3900 features
> (MIPS II ISA, seperate hardware interrupt vector, etc.)
> should go into the kernel,
[...]

http://cvs.sourceforge.net/cgi-bin/cvsweb.cgi/linux/arch/mips/r39xx/?cvsroot
=linux-vr

The TX3912 is supported by the Linux VR kernel tree.  I'm not sure it's been
tested in a while, but kernel sources from a few months ago run nice on my
VTech Helio.

Jay


From owner-linux-mips@oss.sgi.com Sat Jan  6 09:37:39 2001
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To:	"Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc:	Nicu Popovici <octavp@isratech.ro>, linux-mips@oss.sgi.com
Subject: Re: Kernel compile error.
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On Fri, Jan 05, 2001 at 09:39:54PM +0100, Maciej W. Rozycki wrote:

>  You are trying to assemble i386 instructions -- probably your include/asm
> symlink is incorrect.  Make sure the ARCH make variable is set to "mips",
> i.e. either run `make ARCH=mips <whatever>' or modify the top-level
> Makefile (the one from our CVS appears to have ARCH hardcoded to "mips"
> already). 

The MIPS sources have ARCH hardwired to mips so his problem means he's trying
to compile some other source tree - which probably will fail even with your
hints.

  Ralf

From owner-linux-mips@oss.sgi.com Sun Jan  7 06:22:49 2001
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Date:   Sun, 07 Jan 2001 17:12:02 -0500
From:   Nicu Popovici <octavp@isratech.ro>
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Subject: Loading srec imagine problem.
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This is a multi-part message in MIME format.
--------------9AAF69DA117558ADC28E8C31
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Hello ,

I have now the following cross toolchain
binutils 2.10.1 - egcs.1.0.3a - glibc-2.0.6.

I manage to cross compile the kernel for mips and when I try to load the
srec imagine on the mips I get the following error.

For this srec imagine I used mips-linux-objcopy -O srec vmlinux
srecimagine.

****************************  Exception occurred
****************************

TLB exception (store)

CAUSE    = 0x8080000c
STATUS   = 0x00000403      EPC      = 0x80024a0c
BADVADDR = 0x000036e0      ERROREPC = 0x800131f0

$ 0(zr):0x00000000  $ 8(t0):0x00000081  $16(s0):0x80060000
$24(t8):0x80030f68
$ 1(at):0x00000000  $ 9(t1):0x80026178  $17(s1):0x80060f80
$25(t9):0x00000009
$ 2(v0):0x000036e0  $10(t2):0x00000000  $18(s2):0x0000003a
$26(k0):0x00000000
$ 3(v1):0x00000000  $11(t3):0x80108390  $19(s3):0x80032bd8
$27(k1):0x00000000
$ 4(a0):0x000036e4  $12(t4):0x80020000  $20(s4):0x0000d004
$28(gp):0x80037b98
$ 5(a1):0x80060ec4  $13(t5):0x00000081  $21(s5):0x00000002
$29(sp):0x80060e50
$ 6(a2):0x00000010  $14(t6):0x00000080  $22(s6):0x00000002
$30(s8):0x80030000
$ 7(a3):0x80060ed0  $15(t7):0x80026178  $23(s7):0x80030f68
$31(ra):0x8001f57c
***************************************************************************

What am I doing wrong here ?

Regards,
Nicu



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From owner-linux-mips@oss.sgi.com Sun Jan  7 07:20:39 2001
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From:   "Luke A. Guest" <laguest@nebulas.demon.co.uk>
To:     linux-mips@oss.sgi.com
Subject: Buying an old SGI machine.
Date:   Sun, 7 Jan 2001 15:24:08 +0000
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Hi,

I'm new to the list and have been looking to buy an old SGI machine, for 
development purposes. This means that I would be looking for a machine that 
has a decent compile time, also, I want to play around with OpenGL, so decent 
graphics is a must.

Now, I read in the archives some time ago that somebody knew of a place he 
could get O2's (in Germany) for around $600; I don't know if this is true - 
or just SPAM - but could that person get in touch with me please?

Anyway, I have been looking at the purple Indigo2 as these seem to really 
cheap machines and rather expandable, but I can never seem to find anyone who 
is selling Irix media - why is this?

I know that Linux doesn't work with I2's yet, but I'm also willing to "try" 
to work on helping with that, as I'm currently looking into OS concepts on my 
PC, so knowledge of other architecture's would be helpful.

But how would I get access to documentation for I2's? I see (do far) that the 
docs aren't available yet, what would I have to do?

Thanks,
Luke A. Guest.

From owner-linux-mips@oss.sgi.com Sun Jan  7 07:35:19 2001
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Date:   Sun, 07 Jan 2001 17:33:10 +0200
From:   Michael Shmulevich <michaels@jungo.com>
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Hello all,

I was compiling a milo-0.27 lately on i586 machine for mips32 platform.
I am using binutils 2.8.1 egcs1.0.3a, and glibc 2.0.6. I am using some custom
MIPS board
with QED RM5261 processor. I use patched 2.2.14 kernel which is known to compile
and run on my hardware.

./configure went smoothly, but at a build time I started to get problems. First,
I got missing <asm/pica.h>. After a short search I have found one in annals of
the Internet.

This didn't really help me, because finally I got an assembler errors for
libstand/cachectl.o:

[michaels@kobie libstand]$ make
mips-linux-gcc -Wall -O2 -mips2 -Wa,-mips3 -mcpu=r4400 -D__KERNEL__
-DLOADADDR=0x80600000 -DKERNELBASE=0x80000000 -DVERSION=0.27 -DDEBUG=1
-DBOOTMETHOD_ARC -nostdinc
-I/usr/local/lib/gcc-lib/mips-linux/egcs-2.90.29/include
-I/home/michaels/atlas/rg.mips/linux/include -I../libstand/include
-I../libarc/include -c cachectl.S -o cachectl.o
cachectl.S: Assembler messages:
cachectl.S:58: Error: absolute expression required `li'
cachectl.S:59: Warning: Instruction cache requires absolute expression
cachectl.S:60: Warning: Instruction cache requires absolute expression
cachectl.S:61: Warning: Instruction cache requires absolute expression
cachectl.S:62: Warning: Instruction cache requires absolute expression
cachectl.S:63: Warning: Instruction cache requires absolute expression
cachectl.S:64: Warning: Instruction cache requires absolute expression
cachectl.S:65: Warning: Instruction cache requires absolute expression
cachectl.S:66: Warning: Instruction cache requires absolute expression
<and many more like these>

Line 58 is
 li t1,CACHELINES-1
Line 59 is
  cache Index_Writeback_Inv_D,32(t0)

and obviously CACHELINES is not defined anywhere, not even within the kernel
source tree. At least not my patched 2.2.14. Also, I am confused what causes
cache to go crazy on Index_Writeback_Inv_D ...

So, if anyone has ideas, plase forward them on.
Also, I wonder if there is a public CVS repository for milo or any other
"authoritative" storage.

Thanks in advance,
Michael.


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On Sun, Jan 07, 2001 at 05:33:10PM +0200, Michael Shmulevich wrote:

> I was compiling a milo-0.27 lately on i586 machine for mips32 platform.

The answer is easy - don't use Milo; it's not used since a loooong time
for any of the supported systems anymore.

  Ralf

From owner-linux-mips@oss.sgi.com Sun Jan  7 11:36:22 2001
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To:     linux-mips@oss.sgi.com
Subject: Re: Buying an old SGI machine.
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On Sun, Jan 07, 2001 at 03:24:08PM +0000, Luke A. Guest wrote:
> Hi,
> 
> I'm new to the list and have been looking to buy an old SGI machine, for 
> development purposes. This means that I would be looking for a machine that 
> has a decent compile time, also, I want to play around with OpenGL, so decent 
> graphics is a must.
>

For the I2 series the specs for the graphics cars are lost. X is only 
supported for the indys, please read the archieve.


> Now, I read in the archives some time ago that somebody knew of a place he 
> could get O2's (in Germany) for around $600; I don't know if this is true - 
> or just SPAM - but could that person get in touch with me please?
>

$600 are around DM1200 for this money you get an indigo2 but not an O2.


> Anyway, I have been looking at the purple Indigo2 as these seem to really 
> cheap machines and rather expandable, but I can never seem to find anyone who 
> is selling Irix media - why is this?
> 

A purple Indigo2 stands in front of me. You got Irix installations media
when ypu buy a new machine or take in an auction of ebay.

> I know that Linux doesn't work with I2's yet, but I'm also willing to "try" 
> to work on helping with that, as I'm currently looking into OS concepts on my 
> PC, so knowledge of other architecture's would be helpful.
> 

False Linux runs on Iindigo2 but not not on O2, please read the archieve of
the ml.


> But how would I get access to documentation for I2's? I see (do far) that the 
> docs aren't available yet, what would I have to do?
>

Read the archieve of ml and ask the guys at sgi.

> Thanks,
> Luke A. Guest.

-- 


Henning Heinold

From owner-linux-mips@oss.sgi.com Mon Jan  8 00:06:54 2001
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Ralf,

Thank you for reply.
I wonder if I can take the initialization routines from it to use in my
custom flash bootloader?
I do not mean "cut & paste" bu rather ideas. I need a loader that will copy
the kernel with a
ramdisk from flash to ram and start the kernel. I saw that there is
something similar in milo.

By the way, how do supported machines boot nowadays? Lilo?

Thanks,
michael.

Ralf Baechle wrote:

> On Sun, Jan 07, 2001 at 05:33:10PM +0200, Michael Shmulevich wrote:
>
> > I was compiling a milo-0.27 lately on i586 machine for mips32 platform.
>
> The answer is easy - don't use Milo; it's not used since a loooong time
> for any of the supported systems anymore.
>
>   Ralf


From owner-linux-mips@oss.sgi.com Mon Jan  8 01:41:15 2001
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Message-ID: <3A598AFC.83204F56@mips.com>
Date:   Mon, 08 Jan 2001 10:40:12 +0100
From:   Carsten Langgaard <carstenl@mips.com>
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I have a few questions about user applications.

When a new user process is started will its user space be cleared by the
kernel or is there a potential leak from an older user process ?
What about the registers values, are they cleared for each new user
application or will it simply contain the current value it got when the
user application is started ?
How can you flush the data and instruction cashes from a user
application ?

/Carsten

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Mon Jan  8 03:44:46 2001
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From:   Florian Lohoff <flo@rfc822.org>
To:     Nicu Popovici <octavp@isratech.ro>
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Subject: Re: Loading srec imagine problem.
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On Sun, Jan 07, 2001 at 05:12:02PM -0500, Nicu Popovici wrote:
> Hello ,
> 
> I have now the following cross toolchain
> binutils 2.10.1 - egcs.1.0.3a - glibc-2.0.6.
> 
> I manage to cross compile the kernel for mips and when I try to load the
> srec imagine on the mips I get the following error.
> 
> For this srec imagine I used mips-linux-objcopy -O srec vmlinux
> srecimagine.

Wouldnt this use the original load address of the vmlinux as the srec
address ? Wouldnt this mean you are probably overwriting your monitor
while loading the srec ? Ususally you would load the image via srec to
a different location with a small copy and run type code in front.

Without a memory map etc one cant help here ...

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Mon Jan  8 03:56:35 2001
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Hello ,

Florian Lohoff wrote:

> On Sun, Jan 07, 2001 at 05:12:02PM -0500, Nicu Popovici wrote:
> > Hello ,
> >
> > I have now the following cross toolchain
> > binutils 2.10.1 - egcs.1.0.3a - glibc-2.0.6.
> >
> > I manage to cross compile the kernel for mips and when I try to load the
> > srec imagine on the mips I get the following error.
> >
> > For this srec imagine I used mips-linux-objcopy -O srec vmlinux
> > srecimagine.
>
> Wouldnt this use the original load address of the vmlinux as the srec
> address ? Wouldnt this mean you are probably overwriting your monitor
> while loading the srec ? Ususally you would load the image via srec to
> a different location with a small copy and run type code in front.

I do not know if this is the problem. I made objdump on this srec imagine and
it looks like the sections begin somewhere below 0x80100000 address and for
the srec imagine ( the one that I can load on ) the sections begin after
0x8010000 address. So the problem is here , something with setting the write
address for this srec imagine. Maybe from objcopy ( but I do not think so )
or from linker.

Nicu



From owner-linux-mips@oss.sgi.com Mon Jan  8 05:33:26 2001
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Carsten Langgaard wrote:

> I have a few questions about user applications.
>
> When a new user process is started will its user space be cleared by the
> kernel or is there a potential leak from an older user process ?

Usually it is defied by the loader. If the data section contents is set to
LOAD, then the contents of the section will be loaded from disk (no leak),
if not -- whatever values left i nmemory will be there, or exactly, the
virtual page of some other proccess that was swapped out or ended.

> What about the registers values, are they cleared for each new user
> application or will it simply contain the current value it got when the
> user application is started ?

It depends on the context switch algorithm of the processor, I think.

> How can you flush the data and instruction cashes from a user
> application ?
>

As far as I understand, ASID must take care of it. It contains unique IDs
per process virtual space, so that even
though virtual addresses may be found in TLB, their ASID will be different,
causing TLB miss and probably page fault.

>
> /Carsten
>
> --
> _    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
> |\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
> | \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
>   TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
>                    Denmark             http://www.mips.com

Michael.


From owner-linux-mips@oss.sgi.com Mon Jan  8 05:53:56 2001
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Michael Shmulevich wrote:

> Carsten Langgaard wrote:
>
> > I have a few questions about user applications.
> >
> > When a new user process is started will its user space be cleared by the
> > kernel or is there a potential leak from an older user process ?
>
> Usually it is defied by the loader. If the data section contents is set to
> LOAD, then the contents of the section will be loaded from disk (no leak),
> if not -- whatever values left i nmemory will be there, or exactly, the
> virtual page of some other proccess that was swapped out or ended.
>
> > What about the registers values, are they cleared for each new user
> > application or will it simply contain the current value it got when the
> > user application is started ?
>
> It depends on the context switch algorithm of the processor, I think.
>
> > How can you flush the data and instruction cashes from a user
> > application ?
> >
>
> As far as I understand, ASID must take care of it. It contains unique IDs
> per process virtual space, so that even
> though virtual addresses may be found in TLB, their ASID will be different,
> causing TLB miss and probably page fault.
>

My problem is that I want to make self-modified code, so I need to flush both
the instruction and data cache.

>
> >
> > /Carsten
> >
> > --
> > _    _ ____  ___   Carsten Langgaard  Mailto:carstenl@mips.com
> > |\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
> > | \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
> >   TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
> >                    Denmark            http://www.mips.com
>
> Michael.

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Mon Jan  8 06:12:26 2001
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Subject: Re: User applications
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> > When a new user process is started will its user space be cleared by the
> > kernel or is there a potential leak from an older user process ?
>
> Usually it is defied by the loader. If the data section contents is set to
> LOAD, then the contents of the section will be loaded from disk (no leak),
> if not -- whatever values left i nmemory will be there, or exactly, the
> virtual page of some other proccess that was swapped out or ended.

Note that what you are describing here is the "exec()" behavior.
I believe Carsten was talking about what happens on a "fork()".

> > What about the registers values, are they cleared for each new user
> > application or will it simply contain the current value it got when the
> > user application is started ?
>
> It depends on the context switch algorithm of the processor, I think.

On a fork() (or presumably clone()) operation, the set of registers
is copied.  Loading a new program ("exec()") should set up the
registers that point to the base of the new stack, the environment,
etc.  Historically, it's up to the runtime startup code ("crt0" in old
Unix systems) to do any other register initialization.

> > How can you flush the data and instruction cashes from a user
> > application ?
> >
>
> As far as I understand, ASID must take care of it. It contains unique IDs
> per process virtual space, so that even
> though virtual addresses may be found in TLB, their ASID will be
different,
> causing TLB miss and probably page fault.

That won't necessarily affect the caches, though.  While it
would be possible to do so, I don't believe any existing
MIPS implementations include ASID in the cache tags.
Hits are determined by an address match, period.

Back in the Ancient Old Days of System V, every architecture
had an architecture-specific system call entry, the first parameter
of which expressed what needed to be done.  Do we have
such a thing in Linux?   That would be the logical place to
things like cache flush and the atomic operations that were
being discussed here a couple of weeks ago.

            Regards,

            Kevin K.


From owner-linux-mips@oss.sgi.com Mon Jan  8 06:17:26 2001
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From:   Carsten Langgaard <carstenl@mips.com>
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Subject: Re: User applications
References: <3A598AFC.83204F56@mips.com> <3A59C0FB.62E52EF0@jungo.com> <00d801c0797d$5cc410c0$0deca8c0@Ulysses>
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"Kevin D. Kissell" wrote:

> > > When a new user process is started will its user space be cleared by the
> > > kernel or is there a potential leak from an older user process ?
> >
> > Usually it is defied by the loader. If the data section contents is set to
> > LOAD, then the contents of the section will be loaded from disk (no leak),
> > if not -- whatever values left i nmemory will be there, or exactly, the
> > virtual page of some other proccess that was swapped out or ended.
>
> Note that what you are describing here is the "exec()" behavior.
> I believe Carsten was talking about what happens on a "fork()".
>
> > > What about the registers values, are they cleared for each new user
> > > application or will it simply contain the current value it got when the
> > > user application is started ?
> >
> > It depends on the context switch algorithm of the processor, I think.
>
> On a fork() (or presumably clone()) operation, the set of registers
> is copied.  Loading a new program ("exec()") should set up the
> registers that point to the base of the new stack, the environment,
> etc.  Historically, it's up to the runtime startup code ("crt0" in old
> Unix systems) to do any other register initialization.
>
> > > How can you flush the data and instruction cashes from a user
> > > application ?
> > >
> >
> > As far as I understand, ASID must take care of it. It contains unique IDs
> > per process virtual space, so that even
> > though virtual addresses may be found in TLB, their ASID will be
> different,
> > causing TLB miss and probably page fault.
>
> That won't necessarily affect the caches, though.  While it
> would be possible to do so, I don't believe any existing
> MIPS implementations include ASID in the cache tags.
> Hits are determined by an address match, period.
>
> Back in the Ancient Old Days of System V, every architecture
> had an architecture-specific system call entry, the first parameter
> of which expressed what needed to be done.  Do we have
> such a thing in Linux?   That would be the logical place to
> things like cache flush and the atomic operations that were
> being discussed here a couple of weeks ago.

I think I just found it.
The system call is sysmips(FLUSH_CACHE).

>
>             Regards,
>
>             Kevin K.

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Mon Jan  8 06:31:27 2001
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Date:   Mon, 8 Jan 2001 15:16:46 +0100 (MET)
From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Michael Shmulevich <michaels@jungo.com>
cc:     Carsten Langgaard <carstenl@mips.com>,
        "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Subject: Re: User applications
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On Mon, 8 Jan 2001, Michael Shmulevich wrote:

> > When a new user process is started will its user space be cleared by the
> > kernel or is there a potential leak from an older user process ?
> 
> Usually it is defied by the loader. If the data section contents is set to
> LOAD, then the contents of the section will be loaded from disk (no leak),
> if not -- whatever values left i nmemory will be there, or exactly, the
> virtual page of some other proccess that was swapped out or ended.

 What!???  I'm assume you are writing about executing a new program and
not forking a new process here.  In the latter case no memory is changed. 
When you exec a new program, any allocated memory is cleared by the kernel
before returning to the user space.  It would be a huge security hole
otherwise.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Jan  8 06:52:57 2001
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To:     linux-mips@oss.sgi.com
Subject: Current CVS kernel no-go on R4k Decstation 
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Hi,
i am seeing this on my R4k Decstation (5000/150) 

This was the first try 

[...]
Freeing unused PROM memory: 124k freed
Freeing unused kernel memory: 60k freed
[init:1] Illegal instruction 0320f809 at 0fb651c4 ra=0fb651cc
[init:1] Illegal instruction 8f998018 at 0fb651c8 ra=0fb651cc

Second try doesnt give me any output at all after
the "Freeing unused kernel ..."

CVS Checkout @ 20010108 ~15:00 MESZ

This DECstation is a DS5000/1xx
Loading R4000 MMU routines.
CPU revision is: 00000430
Primary instruction cache 8kb, linesize 16 bytes.
Primary data cache 8kb, linesize 16 bytes.
Secondary cache sized at 1024K linesize 32 bytes.
Linux version 2.4.0-test11 (flo@paradigm) (gcc version egcs-2.91.66 19990314 (egcs-1.1.2 release)) #1 Mon Jan 8 15:35:19 CET 2001
Determined physical RAM map:
 memory: 04000000 @ 00000000 (usable)
On node 0 totalpages: 16384
zone(0): 16384 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: console=ttyS2 root=/dev/sda2
Calibrating delay loop... 49.81 BogoMIPS
Memory: 62600k/65536k available (1269k kernel code, 2936k reserved, 69k data, 60k init)
[...]

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Mon Jan  8 07:09:48 2001
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Subject: Re: User applications
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On Mon, 8 Jan 2001, Kevin D. Kissell wrote:

> Back in the Ancient Old Days of System V, every architecture
> had an architecture-specific system call entry, the first parameter
> of which expressed what needed to be done.  Do we have
> such a thing in Linux?   That would be the logical place to
> things like cache flush and the atomic operations that were
> being discussed here a couple of weeks ago.

 The only case caches need to be synchronized is modifying some code.  The
ptrace syscall does it automatically for text writes -- it's needed and
used by gdb to set breakpoints, for example.  For other code there is
cacheflush() which allows you to flush a cache range relevant to a given
virtual address (I see it's not implemented very well at the moment).

 Obviously, you don't want to allow unprivileged users to flush caches as
a whole as it could lead to a DoS. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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----- Original Message -----
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: "Kevin D. Kissell" <kevink@mips.com>
Cc: <linux-mips@oss.sgi.com>; "Carsten Langgaard" <carstenl@mips.com>;
"Michael Shmulevich" <michaels@jungo.com>
Sent: Monday, January 08, 2001 4:07 PM
Subject: Re: User applications


> On Mon, 8 Jan 2001, Kevin D. Kissell wrote:
>
> > Back in the Ancient Old Days of System V, every architecture
> > had an architecture-specific system call entry, the first parameter
> > of which expressed what needed to be done.  Do we have
> > such a thing in Linux?   That would be the logical place to
> > things like cache flush and the atomic operations that were
> > being discussed here a couple of weeks ago.
>
>  The only case caches need to be synchronized is modifying some code.

Which just happens to be the case under discussion here.

>The  ptrace syscall does it automatically for text writes -- it's needed
and
> used by gdb to set breakpoints, for example.  For other code there is
> cacheflush() which allows you to flush a cache range relevant to a given
> virtual address (I see it's not implemented very well at the moment).
>
>  Obviously, you don't want to allow unprivileged users to flush caches as
> a whole as it could lead to a DoS.

By that logic, we should not allow users to allocate more virtual
memory than there is physical memory in the system!  A pathological
swap program is arguably far a far worse denial of service attack
than flushing the caches - so long as by "flush" we mean invalidate
with writeback (on copyback caches), of course.


From owner-linux-mips@oss.sgi.com Mon Jan  8 08:02:18 2001
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On Mon, 8 Jan 2001, Kevin D. Kissell wrote:

> >  Obviously, you don't want to allow unprivileged users to flush caches as
> > a whole as it could lead to a DoS.
> 
> By that logic, we should not allow users to allocate more virtual
> memory than there is physical memory in the system!  A pathological
> swap program is arguably far a far worse denial of service attack

 There are limits -- see `info setrlimit'.  There is no way to prevent a
program from executing:

while (1) flush_cache_all();

though but the system's performance would suffer much.  Remember there is
real world out there... 

 Which means sysmips(FLUSH_CACHE, ...) needs to be fixed or removed. 

> than flushing the caches - so long as by "flush" we mean invalidate
> with writeback (on copyback caches), of course.

 What's wrong with cacheflush(addr, count, which) that actually checks if
<addr; addr+count> lies within the caller's address space before
performing the flush and returns -EPERM otherwise?  It would make the
caller crawl like a turtle if it wished to but it would leave other
processes alone. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Jan  8 08:13:38 2001
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On Mon, Jan 08, 2001 at 03:16:16PM +0100, Carsten Langgaard wrote:

> I think I just found it.
> The system call is sysmips(FLUSH_CACHE).

Don't.  Sysmips(FLUSH_CACHE, ...) only allows very coarse flush operation,
that is flushing all caches.  The whole sysmips(2) call exists in Linux
only as a stone age compatibility thing.

  Ralf

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On Mon, Jan 08, 2001 at 04:07:31PM +0100, Maciej W. Rozycki wrote:

>  The only case caches need to be synchronized is modifying some code.  The
> ptrace syscall does it automatically for text writes -- it's needed and
> used by gdb to set breakpoints, for example.  For other code there is
> cacheflush() which allows you to flush a cache range relevant to a given
> virtual address (I see it's not implemented very well at the moment).
> 
>  Obviously, you don't want to allow unprivileged users to flush caches as
> a whole as it could lead to a DoS. 

You obviously want to allow partial cache flushes or trampolines don't work
and flushing the entire cache can be constructed from that.

  Ralf

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Subject: Re: User applications
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Ralf Baechle wrote:

> On Mon, Jan 08, 2001 at 04:07:31PM +0100, Maciej W. Rozycki wrote:
>
> >  The only case caches need to be synchronized is modifying some code.  The
> > ptrace syscall does it automatically for text writes -- it's needed and
> > used by gdb to set breakpoints, for example.  For other code there is
> > cacheflush() which allows you to flush a cache range relevant to a given
> > virtual address (I see it's not implemented very well at the moment).
> >
> >  Obviously, you don't want to allow unprivileged users to flush caches as
> > a whole as it could lead to a DoS.
>
> You obviously want to allow partial cache flushes or trampolines don't work
> and flushing the entire cache can be constructed from that.
>

What we need is a mechanism to partial invalidate the I-cache and a mechanism
to write-back and/or invalidate the D-cache.

/Carsten

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Mon Jan  8 08:35:47 2001
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From:	Ralf Baechle <ralf@oss.sgi.com>
To:	Carsten Langgaard <carstenl@mips.com>
Cc:	linux-mips@oss.sgi.com
Subject: Re: User applications
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On Mon, Jan 08, 2001 at 10:40:12AM +0100, Carsten Langgaard wrote:

> When a new user process is started will its user space be cleared by the
> kernel or is there a potential leak from an older user process ?

A new process is started by the clone(2) or fork(2) syscalls.  Module the
options that can be passed to clone(2) the two only create an identical copy
of the invoking process, so they're designed to leak information by design ;-)

execve(2) replaces the existing mappings with a new process image loaded
from files plus a newly created stack area.  No old mappings survive, so
there in memory there is no information leak.

> What about the registers values, are they cleared for each new user
> application or will it simply contain the current value it got when the
> user application is started ?

We make no attempt at the integer registers for a new process, so some
information might be leaked in registers.  All the callee saved registers
will be passed unchanged to the child process; the caller saved registers
except those that are used as syscall return values will return random
garbage.  Floating point registers will be cleared with SNANs as soon
as the process is attempting to use a FPU for the first time, that is
we won't leak information via fpu registers.

(Ooops, we're not Orange Book B1 compliant, how sad ;-)

> How can you flush the data and instruction cashes from a user application ?

cacheflush(2).  See man page.

  Ralf

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On Mon, Jan 08, 2001 at 04:40:06PM +0100, Maciej W. Rozycki wrote:

> > than flushing the caches - so long as by "flush" we mean invalidate
> > with writeback (on copyback caches), of course.
> 
>  What's wrong with cacheflush(addr, count, which) that actually checks if
> <addr; addr+count> lies within the caller's address space before
> performing the flush and returns -EPERM otherwise?  It would make the
> caller crawl like a turtle if it wished to but it would leave other
> processes alone. 

cacheflush(2) actually is supposed to handle things that way.

  Ralf

From owner-linux-mips@oss.sgi.com Mon Jan  8 08:40:37 2001
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Cc:	Ralf Baechle <ralf@oss.sgi.com>,
        "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>,
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        Michael Shmulevich <michaels@jungo.com>
Subject: Re: User applications
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On Mon, Jan 08, 2001 at 05:23:20PM +0100, Carsten Langgaard wrote:

> What we need is a mechanism to partial invalidate the I-cache and a mechanism
> to write-back and/or invalidate the D-cache.

There is this nice little man page which should even be installed on your
Linux/Inhell box:


CACHEFLUSH(2)       Linux Programmer's Manual       CACHEFLUSH(2)


NAME
       cacheflush  -  flush  contents  of instruction and/or data
       cache

SYNOPSIS
       #include <asm/cachectl.h>

       int cacheflush(char *addr, int nbytes, int cache);

DESCRIPTION
       cacheflush flushes contents of indicated cache(s) for user
       addresses  in the range addr to (addr+nbytes-1). Cache may
       be one of:

       ICACHE Flush the instruction cache.

       DCACHE Write back to memory and  invalidate  the  affected
              valid cache lines.

       BCACHE Same as (ICACHE|DCACHE).


RETURN VALUE
       cacheflush  returns 0 on success or -1 on error. If errors
       are detected, errno will indicate the error.

ERRORS
       EINVAL cache parameter is not one of  ICACHE,  DCACHE,  or
              BCACHE.

       EFAULT Some   or   all   of  the  address  range  addr  to
              (addr+nbytes-1) is not accessible.


BUGS
       The current implementation ignores  the  addr  and  nbytes
       parameters.   Therefore always the whole cache is flushed.

NOTE
       This system call is only available on MIPS based  systems.
       It should not be used in programs intended to be portable.
















Linux 2.0.32                27 June 95                          1



From owner-linux-mips@oss.sgi.com Mon Jan  8 08:44:38 2001
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To:     Ralf Baechle <ralf@oss.sgi.com>
cc:     "Kevin D. Kissell" <kevink@mips.com>, linux-mips@oss.sgi.com,
        Carsten Langgaard <carstenl@mips.com>,
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Subject: Re: User applications
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On Mon, 8 Jan 2001, Ralf Baechle wrote:

> You obviously want to allow partial cache flushes or trampolines don't work
> and flushing the entire cache can be constructed from that.

 It depends on the implementation.  The current one obviously allows it. 
;-) 

 I'm writing of the design. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Jan  8 08:45:57 2001
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To:     Ralf Baechle <ralf@oss.sgi.com>
cc:     "Kevin D. Kissell" <kevink@mips.com>, linux-mips@oss.sgi.com,
        Carsten Langgaard <carstenl@mips.com>,
        Michael Shmulevich <michaels@jungo.com>
Subject: Re: User applications
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On Mon, 8 Jan 2001, Ralf Baechle wrote:

> >  What's wrong with cacheflush(addr, count, which) that actually checks if
> > <addr; addr+count> lies within the caller's address space before
> > performing the flush and returns -EPERM otherwise?  It would make the
> > caller crawl like a turtle if it wished to but it would leave other
> > processes alone. 
> 
> cacheflush(2) actually is supposed to handle things that way.

 Didn't I write it clearly-enough? ;-) 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Jan  8 08:51:37 2001
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On Mon, Jan 08, 2001 at 05:43:24PM +0100, Maciej W. Rozycki wrote:

> > >  What's wrong with cacheflush(addr, count, which) that actually checks if
> > > <addr; addr+count> lies within the caller's address space before
> > > performing the flush and returns -EPERM otherwise?  It would make the
> > > caller crawl like a turtle if it wished to but it would leave other
> > > processes alone. 
> > 
> > cacheflush(2) actually is supposed to handle things that way.
> 
>  Didn't I write it clearly-enough? ;-) 

return -EOVERBLOODINCAFFEIN;

  Ralf

From owner-linux-mips@oss.sgi.com Mon Jan  8 08:51:57 2001
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Subject: Re: User applications
References: <00d801c0797d$5cc410c0$0deca8c0@Ulysses> <Pine.GSO.3.96.1010108151854.23234G-100000@delta.ds2.pg.gda.pl> <20010108140506.B886@bacchus.dhis.org> <3A59E978.873182CB@mips.com> <20010108143014.E886@bacchus.dhis.org>
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Exactly that I need, but I don't think it is implemented properly for mips.
It simply flushes all the caches, no matter what options you gives it.

/Carsten

Ralf Baechle wrote:

> On Mon, Jan 08, 2001 at 05:23:20PM +0100, Carsten Langgaard wrote:
>
> > What we need is a mechanism to partial invalidate the I-cache and a mechanism
> > to write-back and/or invalidate the D-cache.
>
> There is this nice little man page which should even be installed on your
> Linux/Inhell box:
>
> CACHEFLUSH(2)       Linux Programmer's Manual       CACHEFLUSH(2)
>
> NAME
>        cacheflush  -  flush  contents  of instruction and/or data
>        cache
>
> SYNOPSIS
>        #include <asm/cachectl.h>
>
>        int cacheflush(char *addr, int nbytes, int cache);
>
> DESCRIPTION
>        cacheflush flushes contents of indicated cache(s) for user
>        addresses  in the range addr to (addr+nbytes-1). Cache may
>        be one of:
>
>        ICACHE Flush the instruction cache.
>
>        DCACHE Write back to memory and  invalidate  the  affected
>               valid cache lines.
>
>        BCACHE Same as (ICACHE|DCACHE).
>
> RETURN VALUE
>        cacheflush  returns 0 on success or -1 on error. If errors
>        are detected, errno will indicate the error.
>
> ERRORS
>        EINVAL cache parameter is not one of  ICACHE,  DCACHE,  or
>               BCACHE.
>
>        EFAULT Some   or   all   of  the  address  range  addr  to
>               (addr+nbytes-1) is not accessible.
>
> BUGS
>        The current implementation ignores  the  addr  and  nbytes
>        parameters.   Therefore always the whole cache is flushed.
>
> NOTE
>        This system call is only available on MIPS based  systems.
>        It should not be used in programs intended to be portable.
>
> Linux 2.0.32                27 June 95                          1

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Mon Jan  8 09:45:57 2001
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Date:   Mon, 8 Jan 2001 17:40:23 +0100 (MET)
From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Carsten Langgaard <carstenl@mips.com>
cc:     Ralf Baechle <ralf@oss.sgi.com>,
        "Kevin D. Kissell" <kevink@mips.com>, linux-mips@oss.sgi.com,
        Michael Shmulevich <michaels@jungo.com>
Subject: Re: User applications
In-Reply-To: <3A59E978.873182CB@mips.com>
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On Mon, 8 Jan 2001, Carsten Langgaard wrote:

> What we need is a mechanism to partial invalidate the I-cache and a mechanism
> to write-back and/or invalidate the D-cache.

 What's wrong with the already mentioned cachectl?

$ mipsel-linux-objdump -T /usr/mipsel-linux/lib/libc-2.2.so | grep cachectl
00000000600ca0a0  w   DF *ABS*  0000000000000000  GLIBC_2.0   cachectl
$ ls /usr/mipsel-linux/include/sys/cachectl.h
/usr/mipsel-linux/include/sys/cachectl.h

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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On Mon, Jan 08, 2001 at 05:40:23PM +0100, Maciej W. Rozycki wrote:

> > What we need is a mechanism to partial invalidate the I-cache and a mechanism
> > to write-back and/or invalidate the D-cache.
> 
>  What's wrong with the already mentioned cachectl?
> 
> $ mipsel-linux-objdump -T /usr/mipsel-linux/lib/libc-2.2.so | grep cachectl
> 00000000600ca0a0  w   DF *ABS*  0000000000000000  GLIBC_2.0   cachectl
> $ ls /usr/mipsel-linux/include/sys/cachectl.h
> /usr/mipsel-linux/include/sys/cachectl.h

cachectl(2) is a syscall that is manipulates the cachability of a memory
area.  And not yet implemented ...

  Ralf

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cc:     Carsten Langgaard <carstenl@mips.com>,
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Subject: Re: User applications
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On Mon, 8 Jan 2001, Ralf Baechle wrote:

> > $ mipsel-linux-objdump -T /usr/mipsel-linux/lib/libc-2.2.so | grep cachectl
> > 00000000600ca0a0  w   DF *ABS*  0000000000000000  GLIBC_2.0   cachectl
> > $ ls /usr/mipsel-linux/include/sys/cachectl.h
> > /usr/mipsel-linux/include/sys/cachectl.h
> 
> cachectl(2) is a syscall that is manipulates the cachability of a memory
> area.  And not yet implemented ...

 s/cachectl$/cacheflush/, of course (but the header is still valid).

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Jan  8 10:05:48 2001
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On Mon, 8 Jan 2001, Carsten Langgaard wrote:

> Exactly that I need, but I don't think it is implemented properly for mips.
> It simply flushes all the caches, no matter what options you gives it.

 Yep, it's just a limitation of the implementation.  But it's the right
function and now that I know of the problem it goes to my to do list (but
processing of the list is not that fast these days, so anyone feel free to
do it oneself). 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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From:   Karsten Merker <karsten@excalibur.cologne.de>
To:     linux-mips@oss.sgi.com
Subject: Re: Current CVS kernel no-go on R4k Decstation
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On Mon, Jan 08, 2001 at 03:53:02PM +0100, Florian Lohoff wrote:

> Hi,
> i am seeing this on my R4k Decstation (5000/150) 
> 
> This was the first try 
> 
> [...]
> Freeing unused PROM memory: 124k freed
> Freeing unused kernel memory: 60k freed
> [init:1] Illegal instruction 0320f809 at 0fb651c4 ra=0fb651cc
> [init:1] Illegal instruction 8f998018 at 0fb651c8 ra=0fb651cc
> 
> Second try doesnt give me any output at all after
> the "Freeing unused kernel ..."
> 
> CVS Checkout @ 20010108 ~15:00 MESZ
                                 ^^^^
Is it still summer in Westfalen :-) ?

Similar effect for me (DS5000/150, Checkout @ Sat Jan 6 ~22:30 CET),
except that I do not get the "illigal instruction" lines. Harald has the
same problem on his /260. It looks like sometime in December 2000
something has gone broken in the R4K-support, or are we perhaps
triggering a compiler bug in egcs 1.1.2?

Greetings,
Karsten
-- 
#include <standard_disclaimer>
Nach Paragraph 28 Abs. 3 Bundesdatenschutzgesetz widerspreche ich der Nutzung
oder Uebermittlung meiner Daten fuer Werbezwecke oder fuer die Markt- oder
Meinungsforschung.

From owner-linux-mips@oss.sgi.com Mon Jan  8 12:00:59 2001
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On 08-Jan-01 Karsten Merker wrote:
> On Mon, Jan 08, 2001 at 03:53:02PM +0100, Florian Lohoff wrote:
> 
>> Hi,
>> i am seeing this on my R4k Decstation (5000/150) 
>> 
>> This was the first try 
>> 
>> [...]
>> Freeing unused PROM memory: 124k freed
>> Freeing unused kernel memory: 60k freed
>> [init:1] Illegal instruction 0320f809 at 0fb651c4 ra=0fb651cc
>> [init:1] Illegal instruction 8f998018 at 0fb651c8 ra=0fb651cc
>> 
>> Second try doesnt give me any output at all after
>> the "Freeing unused kernel ..."
>> 
>> CVS Checkout @ 20010108 ~15:00 MESZ
>                                  ^^^^
> Is it still summer in Westfalen :-) ?
> 
> Similar effect for me (DS5000/150, Checkout @ Sat Jan 6 ~22:30 CET),
> except that I do not get the "illigal instruction" lines. Harald has the
> same problem on his /260. It looks like sometime in December 2000
> something has gone broken in the R4K-support, or are we perhaps
> triggering a compiler bug in egcs 1.1.2?

I don't think so. This hang appeared in the middle of December and may or may
not be related to the MIPS32 patches which were commited then. Unfortunately I
haven't had the time to track this down.

Anyway, is anybody else with a R4X00 machines seeing this?

-- 
Regards,
Harald

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On Tue, Oct 30, 1979 at 04:28:38AM +0100, Harald Koerfgen wrote:

> > Similar effect for me (DS5000/150, Checkout @ Sat Jan 6 ~22:30 CET),
> > except that I do not get the "illigal instruction" lines. Harald has the
> > same problem on his /260. It looks like sometime in December 2000
> > something has gone broken in the R4K-support, or are we perhaps
> > triggering a compiler bug in egcs 1.1.2?
> 
> I don't think so. This hang appeared in the middle of December and may or may
> not be related to the MIPS32 patches which were commited then. Unfortunately I
> haven't had the time to track this down.
> 
> Anyway, is anybody else with a R4X00 machines seeing this?

I can tell you that this patch provoked other alergic reactions, for example
with the R7000.

  Ralf

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Subject: Re: Current CVS kernel no-go on R4k Decstation
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> > Similar effect for me (DS5000/150, Checkout @ Sat Jan 6 ~22:30 CET),
> > except that I do not get the "illigal instruction" lines. Harald has the
> > same problem on his /260. It looks like sometime in December 2000
> > something has gone broken in the R4K-support, or are we perhaps
> > triggering a compiler bug in egcs 1.1.2?
>
> I don't think so. This hang appeared in the middle of December and may or
may
> not be related to the MIPS32 patches which were commited then.
Unfortunately I
> haven't had the time to track this down.

If you're referring to the MIPS32 patches that came from the MIPS 2.2 tree,
we generally test those on an R4600 Indy and a couple R5xxx platforms as
a matter of routine.  This is not to say that there might not be some change
to the R4x00 support between 2.2 and 2.4 that interacts pathologically with
the MIPS32 code...

           Kevin K.


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From:   Florian Lohoff <flo@rfc822.org>
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Subject: MIPS32 patches breaking DecStation
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Hi,
i found this snippet from arch/mips/kernel/head.S breaking DecStations:

@@ -68,9 +76,9 @@
        mtc0    k0, CP0_ENTRYLO0                # load it
        srl     k1, k1, 6                       # convert to entrylo1
        mtc0    k1, CP0_ENTRYLO1                # load it
-       b       1f
-        tlbwr                                  # write random tlb entry
-1:     
+       nop                                     # Need 2 cycles between mtc0
+       nop                                     #  and tlbwr (CP0 hazard).
+       tlbwr                                   # write random tlb entry
        nop
        eret                                    # return from trap
        END(except_vec0_r4000)


>From the Documentation and how i understand it this is perfectly
valid as the mtc0 instruction causes a cp0 hazard within the next 2 instruction
thought the delay of 2 cycles would be ok.

This is probably related to the Decstations having REALLY old R4000 silicion
revisions - Probably one should look through the erratas for these

flo@repeat:~$ cat /proc/cpuinfo 
cpu			: MIPS
cpu model		: R4000SC V3.0
system type		: Digital DECstation 5000/1xx

OK - I just had a look at the errata - This IS a workaround to a 
Mips R4000SC 2.0, 3.0 errata - I restored the original code back.

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Mon Jan  8 16:31:49 2001
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Florian,

Could you do me a huge favor and try a build that
uses 3 or 4 nops instead of the branch to the instruction
after the delay slot?   There was a reason that I eliminated
the branch construct from the MIPS internal Linux source
base - it's a hack that works perfectly on R4000's, but
it's pretty much a coincidence that it does so.  Yes,
the code fragment in question is R4K-specific, but
we really need to migrate towards the use of consistent
mechanisms that work across the full range of MIPS
CPUs.  Ideally, *all* CP0 hazards should some day be 
padded out with "ssnops" (sll $0,$0,1, if I recall), which 
force a 1 cycle delay per instruction even on superscalar 
MIPS CPUs.

            Kevin K.


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Hi,

I'm trying to install Linux on an Origin 200 and I'm having problems with
booting the kernel (CVS tree linux from oss.sgi.com).  I've included below
a console session of my tries to boot the kernel.  In two cases below I
used the default kernel configuration but without the SCSI driver.  In the
first case I used parameters root=/dev/nfs and nfsroot=.... It reached
'Calibrating delay loop' and then 'Got dbe at 0xffffffff8013e970'.  After
that, I guess, some kind of register dump followed (I'm working with MIPS
architecture for the first time).  In the second case it reached "TCP:
Hash tables configured". Besides these two tries, I've tried using
different kernel configuration options in the machine selection category
and besides the obvious ones (IP27, IP27 N-Mode and Multi-Processing), I'm
clueless about the meaning of other options.

I would really appreciate some guidance on making the kernel boot...
Thanks in advance and sorry for such a long email.


**** The recorded console session from minicom ****

IP27 PROM SGI Version 5.28  built 11:17:13 AM Sep 24, 1998
Master testing hub interrupts
Testing/Initializing memory
CPU A testing secondary cache (1 MB)
Discovering local IO ...
Using console at /hw/module/1/MotherBoard
Running serial_dma diag (Bridge base = 0x9200000008000000  PCI dev = 2)
Local IO discover DONE.
Running Hub Chip BTE test.
BTE0 completed.
BTE1 completed.
Checking Local Link Connection.
Discovering CrayLink connectivity
Local hub CrayLink is down.
*** Local network link down
Discovered 1 objects (1 hubs, 0 routers)
Waiting for peers to complete discovery.
No other nodes present; becoming global master
Global master is /hw/module/1/slot/MotherBoard
Loading BASEIO prom
Uncompressing segment BASEIO prom
Jumping to entry point 0xa800000001c00140

Numbering nodes...
1 CPUs on 1 nodes found.
Clocks synchronized.
Modules numbered.
Updating module serial numbers.
BASEIO PROM Monitor SGI Version 5.28  built 11:16:22 AM Sep 24, 1998 (BE64)
Sizing caches...
Initializing environment
Initializing software and devices.
Installing Devices...
Running enet_all diag (Bridge base = 0x9200000008000000  PCI dev = 2  Mode = 0)
Running scsi_ram diag (Bridge base = 0x9200000008000000  PCI dev = 0)
Running scsi_dma diag (Bridge base = 0x9200000008000000  PCI dev = 0)
Running scsi_controller diag (Bridge base = 0x9200000008000000  PCI dev = 0)

Walking SCSI Adapter 0 (/hw/module/1/slot/MotherBoard), (pci id 0)
1+ 2- 3- 4- 5- 6- 7- 8- 9- 10- 11- 12- 13- 14- 15- = 1 device(s)
Running scsi_ram diag (Bridge base = 0x9200000008000000  PCI dev = 1)
Running scsi_dma diag (Bridge base = 0x9200000008000000  PCI dev = 1)
Running scsi_controller diag (Bridge base = 0x9200000008000000  PCI dev = 1)

Walking SCSI Adapter 1 (/hw/module/1/slot/MotherBoard), (pci id 1)
1- 2- 3- 4- 5+ 6+ 7- = 2 device(s)
Initializing devices...
Checking hardware inventory...

**** System Configuration and Diagnostics Summary ****
CONFIG:
         No. of NODEs enabled    = 1
         No. of NODEs disabled   = 0
         No. of CPUs enabled     = 1
         No. of CPUs disabled    = 0
         Mem enabled             = 64 MB
         Mem disabled            = 0 MB
         No. of RTRs enabled     = 0
         No. of RTRs disabled    = 0

DIAG RESULTS:
         ALL DIAGS PASSED!
**** End System Configuration and Diagnostics Summary ****


System Maintenance Menu

1) Start System
2) Install System Software
3) Run Diagnostics
4) Recover System
5) Enter Command Monitor

Option? 5
Command Monitor.  Type "exit" to return to the menu.
>> hinv -v
IP27 Node Board, Module 1, Slot MotherBoard
    ASIC HUB Rev 3, 90 MHz, (nasid 0)
    Processor A: 180 MHz R10000, Rev 2.6, 1M secondary cache, (cpu 0)
      R10000FPC  Rev 0
    Memory on board, 64 MBytes (Standard)
      Bank 0, 64 MBytes <-- (Physical Bank 0)
BASEIO IO Board, Module 1, Slot MotherBoard
    ASIC BRIDGE Rev 4, (widget 8)
    adapter PCI-SCSI Rev 5, (pci id 0)
        peripheral SCSI DISK, ID 1, SGI IBM  DCHS04Y
    adapter PCI-SCSI Rev 5, (pci id 1)
        peripheral SCSI TAPE, ID 5, ARCHIVE Python 02779-XXX
        peripheral SCSI CDROM, ID 6, TOSHIBA CD-ROM XM-5701TA
    adapter IOC3 Rev 1, (pci id 2)
        controller multi function SuperIO
        controller Ethernet Rev 1
>> hinv -mvvv
location: /hw/module/1/slot/MotherBoard
Part:013-1895-001;Name:PIMM_1XT5_1MB;Serial:GCK618;Revision:F;Group:ff;Capability:ffffffff;Variety:ff;Laser:000000178518;

location: /hw/module/1/slot/MotherBoard
Part:030-1244-001;Name:IP29;Serial:GCH576;Revision:H;Group:ff;Capability:ffffffff;Variety:ff;Laser:00000017a582;

>> version
BASEIO PROM Monitor SGI Version 5.28  built 11:16:22 AM Sep 24, 1998 (BE64)
>> printenv
AutoLoad=No
dbgtty=/dev/tty/ioc30
root=dks0d1s0
nonstop=0
rbaud=19200
SystemPartition=dksc(0,1,8)
OSLoadPartition=dksc(0,1,0)
OSLoader=sash
OSLoadFilename=unix
TimeZone=PST8PDT
console=d
oldConsolePath=/hw/module/1/slot/MotherBoard
gConsoleIn=default
gConsoleOut=default
diskless=0
scsihostid=0
ProbeAllScsi=n
dbaud=9600
volume=80
sgilogo=y
netaddr=192.168.21.231
ConsoleOut=/dev/tty/ioc30
ConsoleIn=/dev/tty/ioc30
cpufreq=180
ConsolePath=/hw/module/1/slot/MotherBoard
>> opts
SGI Version 5.28  built 11:16:22 AM Sep 24, 1998
Libkl was built as follows: -xansi -fullwarn    -D_STANDALONE -DMP -DDISCONTIG_PHYSMEM -DNUMA_BASE -DNUMA_PM  -DNUMA_TBORROW -DNUMA_MIGR_CONTROL  -DNUMA_REPLICATION -DNUMA_REPL_CONTROL -DNUMA_SCHED  -DLARGE_CPU_COUNT -DHUB2_NACK_WAR  -DBRIDGE_ERROR_INTR_WAR -DMAPPED_KERNEL -DBHV_SYNCH  -DHUB_ERR_STS_WAR -DHUB_MIGR_WAR -DNCR16C550 -DTL16PIR552  -DSN0_INTR_BROKEN -DFRU  -DSN0_USE_BTE -DBTE_BZERO_WAR -DREV1_BRIDGE_SUPPORTED  -DHUB_II_IFDR_WAR -DRTINT_WAR -DPCOUNT_WAR -DBRIDGE_B_DATACORR_WAR -D_KERNEL -DR10000   -D_PAGESZ=16384 -DIP27 -DPROM -U__INLINE_INTRINSICS -DSN0 -I../../../include -I../../../IP27prom -non_shared -elf -64 -G 0 -mips4 -OPT:space=ON -OPT:quad_align_branch_targets=FALSE -OPT:quad_align_with_memops=FALSE -TENV:misalignment=1 -OPT:unroll_times_max=0 -OPT:unroll_size=0 -TENV:kernel  -IPA:inline=off:cprop=off:cgi=off:autognum=off -ipa -Wl,-tt1:1    -nostdinc -I/u1/people/ayoung/6.4-patch3292/root/usr/include  -O2  -MDupdate Makedepend.SN0 -woff 1685,515,608,658,799,803,852,1048,1233,1499,1068,1185,1209,1505,1506,1692,1174

Libsk was built as follows: -xansi -fullwarn    -D_STANDALONE -DMP -DDISCONTIG_PHYSMEM -DNUMA_BASE -DNUMA_PM  -DNUMA_TBORROW -DNUMA_MIGR_CONTROL  -DNUMA_REPLICATION -DNUMA_REPL_CONTROL -DNUMA_SCHED  -DLARGE_CPU_COUNT -DHUB2_NACK_WAR  -DBRIDGE_ERROR_INTR_WAR -DMAPPED_KERNEL -DBHV_SYNCH  -DHUB_ERR_STS_WAR -DHUB_MIGR_WAR -DNCR16C550 -DTL16PIR552  -DSN0_INTR_BROKEN -DFRU  -DSN0_USE_BTE -DBTE_BZERO_WAR -DREV1_BRIDGE_SUPPORTED  -DHUB_II_IFDR_WAR -DRTINT_WAR -DPCOUNT_WAR -DBRIDGE_B_DATACORR_WAR -D_KERNEL -DR10000   -D_PAGESZ=16384 -DIP27 -DSN0 -I../../../include  -non_shared -elf -64 -G 0 -mips4 -OPT:space=ON -OPT:quad_align_branch_targets=FALSE -OPT:quad_align_with_memops=FALSE -TENV:misalignment=1 -OPT:unroll_times_max=0 -OPT:unroll_size=0 -TENV:kernel  -IPA:inline=off:cprop=off:cgi=off:autognum=off -ipa -Wl,-tt1:1    -nostdinc -I/u1/people/ayoung/6.4-patch3292/root/usr/include  -O2  -MDupdate Makedepend.SN0 -woff 1685,515,608,658,799,803,852,1048,1233,1499,1068,1185,1209,1505,1506,1692,1174

The IO6prom was built as follows: -xansi -fullwarn    -D_STANDALONE -DMP -DDISCONTIG_PHYSMEM -DNUMA_BASE -DNUMA_PM  -DNUMA_TBORROW -DNUMA_MIGR_CONTROL  -DNUMA_REPLICATION -DNUMA_REPL_CONTROL -DNUMA_SCHED  -DLARGE_CPU_COUNT -DHUB2_NACK_WAR  -DBRIDGE_ERROR_INTR_WAR -DMAPPED_KERNEL -DBHV_SYNCH  -DHUB_ERR_STS_WAR -DHUB_MIGR_WAR -DNCR16C550 -DTL16PIR552  -DSN0_INTR_BROKEN -DFRU  -DSN0_USE_BTE -DBTE_BZERO_WAR -DREV1_BRIDGE_SUPPORTED  -DHUB_II_IFDR_WAR -DRTINT_WAR -DPCOUNT_WAR -DBRIDGE_B_DATACORR_WAR -D_KERNEL -DR10000   -D_PAGESZ=16384 -DIP27  -DPROM -DNO_tpsc -DSN0 -I../include -I../IP27prom -non_shared -elf -64 -G 0 -mips4 -OPT:space=ON -OPT:quad_align_branch_targets=FALSE -OPT:quad_align_with_memops=FALSE -TENV:misalignment=1 -OPT:unroll_times_max=0 -OPT:unroll_size=0 -TENV:kernel  -IPA:inline=off:cprop=off:cgi=off:autognum=off -ipa -Wl,-tt1:1    -nostdinc -I/u1/people/ayoung/6.4-patch3292/root/usr/include  -O2  -MDupdate Makedepend.SN0 -woff 1685,515,608,658,799,803,852,1048,1233,1499,1068,1185,1209,1505,1506,1692,1174


>> bootp():vmlinux root=/dev/nfs nfsroot=/ 192.168.21.220:/MIPS
Obtaining vmlinux from server itlab4
         1160272   |/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-+374720   |/-\|/-\|/-\|/-\|/-\|/-\+228460 entry: 0xa80000000013c000
ARCH: SGI-IP27
PROMLIB: ARC firmware Version 64 Revision 0
Discovered 1 cpus on 1 nodes
Total memory probed : 0x4000 pages
Linux version 2.4.0-test11 (pmalic@itlab4) (gcc version egcs-2.91.66 19990314 (egcs-1.1.2 release)) #1 Thu Dec 28 13:36:59 CET 2000
Loading R10000 MMU routines.
CPU revision is: 00000926
Primary instruction cache 32kb, linesize 64 bytes
Primary data cache 32kb, linesize 32 bytes
Secondary cache sized at 1024K, linesize 128
IP27: Running on node 0.
Node 0 has a primary CPU, CPU is running.
Node 0 has no secondary CPU.
Machine is in M mode.
Cpu 0, Nasid 0x0, pcibr_setup(): found partnum= 0xc002...is bridge
CPU 0 clock is 65535MHz.
On node 0 totalpages: 16384
zone(0): 16384 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/nfs nfsroot=192.168.21.220:/MIPS
Entering 64-bit mode.
Calibrating delay loop... 179.81 BogoMIPS
Got dbe at 0xffffffff8013e970
Cpu 0
$0      : 0000000000000000 ffffffff94201ce0 a8000000001cf680 0000000000000000
$4      : 00000000000000d0 0000000000000039 0000000000000000 a8000000001cf000
$8      : 0000000000004000 0000000000000000 ffffffff80196039 ffffffff801c8828
$12     : 0000000000000010 0000000000000000 000000000000000a ffffffff8012f330
$16     : a8000000011bbe58 0000000000003439 0000000000003048 ffffffff801ca4a8
$20     : 0000000000004000 0000000000000001 0000000000000001 0000000000000000
$24     : 0000000000000000 0000000000000030
$28     : ffffffff80138000 ffffffff8013bdc0 a80000000013c000 ffffffff8013e9ac
Hi      : 0000000000000000
Lo      : 0000000000003438
epc     : ffffffff8013e970
badvaddr: ffffffff801c8828
badvaddr: ffffffff801c8828
Status  : 94201ce3
Cause   : 0000901c
Cause   : 0000901c
Index:  0 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  1 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  2 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  3 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  4 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  5 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  6 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  7 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  8 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  9 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 10 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 11 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 12 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 13 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 14 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 15 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 16 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 17 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 18 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 19 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 20 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 21 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 22 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 23 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 24 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 25 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 26 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 27 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 28 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 29 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 30 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 31 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 32 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 33 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 34 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 35 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 36 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 37 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 38 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 39 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 40 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 41 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 42 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 43 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 44 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 45 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 46 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 47 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 48 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 49 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 50 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 51 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 52 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 53 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 54 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 55 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 56 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 57 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 58 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 59 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 60 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 61 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 62 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 63 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0 v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]

[ Here the machine hangs and I restart it. For brevity, I've removed the lines that are written to the screen while booting. ]
[ Now I'm tring to boot another kernel: ]


>> bootp():vmlinux
Obtaining vmlinux from server itlab4
         1160272   |/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-+374704   |/-\|/-\|/-\|/-\|/-\|/-\+228460 entry: 0xa80000000013c000
ARCH: SGI-IP27
PROMLIB: ARC firmware Version 64 Revision 0
Discovered 1 cpus on 1 nodes
Total memory probed : 0x4000 pages
Linux version 2.4.0-test11 (pmalic@itlab4) (gcc version egcs-2.91.66 19990314 (egcs-1.1.2 release)) #2 Thu Dec 28 13:46:29 CET 2000
Loading R10000 MMU routines.
CPU revision is: 00000926
Primary instruction cache 32kb, linesize 64 bytes
Primary data cache 32kb, linesize 32 bytes
Secondary cache sized at 1024K, linesize 128
IP27: Running on node 0.
Node 0 has a primary CPU, CPU is running.
Node 0 has no secondary CPU.
Machine is in M mode.
Cpu 0, Nasid 0x0, pcibr_setup(): found partnum= 0xc002...is bridge
CPU 0 clock is 65535MHz.
On node 0 totalpages: 16384
zone(0): 16384 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line:
Entering 64-bit mode.
Calibrating delay loop... 179.81 BogoMIPS
Memory: 61496k/65536k available (1133k kernel code, 4040k reserved, 129k data, 216k init)
Dentry-cache hash table entries: 8192 (order: 5, 131072 bytes)
Buffer-cache hash table entries: 4096 (order: 3, 32768 bytes)
Page-cache hash table entries: 16384 (order: 5, 131072 bytes)
Inode-cache hash table entries: 4096 (order: 4, 65536 bytes)
Checking for 'wait' instruction...  unavailable.
POSIX conformance testing by UNIFIX
PCI: Probing PCI hardware on host bus  0.
PCI: Fixing isp1020 in [bus:slot.fn] 00:00.0
PCI: Fixing isp1020 in [bus:slot.fn] 00:01.0
PCI: Fixing base addresses for IOC3 device 00:02.0
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Starting kswapd v1.8
Serial driver version 5.02 (2000-08-09) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabledttyS00 at iomem 0x9200000008620178 (irq = 0) is a 16550A
Using PHY 31, vendor 0x20005c0, model 0, rev 1.
eth0:  MII transceiver found at MDIO address 31, config 3100 status 786f.
IOC3 SSRAM has 128 kbyte.
Found DS1981U NIC registration number 39:e6:02:00:70:5e, CRC 19.
Ethernet address is 08:00:69:05:73:0e.
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
IP: routing cache hash table of 256 buckets, 4Kbytes
TCP: Hash tables configured (established 2048 bind 2048)

[ Here the machines hangs again. I've tried many more times with different kernel configurations, but it's the same thing. It either "gets a dbe" or just stops after "TCP: Hash tables ..." ]


--pm



From owner-linux-mips@oss.sgi.com Mon Jan  8 18:52:30 2001
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From:	Ralf Baechle <ralf@oss.sgi.com>
To:	Predrag Malicevic <pmalic@blic.net>
Cc:	<linux-mips@oss.sgi.com>
Subject: Re: O200 problem...
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On Tue, Jan 09, 2001 at 03:16:20AM +0100, Predrag Malicevic wrote:

> I'm trying to install Linux on an Origin 200 and I'm having problems with
> booting the kernel (CVS tree linux from oss.sgi.com).  I've included below
> a console session of my tries to boot the kernel.  In two cases below I
> used the default kernel configuration but without the SCSI driver.  In the
> first case I used parameters root=/dev/nfs and nfsroot=.... It reached
> 'Calibrating delay loop' and then 'Got dbe at 0xffffffff8013e970'.  After
> that, I guess, some kind of register dump followed (I'm working with MIPS
> architecture for the first time).  In the second case it reached "TCP:
> Hash tables configured". Besides these two tries, I've tried using
> different kernel configuration options in the machine selection category
> and besides the obvious ones (IP27, IP27 N-Mode and Multi-Processing), I'm
> clueless about the meaning of other options.

> CPU 0 clock is 65535MHz.

Something's fishy.  I guess ;-)

> [ Here the machines hangs again. I've tried many more times with different kernel configurations, but it's the same thing. It either "gets a dbe" or just stops after "TCP: Hash tables ..." ]

I assume it's your specific configuration that's triggering the problem.
I've got the current CVS kernel running on 2 dual processor O200 and a
32 processor Origin 2000, so it can't be all broken.  I think all known
to be working configuratons are machines with significantly more memory;
dunno if that's really related or not.

Thanks for sending the oops message; however without additional data
provided I can't use it.  Can you please point please put the kernel image
that resulted in the oops online?

  Ralf

From owner-linux-mips@oss.sgi.com Tue Jan  9 00:58:02 2001
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To:     "Kevin D. Kissell" <kevink@mips.com>
Subject: Re: MIPS32 patches breaking DecStation
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On Tue, Jan 09, 2001 at 01:34:47AM +0100, Kevin D. Kissell wrote:
> Florian,
> 
> Could you do me a huge favor and try a build that
> uses 3 or 4 nops instead of the branch to the instruction
> after the delay slot?   There was a reason that I eliminated

No problem - Done - doesnt work

> the branch construct from the MIPS internal Linux source
> base - it's a hack that works perfectly on R4000's, but
> it's pretty much a coincidence that it does so.  Yes,
> the code fragment in question is R4K-specific, but
> we really need to migrate towards the use of consistent
> mechanisms that work across the full range of MIPS
> CPUs.  Ideally, *all* CP0 hazards should some day be 
> padded out with "ssnops" (sll $0,$0,1, if I recall), which 
> force a 1 cycle delay per instruction even on superscalar 
> MIPS CPUs.

It immediatly after starting init goes crazy with "Illegal instruction"
and dies like this:

[ ... a couple hundret Illegal instruction ... ]
[init:1] Illegal instruction 8f9983d4 at 0fb68df8 ra=0fb68a20
[init:1] Illegal instruction 8fbc0018 at 0fb68e08 ra=0fb68a20
[init:1] Illegal instruction 02402021 at 0fb68e10 ra=0fb68a20
[init:1] Illegal instruction 00000000 at 0fb68e18 ra=0fb68a20
Kernel panic: Attempted to kill init!
BUG IN DYNAMIC LINKER ld.so: dl-minimal.c: 67: malloc: Assertion `n <= _dl_page!

It seems we need a R4000 2.0/3.0 special except_vec_r4000 like we already
have for the R4600 and some other kinds of mips CPUs.

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Tue Jan  9 02:20:34 2001
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From:   Predrag Malicevic <pmalic@blic.net>
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Subject: Re: O200 problem...
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On Tue, 9 Jan 2001, Ralf Baechle wrote:

> > CPU 0 clock is 65535MHz.
>
> Something's fishy.  I guess ;-)

It is really strange... 65 GHz? ;)

> Thanks for sending the oops message; however without additional data
> provided I can't use it.  Can you please point please put the kernel image
> that resulted in the oops online?

Ok, I'll put it by Thursday (I can't come to the machines earlier).

P.S. I was first building kernels on an i386 system running RedHat 7.0,
but later on I switched to a faster machine running Slackware 7.0. In both
cases I used binutils-mips64-linux-2.9.5-3/egcs-mips64-linux-1.1.2-3 RPMs
from oss.sgi.com. Kernels from both machines behaved the same way.

--pm


From owner-linux-mips@oss.sgi.com Tue Jan  9 02:51:34 2001
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Date:   Tue, 09 Jan 2001 11:50:21 +0100
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The XTLB refill handler in the 64bit code is for the R10000, is there
any reason that it shouldn't work on R4000's ?

/Carsten


--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Tue Jan  9 04:12:44 2001
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As a side question, I would like to to know why exactly the CPU cache operations
are
promoted to the syscall status? What is the situation that a user in its program
would like
to call cacheflush() ? Unless, of course, he is doing DoS.

I can understand why we need this in kernel, for context switch, for example, but
as a syscall?...

Michael.

"Maciej W. Rozycki" wrote:

> On Mon, 8 Jan 2001, Ralf Baechle wrote:
>
> > > $ mipsel-linux-objdump -T /usr/mipsel-linux/lib/libc-2.2.so | grep cachectl
> > > 00000000600ca0a0  w   DF *ABS*  0000000000000000  GLIBC_2.0   cachectl
> > > $ ls /usr/mipsel-linux/include/sys/cachectl.h
> > > /usr/mipsel-linux/include/sys/cachectl.h
> >
> > cachectl(2) is a syscall that is manipulates the cachability of a memory
> > area.  And not yet implemented ...
>
>  s/cachectl$/cacheflush/, of course (but the header is still valid).
>
> --
> +  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
> +--------------------------------------------------------------+
> +        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Tue Jan  9 04:19:54 2001
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Subject: Re: User applications
To:     michaels@jungo.com (Michael Shmulevich)
Date:   Tue, 9 Jan 2001 12:17:26 +0000 (GMT)
Cc:     macro@ds2.pg.gda.pl (Maciej W. Rozycki), linux-mips@oss.sgi.com
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> promoted to the syscall status? What is the situation that a user in its program
> would like
> to call cacheflush() ? Unless, of course, he is doing DoS.

A cache flush is not a denial of service attack. Its no less effective than a
1Mb memcpy 

> I can understand why we need this in kernel, for context switch, for example, but
> as a syscall?...

Self modifying code, dynamic compilation, glibc trampolines


From owner-linux-mips@oss.sgi.com Tue Jan  9 04:24:14 2001
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Date:   Tue, 9 Jan 2001 13:15:47 +0100 (MET)
From:   Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
To:     Michael Shmulevich <michaels@jungo.com>
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On Tue, 9 Jan 2001, Michael Shmulevich wrote:
> As a side question, I would like to to know why exactly the CPU cache operations
> are
> promoted to the syscall status? What is the situation that a user in its program
> would like
> to call cacheflush() ? Unless, of course, he is doing DoS.
> 
> I can understand why we need this in kernel, for context switch, for example, but
> as a syscall?...

For trampolines. These are small pieces of code created on the stack, and
require flushing of the caches before they are excuted.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven ------------- Sony Software Development Center Europe (SDCE)
Geert.Uytterhoeven@sonycom.com ------------------- Sint-Stevens-Woluwestraat 55
Voice +32-2-7248626 Fax +32-2-7262686 ---------------- B-1130 Brussels, Belgium


From owner-linux-mips@oss.sgi.com Tue Jan  9 05:08:36 2001
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On Tue, 9 Jan 2001, Michael Shmulevich wrote:

> As a side question, I would like to to know why exactly the CPU cache operations
> are
> promoted to the syscall status? What is the situation that a user in its program
> would like
> to call cacheflush() ? Unless, of course, he is doing DoS.

 Any software that modifes text needs it.  For example the dynamic linker
or libdl. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Tue Jan  9 07:20:45 2001
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On Tue, Jan 09, 2001 at 01:34:47AM +0100, Kevin D. Kissell wrote:

> uses 3 or 4 nops instead of the branch to the instruction
> after the delay slot?   There was a reason that I eliminated
> the branch construct from the MIPS internal Linux source
> base - it's a hack that works perfectly on R4000's, but
> it's pretty much a coincidence that it does so.  Yes,
> the code fragment in question is R4K-specific, but
> we really need to migrate towards the use of consistent
> mechanisms that work across the full range of MIPS
> CPUs.  Ideally, *all* CP0 hazards should some day be 
> padded out with "ssnops" (sll $0,$0,1, if I recall), which 
> force a 1 cycle delay per instruction even on superscalar 
> MIPS CPUs.

While we could come up with a common TLB fault handler I really don't want
to.  For many applications this TLB fault handler is extremly performance
sensitive; every single cycle directly translates into application
performance.  Seems like we'll need some more TLB fault handler.  And a
complete TLB fault handler rewrite would be a good ide anyway, sigh ...

  Ralf

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From:   "Kevin D. Kissell" <kevink@mips.com>
To:     "Ralf Baechle" <ralf@oss.sgi.com>
Cc:     "Florian Lohoff" <flo@rfc822.org>, <linux-mips@oss.sgi.com>
References: <20010109004101.B27674@paradigm.rfc822.org> <000501c079d3$fefe1a60$0deca8c0@Ulysses> <20010109130958.B1047@bacchus.dhis.org>
Subject: Re: MIPS32 patches breaking DecStation
Date:   Tue, 9 Jan 2001 16:50:34 +0100
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> > Yes, the code fragment in question is R4K-specific, but
> > we really need to migrate towards the use of consistent
> > mechanisms that work across the full range of MIPS
> > CPUs.  Ideally, *all* CP0 hazards should some day be
> > padded out with "ssnops" (sll $0,$0,1, if I recall), which
> > force a 1 cycle delay per instruction even on superscalar
> > MIPS CPUs.
>
> While we could come up with a common TLB fault handler I really don't want
> to.  For many applications this TLB fault handler is extremly performance
> sensitive; every single cycle directly translates into application
> performance.  Seems like we'll need some more TLB fault handler.  And a
> complete TLB fault handler rewrite would be a good ide anyway, sigh ...

Sorry if I wasn't clear.  I am not suggesting a "one size
fits all" TLB handler - though as the old SGI hardware
gets retired and the newer, more standardized MIPS32
and MIPS64 parts become the principal targets, we
may see a greater convergence.  I am simply suggesting
that, even if there are differences in policy necessitated
by different CPU implementations, they should use the
same mechanisms.  If all CP0 hazards are avoided by
using ssnops, for example, we could evolve from writing
a new handler for every R4K variant to having a routine
that generates a handler with the right pipeline hazard
management, based on a set of paramters for the CPU.
And, while Ralf and I sometimes disagree on the importance
of this, in my own opinion, being consistent in these small
details helps avoid errors when a systems programmer
new to the architecture and/or the OS needs to work on
the system.

You may say that I'm a dreamer, but I'm not the only one.  ;-)

            Regards,

            Kevin K.


From owner-linux-mips@oss.sgi.com Tue Jan  9 08:59:05 2001
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On 08-Jan-01 Florian Lohoff wrote:
> OK - I just had a look at the errata - This IS a workaround to a 
> Mips R4000SC 2.0, 3.0 errata - I restored the original code back.

Where have you found those errata?

-- 
Regards,
Harald

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To:	Harald Koerfgen <Harald.Koerfgen@home.ivm.de>
Cc:	Florian Lohoff <flo@rfc822.org>, linux-mips@oss.sgi.com
Subject: Re: MIPS32 patches breaking DecStation
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On Tue, Jan 09, 2001 at 05:43:08PM +0100, Harald Koerfgen wrote:

> On 08-Jan-01 Florian Lohoff wrote:
> > OK - I just had a look at the errata - This IS a workaround to a 
> > Mips R4000SC 2.0, 3.0 errata - I restored the original code back.
> 
> Where have you found those errata?

Go to www.mips.com, follow the publications link.  Yes, MIPS be praised
for having errata and docs for rotten old silicon online!

  Ralf

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On 09-Jan-01 Florian Lohoff wrote:
> On Tue, Jan 09, 2001 at 01:34:47AM +0100, Kevin D. Kissell wrote:
>> Florian,
>> 
>> Could you do me a huge favor and try a build that
>> uses 3 or 4 nops instead of the branch to the instruction
>> after the delay slot?   There was a reason that I eliminated
> 
> No problem - Done - doesnt work

Same here on my /260 (R4400SC V4.0). Neither inserting four "sll $0,$0,1" nor
four "nop" seem to work. The branch, on the other hand, does.

-- 
Regards,
Harald

From owner-linux-mips@oss.sgi.com Tue Jan  9 10:39:35 2001
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Subject: Re: MIPS32 patches breaking DecStation
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On Tue, Jan 09, 2001 at 06:11:00PM +0100, Harald Koerfgen wrote:

> > No problem - Done - doesnt work
> 
> Same here on my /260 (R4400SC V4.0). Neither inserting four "sll $0,$0,1" nor
> four "nop" seem to work. The branch, on the other hand, does.

Note the ssnops only make sense on superscalar CPUs, so not on the R4000.
Also note that the branch is equivalent to three nops.  One for the
branch instruction itself, the two more for instructions in the pipeline
that get killed.  On the R4600 / R500 where the hazard is only a single
instruction the branch is equivalent to only a single nop.  So while
unobvious the branch is a rather neat idea.

  Ralf

From owner-linux-mips@oss.sgi.com Tue Jan  9 11:27:07 2001
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From:   "Kevin D. Kissell" <kevink@mips.com>
To:     "Ralf Baechle" <ralf@oss.sgi.com>,
        "Harald Koerfgen" <Harald.Koerfgen@home.ivm.de>
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Subject: Re: MIPS32 patches breaking DecStation
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> > Same here on my /260 (R4400SC V4.0). Neither inserting four "sll
$0,$0,1" nor
> > four "nop" seem to work. The branch, on the other hand, does.

Then it's apparently more than just a garden-variety CP0 hazard.

> Note the ssnops only make sense on superscalar CPUs, so not on the R4000.

My point is that an SSNOP should cause a 1 cycle stall on *any* MIPS
implementation to date, superscalar or not.  It's not documented that
way for the R10000, but if I recall correctly, it works there too.  If one
wants to standardize on a single mechanism, that's the one to use.
That's all I'm saying.

> Also note that the branch is equivalent to three nops.  One for the
> branch instruction itself, the two more for instructions in the pipeline
> that get killed.  On the R4600 / R500 where the hazard is only a single
> instruction the branch is equivalent to only a single nop.  So while
> unobvious the branch is a rather neat idea.

Yes, it's cute, but it relies on accidents of implementation to work,
and could easily fail on other CPUs otherwise compatible with
the R4000.  In principle, such a branch might incur no delay at
all on an advanced 64-bit processor.  By all means, use it for
the specific cases of the CPUs on which it is known to work,
but it should not be used in "default" MIPS CP0 handlers.

            Regards,

            Kevin K.


From owner-linux-mips@oss.sgi.com Tue Jan  9 12:04:57 2001
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On Tue, Jan 09, 2001 at 08:30:05PM +0100, Kevin D. Kissell wrote:

> My point is that an SSNOP should cause a 1 cycle stall on *any* MIPS
> implementation to date, superscalar or not.  It's not documented that
> way for the R10000, but if I recall correctly, it works there too.  If one
> wants to standardize on a single mechanism, that's the one to use.
> That's all I'm saying.

I agree on that - except that I haven't seen the various various flavours
of nops documented anywhere except in IRIX's <sys/asm.h> ...

> > Also note that the branch is equivalent to three nops.  One for the
> > branch instruction itself, the two more for instructions in the pipeline
> > that get killed.  On the R4600 / R500 where the hazard is only a single
> > instruction the branch is equivalent to only a single nop.  So while
> > unobvious the branch is a rather neat idea.
> 
> Yes, it's cute, but it relies on accidents of implementation to work,
> and could easily fail on other CPUs otherwise compatible with
> the R4000.  In principle, such a branch might incur no delay at
> all on an advanced 64-bit processor.  By all means, use it for
> the specific cases of the CPUs on which it is known to work,
> but it should not be used in "default" MIPS CP0 handlers.

This behaviour of the R4000 branch is documented in the R4000 manual's
description of the pipeline.

  Ralf

From owner-linux-mips@oss.sgi.com Tue Jan  9 12:30:28 2001
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Subject: Re: MIPS32 patches breaking DecStation
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> > Yes, it's cute, but it relies on accidents of implementation to work,
> > and could easily fail on other CPUs otherwise compatible with
> > the R4000.  In principle, such a branch might incur no delay at
> > all on an advanced 64-bit processor.  By all means, use it for
> > the specific cases of the CPUs on which it is known to work,
> > but it should not be used in "default" MIPS CP0 handlers.
> 
> This behaviour of the R4000 branch is documented in the R4000 manual's
> description of the pipeline.

Yes, yes, like I said, use it whenever you see an R4000 PrID
if you like.  Just don't use it as the handler installed for a PrID
not otherwise known to the kernel.

            Kevin K.


From owner-linux-mips@oss.sgi.com Tue Jan  9 14:31:37 2001
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From:   Jim Freeman <jfree@sovereign.org>
Date:   Tue, 9 Jan 2001 15:31:14 -0700
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Does Alan Cox have a current mips snapshot in his -ac series
( ftp://ftp.kernel.org/pub/linux/kernel/people/alan/2.4/ )
so that he can feed it to Linus for the mainstream 2.4.n?

...jfree

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--zhXaljGHf11kAtnf
Content-Type: text/plain; charset=us-ascii
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Building of latest cvs kernel for IP22 fails for me in 
arch/mips/arc/init.c and arch/mips/kernel/setup.c 
due to a typemismatch in the declaration of prom_init in the above 
mentioned files and sgialib.h. The attached patch fixes this.
 -- Guido

--zhXaljGHf11kAtnf
Content-Type: text/plain; charset=us-ascii
Content-Disposition: attachment; filename="sgialib.diff"

--- include/asm-mips/sgialib.h.orig	Wed Jan 10 00:24:13 2001
+++ include/asm-mips/sgialib.h	Wed Jan 10 00:26:55 2001
@@ -20,7 +20,7 @@
  * Init the PROM library and it's internal data structures.  Called
  * at boot time from head.S before start_kernel is invoked.
  */
-extern int prom_init(int argc, char **argv, char **envp, int *prom_vec);
+extern void prom_init(int argc, char **argv, char **envp, int *prom_vec);
 
 /* Simple char-by-char console I/O. */
 extern void prom_putchar(char c);

--zhXaljGHf11kAtnf--

From owner-linux-mips@oss.sgi.com Tue Jan  9 16:32:17 2001
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From:	Ralf Baechle <ralf@oss.sgi.com>
To:	Guido Guenther <guido.guenther@gmx.net>
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On Wed, Jan 10, 2001 at 12:43:05AM +0100, Guido Guenther wrote:

> Building of latest cvs kernel for IP22 fails for me in 
> arch/mips/arc/init.c and arch/mips/kernel/setup.c 
> due to a typemismatch in the declaration of prom_init in the above 
> mentioned files and sgialib.h. The attached patch fixes this.

Thanks, applied.

  Ralf

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From:   Justin Carlson <carlson@sibyte.com>
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To:     linux-mips@oss.sgi.com
Subject: _clear_page semantics
Date:   Tue, 9 Jan 2001 17:48:11 -0800
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Looking at the existing clear_page implementations for r4xx0, rm7k, and mips32
in the mips/ tree, I see everyone issuing cache op 0xd for the address range of
the page being cleared.

I'm wondering what the purpose is of these cache flushes...given a physically
tagged dcache, my understanding of the semantics of clear_page are that it just
zeros the page, in which case the cache ops are pointless overhead.

Especially in the mips32 case, which uses cache op 0xd, which is undefined
implementation dependent according to my mips32 spec.

Am I missing something here?

Thanks,
Justin

From owner-linux-mips@oss.sgi.com Tue Jan  9 21:14:51 2001
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Subject: Re: _clear_page semantics
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On Tue, Jan 09, 2001 at 05:48:11PM -0800, Justin Carlson wrote:

> Looking at the existing clear_page implementations for r4xx0, rm7k, and mips32
> in the mips/ tree, I see everyone issuing cache op 0xd for the address range of
> the page being cleared.
> 
> I'm wondering what the purpose is of these cache flushes...given a physically
> tagged dcache, my understanding of the semantics of clear_page are that it just
> zeros the page, in which case the cache ops are pointless overhead.
> 
> Especially in the mips32 case, which uses cache op 0xd, which is undefined
> implementation dependent according to my mips32 spec.

The idea is to avoid unnecessary memory reads - all the read data would
be overwritten anyway.  The last time I benchmarked this routine on some
machine it made a difference of about 4000 vs. 2500 c0_count cycles.  I
think that was on a R4600 RM200.

  Ralf

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From:	Ralf Baechle <ralf@oss.sgi.com>
To:	Jim Freeman <jfree@sovereign.org>
Cc:	linux-mips@oss.sgi.com
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On Tue, Jan 09, 2001 at 03:31:14PM -0700, Jim Freeman wrote:
> From: Jim Freeman <jfree@sovereign.org>
> Date:   Tue, 9 Jan 2001 15:31:14 -0700
> To: linux-mips@oss.sgi.com
> Subject: -ac to include mips update
> 
> Does Alan Cox have a current mips snapshot in his -ac series
> ( ftp://ftp.kernel.org/pub/linux/kernel/people/alan/2.4/ )
> so that he can feed it to Linus for the mainstream 2.4.n?

Obviously not.

  Ralf

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Justin Carlson wrote:

> Looking at the existing clear_page implementations for r4xx0, rm7k, and mips32
> in the mips/ tree, I see everyone issuing cache op 0xd for the address range of
> the page being cleared.
>
> I'm wondering what the purpose is of these cache flushes...given a physically
> tagged dcache, my understanding of the semantics of clear_page are that it just
> zeros the page, in which case the cache ops are pointless overhead.
>
> Especially in the mips32 case, which uses cache op 0xd, which is undefined
> implementation dependent according to my mips32 spec.

You are absolutely right, it is implementation dependent.
I just tend to use the mips32 implementation for my R4000s as well, and here as
Ralf mention it is performance improving.
Actually we have included a CPU option flag (MIPS_CPU_CACHE_CDEX), what tells us
if the CPU has the Create_Dirty_Exclusive CACHE operation available.
So we should probably use it, now it is here :-)

Thanks.

>
> Am I missing something here?
>
> Thanks,
> Justin

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
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From owner-linux-mips@oss.sgi.com Wed Jan 10 07:46:04 2001
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To:	Carsten Langgaard <carstenl@mips.com>
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Subject: Re: _clear_page semantics
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On Wed, Jan 10, 2001 at 09:08:08AM +0100, Carsten Langgaard wrote:

> You are absolutely right, it is implementation dependent.
> I just tend to use the mips32 implementation for my R4000s as well, and here as
> Ralf mention it is performance improving.
> Actually we have included a CPU option flag (MIPS_CPU_CACHE_CDEX), what tells us
> if the CPU has the Create_Dirty_Exclusive CACHE operation available.
> So we should probably use it, now it is here :-)

Homework for somebody with some time at his hands - we have a large number
of unrolled loops for all sorts of cache variations in r4xx0.c.  Benchmark
if they actually improve performance.  I wouldn't wonder if due to a large
number of pipeline stalls in one of those routines the whole unrolling
business doesn't buy us anything.

  Ralf

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From:   Ian Chilton <ian@ichilton.co.uk>
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Hello,

I just compiled a kernel with my new toolchain...

I it using gcc 2.95.2 + binutils 2.10.1 and the kernel from today's cvs
(10/01/01) which is just after Ralf checked in test12...


08:58PM <quintela> Exception: <vector=Normal>
08:58PM <quintela> Status register:
0x10044803<CU0,CH,IM7,IM4,IPL=???,MODE=KERNEL,EXL,IE>
08:58PM <quintela> Cause register: 0x3000c000<CE=3,IP8,IP7,EXC=INT>
08:58PM <quintela> Exception PC: 0x8814c7b4
08:58PM <quintela> Interrupt exception
08:58PM <quintela> CPU Parity Error Interrupt
08:58PM <quintela> Local I/O interrupt register 2: 0xc8
<EISA,SLOT0,SLOT1>
08:58PM <quintela> CPU parity error register: 0x302<B1,MEM_PAR>
08:59PM <quintela> CPU parity error: address: 0xa572f88
08:59PM <quintela>   Saved user regs in hex (&gpda 0xa8740e48, &_regs
0xa8741048):
08:59PM <quintela>   arg: 8a572fc0 0 2530044 881d8000
08:59PM ð penguin42/#mipslinux has sore fingers
08:59PM <Spock> Opening an Indy is easy
08:59PM <quintela>   tmp: 4 8ad30040 1000 0 0 881b591f fffffff6
ffffffff
08:59PM <quintela>   sve: 8ad31 88800000 881bb280 8ad31 1 2530044 20 1
08:59PM <quintela>   t8 88009dd5 t9 a at 10044800 v0 88800000 v1 0 k1
bad11bad
08:59PM <quintela>   gp 88008000 fp 1f sp 88009e70 ra 881921ec
08:59PM <quintela>
08:59PM <quintela> PANIC: Unexpected exception
08:59PM <quintela>
08:59PM <quintela> [Press reset or ENTER to restart.]


This is on an I2..


Any ideas?


Thanks!


Bye for Now,

Ian


                                \|||/ 
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |         Budget: A method for going broke methodically.          |
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From owner-linux-mips@oss.sgi.com Wed Jan 10 14:03:25 2001
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I can't find any information on a CPU Nevada, which supposedly is a 56x0
type. Is "R56x0 CONFIG_CPU_NEVADA" really meant to be "R52x0
CONFIG_CPU_NEVADA"?  The product id code of 0x2800 matches the QED 52xx
processors (at least the 5231) -- I can't find anything on a 56x0 CPU.

Pete

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C'mon Pete, it's obviously a typo!   It predates my involvement
with the code - hell, I never even knew that "Nevada" was the
QED code name for the R5200 family before I started hacking
on the MIPS Linux kernel, even though I had an R5230 system
in my lab.  The "6" is probably shifted left one position from 
"R5260", which was, I believe, the first chip of the Nevada
family to ship.

            Kevin K.

----- Original Message ----- 
From: "Pete Popov" <ppopov@mvista.com>
To: <linux-mips@oss.sgi.com>
Sent: Wednesday, January 10, 2001 11:03 PM
Subject: CPU Nevada


> 
> I can't find any information on a CPU Nevada, which supposedly is a 56x0
> type. Is "R56x0 CONFIG_CPU_NEVADA" really meant to be "R52x0
> CONFIG_CPU_NEVADA"?  The product id code of 0x2800 matches the QED 52xx
> processors (at least the 5231) -- I can't find anything on a 56x0 CPU.
> 
> Pete


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"Kevin D. Kissell" wrote:
> 
> C'mon Pete, it's obviously a typo!   It predates my involvement
> with the code - hell, I never even knew that "Nevada" was the
> QED code name for the R5200 family before I started hacking
> on the MIPS Linux kernel, even though I had an R5230 system
> in my lab.  The "6" is probably shifted left one position from
> "R5260", which was, I believe, the first chip of the Nevada
> family to ship.

That's what I figured, but hey, it doesn't hurt to make sure.  I'm
working with a 5231 and wanted to make sure I don't need to add another
cpu type.

Pete

> ----- Original Message -----
> From: "Pete Popov" <ppopov@mvista.com>
> To: <linux-mips@oss.sgi.com>
> Sent: Wednesday, January 10, 2001 11:03 PM
> Subject: CPU Nevada
> 
> >
> > I can't find any information on a CPU Nevada, which supposedly is a 56x0
> > type. Is "R56x0 CONFIG_CPU_NEVADA" really meant to be "R52x0
> > CONFIG_CPU_NEVADA"?  The product id code of 0x2800 matches the QED 52xx
> > processors (at least the 5231) -- I can't find anything on a 56x0 CPU.
> >
> > Pete

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On Wed, Jan 10, 2001 at 09:13:41PM +0000, Ian Chilton wrote:

> I just compiled a kernel with my new toolchain...
> 
> I it using gcc 2.95.2 + binutils 2.10.1 and the kernel from today's cvs
> (10/01/01) which is just after Ralf checked in test12...

Since wealready know that this compiler is fishy I'm going to ignore this
report for now.

  Ralf

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To:	"Kevin D. Kissell" <kevink@mips.com>
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On Thu, Jan 11, 2001 at 01:40:28AM +0100, Kevin D. Kissell wrote:

> C'mon Pete, it's obviously a typo!   It predates my involvement
> with the code - hell, I never even knew that "Nevada" was the
> QED code name for the R5200 family before I started hacking
> on the MIPS Linux kernel, even though I had an R5230 system
> in my lab.  The "6" is probably shifted left one position from 
> "R5260", which was, I believe, the first chip of the Nevada
> family to ship.

No idea how the 6 ended up there; I wrote the Nevada support for Cobalt's
Qube which originally using a R5230, the small brother of the 5260 with
just a 32 bit external bus.  Anyway, I fixed that buglet.

  Ralf

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Erik,

No, doesn't help.

bash# mount proc /proc -t proc                                          
       
mount: Mounting proc on /proc failed: Unknown error 716878944           
       

Maybe people in mips-linux know something about this?


Erik Andersen wrote:

> On Wed Jan 10, 2001 at 08:39:15PM +0200, Michael Shmulevich wrote:
> 
>> Hello,
>> 
>> This is my first mail to this list, but I have already seen similar 
>> question being unanswered.
>> I am developing an embedded system based on MIPS board. I am 
>> cross-compiling the BusyBox 0.48 on x86 with gcc 2.90.29 (egcs 1.0.3a).
>> 
>> While trying to mount /proc either atomatically in script or by hand, 
>> the command fails with following message:
>> 
>> bash# mount /proc -t proc
>> mount: Mounting none on /proc failed: Unknown error 716878944
> 
> 
> mount proc /proc -t proc
> 
>  -Erik
> 
> --
> Erik B. Andersen   email:  andersen@lineo.com
> --This message was written using 73% post-consumer electrons--



From owner-linux-mips@oss.sgi.com Thu Jan 11 02:10:19 2001
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Hello,

> > I it using gcc 2.95.2 + binutils 2.10.1 and the kernel from today's cvs
> > (10/01/01) which is just after Ralf checked in test12...
> 
> Since wealready know that this compiler is fishy I'm going to ignore this
> report for now.


What do you mean?  It's Macro's stuff...you said you
trusted his code  :)


Or do you mean the PIC thing?  I told you I already fixed that!


root@dale:~# echo __PIC__ | gcc -E -P -
1


So are you saying this is a compiler thing, not a kernel thing?


Bye for Now,

Ian


                                \|||/ 
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
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From owner-linux-mips@oss.sgi.com Thu Jan 11 03:48:39 2001
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        "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
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On Thu Jan 11, 2001 at 09:28:28AM +0200, Michael Shmulevich wrote:
> Erik,
> 
> No, doesn't help.
> 
> bash# mount proc /proc -t proc                                          
>        
> mount: Mounting proc on /proc failed: Unknown error 716878944           
>        
> 
> Maybe people in mips-linux know something about this?

Yes, this does sound like a kernel specific problem then,
since this works on (at least) arm, ppc, sh, and x86.
I havn't tried it on anything else.

 -Erik

--
Erik B. Andersen   email:  andersen@lineo.com
--This message was written using 73% post-consumer electrons--

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On Thu, Jan 11, 2001 at 04:48:08AM -0700, Erik Andersen wrote:
> On Thu Jan 11, 2001 at 09:28:28AM +0200, Michael Shmulevich wrote:
> > Erik,
> > 
> > No, doesn't help.
> > 
> > bash# mount proc /proc -t proc                                          
> >        
> > mount: Mounting proc on /proc failed: Unknown error 716878944           
> >        
> > 
> > Maybe people in mips-linux know something about this?
> 
> Yes, this does sound like a kernel specific problem then,
> since this works on (at least) arm, ppc, sh, and x86.
> I havn't tried it on anything else.

Henning Heinold has done a lot with busybox on mips (debian installer)
Might this be due to kernel 2.4 and /proc/mounts includeing a / in front
of proc 

(flo@ping)~# cat /proc/mounts 
/dev/root / ext2 rw 0 0
proc /proc proc rw 0 0
devpts /dev/pts devpts rw 0 0
/dev/sda7 /usr ext2 rw 0 0
/dev/sda8 /var ext2 rw 0 0
/dev/sda9 /tmp ext2 rw 0 0
/dev/sda10 /home ext2 rw 0 0
/dev/hda5 /var/tmp ext3 rw 0 0
usbdevfs /proc/bus/usb usbdevfs rw 0 0
automount(pid19472) /mnt autofs rw 0 0
(flo@ping)~# uname -a
Linux ping.mediaways.net 2.2.18ext3 #1 Thu Dec 14 18:24:45 CET 2000 i686 unknown

Or 

flo@resume:~$ cat /proc/mounts 
/dev/root / ext2 rw 0 0
/proc /proc proc rw 0 0
/dev/sdb1 /home2 ext2 rw 0 0
/dev/sdc1 /home3 ext2 rw 0 0
/dev/sdd1 /ftp.rfc822.org ext2 rw 0 0
/dev/sde1 /home4 ext2 rw 0 0
shmfs /var/shm shm rw 0 0
devpts /home4/dev/pts devpts rw 0 0
proc /home4/proc proc rw 0 0
flo@resume:~$ uname -a
Linux resume.rfc822.org 2.4.0-test6 #2 Sun Aug 27 12:37:51 GMT 2000 mips unknown


Henning has fought with this IIRC.

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Thu Jan 11 05:05:30 2001
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Hello,

I just compiled a kernel from 001027 with the same toolchain and
quintella booted it on the same I2....

Looks like the test12 in CVS is broken  :)
 

Bye for Now,

Ian

                                \|||/
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 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
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From owner-linux-mips@oss.sgi.com Thu Jan 11 07:52:51 2001
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Subject: Re: [BusyBox] 0.48 - Can't mount /proc
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Here's a kernel patch.  The __access_ok macro looks one byte
too far and fails.  Since copy_mount_options() isn't
sure how long the string arguments are, it just copies
to the end of the page.  Since this is on busybox's
stack, the copy wants to go all the way to 0x7FFFFFF
and hits this corner case.

Quinn Jensen
jensenq@lineo.com


--- linux-sgi-2.4.0-test11-pristine/include/asm-mips/uaccess.h  Wed Oct  4 19:19:02 2000
+++ linux/include/asm-mips/uaccess.h    Wed Jan 10 16:20:35 2001
@@ -46,7 +46,7 @@
   *  - OR we are in kernel mode.
   */
  #define __access_ok(addr,size,mask) \
-        (((__signed__ long)((mask)&(addr | size | (addr+size)))) >= 0)
+        (((__signed__ long)((mask)&(addr | size | (addr+size-1)))) >= 0)
  #define __access_mask ((long)(get_fs().seg))

  #define access_ok(type,addr,size) \ 





From owner-linux-mips@oss.sgi.com Thu Jan 11 12:37:33 2001
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On Thu, Jan 11, 2001 at 09:28:28AM +0200, Michael Shmulevich wrote:

> bash# mount proc /proc -t proc                                          
>        
> mount: Mounting proc on /proc failed: Unknown error 716878944           

716878944 is 0x2abab460, a typical address of a shared library or malloced
memory allocated via mmap(2).

  Ralf

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Hello,

Klaus tried booting the kernel I compiled using current CVS (010111)

I used the same GCC 2.95.2 + Binutils 2.10.1 that worked when compiling
001027.

This output was from an I2

Command Monitor.  Type "exit" to return to the menu.
>> bootp():vmlinux console=ttyS0
Setting $netaddr to 192.168.1.2 (from server scotty)
Obtaining vmlinux from server scotty
  \
Exception: <vector=Normal>
Status register: 0x10044803<CU0,CH,IM7,IM4,IPL=???,MODE=KERNEL,EXL,IE>
Cause register: 0x3000c01c<CE=3,IP8,IP7,EXC=DBE>
Exception PC: 0x88141554, Exception RA: 0x881821d4
Data Bus error GIO Timeout Interrupt
Local I/O interrupt register 1: 0x80 <VR/GIO2>
Local I/O interrupt register 2: 0xca <EISA,SLOT0,SLOT1>
GIO parity error register: 0x400<TIME>
GIO bus error: address: 0x1000000
  Saved user regs in hex (&gpda 0xa8740e48, &_regs 0xa8741048):
  arg: a8740000 0 81009400 1000
  tmp: a8740000 100a 81000000 881abe50 100a 1 9400 20
  sve: a8740000 0 0 0 0 0 0 0
  t8 a8740000 t9 0 at 0 v0 0 v1 0 k1 81000000
  gp a8740000 fp 0 sp 0 ra 0

PANIC: Unexpected exception

[Press reset or ENTER to restart.]


Bye for Now,

Ian


                                \|||/ 
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |         Budget: A method for going broke methodically.          |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Thu Jan 11 14:53:24 2001
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From:	Ralf Baechle <ralf@oss.sgi.com>
To:	Ian Chilton <ian@ichilton.co.uk>
Cc:	linux-mips@oss.sgi.com
Subject: Re: Current CVS Kernel Broken on MIPS (010111 - 2.4.0)
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On Thu, Jan 11, 2001 at 10:42:05PM +0000, Ian Chilton wrote:

> I used the same GCC 2.95.2 + Binutils 2.10.1 that worked when compiling
> 001027.
> 
> This output was from an I2
> 
> Command Monitor.  Type "exit" to return to the menu.
> >> bootp():vmlinux console=ttyS0
> Setting $netaddr to 192.168.1.2 (from server scotty)
> Obtaining vmlinux from server scotty
>   \
> Exception: <vector=Normal>
> Status register: 0x10044803<CU0,CH,IM7,IM4,IPL=???,MODE=KERNEL,EXL,IE>
> Cause register: 0x3000c01c<CE=3,IP8,IP7,EXC=DBE>
> Exception PC: 0x88141554, Exception RA: 0x881821d4
> Data Bus error GIO Timeout Interrupt
> Local I/O interrupt register 1: 0x80 <VR/GIO2>
> Local I/O interrupt register 2: 0xca <EISA,SLOT0,SLOT1>
> GIO parity error register: 0x400<TIME>
> GIO bus error: address: 0x1000000
>   Saved user regs in hex (&gpda 0xa8740e48, &_regs 0xa8741048):
>   arg: a8740000 0 81009400 1000
>   tmp: a8740000 100a 81000000 881abe50 100a 1 9400 20
>   sve: a8740000 0 0 0 0 0 0 0
>   t8 a8740000 t9 0 at 0 v0 0 v1 0 k1 81000000
>   gp a8740000 fp 0 sp 0 ra 0

Such a pile of numbers is pretty useless for debuggin unless accompanied
with the disassembler listing of the crashing code, System.map or even
better the kernel binary itself ...

  Ralf

From owner-linux-mips@oss.sgi.com Thu Jan 11 14:57:24 2001
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From:   Ian Chilton <ian@ichilton.co.uk>
To:     Ralf Baechle <ralf@oss.sgi.com>
Cc:     linux-mips@oss.sgi.com
Subject: Re: Current CVS Kernel Broken on MIPS (010111 - 2.4.0)
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Hello,

> Such a pile of numbers is pretty useless for debuggin unless accompanied
> with the disassembler listing of the crashing code, System.map or even
> better the kernel binary itself ...

Sorry, I forgot..:

http://files.ichilton.co.uk/linux-010111-IP22-4400.tar.gz


It's all in there, ELF + ECOFF + System.map


Thanks!


Bye for Now,

Ian


                                \|||/ 
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |         Budget: A method for going broke methodically.          |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Thu Jan 11 15:31:43 2001
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From:	Ralf Baechle <ralf@oss.sgi.com>
To:	Ian Chilton <ian@ichilton.co.uk>
Cc:	linux-mips@oss.sgi.com
Subject: Re: Current CVS Kernel Broken on MIPS (010111 - 2.4.0)
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On Thu, Jan 11, 2001 at 10:57:01PM +0000, Ian Chilton wrote:

> > Such a pile of numbers is pretty useless for debuggin unless accompanied
> > with the disassembler listing of the crashing code, System.map or even
> > better the kernel binary itself ...
> 
> Sorry, I forgot..:
> 
> http://files.ichilton.co.uk/linux-010111-IP22-4400.tar.gz
> 
> 
> It's all in there, ELF + ECOFF + System.map

It's a crash during the very early initialization of the kernel, that is
before trap_init() gets called.  __alloc_bootmem_core calls memset with
bogus addresses and that again crashes.  Not very much else I can read
from this crash and not very much I can do without an Indy ...

  Ralf

From owner-linux-mips@oss.sgi.com Thu Jan 11 16:20:33 2001
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To:     linux-mips@oss.sgi.com
Subject: Status of Linux 2.4 on Cobalt
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Date:   Thu, 11 Jan 2001 17:19:45 -0800
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What is the current status of building and running a 2.4 kernel on the
Cobalt RaQ2?  Is anyone working on this?

--
Ed Gould	AgileTV Corporation
ed@agile.tv	333 Ravenswood Avenue, Bldg. 202
		Menlo Park, CA  94025

From owner-linux-mips@oss.sgi.com Thu Jan 11 16:45:54 2001
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From:   Martin Michlmayr <tbm@cyrius.com>
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Subject: Re: Status of Linux 2.4 on Cobalt
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* Ed Gould <ed@agile.tv> [20010111 17:19]:
> What is the current status of building and running a 2.4 kernel on the
> Cobalt RaQ2?  Is anyone working on this?

Cobalt support was removed from CVS because it wouldn't even compile.

Mathew Edward Kovach <mkovach@alal.com> used to work on 2.4 support
again, but I haven't heard from him for quite a while...
-- 
Martin Michlmayr
tbm@cyrius.com

From owner-linux-mips@oss.sgi.com Thu Jan 11 18:48:44 2001
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Date:   Thu, 11 Jan 2001 18:48:49 -0800
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The IRDA menu and its options don't show up in "make config" nor "make
menuconfig".  Does anyone know how to quickly fix this (I'm not sure I'm
the best person to muck with scripts)?

Pete

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Pete Popov wrote:
> 
> The IRDA menu and its options don't show up in "make config" nor "make
> menuconfig".  Does anyone know how to quickly fix this (I'm not sure I'm
> the best person to muck with scripts)?

Nevermind. I found the easy fix.

Pete

From owner-linux-mips@oss.sgi.com Thu Jan 11 19:08:43 2001
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Has anybody done a port of strace for linux/mips 2.4??? I'm trying to 
debug something and need something simple.
-- 
Joe deBlaquiere
Red Hat, Inc.
307 Wynn Drive
Huntsville AL, 35805
voice : (256)-704-9257
fax   : (256)-837-3839


From owner-linux-mips@oss.sgi.com Thu Jan 11 19:52:03 2001
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Joe deBlaquiere wrote:
> 
> Has anybody done a port of strace for linux/mips 2.4??? I'm trying to
> debug something and need something simple.
> --
> Joe deBlaquiere
> Red Hat, Inc.
> 307 Wynn Drive
> Huntsville AL, 35805
> voice : (256)-704-9257
> fax   : (256)-837-3839

strace is included in the MontaVista HHL distribution.  You can find the rpm
and srpm under ftp.mvista.com/pub/CDK?? and/or ftp.mvista.com/pub/area51.

Jun

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Subject: broken RM7000 in CVS ...
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I saw mips_cpu structure is introduced to the CVS tree.  That is a really good
thing, although many places need to be improved.

An initial try found the following bug.  There are probably more down the
road. :-)

Jun

diff -Nru linux/arch/mips/mm/loadmmu.c.orig linux/arch/mips/mm/loadmmu.c
--- linux/arch/mips/mm/loadmmu.c.orig   Thu Jan 11 19:32:11 2001
+++ linux/arch/mips/mm/loadmmu.c        Thu Jan 11 19:48:06 2001
@@ -59,6 +59,11 @@
                printk("Loading MIPS32 MMU routines.\n");
                ld_mmu_mips32();
 #endif
+#if defined(CONFIG_CPU_RM7000)
+               printk("Loading RM7000 MMU routines.\n");
+               ld_mmu_rm7k();
+#endif
+
        } else switch(mips_cpu.cputype) {
 #ifdef CONFIG_CPU_R3000
        case CPU_R2000:
@@ -74,13 +79,6 @@
        case CPU_R5432:
                printk("Loading R5432 MMU routines.\n");
                ld_mmu_r5432();
-               break;
-#endif
-
-#if defined(CONFIG_CPU_RM7000)
-       case CPU_RM7000:
-               printk("Loading RM7000 MMU routines.\n");
-               ld_mmu_rm7k();
                break;
 #endif

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From:   "Kevin D. Kissell" <kevink@mips.com>
To:     "Jun Sun" <jsun@mvista.com>, <linux-mips@oss.sgi.com>
References: <3A5E7FFB.79925DF9@mvista.com>
Subject: Re: broken RM7000 in CVS ...
Date:   Fri, 12 Jan 2001 08:23:30 +0100
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Yes, arguably the mips_cpu structure could also contain
a descriptor of the MMU routines to bind, and it probably
would have if it would have been a simple matter of an
address/length of a vector to copy.  But heck, it could
be a function pointer as well, I suppose.

Anyway, I'm not surprised if there was something off
somewhere in the RM7000 descriptor.  I did a first
cut based on an old copy of the QED spec - I had no
hardware to test it on - and there was no pretention
of putting in full RM7000 support in the kernel when
I did the decriptor, it was more a matter of showing
what a 3-cache CPU would look like!

            Kevin K.

----- Original Message -----
From: "Jun Sun" <jsun@mvista.com>
To: <linux-mips@oss.sgi.com>
Sent: Friday, January 12, 2001 4:54 AM
Subject: broken RM7000 in CVS ...


>
> I saw mips_cpu structure is introduced to the CVS tree.  That is a really
good
> thing, although many places need to be improved.
>
> An initial try found the following bug.  There are probably more down the
> road. :-)
>
> Jun
>
> diff -Nru linux/arch/mips/mm/loadmmu.c.orig linux/arch/mips/mm/loadmmu.c
> --- linux/arch/mips/mm/loadmmu.c.orig   Thu Jan 11 19:32:11 2001
> +++ linux/arch/mips/mm/loadmmu.c        Thu Jan 11 19:48:06 2001
> @@ -59,6 +59,11 @@
>                 printk("Loading MIPS32 MMU routines.\n");
>                 ld_mmu_mips32();
>  #endif
> +#if defined(CONFIG_CPU_RM7000)
> +               printk("Loading RM7000 MMU routines.\n");
> +               ld_mmu_rm7k();
> +#endif
> +
>         } else switch(mips_cpu.cputype) {
>  #ifdef CONFIG_CPU_R3000
>         case CPU_R2000:
> @@ -74,13 +79,6 @@
>         case CPU_R5432:
>                 printk("Loading R5432 MMU routines.\n");
>                 ld_mmu_r5432();
> -               break;
> -#endif
> -
> -#if defined(CONFIG_CPU_RM7000)
> -       case CPU_RM7000:
> -               printk("Loading RM7000 MMU routines.\n");
> -               ld_mmu_rm7k();
>                 break;
>  #endif


From owner-linux-mips@oss.sgi.com Fri Jan 12 06:16:57 2001
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Subject: Re: O200 problem...
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On Tue, 9 Jan 2001, Ralf Baechle wrote:

> Thanks for sending the oops message; however without additional data
> provided I can't use it.  Can you please point please put the kernel image
> that resulted in the oops online?

http://lothar.penguinpowered.com/o200.tar.gz

You'll find everything in the archive: vmlinux, System.map, kernel
configuration file and a new session log with 'oops messages'.

Thanks,

--pm


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Subject: New to the list - is there a kernel available for O2s
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All,

New to the list, is there a kernel available for O2s.  I have about 11 O2s
and an O200 that I want to test with Linux.

Thanks

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From owner-linux-mips@oss.sgi.com Fri Jan 12 06:41:36 2001
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Cc:     "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>,
        linux-mips <linux-mips@fnet.fr>
Subject: Re: strace package
References: <3A5E75C4.2020203@redhat.com>
From:   Christoph Martin <martin@uni-mainz.de>
Date:   12 Jan 2001 15:40:59 +0100
In-Reply-To: Joe deBlaquiere's message of Thu, 11 Jan 2001 21:11:00 -0600
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Joe deBlaquiere <jadb@redhat.com> writes:

> 
> Has anybody done a port of strace for linux/mips 2.4??? I'm trying to 
> debug something and need something simple.
> -- 
> Joe deBlaquiere
> Red Hat, Inc.
> 307 Wynn Drive
> Huntsville AL, 35805
> voice : (256)-704-9257
> fax   : (256)-837-3839
> 

There is a debian package of strace for mips in
ftp://ftp.rfc822.org/pub/local/debian-mips/packages/. It is working
with linux 2.4.

C

-- 
============================================================================
Christoph Martin, Uni-Mainz, Germany
 Internet-Mail:  Christoph.Martin@Uni-Mainz.DE
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From owner-linux-mips@oss.sgi.com Fri Jan 12 07:11:37 2001
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From:	Ralf Baechle <ralf@oss.sgi.com>
To:	"Kelly, George" <George.Kelly@jacobs.com>
Cc:	linux-mips@oss.sgi.com
Subject: Re: New to the list - is there a kernel available for O2s
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On Fri, Jan 12, 2001 at 09:11:36AM -0500, Kelly, George wrote:

> New to the list, is there a kernel available for O2s.  I have about 11 O2s
> and an O200 that I want to test with Linux.

No kernel for O2 - yet.

  Ralf

From owner-linux-mips@oss.sgi.com Fri Jan 12 10:58:49 2001
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Subject: Re: broken RM7000 in CVS ...
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"Kevin D. Kissell" wrote:
> 
> Yes, arguably the mips_cpu structure could also contain
> a descriptor of the MMU routines to bind, and it probably
> would have if it would have been a simple matter of an
> address/length of a vector to copy.  But heck, it could
> be a function pointer as well, I suppose.
> 

I think that is a good idea.  I suggest we have two more pointers in the
mips_cpu strcuture : one to mips_mmu_ops structure, and the other to
setup_exception_vectors() function.

BTW, I have a question about MIPS32 (or 4KC).  Do all MIPS32 CPUs have the
same PRID?  Or all "incarnations" of 4KC have the same PRID?  I suppose MIPS32
CPUs have a more complete config register where you can probe for all the
options.  For others we can use a table-like structure to fill in the options.

Along this line, it probably makes sense to have another pointer to
mips_cpu_config() function, where for MIPS32 it is the standard MIPS32 config
probing function and for most others it is NULL.

Now the mips_cpu_table looks like :

struct mips_cpu mips_cpu_table[]={
	{ PRID_IMP_4KC, mips32_cpu_config},
	{ PRID_IMP_RM7K, null, 0xaaa, {...}}
	.....
};

The cpu_probe() routine will now look like:
{
   read prid register
   find mips_cpu_table[i] with matching PRID.
   mips_cpu = &mips_cpu_table[i];
   if (mips_cpu->mips_cpu_config) mips_cpu->mips_cpu_config();
}

To me this is beautiful. Am I dreaming? :-)

Jun

From owner-linux-mips@oss.sgi.com Fri Jan 12 11:16:49 2001
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From:   Justin Carlson <carlson@sibyte.com>
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To:     linux-mips@oss.sgi.com
Subject: Re: broken RM7000 in CVS ...
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On Fri, 12 Jan 2001, you wrote:
> I think that is a good idea.  I suggest we have two more pointers in the
> mips_cpu strcuture : one to mips_mmu_ops structure, and the other to
> setup_exception_vectors() function.
> 
> BTW, I have a question about MIPS32 (or 4KC).  Do all MIPS32 CPUs have the
> same PRID?  Or all "incarnations" of 4KC have the same PRID?  

No.  Mips32 defines PRID into 4 partitions: a company id, processor id,
revision id, and company options field.  

>I suppose MIPS32
> CPUs have a more complete config register where you can probe for all the
> options.  For others we can use a table-like structure to fill in the options.

This is sort of true.  Mips32 does do a pretty good job of defining how to
probe for L1 caches and the like, but other things, such as L2 caches, are not
going to be so easily probed.  I think the mmu_ops routines should continue
to be specialized on a per-processor basis, just because they are both quite
performance sensitive and relatively easy to write/maintain. 

> 
> Along this line, it probably makes sense to have another pointer to
> mips_cpu_config() function, where for MIPS32 it is the standard MIPS32 config
> probing function and for most others it is NULL.
> 
> Now the mips_cpu_table looks like :
> 
> struct mips_cpu mips_cpu_table[]={
> 	{ PRID_IMP_4KC, mips32_cpu_config},
> 	{ PRID_IMP_RM7K, null, 0xaaa, {...}}
> 	.....
> };

If I'm understanding your idea correctly, this table would require you to
always compile in all the mmu routines for all processors, just to fill in the
table entries.  Doesn't seem like a particularly good idea to me, even if we
could use generic mips32 routines for most parts.  

> The cpu_probe() routine will now look like:
> {
>    read prid register
>    find mips_cpu_table[i] with matching PRID.
>    mips_cpu = &mips_cpu_table[i];
>    if (mips_cpu->mips_cpu_config) mips_cpu->mips_cpu_config();
> }
> 
> To me this is beautiful. Am I dreaming? :-)

See objections above.

I did submit a patch to Ralf a couple weeks ago to fix cpu_probe so it 
checks PRID according to the mips32 spec, but never heard back, and haven't
seen it show up in CVS.  WIll try again sometime soon, methinks.

-Justin


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Subject: Re: broken RM7000 in CVS ...
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> "Kevin D. Kissell" wrote:
> >
> > Yes, arguably the mips_cpu structure could also contain
> > a descriptor of the MMU routines to bind, and it probably
> > would have if it would have been a simple matter of an
> > address/length of a vector to copy.  But heck, it could
> > be a function pointer as well, I suppose.
> >
>
> I think that is a good idea.  I suggest we have two more pointers in the
> mips_cpu strcuture : one to mips_mmu_ops structure, and the other to
> setup_exception_vectors() function.
>
> BTW, I have a question about MIPS32 (or 4KC).  Do all MIPS32 CPUs have the
> same PRID?

No.

> Or all "incarnations" of 4KC have the same PRID?

The same upper 24 bits, anyway.

> I suppose MIPS32 CPUs have a more complete config register where you can
> probe for all the options.  For others we can use a table-like structure
to fill in
> the options.

And thereby hangs a tale.  MIPS tweaked the Config register, and has
added additional registers "behind" the Config register (a previously
reserved zero field in the mtc0/mfc0 instructions now serves as a
sort of bank select, and most current gnu assemblers recognize
"mfc0 $2, 16, 1", etc.) in MIPS32 to allow MMU and cache configuration,
presence of FPU, etc, to be read at run-time.  This is important for
synthesizable cores like the 4K and 5K families, since the same
basic core (and hence same PrID) can be instantiated with different
cache geometries, etc.  So one of the first things we did was write
code that reads those registers and populates the mips_cpu structure
accordingly.  Unfortunately, we were ahead of our time!  At the time
we needed to ship our Linux kernel tweaks to people outside MIPS,
those parts of the MIPS32 spec were still confidential, so we had
to take them out and make the 4K and 5K revert to using the same
table as everyone else!   I believe we got the all-clear to put the code
back in some time ago, but Carsten and I have been too busy with
other stuff.  Sorry!

> Along this line, it probably makes sense to have another pointer to
> mips_cpu_config() function, where for MIPS32 it is the standard MIPS32
config
> probing function and for most others it is NULL.

It probably wouldn't be NULL.   One would still want a routine
that probes for the size of the caches if the table indicates that
it could be variable for that device.  Etc.
>
> Now the mips_cpu_table looks like :
>
> struct mips_cpu mips_cpu_table[]={
> { PRID_IMP_4KC, mips32_cpu_config},
> { PRID_IMP_RM7K, null, 0xaaa, {...}}
> .....
> };
>
> The cpu_probe() routine will now look like:
> {
>    read prid register
>    find mips_cpu_table[i] with matching PRID.
>    mips_cpu = &mips_cpu_table[i];
>    if (mips_cpu->mips_cpu_config) mips_cpu->mips_cpu_config();

Dispatching through the table to the config routine would
be possible, but unless you want to write a seperate routine
for every possible set of CPU parameters and options, it would
be preferrable (IMHO) to keep the parameters in the table
and to pass the table entry address to the function being
invoked.  That way some smaller number of common functions
could be used.

> }
>
> To me this is beautiful. Am I dreaming? :-)

Not unless you are asleep.  If you're awake, we
call that hallucinating.  ;-)

            Regards,

            Kevin K.


From owner-linux-mips@oss.sgi.com Fri Jan 12 12:28:10 2001
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Subject: Re: broken RM7000 in CVS ...
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Justin Carlson wrote:
> 
> This is sort of true.  Mips32 does do a pretty good job of defining how to
> probe for L1 caches and the like, but other things, such as L2 caches, are not
> going to be so easily probed.  

My understanding is that we don't have a standard way to probe for external
cache (L2 or L3).  So this problem is not only for MIPS32 cpus.

One possible fix is to have board-specific setup routine fill in the needed
data in the mipc_cpu structure, although I am not sure if that is a little too
late in the startup process.  (I think at least one flush_cache call is made
before we reach board_setup() routine).

Jun

> >
> > Along this line, it probably makes sense to have another pointer to
> > mips_cpu_config() function, where for MIPS32 it is the standard MIPS32 config
> > probing function and for most others it is NULL.
> >
> > Now the mips_cpu_table looks like :
> >
> > struct mips_cpu mips_cpu_table[]={
> >       { PRID_IMP_4KC, mips32_cpu_config},
> >       { PRID_IMP_RM7K, null, 0xaaa, {...}}
> >       .....
> > };
> 
> If I'm understanding your idea correctly, this table would require you to
> always compile in all the mmu routines for all processors, just to fill in the
> table entries.  Doesn't seem like a particularly good idea to me, even if we
> could use generic mips32 routines for most parts.
>

Each table entry can be surrounded by something like #if
defined(CONFIG_CPU_RM7000) and #endif.  That should take care of the problem.

 
Jun

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On Fri, 12 Jan 2001, you wrote:
> Justin Carlson wrote:
> > 
> > This is sort of true.  Mips32 does do a pretty good job of defining how to
> > probe for L1 caches and the like, but other things, such as L2 caches, are not
> > going to be so easily probed.  
> 
> My understanding is that we don't have a standard way to probe for external
> cache (L2 or L3).  So this problem is not only for MIPS32 cpus.
> 

It's not specific to mips32 processors, no.  My point was, the mips32 spec
doesn't (and probably shouldn't, IMHO) solve this problem completely.

> > If I'm understanding your idea correctly, this table would require you to
> > always compile in all the mmu routines for all processors, just to fill in the
> > table entries.  Doesn't seem like a particularly good idea to me, even if we
> > could use generic mips32 routines for most parts.
> >
> 
> Each table entry can be surrounded by something like #if
> defined(CONFIG_CPU_RM7000) and #endif.  That should take care of the problem.
> 

Not if you want to have constant-defined offsets into the table.  Which is just
about the only reason to use a table for this...Either:

1)  You've got multiple entries in the table for different cpus, which you're
indexing by some hash of PRID fields.  This requires a full table.  (Or a really
ugly hash function that's adaptive depending on which which cpu support is
compiled in)

2)  You've got a single entry table.  

Unless I'm really misunderstanding what you're proposing...

-Justin

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Justin Carlson wrote:
> 
> On Fri, 12 Jan 2001, you wrote:
> > > If I'm understanding your idea correctly, this table would require you to
> > > always compile in all the mmu routines for all processors, just to fill in the
> > > table entries.  Doesn't seem like a particularly good idea to me, even if we
> > > could use generic mips32 routines for most parts.
> > >
> >
> > Each table entry can be surrounded by something like #if
> > defined(CONFIG_CPU_RM7000) and #endif.  That should take care of the problem.
> >
> 
> Not if you want to have constant-defined offsets into the table.  Which is just
> about the only reason to use a table for this...Either:
> 

No, I am thinking to have constant-defined offset into the table.  Instead, I
am thinking to do a linear search of the table and find a matching entry based
on the PRID.

Without table, I can see two alternatives, 1) switch/case statement to fill in
the data by statements (which is the current case) or 2) for each CPU
(protected by #ifdef CONFIG_) we define a mips_cpu struct.

I guess I just like table better than switch/case statements.  Table seems
cleaner to me.

I like table over option 2) because it is possible to build a kernel that
supports multiple CPUs.

> 1)  You've got multiple entries in the table for different cpus, which you're
> indexing by some hash of PRID fields.  This requires a full table.  (Or a really
> ugly hash function that's adaptive depending on which which cpu support is
> compiled in)
> 
> 2)  You've got a single entry table.
> 

In practice most tables probably only have single entry (due to the config),
but I guess that is OK.


Jun

From owner-linux-mips@oss.sgi.com Fri Jan 12 13:56:20 2001
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On Fri, 12 Jan 2001, you wrote:> Justin Carlson wrote:
> > Not if you want to have constant-defined offsets into the table.  Which is just
> > about the only reason to use a table for this...Either:
> > 
> 
> No, I am thinking to have constant-defined offset into the table.  Instead, I
> am thinking to do a linear search of the table and find a matching entry based
> on the PRID.
> 
> Without table, I can see two alternatives, 1) switch/case statement to fill in
> the data by statements (which is the current case) or 2) for each CPU
> (protected by #ifdef CONFIG_) we define a mips_cpu struct.
> 
> I guess I just like table better than switch/case statements.  Table seems
> cleaner to me.

You're not going to get rid of the big switch statement for older (non mips32)
processors because of the specialized checks to refine steppings, etc. 
as it is. 

I still would rather stick to the switch style of doing things in the future,
though, because it's a bit more flexible; if you've got companies that fix
errata without stepping PrID revisions or some such, then the table's going to
have some strange special cases that don't quite fit.

But this is much more workable than what I *thought* you were proposing.  And
not worth nearly as much trouble as I've been giving you over it.    

Luckily, in the end, you have to convince saner people than me.  :)

-Justin

From owner-linux-mips@oss.sgi.com Fri Jan 12 14:23:31 2001
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Justin Carlson wrote:
> 
 
> I still would rather stick to the switch style of doing things in the future,
> though, because it's a bit more flexible; if you've got companies that fix
> errata without stepping PrID revisions or some such, then the table's going to
> have some strange special cases that don't quite fit.
> 

Ahh, in that case I suppose the mips_cpu_config function pointer in that entry
should not be NULL.  Instead it should modify the mips_cpu struct to fix
whatever quirks there.  Because this function is associated with a particular
CPU, this solution is probably cleaner than having all the quirk fixes
embedded inside a case block.

> 
> Luckily, in the end, you have to convince saner people than me.  :)
> 

Or I should wake up from hallucination.  :-)

Jun

From owner-linux-mips@oss.sgi.com Fri Jan 12 15:47:40 2001
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Subject: Re: broken RM7000 in CVS ...
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> My understanding is that we don't have a standard way to probe for external
> cache (L2 or L3).  So this problem is not only for MIPS32 cpus.

Cache is very arch specific. You don't want to know how you find L2 cache
on a MacII for example 8)



From owner-linux-mips@oss.sgi.com Sat Jan 13 11:40:16 2001
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Date:   Sat, 13 Jan 2001 22:29:03 -0500
From:   Nicu Popovici <octavp@isratech.ro>
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Hello ,

I am struggling to get glibc 2.1.3 working for mips. I have to do this
so please not redirect me to another glibc. I did a diff between glibc
2.0.6 for mips and glibc 2.1.3 and now I applied the patch obtained on
glibc 2.1.3 . At make I get the following error and I don't know what to
do. Maybe someone will help me.

Here is the error

=====================================================================
 (libs='libpthread.so.0 libpthread.so.0 libm.so.6 libc.so.6 ld.so.1
libdl.so.2 libutil.so.1 libresolv.so.2 libnss_files.so.2 libnss
_dns.so.2 libnss_db.so.2 libnss_compat.so.2 libnss_nis.so.2
libnss_nisplus.so.2 libnss_ldap.so.2 libnss_hesiod.so.2 libnsl.so.1 lib
db.so.3 libdb1.so.2 libcrypt.so.1 libBrokenLocale.so.1 librt.so.1';\
  for l in $libs; do \
               'ABCDEFGHIJKLMNOPQRSTUVWXYZ_'`; \
    echo "#define       ${upname}_SO    \"$l\""; \
  done;) | sort; \
 echo; \
 echo '#endif   /* gnu/lib-names.h */';) >
/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/gnu/lib-names.T
/bin/sh ../scripts/move-if-change
/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/gnu/lib-names.T
/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/gnu/lib-names.h
touch
/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/gnu/lib-names.stmp

.././scripts/mkinstalldirs
/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/csu
rm -f
/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/csu/abi-tag.h.new
sed -e 's/#.*$//' -e '/^[       ]*$/d' ../abi-tags | \
while read conf tag; do \
  test `expr 'mips-mips-linux-gnu' \
             : "$conf"` != 0 || continue; \
  echo "$tag" | \
  sed -e 's/[^0-9xXa-fA-F]/ /g' -e 's/ *$//' \
      -e 's/ /,/g' -e 's/^ */#define ABI_TAG /' >
/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/csu/abi-tag.h.new;
\
done
if test -r
/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/csu/abi-tag.h.new;
then mv -f
/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/csu/abi-tag.h.new
/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/csu/abi-tag.h; \
else echo >&2 'This configuration not matched in ../abi-tags'; exit 1;
fi
make[2]: *** No rule to make target `../posix/posix1_lim.h', needed by
`/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/mk-stdiolim'.
Stop.
make[2]: Leaving directory
`/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc-2.1.3/csu'
make[1]: *** [csu/subdir_lib] Error 2
make[1]: Leaving directory
`/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc-2.1.3'
make: *** [all] Error 2

=======================================================================

Nicu


From owner-linux-mips@oss.sgi.com Sat Jan 13 13:21:18 2001
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>>>>> Nicu Popovici writes:

 > Hello ,
 > I am struggling to get glibc 2.1.3 working for mips. I have to do this
 > so please not redirect me to another glibc. I did a diff between glibc
 > 2.0.6 for mips and glibc 2.1.3 and now I applied the patch obtained on
 > glibc 2.1.3 . At make I get the following error and I don't know what to
 > do. Maybe someone will help me.

You just can't apply the patch from 2.0.6 to 2.1.3 without any changes
- and you also want to check how I've done it for glibc 2.2.1.  To
much has changed in between and 2.0.6 might just be a basis for you.

Andreas
-- 
 Andreas Jaeger
  SuSE Labs aj@suse.de
   private aj@arthur.inka.de
    http://www.suse.de/~aj

From owner-linux-mips@oss.sgi.com Sun Jan 14 09:30:38 2001
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I would think the 2.1.95 version of glibc from sgi would be much closer 
to 2.1.3 than the 2.0.6/7 versions are.

Nicu Popovici wrote:

> Hello ,
> 
> I am struggling to get glibc 2.1.3 working for mips. I have to do this
> so please not redirect me to another glibc. I did a diff between glibc
> 2.0.6 for mips and glibc 2.1.3 and now I applied the patch obtained on
> glibc 2.1.3 . At make I get the following error and I don't know what to
> do. Maybe someone will help me.
> 
> Here is the error
> 
> =====================================================================
>  (libs='libpthread.so.0 libpthread.so.0 libm.so.6 libc.so.6 ld.so.1
> libdl.so.2 libutil.so.1 libresolv.so.2 libnss_files.so.2 libnss
> _dns.so.2 libnss_db.so.2 libnss_compat.so.2 libnss_nis.so.2
> libnss_nisplus.so.2 libnss_ldap.so.2 libnss_hesiod.so.2 libnsl.so.1 lib
> db.so.3 libdb1.so.2 libcrypt.so.1 libBrokenLocale.so.1 librt.so.1';\
>   for l in $libs; do \
>                'ABCDEFGHIJKLMNOPQRSTUVWXYZ_'`; \
>     echo "#define       ${upname}_SO    \"$l\""; \
>   done;) | sort; \
>  echo; \
>  echo '#endif   /* gnu/lib-names.h */';) >
> /home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/gnu/lib-names.T
> /bin/sh ../scripts/move-if-change
> /home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/gnu/lib-names.T
> /home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/gnu/lib-names.h
> touch
> /home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/gnu/lib-names.stmp
> 
> ..././scripts/mkinstalldirs
> /home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/csu
> rm -f
> /home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/csu/abi-tag.h.new
> sed -e 's/#.*$//' -e '/^[       ]*$/d' ../abi-tags | \
> while read conf tag; do \
>   test `expr 'mips-mips-linux-gnu' \
>              : "$conf"` != 0 || continue; \
>   echo "$tag" | \
>   sed -e 's/[^0-9xXa-fA-F]/ /g' -e 's/ *$//' \
>       -e 's/ /,/g' -e 's/^ */#define ABI_TAG /' >
> /home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/csu/abi-tag.h.new;
> \
> done
> if test -r
> /home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/csu/abi-tag.h.new;
> then mv -f
> /home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/csu/abi-tag.h.new
> /home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/csu/abi-tag.h; \
> else echo >&2 'This configuration not matched in ../abi-tags'; exit 1;
> fi
> make[2]: *** No rule to make target `../posix/posix1_lim.h', needed by
> `/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc_build/mk-stdiolim'.
> Stop.
> make[2]: Leaving directory
> `/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc-2.1.3/csu'
> make[1]: *** [csu/subdir_lib] Error 2
> make[1]: Leaving directory
> `/home/nicu/JUNGO/work/glibc2.1.3-the_rest/glibc-2.1.3'
> make: *** [all] Error 2
> 
> =======================================================================
> 
> Nicu


-- 
Joe deBlaquiere
Red Hat, Inc.
307 Wynn Drive
Huntsville AL, 35805
voice : (256)-704-9200
fax   : (256)-837-3839


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Subject: pthread_sighander() of glibc-2.2 breaks stack
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Hello Andreas,

I had a experience that pthread_sighander() of current glibc-2.2 
breaks stack. I tracked down the problem, and finally found the
mismatch  between kenrel and glibc-2.2. 

Current kernel pass following args to the signal handler for the 
case of not SA_SIGINFO specified.
	a0	signal number
	a1	0 (cause code?)
	a2	pointer to sigcontext struct

But, the pthread_sighander() of glibc-2.2 expects;
	1st arg.	signal number
	2nd arg.	sigcontext struct itself (not pointer)

Patches attached below. Please apply.

Thanks.

---
Hiroyuki Machida
Creative Station		SCE Inc.


=== ChangeLog entry.

   * sysdeps/unix/sysv/linux/mips/register-dump.h (REGISTER_DUMP):
    Change type of CTX to (struct sigcontext *).

   * sysdeps/unix/sysv/linux/mips/sigcontextinfo.h (GET_PC): Likewise.
    (GET_FRAME): Likewise (GET_STACK): Likewise.
    (SIGCONTEXT): Likewise. Add 2nd arg _CODE.
    (SIGCONTEXT_EXTRA_ARGS): Add 2nd arg _CODE.


===================================================================
--- sysdeps/unix/sysv/linux/mips/register-dump.h.ORG	2000/10/25 05:00:53	1.1
+++ sysdeps/unix/sysv/linux/mips/register-dump.h	2001/01/12 13:03:30	1.2
@@ -105,4 +105,4 @@ register_dump (int fd, struct sigcontext
 }
 
 
-#define REGISTER_DUMP register_dump (fd, &ctx)
+#define REGISTER_DUMP register_dump (fd, ctx)
===================================================================
--- sysdeps/unix/sysv/linux/mips/sigcontextinfo.h.ORG	2000/10/25 05:00:53	1.1
+++ sysdeps/unix/sysv/linux/mips/sigcontextinfo.h	2001/01/12 13:03:31	1.2
@@ -18,8 +18,8 @@
    Boston, MA 02111-1307, USA.  */
 
 
-#define SIGCONTEXT struct sigcontext
-#define SIGCONTEXT_EXTRA_ARGS
-#define GET_PC(ctx)	((void *) ctx.sc_pc)
-#define GET_FRAME(ctx)	((void *) ctx.sc_regs[30])
-#define GET_STACK(ctx)	((void *) ctx.sc_regs[29])
+#define SIGCONTEXT unsigned long _code, struct sigcontext *
+#define SIGCONTEXT_EXTRA_ARGS _code,
+#define GET_PC(ctx)	((void *) ctx->sc_pc)
+#define GET_FRAME(ctx)	((void *) ctx->sc_regs[30])
+#define GET_STACK(ctx)	((void *) ctx->sc_regs[29])


From owner-linux-mips@oss.sgi.com Sun Jan 14 22:33:26 2001
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Date:   Mon, 15 Jan 2001 07:31:57 +0100 (MET)
From:   Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
To:     Justin Carlson <carlson@sibyte.com>
cc:     linux-mips@oss.sgi.com
Subject: Re: broken RM7000 in CVS
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On Fri, 12 Jan 2001, Justin Carlson wrote:
> I still would rather stick to the switch style of doing things in the future,
> though, because it's a bit more flexible; if you've got companies that fix
> errata without stepping PrID revisions or some such, then the table's going to
> have some strange special cases that don't quite fit.
> 
> But this is much more workable than what I *thought* you were proposing.  And
> not worth nearly as much trouble as I've been giving you over it.    

Then don't use a probe table, but a switch based CPU detection routine that
fills in a table of function pointers. So you need the switch only once.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven ------------- Sony Software Development Center Europe (SDCE)
Geert.Uytterhoeven@sonycom.com ------------------- Sint-Stevens-Woluwestraat 55
Voice +32-2-7248626 Fax +32-2-7262686 ---------------- B-1130 Brussels, Belgium


From owner-linux-mips@oss.sgi.com Sun Jan 14 23:10:45 2001
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Subject: Re: pthread_sighander() of glibc-2.2 breaks stack
References: <20010115152011L.machida@sm.sony.co.jp>
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>>>>> Hiroyuki Machida writes:

 > Hello Andreas,

 > I had a experience that pthread_sighander() of current glibc-2.2 
 > breaks stack. I tracked down the problem, and finally found the
 > mismatch  between kenrel and glibc-2.2. 

 > Current kernel pass following args to the signal handler for the 
 > case of not SA_SIGINFO specified.
 > 	a0	signal number
 > 	a1	0 (cause code?)
 > 	a2	pointer to sigcontext struct

 > But, the pthread_sighander() of glibc-2.2 expects;
 > 	1st arg.	signal number
 > 	2nd arg.	sigcontext struct itself (not pointer)

 > Patches attached below. Please apply.

Thanks, I've committed them,

Andreas
-- 
 Andreas Jaeger
  SuSE Labs aj@suse.de
   private aj@arthur.inka.de
    http://www.suse.de/~aj

From owner-linux-mips@oss.sgi.com Mon Jan 15 00:38:36 2001
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From:	Ralf Baechle <ralf@oss.sgi.com>
To:	Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc:	jsun@mvista.com (Jun Sun), carlson@sibyte.com,
        linux-mips@oss.sgi.com
Subject: Re: broken RM7000 in CVS ...
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On Fri, Jan 12, 2001 at 11:48:50PM +0000, Alan Cox wrote:

> > My understanding is that we don't have a standard way to probe for external
> > cache (L2 or L3).  So this problem is not only for MIPS32 cpus.
> 
> Cache is very arch specific. You don't want to know how you find L2 cache
> on a MacII for example 8)

Actually the Indy's R4600 / R5000 second level caches also call for the use
of LARTs in a while (1) loop ;-)  Read the generic code had to be changed
in order to support in a sane way.

  Ralf

From owner-linux-mips@oss.sgi.com Mon Jan 15 00:43:06 2001
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To:	"Kevin D. Kissell" <kevink@mips.com>
Cc:	"Jun Sun" <jsun@mvista.com>, <linux-mips@oss.sgi.com>
Subject: Re: broken RM7000 in CVS ...
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On Fri, Jan 12, 2001 at 08:42:24PM +0100, Kevin D. Kissell wrote:

> And thereby hangs a tale.  MIPS tweaked the Config register, and has
> added additional registers "behind" the Config register (a previously
> reserved zero field in the mtc0/mfc0 instructions now serves as a
> sort of bank select, and most current gnu assemblers recognize
> "mfc0 $2, 16, 1", etc.) in MIPS32 to allow MMU and cache configuration,

Do you know when the ability to address the additional register banks got
added to gas?  I'd like to get rid of the sucky .word <opcode> thing we're
using right now to address the additional register banks.

  Ralf

From owner-linux-mips@oss.sgi.com Mon Jan 15 07:04:12 2001
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does anyone have, or know where i could get, a front bezel to a Sony
GDM-20D11 monitor for my Indy. i need two actually.

Thanks

From owner-linux-mips@oss.sgi.com Mon Jan 15 09:11:13 2001
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From:   Florian Lohoff <flo@rfc822.org>
To:     linux-mips@oss.sgi.com
Subject: crash in __alloc_bootmem_core on SGI current cvs
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Hi,
the current cvs kernel crashes in __alloc_bootmem_core here:

[...]
        printk("%s, %d memset %p 0 %d\n", __FUNCTION__, __LINE__, ret, size);
        memset(ret, 0, size);
        printk("%s, %d\n", __FUNCTION__, __LINE__);
        return ret;
[...]

Output coming:

__alloc_bootmem_core, 230
__alloc_bootmem_core, 234 memset 81000000 0 36864

I guess this is really bogus as the ARCS MEMORY debug gives:

[0,a8748da0]: base<00000000> pages<00000001> type<Exception Block>              
[1,a8748dbc]: base<00000001> pages<00000001> type<ARCS Romvec Page>             
[2,a8748d84]: base<00008002> pages<00000173> type<Standlong Program Pages>      
[3,a87491cc]: base<00008175> pages<000005cb> type<Generic Free RAM>             
[4,a874919c]: base<00008740> pages<000000c0> type<ARCS Temp Storage Area>       
[5,a8749180]: base<00008800> pages<00007800> type<Generic Free RAM>            

Might this be the sgi/arc bootmem/memory.c doesnt alloc everything
or frees to much ?

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Mon Jan 15 10:46:04 2001
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Geert Uytterhoeven wrote:
> 
> On Fri, 12 Jan 2001, Justin Carlson wrote:
> > I still would rather stick to the switch style of doing things in the future,
> > though, because it's a bit more flexible; if you've got companies that fix
> > errata without stepping PrID revisions or some such, then the table's going to
> > have some strange special cases that don't quite fit.
> >
> > But this is much more workable than what I *thought* you were proposing.  And
> > not worth nearly as much trouble as I've been giving you over it.
> 
> Then don't use a probe table, but a switch based CPU detection routine that
> fills in a table of function pointers. So you need the switch only once.
> 

Geert,

Is there some concerns about using table?

mips_cpu structure is probably a mixture of data and function pointers.  To
use a switch statement, one either supplies a function which will fill out the
rest of member data in the structure, or fills in all the member data in the
case block.  Compared with the table solution, the former case is too
restricting (it mandates every CPU has its own "setup" routine") and the later
case is less clean-looking.

Performance-wise table should be basically identical to switch statements.  It
is a linear search of some integers (PrID).

Jun

From owner-linux-mips@oss.sgi.com Mon Jan 15 12:06:06 2001
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Date:   Mon, 15 Jan 2001 21:05:08 +0100 (MET)
From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Jun Sun <jsun@mvista.com>
cc:     Joe deBlaquiere <jadb@redhat.com>,
        "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>,
        linux-mips <linux-mips@fnet.fr>
Subject: Re: strace package
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On Thu, 11 Jan 2001, Jun Sun wrote:

> strace is included in the MontaVista HHL distribution.  You can find the rpm
> and srpm under ftp.mvista.com/pub/CDK?? and/or ftp.mvista.com/pub/area51.

 Thanks for the pointer.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Jan 15 12:11:57 2001
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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Christoph Martin <martin@uni-mainz.de>
cc:     Joe deBlaquiere <jadb@redhat.com>,
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On 12 Jan 2001, Christoph Martin wrote:

> There is a debian package of strace for mips in
> ftp://ftp.rfc822.org/pub/local/debian-mips/packages/. It is working
> with linux 2.4.

 And the sources are at...?

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Jan 15 13:21:37 2001
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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Florian Lohoff <flo@rfc822.org>
cc:     linux-mips@oss.sgi.com
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Mon, 15 Jan 2001, Florian Lohoff wrote:

> the current cvs kernel crashes in __alloc_bootmem_core here:
> 
> [...]
>         printk("%s, %d memset %p 0 %d\n", __FUNCTION__, __LINE__, ret, size);
>         memset(ret, 0, size);
>         printk("%s, %d\n", __FUNCTION__, __LINE__);
>         return ret;
> [...]
> 
> Output coming:
> 
> __alloc_bootmem_core, 230
> __alloc_bootmem_core, 234 memset 81000000 0 36864
> 
> I guess this is really bogus as the ARCS MEMORY debug gives:
> 
> [0,a8748da0]: base<00000000> pages<00000001> type<Exception Block>              
> [1,a8748dbc]: base<00000001> pages<00000001> type<ARCS Romvec Page>             
> [2,a8748d84]: base<00008002> pages<00000173> type<Standlong Program Pages>      
> [3,a87491cc]: base<00008175> pages<000005cb> type<Generic Free RAM>             
> [4,a874919c]: base<00008740> pages<000000c0> type<ARCS Temp Storage Area>       
> [5,a8749180]: base<00008800> pages<00007800> type<Generic Free RAM>            
> 
> Might this be the sgi/arc bootmem/memory.c doesnt alloc everything
> or frees to much ?

 Thanks for a useful report.  I am the responsible person, it would seem,
as I've rewritten the bootmem allocation code recently to make it
consistent across all the subports and more flexible as well.  I could 
only test the DECstation code so it's possible I screwed up things
elsewhere.  I'll look at the code and I'll provide a patch, either a fix,
if I am able to develop it immediately or some debugging code otherwise.

 As I see prink() works for you could you please also check and report the
memory map as found by the kernel, i.e. the lines output after "Determined
physical RAM map:", if any?  The code is executed very early, before an
actual allocation takes place, so it should run regardless.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Jan 15 22:12:08 2001
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From:	Ralf Baechle <ralf@oss.sgi.com>
To:	Predrag Malicevic <pmalic@blic.net>
Cc:	<linux-mips@oss.sgi.com>
Subject: Re: O200 problem...
Message-ID: <20010116041028.B2068@bacchus.dhis.org>
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On Fri, Jan 12, 2001 at 03:20:25PM +0100, Predrag Malicevic wrote:

> > Thanks for sending the oops message; however without additional data
> > provided I can't use it.  Can you please point please put the kernel image
> > that resulted in the oops online?
> 
> http://lothar.penguinpowered.com/o200.tar.gz
> 
> You'll find everything in the archive: vmlinux, System.map, kernel
> configuration file and a new session log with 'oops messages'.

I just examined your crash data; it's not obvious why what is causing the
DBE exception that is making your kernel die.  It seems to happen in
the SCSI code; I wonder if any of the devices you have on the SCSI bus
especially on the second hostadapter is making the Qlogic driver go nuts.

Can you retry your kernel with devices from this bus removed?

Thanks,

  Ralf

From owner-linux-mips@oss.sgi.com Mon Jan 15 22:47:59 2001
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From:   Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
To:     Jun Sun <jsun@mvista.com>
cc:     Justin Carlson <carlson@sibyte.com>, linux-mips@oss.sgi.com
Subject: Re: broken RM7000 in CVS
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On Mon, 15 Jan 2001, Jun Sun wrote:
> Geert Uytterhoeven wrote:
> > On Fri, 12 Jan 2001, Justin Carlson wrote:
> > > I still would rather stick to the switch style of doing things in the future,
> > > though, because it's a bit more flexible; if you've got companies that fix
> > > errata without stepping PrID revisions or some such, then the table's going to
> > > have some strange special cases that don't quite fit.
> > >
> > > But this is much more workable than what I *thought* you were proposing.  And
> > > not worth nearly as much trouble as I've been giving you over it.
> > 
> > Then don't use a probe table, but a switch based CPU detection routine that
> > fills in a table of function pointers. So you need the switch only once.
> 
> Is there some concerns about using table?
> 
> mips_cpu structure is probably a mixture of data and function pointers.  To
> use a switch statement, one either supplies a function which will fill out the
> rest of member data in the structure, or fills in all the member data in the
> case block.  Compared with the table solution, the former case is too
> restricting (it mandates every CPU has its own "setup" routine") and the later
> case is less clean-looking.
> 
> Performance-wise table should be basically identical to switch statements.  It
> is a linear search of some integers (PrID).

Yes. But the advantage of the switch (`code table') over a data table is that
you can easier incorporate tests for special cases.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven ------------- Sony Software Development Center Europe (SDCE)
Geert.Uytterhoeven@sonycom.com ------------------- Sint-Stevens-Woluwestraat 55
Voice +32-2-7248626 Fax +32-2-7262686 ---------------- B-1130 Brussels, Belgium


From owner-linux-mips@oss.sgi.com Mon Jan 15 23:15:29 2001
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From:	Ralf Baechle <ralf@oss.sgi.com>
To:	Quinn Jensen <jensenq@Lineo.COM>
Cc:	Erik Andersen <andersen@Lineo.COM>,
        Michael Shmulevich <michaels@jungo.com>,
        busybox@opensource.lineo.com,
        "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Subject: Re: [BusyBox] 0.48 - Can't mount /proc
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On Thu, Jan 11, 2001 at 08:52:08AM -0700, Quinn Jensen wrote:

> Here's a kernel patch.  The __access_ok macro looks one byte
> too far and fails.  Since copy_mount_options() isn't
> sure how long the string arguments are, it just copies
> to the end of the page.  Since this is on busybox's
> stack, the copy wants to go all the way to 0x7FFFFFF
> and hits this corner case.

I don't like this solution as it inflates the kernel noticably.  Actually
even the bug itself hasn't been one; this off by one mistake was deliberatly
accepted in the - obviously wrong - assumption that nobody would ever try to
use the last byte of userspace.  See also the Alpha variant of the code;
looks like they suffer from the same problem.

My solution will be to truncate userspace by by at least 4kb.  I've choosen
to even truncate it by 32kb; this will also make the layout of the address
space for 32-bit processes on 64-bit kernels and 32-bit kernel identical
again.

  Ralf

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On Mon, Jan 15, 2001 at 10:21:27PM +0100, Maciej W. Rozycki wrote:

>  As I see prink() works for you could you please also check and report the
> memory map as found by the kernel, i.e. the lines output after "Determined
> physical RAM map:", if any?  The code is executed very early, before an
> actual allocation takes place, so it should run regardless.

Apropos printk, could port maintainers look into
arch/mips64/sgi-27/ip27-console.c.  It has some code which enables the
kernel to use printk already during the very early kernel startup.  I
found this capability to be invaluable and think others will also want
to have it without the uglyness of having a separate function for
early printing such as prom_printf.  I already have such a patch for
the Indy but not for other systems.

  Ralf

From owner-linux-mips@oss.sgi.com Tue Jan 16 00:14:19 2001
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Cc:	Christoph Martin <martin@uni-mainz.de>,
        Joe deBlaquiere <jadb@redhat.com>,
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On Mon, Jan 15, 2001 at 09:11:24PM +0100, Maciej W. Rozycki wrote:

> > There is a debian package of strace for mips in
> > ftp://ftp.rfc822.org/pub/local/debian-mips/packages/. It is working
> > with linux 2.4.
> 
>  And the sources are at...?

See strace.sourceforge.net.

  Ralf

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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Ralf Baechle <ralf@oss.sgi.com>
cc:     Christoph Martin <martin@uni-mainz.de>,
        Joe deBlaquiere <jadb@redhat.com>,
        "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>,
        linux-mips <linux-mips@fnet.fr>
Subject: Re: strace package
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On Tue, 16 Jan 2001, Ralf Baechle wrote:

> > > There is a debian package of strace for mips in
> > > ftp://ftp.rfc822.org/pub/local/debian-mips/packages/. It is working
> > > with linux 2.4.
> > 
> >  And the sources are at...?
> 
> See strace.sourceforge.net.

 I mean patches for MIPS, of course.  Strace 4.2 does not work for MIPS
out of the box.  The proper source still appears to be
http://www.liacs.nl/~wichert/strace/, BTW. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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To:     "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc:     linux-mips@oss.sgi.com
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Mon, Jan 15, 2001 at 10:21:27PM +0100, Maciej W. Rozycki wrote:
>  Thanks for a useful report.  I am the responsible person, it would seem,
> as I've rewritten the bootmem allocation code recently to make it
> consistent across all the subports and more flexible as well.  I could 
> only test the DECstation code so it's possible I screwed up things
> elsewhere.  I'll look at the code and I'll provide a patch, either a fix,
> if I am able to develop it immediately or some debugging code otherwise.
> 
>  As I see prink() works for you could you please also check and report the
> memory map as found by the kernel, i.e. the lines output after "Determined
> physical RAM map:", if any?  The code is executed very early, before an
> actual allocation takes place, so it should run regardless.

Ok - when i do this ...

Index: arch/mips/arc/memory.c
===================================================================
RCS file: /cvs/linux/arch/mips/arc/memory.c,v
retrieving revision 1.17
diff -u -r1.17 memory.c
--- arch/mips/arc/memory.c	2001/01/03 18:15:24	1.17
+++ arch/mips/arc/memory.c	2001/01/16 13:53:45
@@ -120,7 +120,7 @@
 		unsigned long base, size;
 		long type;
 
-		base = __pa(p->base << PAGE_SHIFT);	/* Fix up from KSEG0 */
+		base = p->base << PAGE_SHIFT;
 		size = p->pages << PAGE_SHIFT;
 		type = prom_memtype_classify(p->type);


I get further down the road with memory initialisation.

Also the pages no in zone(0) looks much saner:

Before:
	On node 0 totalpages: 589824
	zone(0): 589824 pages.


After:
	On node 0 totalpages: 65536
	zone(0): 65536 pages.

Later on it crashes with:

[...]

start_kernel, 541
start_kernel, 543
Calibrating system timer... 1250000 [250.00 MHz CPU]
Got a bus error IRQ, shouldn't happen yet
$0 : 00000000 1004fc00 00000001 00000000
$4 : 88009cd8 00000000 00000008 00000000
$8 : 1004fc01 1000001f 0000000a 00000001
$12: 00000000 00000004 00000000 00000001
$16: 00000000 00000002 0000000a 880083d8
$20: 00000001 a8746f70 9fc5c2b4 00000000
$24: 00002590 00000001
$28: 88008000 88009cd8 00000001 88010118
epc   : 880127b0
Status: 1004fc03
Cause : 10004000
Status: 1004fc03
Cause : 10004000
Cause : 10004000
Spinning...

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Tue Jan 16 06:56:04 2001
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Date:   Tue, 16 Jan 2001 16:53:57 +0200
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Subject: micro libc (uClibc) on MIPS
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Hello,

I want to port uClibc to MIPS. Does anyone have any reference to
whatever may have
been done already on this subject?

Thanks,
Michael.
/* ---                     --- *\
|       Software Developer      |
|       Jungo Ltd, Israel       |
|       michaels@jungo.com      |
\* ---                     --- */


From owner-linux-mips@oss.sgi.com Tue Jan 16 07:46:24 2001
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In-Reply-To: <Pine.GSO.3.96.1010116123223.5546B-100000@delta.ds2.pg.gda.pl>; from macro@ds2.pg.gda.pl on Tue, Jan 16, 2001 at 12:40:11PM +0100
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On Tue, Jan 16, 2001 at 12:40:11PM +0100, Maciej W. Rozycki wrote:

> > > > There is a debian package of strace for mips in
> > > > ftp://ftp.rfc822.org/pub/local/debian-mips/packages/. It is working
> > > > with linux 2.4.
> > > 
> > >  And the sources are at...?
> > 
> > See strace.sourceforge.net.
> 
>  I mean patches for MIPS, of course.  Strace 4.2 does not work for MIPS
> out of the box.  The proper source still appears to be
> http://www.liacs.nl/~wichert/strace/, BTW. 

Wiggy somewhen gave me write access to the strace source some time ago, so
I assume that the stuff on sourceforge is now the official CVS.  For MIPS
I was using some CVS snapshot which was working for me out of the box
after I checked in some fixes.  But that's again already some time ago,
things may have changed since then.

  Ralf

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Cc:	"Maciej W. Rozycki" <macro@ds2.pg.gda.pl>, linux-mips@oss.sgi.com
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Tue, Jan 16, 2001 at 03:36:18PM +0100, Florian Lohoff wrote:

> -		base = __pa(p->base << PAGE_SHIFT);	/* Fix up from KSEG0 */
> +		base = p->base << PAGE_SHIFT;

This fix looks good.

> I get further down the road with memory initialisation.
> 
> Also the pages no in zone(0) looks much saner:
> 
> Before:
> 	On node 0 totalpages: 589824
> 	zone(0): 589824 pages.
> 
> 
> After:
> 	On node 0 totalpages: 65536
> 	zone(0): 65536 pages.

I probably already got used too machines with gigs of memory to notice ;-)

> Later on it crashes with:

> start_kernel, 541
> start_kernel, 543
> Calibrating system timer... 1250000 [250.00 MHz CPU]
> Got a bus error IRQ, shouldn't happen yet
> $0: 00000000 1004fc00 00000001 00000000
> $4: 88009cd8 00000000 00000008 00000000
> $8: 1004fc01 1000001f 0000000a 00000001
> $12: 00000000 00000004 00000000 00000001
> $16: 00000000 00000002 0000000a 880083d8
> $20: 00000001 a8746f70 9fc5c2b4 00000000
> $24: 00002590 00000001
> $28: 88008000 88009cd8 00000001 88010118
> epc: 880127b0
> Status: 1004fc03
> Cause: 10004000
> Status: 1004fc03
> Cause: 10004000
> Cause: 10004000

Can you decode the addresses in $epc and $31 for me?

  Ralf

From owner-linux-mips@oss.sgi.com Tue Jan 16 08:06:24 2001
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To:     Florian Lohoff <flo@rfc822.org>
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Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Tue, 16 Jan 2001, Florian Lohoff wrote:

> diff -u -r1.17 memory.c
> --- arch/mips/arc/memory.c	2001/01/03 18:15:24	1.17
> +++ arch/mips/arc/memory.c	2001/01/16 13:53:45
> @@ -120,7 +120,7 @@
>  		unsigned long base, size;
>  		long type;
>  
> -		base = __pa(p->base << PAGE_SHIFT);	/* Fix up from KSEG0 */
> +		base = p->base << PAGE_SHIFT;
>  		size = p->pages << PAGE_SHIFT;
>  		type = prom_memtype_classify(p->type);

 That's about the correct fix.

> start_kernel, 541
> start_kernel, 543
> Calibrating system timer... 1250000 [250.00 MHz CPU]
> Got a bus error IRQ, shouldn't happen yet
> $0 : 00000000 1004fc00 00000001 00000000
> $4 : 88009cd8 00000000 00000008 00000000
> $8 : 1004fc01 1000001f 0000000a 00000001
> $12: 00000000 00000004 00000000 00000001
> $16: 00000000 00000002 0000000a 880083d8
> $20: 00000001 a8746f70 9fc5c2b4 00000000
> $24: 00002590 00000001
> $28: 88008000 88009cd8 00000001 88010118
> epc   : 880127b0
> Status: 1004fc03
> Cause : 10004000
> Status: 1004fc03
> Cause : 10004000
> Cause : 10004000
> Spinning...

 It looks like an unoccupied location access in mem_init().  Weird.  Here
is a preliminary patch that fixes a few memory map problems I discovered
till far.  It incorporates a fix like yours as well as a few others.  It
won't fix the above crash, I'm afraid.  It was not sufficiently tested,
either.  I'll prepare a few debugging changes to mem_init() so we can
track the fatal access down.

 Meanwhile, could you please try to boot with "mem=0x07800000@0x08800000"
command line option?  This will show if the non-contiguous memory is the
problem or not -- you have a relatively small block at the beginning.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Tue Jan 16 08:10:34 2001
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To:     Ralf Baechle <ralf@oss.sgi.com>
cc:     Florian Lohoff <flo@rfc822.org>, linux-mips@oss.sgi.com
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Tue, 16 Jan 2001, Ralf Baechle wrote:

> > Before:
> > 	On node 0 totalpages: 589824
> > 	zone(0): 589824 pages.
> > 
> > 
> > After:
> > 	On node 0 totalpages: 65536
> > 	zone(0): 65536 pages.
> 
> I probably already got used too machines with gigs of memory to notice ;-)

 The number actually denotes the highest page, regardless of the number of
pages, so you only need a single page placed far away from address zero to
observe such large counts.

> Can you decode the addresses in $epc and $31 for me?

 Probably a memory access in free_all_bootmem() or so.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Tue Jan 16 08:22:35 2001
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Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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Hi,

 Here is the patch I mentioned earlier.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

patch-mips-2.4.0-test12-20010110-mem_map-39
diff -up --recursive --new-file linux-mips-2.4.0-test12-20010110.macro/arch/mips/arc/memory.c linux-mips-2.4.0-test12-20010110/arch/mips/arc/memory.c
--- linux-mips-2.4.0-test12-20010110.macro/arch/mips/arc/memory.c	Thu Jan  4 05:26:53 2001
+++ linux-mips-2.4.0-test12-20010110/arch/mips/arc/memory.c	Tue Jan 16 01:17:44 2001
@@ -12,6 +12,7 @@
 #include <linux/bootmem.h>
 #include <linux/swap.h>
 
+#include <asm/addrspace.h>
 #include <asm/sgialib.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
@@ -120,7 +121,7 @@ void __init prom_meminit(void)
 		unsigned long base, size;
 		long type;
 
-		base = __pa(p->base << PAGE_SHIFT);	/* Fix up from KSEG0 */
+		base = p->base << PAGE_SHIFT;
 		size = p->pages << PAGE_SHIFT;
 		type = prom_memtype_classify(p->type);
 
diff -up --recursive --new-file linux-mips-2.4.0-test12-20010110.macro/arch/mips/baget/prom/init.c linux-mips-2.4.0-test12-20010110/arch/mips/baget/prom/init.c
--- linux-mips-2.4.0-test12-20010110.macro/arch/mips/baget/prom/init.c	Thu Dec 14 05:26:23 2000
+++ linux-mips-2.4.0-test12-20010110/arch/mips/baget/prom/init.c	Tue Jan 16 01:00:28 2001
@@ -4,16 +4,22 @@
  * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov 
  */
 #include <linux/init.h>
+#include <asm/addrspace.h>
 #include <asm/bootinfo.h>
 
 char arcs_cmdline[COMMAND_LINE_SIZE];
 
 void __init prom_init(unsigned int mem_upper)
 {
-	mips_memory_upper = mem_upper;
+	mem_upper = PHYSADDR(mem_upper);
+
 	mips_machgroup  = MACH_GROUP_UNKNOWN;
 	mips_machtype   = MACH_UNKNOWN;
 	arcs_cmdline[0] = 0;
+
+	vac_memory_upper = mem_upper;
+
+	add_memory_region(0, mem_upper, BOOT_MEM_RAM);
 }
 
 void prom_free_prom_memory (void)
diff -up --recursive --new-file linux-mips-2.4.0-test12-20010110.macro/arch/mips/baget/setup.c linux-mips-2.4.0-test12-20010110/arch/mips/baget/setup.c
--- linux-mips-2.4.0-test12-20010110.macro/arch/mips/baget/setup.c	Tue Mar 28 04:26:01 2000
+++ linux-mips-2.4.0-test12-20010110/arch/mips/baget/setup.c	Tue Jan 16 01:43:10 2001
@@ -14,7 +14,7 @@
 
 #include <asm/baget/baget.h>
 
-extern long mips_memory_upper;
+long int vac_memory_upper;
 
 #define CACHEABLE_STR(val) ((val) ? "not cached" : "cached")
 #define MIN(a,b)           (((a)<(b)) ? (a):(b)) 
@@ -172,7 +172,7 @@ static void __init vac_show(void)
 
 static void __init vac_init(void)
 {
-	unsigned short mem_limit = ((mips_memory_upper-KSEG0) >> 16);
+	unsigned short mem_limit = (vac_memory_upper >> 16);
 
 	switch(vac_inw(VAC_ID)) {
 	case 0x1AC0:
diff -up --recursive --new-file linux-mips-2.4.0-test12-20010110.macro/arch/mips/galileo-boards/ev64120/setup.c linux-mips-2.4.0-test12-20010110/arch/mips/galileo-boards/ev64120/setup.c
--- linux-mips-2.4.0-test12-20010110.macro/arch/mips/galileo-boards/ev64120/setup.c	Thu Jan  4 05:26:53 2001
+++ linux-mips-2.4.0-test12-20010110/arch/mips/galileo-boards/ev64120/setup.c	Tue Jan 16 00:37:52 2001
@@ -133,7 +133,6 @@ void ev64120_setup(void)
 
 	board_time_init = galileo_time_init;
 	mips_io_port_base = KSEG1;
-	mips_memory_upper = 32 * 1024 * 1024 | KSEG0;
 	set_cp0_status(ST0_FR, 0);
 
 #ifdef CONFIG_L2_L3_CACHE
@@ -174,7 +173,6 @@ void SetUpBootInfo(int argc, char **argv
 	mips_machtype = MACH_EV64120A;
 }
 
-unsigned long mem_size;
 void __init prom_init(int a, char **b, char **c, int *d)
 {
 	unsigned long free_start, free_end, start_pfn, bootmap_size;
diff -up --recursive --new-file linux-mips-2.4.0-test12-20010110.macro/arch/mips/galileo-boards/ev96100/setup.c linux-mips-2.4.0-test12-20010110/arch/mips/galileo-boards/ev96100/setup.c
--- linux-mips-2.4.0-test12-20010110.macro/arch/mips/galileo-boards/ev96100/setup.c	Mon Nov  6 22:59:55 2000
+++ linux-mips-2.4.0-test12-20010110/arch/mips/galileo-boards/ev96100/setup.c	Tue Jan 16 00:35:49 2001
@@ -86,9 +86,6 @@ static void __init ev96100_irq_setup(voi
 void __init ev96100_setup(void)
 {
 
-	unsigned long mem_size, free_start, free_end, start_pfn,
-	    bootmap_size;
-
 #ifdef CONFIG_REMOTE_DEBUG
 	int rs_putDebugChar(char);
 	char rs_getDebugChar(void);
diff -up --recursive --new-file linux-mips-2.4.0-test12-20010110.macro/arch/mips/mips-boards/generic/memory.c linux-mips-2.4.0-test12-20010110/arch/mips/mips-boards/generic/memory.c
--- linux-mips-2.4.0-test12-20010110.macro/arch/mips/mips-boards/generic/memory.c	Sat Dec 30 05:26:48 2000
+++ linux-mips-2.4.0-test12-20010110/arch/mips/mips-boards/generic/memory.c	Tue Jan 16 01:19:47 2001
@@ -28,6 +28,7 @@
 #include <linux/mm.h>
 #include <linux/bootmem.h>
 
+#include <asm/addrspace.h>
 #include <asm/bootinfo.h>
 #include <asm/page.h>
 
@@ -135,7 +136,7 @@ void __init prom_meminit(void)
 		long type;
 
 		type = prom_memtype_classify (p->type);
-		base = __pa(p->base);			/* Fix up from KSEG0 */
+		base = PHYSADDR(p->base);		/* Fix up from KSEG0 */
 		size = p->size;
 
 		add_memory_region(base, size, type);
diff -up --recursive --new-file linux-mips-2.4.0-test12-20010110.macro/include/asm-mips/addrspace.h linux-mips-2.4.0-test12-20010110/include/asm-mips/addrspace.h
--- linux-mips-2.4.0-test12-20010110.macro/include/asm-mips/addrspace.h	Sat Aug 26 04:26:45 2000
+++ linux-mips-2.4.0-test12-20010110/include/asm-mips/addrspace.h	Tue Jan 16 01:04:14 2001
@@ -24,7 +24,7 @@
  * Returns the kernel segment base of a given address
  */
 #ifndef __ASSEMBLY__
-#define KSEGX(a)                (((unsigned long)(a)) & 0xe0000000)
+#define KSEGX(a)                ((__typeof__(a))(((unsigned long)(a) & 0xe0000000)))
 #else
 #define KSEGX(a)                ((a) & 0xe0000000)
 #endif
@@ -33,7 +33,7 @@
  * Returns the physical address of a KSEG0/KSEG1 address
  */
 #ifndef __ASSEMBLY__
-#define PHYSADDR(a)		(((unsigned long)(a)) & 0x1fffffff)
+#define PHYSADDR(a)		((__typeof__(a))(((unsigned long)(a) & 0x1fffffff)))
 #else
 #define PHYSADDR(a)		((a) & 0x1fffffff)
 #endif


From owner-linux-mips@oss.sgi.com Tue Jan 16 08:26:04 2001
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From:	Ralf Baechle <ralf@oss.sgi.com>
To:	"Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc:	Florian Lohoff <flo@rfc822.org>, linux-mips@oss.sgi.com
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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In-Reply-To: <Pine.GSO.3.96.1010116170209.5546K-100000@delta.ds2.pg.gda.pl>; from macro@ds2.pg.gda.pl on Tue, Jan 16, 2001 at 05:06:29PM +0100
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On Tue, Jan 16, 2001 at 05:06:29PM +0100, Maciej W. Rozycki wrote:

> On Tue, 16 Jan 2001, Ralf Baechle wrote:
> 
> > > Before:
> > > 	On node 0 totalpages: 589824
> > > 	zone(0): 589824 pages.
> > > 
> > > 
> > > After:
> > > 	On node 0 totalpages: 65536
> > > 	zone(0): 65536 pages.
> > 
> > I probably already got used too machines with gigs of memory to notice ;-)
> 
>  The number actually denotes the highest page, regardless of the number of
> pages, so you only need a single page placed far away from address zero to
> observe such large counts.

The Indy has it's memory starting at phys. 0x08000000; a part of it is also
mirrored at physical address zero.  So in case of an Indy the totalpages
number should indicate 128mb too much which means that Flo's machine should
have only 128mb real memory.  Right Florian?

> > Can you decode the addresses in $epc and $31 for me?
> 
>  Probably a memory access in free_all_bootmem() or so.

   Ralf

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To:     "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc:     Ralf Baechle <ralf@oss.sgi.com>, linux-mips@oss.sgi.com
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Tue, Jan 16, 2001 at 05:06:29PM +0100, Maciej W. Rozycki wrote:
> On Tue, 16 Jan 2001, Ralf Baechle wrote:
> 
> > > Before:
> > > 	On node 0 totalpages: 589824
> > > 	zone(0): 589824 pages.
> > > 
> > > 
> > > After:
> > > 	On node 0 totalpages: 65536
> > > 	zone(0): 65536 pages.
> > 
> > I probably already got used too machines with gigs of memory to notice ;-)
> 
>  The number actually denotes the highest page, regardless of the number of
> pages, so you only need a single page placed far away from address zero to
> observe such large counts.

Wouldnt be this correct ? Realsize is size - holes.

Index: mm/page_alloc.c
===================================================================
RCS file: /cvs/linux/mm/page_alloc.c,v
retrieving revision 1.49
diff -u -r1.49 page_alloc.c
--- mm/page_alloc.c	2001/01/11 04:02:45	1.49
+++ mm/page_alloc.c	2001/01/16 16:26:55
@@ -824,7 +824,7 @@
 		if (zholes_size)
 			realsize -= zholes_size[j];
 
-		printk("zone(%lu): %lu pages.\n", j, size);
+		printk("zone(%lu): %lu pages.\n", j, realsize);
 		zone->size = size;
 		zone->name = zone_names[j];
 		zone->lock = SPIN_LOCK_UNLOCKED;

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Tue Jan 16 08:31:55 2001
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On Tue, 16 Jan 2001, Ralf Baechle wrote:

> Wiggy somewhen gave me write access to the strace source some time ago, so
> I assume that the stuff on sourceforge is now the official CVS.  For MIPS
> I was using some CVS snapshot which was working for me out of the box
> after I checked in some fixes.  But that's again already some time ago,
> things may have changed since then.

 Well, here is most of the information available from the site...

                 Welcome to http://strace.sourceforge.net/

      We're Sorry but this Project hasn't yet uploaded their personal
                                webpage yet.
          Please check back soon for updates or visit SourceForge

 Where is the CVS you refer to?  A working strace would help me a lot.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Tue Jan 16 08:37:15 2001
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cc:     Florian Lohoff <flo@rfc822.org>, linux-mips@oss.sgi.com
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Tue, 16 Jan 2001, Ralf Baechle wrote:

> The Indy has it's memory starting at phys. 0x08000000; a part of it is also
> mirrored at physical address zero.  So in case of an Indy the totalpages
> number should indicate 128mb too much which means that Flo's machine should
> have only 128mb real memory.  Right Florian?

 The memory map suggests it is so.

 But how does the Indy handle our kernel being linked at 0x80000000?  Does
the kernel always fit the mirrored area? 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Tue, Jan 16, 2001 at 02:24:49PM -0200, Ralf Baechle wrote:
> 
> The Indy has it's memory starting at phys. 0x08000000; a part of it is also
> mirrored at physical address zero.  So in case of an Indy the totalpages
> number should indicate 128mb too much which means that Flo's machine should
> have only 128mb real memory.  Right Florian?
> 

Correct "only" 128Mb :)

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


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To:     Florian Lohoff <flo@rfc822.org>
cc:     Ralf Baechle <ralf@oss.sgi.com>, linux-mips@oss.sgi.com
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Tue, 16 Jan 2001, Florian Lohoff wrote:

> Wouldnt be this correct ? Realsize is size - holes.
> 
> Index: mm/page_alloc.c
> ===================================================================
> RCS file: /cvs/linux/mm/page_alloc.c,v
> retrieving revision 1.49
> diff -u -r1.49 page_alloc.c
> --- mm/page_alloc.c	2001/01/11 04:02:45	1.49
> +++ mm/page_alloc.c	2001/01/16 16:26:55
> @@ -824,7 +824,7 @@
>  		if (zholes_size)
>  			realsize -= zholes_size[j];
>  
> -		printk("zone(%lu): %lu pages.\n", j, size);
> +		printk("zone(%lu): %lu pages.\n", j, realsize);
>  		zone->size = size;
>  		zone->name = zone_names[j];
>  		zone->lock = SPIN_LOCK_UNLOCKED;

 It look reasonable but is it what was really intended?  You should ask
the author or linux-kernel, I suppose. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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On Tue, Jan 16, 2001 at 05:01:15PM +0100, Maciej W. Rozycki wrote:
> 
>  Meanwhile, could you please try to boot with "mem=0x07800000@0x08800000"
> command line option?  This will show if the non-contiguous memory is the
> problem or not -- you have a relatively small block at the beginning.
> 

Works

[...]
On node 0 totalpages: 65536
zone(0): 65536 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: console=ttyS0 root=/dev/sda2 mem=0x07800000@0x08800000
Calibrating system timer... 1250000 [250.00 MHz CPU]
Console: colour dummy device 80x25
zs0: console input
Console: ttyS0 (Zilog8530)
Calibrating delay loop... 124.51 BogoMIPS
Memory: 118480k/122880k available (1176k kernel code, 4408k reserved, 75k data, 56k init)
[...]

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


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Hello,

Christoph Martin has produced a Debian base based on glibc 2.2.


You can download this from:

http://download.ichilton.co.uk/linux-mips/debian/base2_2.0.tgz

or

ftp://download.ichilton.co.uk/pub/ichilton/linux-mips/debian/base2_2.0.tgz 


Bye for Now,

Ian

                                \|||/
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |        Proofread carefully to see if you any words out.         |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Tue Jan 16 08:55:55 2001
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Hello,

> mem=0x07800000@0x08800000

What will I use with 96MB RAM please ?


Is someone going to fix it so this param is not needed?
 

*Tootles off and posts to the news page @ http://linuxmips.ichilton.co.uk*


Bye for Now,

Ian

                                \|||/
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |        Proofread carefully to see if you any words out.         |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Tue Jan 16 08:57:55 2001
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anyone know a source of monitor parts? i need two bezels(front pieces) for
two Sony GDM-20D11's.

thanks

-----Original Message-----
From: Ian Chilton [mailto:mailinglist@ichilton.co.uk]
Sent: Tuesday, January 16, 2001 11:56 AM
To: Ralf Baechle
Cc: macro@ds2.pg.gda.pl; linux-mips@oss.sgi.com
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs


Hello,

> mem=0x07800000@0x08800000

What will I use with 96MB RAM please ?


Is someone going to fix it so this param is not needed?
 

*Tootles off and posts to the news page @ http://linuxmips.ichilton.co.uk*


Bye for Now,

Ian

                                \|||/
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |        Proofread carefully to see if you any words out.         |
 \-----------------------------------------------------------------/

From owner-linux-mips@oss.sgi.com Tue Jan 16 09:00:24 2001
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From:   Ian Chilton <mailinglist@ichilton.co.uk>
To:     tmaloney@ixl.com
Cc:     linux-mips@oss.sgi.com
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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Hello,

> anyone know a source of monitor parts? i need two bezels(front pieces) for

For starters, why ask this question under the heading " Re: crash in
__alloc_bootmem_core on SGI current cvs"

And secondary, I seem to recall you already posted this question. If
you didn't get an answer, it will be becasue no one knows. Posting the
same question again is just annoying and will not get you an answer if
you didn't the 1st time.


Bye for Now,

Ian

                                \|||/
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |        Proofread carefully to see if you any words out.         |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Tue Jan 16 09:01:55 2001
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Subject: Re: Debian Base for MIPS Available 
In-Reply-To: Your message of "Tue, 16 Jan 2001 16:50:15 GMT."
             <20010116165015.A26345@woody.ichilton.co.uk> 
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  Big or Little endian?

  Mike McDonald
  mikemac@mikemac.com

From owner-linux-mips@oss.sgi.com Tue Jan 16 09:04:45 2001
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Hello,

>   Big or Little endian?

Big endian


Bye for Now,

Ian


                                \|||/ 
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |         Budget: A method for going broke methodically.          |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Tue Jan 16 09:08:25 2001
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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Ian Chilton <ian@ichilton.co.uk>
cc:     Ralf Baechle <ralf@oss.sgi.com>, linux-mips@oss.sgi.com
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On Tue, 16 Jan 2001, Ian Chilton wrote:

> > mem=0x07800000@0x08800000
> 
> What will I use with 96MB RAM please ?

 "mem=0x05800000@0x08800000"?  Verify it with what is reported last by the
memory map.

> Is someone going to fix it so this param is not needed?

 I guess so.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Tue Jan 16 09:17:35 2001
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Subject: 2.4.0 on SGI I2 - obscure stuff ....
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>> bootp():vmlinux-ip22 console=ttyS0 root=/dev/sda1 mem=0x07800000@0x08800000
Setting $netaddr to 195.71.99.220 (from server watchdog)
Obtaining vmlinux-ip22 from server watchdog
ARCH: SGI-IP22
PROMLIB: ARC firmware Version 1 Revision 10
CPU: MIPS-R4400 FPU<MIPS-R4400FPC> ICACHE DCACHE SCACHE
Loading R4000 MMU routines.
CPU revision is: 00000460
Primary instruction cache 16kb, linesize 16 bytes.
Primary data cache 16kb, linesize 16 bytes.
[...]


resume:~# uname -a
Linux resume.rfc822.org 2.4.0 #4 Tue Jan 16 17:41:04 CET 2001 mips unknown
resume:~# cat /proc/cpuinfo 
cpu			: MIPS
cpu model		: R4000SC V6.0
system type		: SGI Indigo2
BogoMIPS		: 0.00
byteorder		: big endian
unaligned accesses	: 0
wait instruction	: no
microsecond timers	: yes
extra interrupt vector	: no
hardware watchpoint	: yes
VCED exceptions		: not available
VCEI exceptions		: not available

Bogomips = 0.00
VCED/VCEI not available ?

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Tue Jan 16 09:27:04 2001
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From:   Ian Chilton <mailinglist@ichilton.co.uk>
To:     linux-mips@oss.sgi.com
Subject: 2.4.0 Kernel Snapshot Available
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Hello,

http://linuxmips.ichilton.co.uk/news.php4


I have uploaded a snapshot of the current CVS kernel to the following
URL's for those who don't use CVS. I will also upload a snapshot of the
current 2.2.14 from CVS into the same dirctory.


The 2.4.0 is @:

http://download.ichilton.co.uk/linux-mips/kernelsrc/linux-010116.tar.gz

or

ftp://download.ichilton.co.uk/pub/linux-mips/kernelsrc/linux-010116.tar.gz 


Bye for Now,

Ian

                                \|||/
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |        Proofread carefully to see if you any words out.         |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Tue Jan 16 10:09:46 2001
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From:   Ian Chilton <ian@ichilton.co.uk>
To:     David Keen <dkeen@bellsouth.net>
Cc:     linux-mips@oss.sgi.com
Subject: Re: Debian Base for MIPS Available
Message-ID: <20010116180914.A26581@woody.ichilton.co.uk>
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Hello,

> Mr. Chilton,

Call me Ian!   (or GadgetMan if you use IRC and come to #mipslinux !)


> Is this tarball a good starting point for me to net boot to my indy?

I have not tried that base yet and I won't be able to before the
weekend. My I2 is 60 miles away and I have a remote session, but am
compiling my own new system...my Indy is in the same place but turned
off..

But yes, it should be OK..

There is also ICLinux v1, but this uses older stuff...you are probably
better using the new base...

I am working on ICLinux v2 now..


Problem is, the port is still in a very developent stage, so there is
little documentation, and you have to be prepared to do a little
hacking around to get things working..


You should have a look round the documents and links at
http://linuxmips.ichilton.co.uk and you could also have a look at the
install guide for IClinux v1 at:

http://download.ichilton.co.uk/linux-mips/iclinux/INSTALL

again, this is out of date and needs updating.


Don't know if you are familiar with network booting, but it is
mentioned in there...also notes on booting an Indy/I2 in the I2-HOWTO
which is on the Documentation page on http://linuxmips.ichilton.co.uk



The other problem is finding a working kernel. At the moment, the CVS
tree is broken...it is being worked on..

I have a working but old kernel for the Indy/I2 which will get you
going, and you can update later:
http://download.ichilton.co.uk/linux-mips/kernels/vmlinux-001027-test9-r4x00.gz
or
ftp://download.ichilton.co.uk/pub/ichilton/linux-mips/kernels/vmlinux-001027-test9-r4x00.gz

(there is also a non-gzip'd version at the same place without the .gz)



Hope this helps a bit...


Bye for Now,

Ian


                                \|||/ 
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |         Budget: A method for going broke methodically.          |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Tue Jan 16 10:22:26 2001
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	Tue, 16 Jan 2001 10:22:16 -0800
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Date:   Tue, 16 Jan 2001 18:22:12 +0000
From:   Ian Chilton <ian@ichilton.co.uk>
To:     tmaloney@ixl.com
Cc:     linux-mips@oss.sgi.com
Subject: Re: #mipslinux
Message-ID: <20010116182212.A26661@woody.ichilton.co.uk>
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Hello,

> what server is #mipslinux on?

I think this is mentioned on the web page
(http://linuxmips.ichilton.co.uk) somewhere, but:

server  - irc.openprojects.net  (port 6667)
channel - #mipsliunux


Bye for Now,

Ian


                                \|||/ 
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |         Budget: A method for going broke methodically.          |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Tue Jan 16 10:55:28 2001
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From:   Florian Lohoff <flo@rfc822.org>
To:     linux-mips@oss.sgi.com
Subject: sgiserial - hang on shutdown
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Hi,
does anyone else see this phenomenon ?

Everytime i try to shutdown on serial console the machine hangs at some
stage and i have to manually press the reset button. As a result no
automatic reboot is possible and all filesystems get shut down unclean.

resume:~# halt
Broadcast message from root (console) Tue Jan 16 18:42:22 2001...
The system is going down for system halt NOW !!
INIT: Switching to runlevel: 0
INIT: Sending processes the TERM signal
INIT: SeStopping INET services: inetd
Stopping portmap services: portmap
Saving random seed...
Unmounting remote filesystems.
Disabling IPv4 packet forwarding.
Ino more processes left in this runlevel

At this point - no more output - even after 30 minutes etc - System
seems to be halted. As one can see there is multiple types of output
intermixed. I guess its something with the serial console vs serial
tty stuff which gets mixed and due to that interrupts getting lost which
leeds me to a question. What is this for spread all over the sgiserial.c

if (ioc_icontrol)
	junk = ioc_icontrol->istat0;

or even reading ioc_icontrol->istat0 unconditionally. I guess its for
acknowledging interrupts. This is also done in zs_cons_put_char which
is would definitly be wrong as the serial console shouldnt generate
interrupts nor change any of the states which could confuse the interrupt
driven tty driver. I guess the right thing to do would be to simply let
an interrupt happen.

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Tue Jan 16 10:55:28 2001
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Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Tue, Jan 16, 2001 at 05:49:05PM +0100, Florian Lohoff wrote:
> On Tue, Jan 16, 2001 at 05:01:15PM +0100, Maciej W. Rozycki wrote:
> > 
> >  Meanwhile, could you please try to boot with "mem=0x07800000@0x08800000"
> > command line option?  This will show if the non-contiguous memory is the
> > problem or not -- you have a relatively small block at the beginning.
> > 
> 
> Works
> 

Once removed all the debugging stuff even without the mem= parm - Interesting.

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


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To:	Ian Chilton <ian@ichilton.co.uk>
Cc:	macro@ds2.pg.gda.pl, linux-mips@oss.sgi.com
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Tue, Jan 16, 2001 at 04:55:34PM +0000, Ian Chilton wrote:

> Hello,
> 
> > mem=0x07800000@0x08800000
> 
> What will I use with 96MB RAM please ?
> 
> 
> Is someone going to fix it so this param is not needed?

Don't use mem= on an ARC machine.  The ARC firmware provides a usable way
to detect the installed amount of memory including memory used internally
by the firmware.  If you use mem= on an ARC machine you'll simply make
the kernel stomp over all this firmwar data with more or less random
results.

  Ralf

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From:	Ralf Baechle <ralf@oss.sgi.com>
To:	"Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc:	Florian Lohoff <flo@rfc822.org>, linux-mips@oss.sgi.com,
        Kanoj Sarcar <kanoj@engr.sgi.com>
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Tue, Jan 16, 2001 at 05:39:40PM +0100, Maciej W. Rozycki wrote:

> > Wouldnt be this correct ? Realsize is size - holes.
> > 
> > Index: mm/page_alloc.c
> > ===================================================================
> > RCS file: /cvs/linux/mm/page_alloc.c,v
> > retrieving revision 1.49
> > diff -u -r1.49 page_alloc.c
> > --- mm/page_alloc.c	2001/01/11 04:02:45	1.49
> > +++ mm/page_alloc.c	2001/01/16 16:26:55
> > @@ -824,7 +824,7 @@
> >  		if (zholes_size)
> >  			realsize -= zholes_size[j];
> >  
> > -		printk("zone(%lu): %lu pages.\n", j, size);
> > +		printk("zone(%lu): %lu pages.\n", j, realsize);
> >  		zone->size = size;
> >  		zone->name = zone_names[j];
> >  		zone->lock = SPIN_LOCK_UNLOCKED;
> 
>  It look reasonable but is it what was really intended?  You should ask
> the author or linux-kernel, I suppose. 

Which probably is Kanoj who is subscribed to this list.

  Ralf

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Cc:	Florian Lohoff <flo@rfc822.org>, linux-mips@oss.sgi.com
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Tue, Jan 16, 2001 at 05:34:45PM +0100, Maciej W. Rozycki wrote:

> > The Indy has it's memory starting at phys. 0x08000000; a part of it is also
> > mirrored at physical address zero.  So in case of an Indy the totalpages
> > number should indicate 128mb too much which means that Flo's machine should
> > have only 128mb real memory.  Right Florian?
> 
>  The memory map suggests it is so.
> 
>  But how does the Indy handle our kernel being linked at 0x80000000?  Does
> the kernel always fit the mirrored area? 

Indy kernels are linked to 0x88002000.

  Ralf

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Hello,

Just cross compiled the kernel with GCC 2.95.2 and Binutils 2.10.1 and
booted my Indy R4600:

Command Monitor.  Type "exit" to return to the menu.
>> bootp():/vmlinux console=ttyS0
Obtaining /vmlinux from server slinky
ARCH: SGI-IP22
PROMLIB: ARC firmware Version 1 Revision 10
CPU: MIPS-R4600 FPU<MIPS-R4600FPC> ICACHE DCACHE
Loading R4000 MMU routines.
CPU revision is: 00002020
Primary instruction cache 16kb, linesize 32 bytes.
Primary data cache 16kb, linesize 32 bytes.
Linux version 2.4.0 (ian@slinky) (gcc version 2.95.3 19991030
(prerelease)) #1 1
MC: SGI memory controller Revision 3
Determined physical RAM map:
 memory: 00001000 @ 00000000 (reserved)
 memory: 00001000 @ 00001000 (reserved)
 memory: 001c5000 @ 08002000 (reserved)
 memory: 00579000 @ 081c7000 (usable)
 memory: 000c0000 @ 08740000 (ROM data)
 memory: 05800000 @ 08800000 (usable)
On node 0 totalpages: 57344
zone(0): 57344 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: console=ttyS0
Calibrating system timer... 500000 [100.00 MHz CPU]
NG1: Revision 6, 8 bitplanes, REX3 revision B, VC2 revision A, xmap9
revision AD
NG1: Screensize 1280x1024
Console: colour SGI Newport 160x64
zs0: console input
Console: ttyS0 (Zilog8530)
Calibrating delay loop... 99.73 BogoMIPS
Memory: 91868k/95716k available (1517k kernel code, 3848k reserved, 84k
data, 6)
Dentry-cache hash table entries: 32768 (order: 6, 262144 bytes)
Buffer-cache hash table entries: 16384 (order: 4, 65536 bytes)
Page-cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 16384 (order: 5, 131072 bytes)
Checking for 'wait' instruction...  available.
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Starting kswapd v1.8
initialize_kbd: Keyboard reset failed, no ACK
DS1286 Real Time Clock Driver v1.0
keyboard: Timeout - AT keyboard not present?
keyboard: Timeout - AT keyboard not present?
streamable misc devices registered (keyb:150, gfx:148)
sgiseeq.c: David S. Miller (dm@engr.sgi.com)
eth0: SGI Seeq8003 08:00:69:08:2c:d1
SCSI subsystem driver Revision: 1.00
wd33c93-0: chip=WD33c93B/13 no_sync=0xff no_dma=0 debug_flags=0x00
           setup_args=,,,,,,,,,
           Version 1.25 - 09/Jul/1997, Compiled Jan 16 2001 at 19:12:00
scsi0 : SGI WD93
 sending SDTR 0103013f0csync_xfer=2c  Vendor: IBM       Model:
DCAS-34330      A
  Type:   Direct-Access                      ANSI SCSI revision: 02
Detected scsi disk sda at scsi0, channel 0, id 1, lun 0
SCSI device sda: 8467200 512-byte hdwr sectors (4335 MB)
Partition check:
 sda: sda1 sda2 sda3 sda4 sda5 sda6 sda7
SGI Zilog8530 serial driver version 1.00
tty00 at 0xbfbd9830 (irq = 21) is a Zilog8530
tty01 at 0xbfbd9838 (irq = 21) is a Zilog8530
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
IP: routing cache hash table of 2048 buckets, 16Kbytes
TCP: Hash tables configured (established 16384 bind 16384)
Sending BOOTP requests.... OK
IP-Config: Got BOOTP answer from 192.168.0.11, my address is
192.168.0.12
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
Looking up port of RPC 100003/2 on 192.168.0.11
Looking up port of RPC 100005/2 on 192.168.0.11
Root-NFS: Server returned error -13 while mounting /export/tftpboot
VFS: Unable to mount root fs via NFS, trying floppy.
request_module[block-major-2]: Root fs not mounted
VFS: Cannot open root device "" or 02:00
Please append a correct "root=" boot option
Kernel panic: VFS: Unable to mount root fs on 02:00



I'll boot it into a system @ the weekend.


Thanks to those who helped to fix the kernel!!


Bye for Now,

Ian


                                \|||/ 
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |         Budget: A method for going broke methodically.          |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Tue Jan 16 11:38:48 2001
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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Ralf Baechle <ralf@oss.sgi.com>
cc:     Ian Chilton <ian@ichilton.co.uk>, linux-mips@oss.sgi.com
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Tue, 16 Jan 2001, Ralf Baechle wrote:

> Don't use mem= on an ARC machine.  The ARC firmware provides a usable way
> to detect the installed amount of memory including memory used internally
> by the firmware.  If you use mem= on an ARC machine you'll simply make
> the kernel stomp over all this firmwar data with more or less random
> results.

 Ralf, please do not depreciate the tool.  You should not use "mem=" 
blindly on any kind of machine or bad things will happen.  Whenever you
use "mem=", you need to have at least a bare idea which memory areas are
usable and which are not.  You wouldn't like to put a process in
framebuffer memory, for example, would you?  When used carefully "mem=" 
may be a valuable tool for development and debugging.  It's flexible
enough to specify multiple memory ranges and you may use decimal, octal
and hexadecimal notation, as well as suffixes for kilo and mega (or kibi
and mebi, actually).  It may be used as a workaround for unsupported
memory configurations or broken memory areas.

 That written, one wouldn't normally use "mem=" for a production system,
of course.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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To:     Ralf Baechle <ralf@oss.sgi.com>
cc:     Florian Lohoff <flo@rfc822.org>, linux-mips@oss.sgi.com
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On Tue, 16 Jan 2001, Ralf Baechle wrote:

> Indy kernels are linked to 0x88002000.

 Oh well, why can't it be done consistently in our linker script.  The
script does ". = 0x80000000;" -- it's at least confusing, even if the
"-Ttext" option has a priority (does it?).

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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To:     Florian Lohoff <flo@rfc822.org>
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On Tue, 16 Jan 2001, Florian Lohoff wrote:

> Once removed all the debugging stuff even without the mem= parm - Interesting.

 It's weird.  Could you please check it's repeatable?  It might be the
debugging stuff does destructive actions or we trigger an unrelated
problem such as a compiler/assembler/linker bug.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Tue, Jan 16, 2001 at 08:47:20PM +0100, Maciej W. Rozycki wrote:

> > Indy kernels are linked to 0x88002000.
> 
>  Oh well, why can't it be done consistently in our linker script.  The
> script does ". = 0x80000000;" -- it's at least confusing, even if the
> "-Ttext" option has a priority (does it?).

It has; however the whole concept of how a linker script is interpreted
when used with -Ttext, -Tdata or -Tbss is undocumented.  It seems to be
working fine as long as the address passed to -Ttext is larger than the
address in the script, so the script is using the lowest possible
address which is KSEG0.

  Ralf

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To:     Ian Chilton <ian@ichilton.co.uk>
cc:     linux-mips@oss.sgi.com
Subject: Re: Current CVS (010116) Boots OK
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On Tue, 16 Jan 2001, Ian Chilton wrote:

> Just cross compiled the kernel with GCC 2.95.2 and Binutils 2.10.1 and
> booted my Indy R4600:
[...]
> Linux version 2.4.0 (ian@slinky) (gcc version 2.95.3 19991030
> (prerelease)) #1 1
> MC: SGI memory controller Revision 3
> Determined physical RAM map:
>  memory: 00001000 @ 00000000 (reserved)
>  memory: 00001000 @ 00001000 (reserved)
>  memory: 001c5000 @ 08002000 (reserved)
>  memory: 00579000 @ 081c7000 (usable)
>  memory: 000c0000 @ 08740000 (ROM data)
>  memory: 05800000 @ 08800000 (usable)
> On node 0 totalpages: 57344
> zone(0): 57344 pages.
> zone(1): 0 pages.
> zone(2): 0 pages.
> Kernel command line: console=ttyS0
> Calibrating system timer... 500000 [100.00 MHz CPU]
> NG1: Revision 6, 8 bitplanes, REX3 revision B, VC2 revision A, xmap9
> revision AD
> NG1: Screensize 1280x1024
> Console: colour SGI Newport 160x64
> zs0: console input
> Console: ttyS0 (Zilog8530)
> Calibrating delay loop... 99.73 BogoMIPS
> Memory: 91868k/95716k available (1517k kernel code, 3848k reserved, 84k
> data, 6)

 Great!  The code works.  Thanks for the report.  Hmm, that "6)" at the
end looks weird, though -- there should be something like "xxxk init, 0k
highmem)"... 

 Could you please change "#undef DEBUG" into "#define DEBUG" in
arch/mips/arc/memory.c and check if your system boots this way, either?
I would also appreciate an output from '/proc/iomem' (once you boot into
a shell).

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Tue Jan 16 12:22:19 2001
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Subject: Re: Current CVS (010116) Boots OK
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Hello,

>  Could you please change "#undef DEBUG" into "#define DEBUG" in
> arch/mips/arc/memory.c and check if your system boots this way, either?
> I would also appreciate an output from '/proc/iomem' (once you boot into
> a shell).

The Indy is off again now and the I2 is compiling..

So, unless I get chance to try it on the I2 later this week, it will be
the weekend before I get to try this.....


Unless someone else can verify this and make the change..


Bye for Now,

Ian


                                \|||/ 
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |         Budget: A method for going broke methodically.          |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Tue Jan 16 12:28:59 2001
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To:     Ian Chilton <ian@ichilton.co.uk>
cc:     linux-mips@oss.sgi.com
Subject: Re: Current CVS (010116) Boots OK
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On Tue, 16 Jan 2001, Ian Chilton wrote:

> So, unless I get chance to try it on the I2 later this week, it will be
> the weekend before I get to try this.....

 Not a problem for me -- I'm not in a hurry that much.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Tue Jan 16 13:02:48 2001
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Subject: Re: Current CVS (010116) Boots OK
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On Tue, Jan 16, 2001 at 09:17:45PM +0100, Maciej W. Rozycki wrote:
> On Tue, 16 Jan 2001, Ian Chilton wrote:
> 
> > Just cross compiled the kernel with GCC 2.95.2 and Binutils 2.10.1 and
> > booted my Indy R4600:
> [...]
> > Linux version 2.4.0 (ian@slinky) (gcc version 2.95.3 19991030
> > (prerelease)) #1 1
> > MC: SGI memory controller Revision 3
> > Determined physical RAM map:
> >  memory: 00001000 @ 00000000 (reserved)
> >  memory: 00001000 @ 00001000 (reserved)
> >  memory: 001c5000 @ 08002000 (reserved)
> >  memory: 00579000 @ 081c7000 (usable)
> >  memory: 000c0000 @ 08740000 (ROM data)
> >  memory: 05800000 @ 08800000 (usable)
> > On node 0 totalpages: 57344
> > zone(0): 57344 pages.
> > zone(1): 0 pages.
> > zone(2): 0 pages.
> > Kernel command line: console=ttyS0
> > Calibrating system timer... 500000 [100.00 MHz CPU]
> > NG1: Revision 6, 8 bitplanes, REX3 revision B, VC2 revision A, xmap9
> > revision AD
> > NG1: Screensize 1280x1024

Does this mean we have support for the graphics hardware on SGIs?  Or is
it still limited to certain Indys?  I have an I2 I've been tempted to try
linux on but been spoofed off by the fact that I can't use my lovely 21"
monitor.  Is a search still being made for docs on the graphics hardware?

-- 
Matthew Fredrickson AIM MatthewFredricks
ICQ 13923212 matt@NOSPAMfredricknet.net 
http://www.fredricknet.net/~matt/
"Everything is relative"

From owner-linux-mips@oss.sgi.com Tue Jan 16 15:04:39 2001
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From:   Florian Lohoff <flo@rfc822.org>
To:     "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>, linux-mips@oss.sgi.com
Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
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On Tue, Jan 16, 2001 at 08:52:40PM +0100, Maciej W. Rozycki wrote:
> On Tue, 16 Jan 2001, Florian Lohoff wrote:
> 
> > Once removed all the debugging stuff even without the mem= parm - Interesting.
> 
>  It's weird.  Could you please check it's repeatable?  It might be the
> debugging stuff does destructive actions or we trigger an unrelated
> problem such as a compiler/assembler/linker bug.

Works reliably afterwards ...

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Tue Jan 16 16:31:30 2001
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Date:   Tue, 16 Jan 2001 17:33:57 -0700
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We recently updated our cross-compile tools from egcs-1.0.3a-2 to
egcs-1.1.2-3.
Our revs are now:
egcs-g77-mipsel-linux-1.1.2-3
egcs-c++-mipsel-linux-1.1.2-3
egcs-objc-mipsel-linux-1.1.2-3
binutils-mipsel-linux-2.8.1-1
egcs-mipsel-linux-1.1.2-3
egcs-libstdc++-mipsel-linux-2.9.0-2

With this tool chain kernel 2.4.0-test9 will build, but dies during
bootup.
>>>snip
INIT: version 2.74 booting
Activating swap partitions
Adding Swap: 66540k swap-space (priority -1)
hostname: mippy2
Checking root filesystems.
Parallelizing fsck version 1.10 (24-Apr-97)
[/sbin/fsck.ext2] fsck.ext2 -a /dev/sdb2
INIT: PANIC: segmentation violation! giving up..
<<<snip

I then tried to build some userland apps that we have set-up to
cross-compile with the old tools. Bash built fine, but Apache had a very
strange error.
>>>snip
mipsel-linux-gcc -c  -I../os/unix -I../include  -O2 -mcpu=r4600 -mips2
-DLINUX=2 `../apaci` alloc.c
mipsel-linux-gcc -c  -I../os/unix -I../include  -O2 -mcpu=r4600 -mips2
-DLINUX=2 `../apaci` buff.c
mipsel-linux-gcc -c  -I../os/unix -I../include  -O2 -mcpu=r4600 -mips2
-DLINUX=2 `../apaci` http_config.c
mipsel-linux-gcc -c  -I../os/unix -I../include  -O2 -mcpu=r4600 -mips2
-DLINUX=2 `../apaci` http_core.c
mipsel-linux-gcc -c  -I../os/unix -I../include  -O2 -mcpu=r4600 -mips2
-DLINUX=2 `../apaci` http_log.c
mipsel-linux-gcc -c  -I../os/unix -I../include  -O2 -mcpu=r4600 -mips2
-DLINUX=2 `../apaci` http_main.c
http_main.c: In function `find_child_by_pid':
http_main.c:2156: internal error--unrecognizable insn:
(insn 81 80 88 (set (reg:SI 89)
        (plus:SI (reg:SI 84)
            (const_int 49152))) -1 (insn_list 80 (nil))
    (expr_list:REG_DEAD (reg:SI 84)
        (nil)))
../../gcc/toplev.c:1367: Internal compiler error in function fatal_insn
make[3]: *** [http_main.o] Error 1
make[2]: *** [subdirs] Error 1
make[2]: Leaving directory `/home/BUILD/apache_1.3.3/src'
make[1]: *** [build-std] Error 2
make[1]: Leaving directory `/home/BUILD/apache_1.3.3'
make: *** [build] Error 2
Bad exit status from /var/tmp/rpm-tmp.24768 (%build)
<<<snip

Neither of these problems occur with the old tool rev. Any thoughts?

--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Brady Brown (bbrown@ti.com)
Texas Instruments: Broadband Access Group
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~



From owner-linux-mips@oss.sgi.com Tue Jan 16 17:58:50 2001
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Does anybody if I can use kgdb to display the register values in CP0 (such as
config, status, etc)?  I looked over the help pages but could not find it. 
However I am so sure about my ability of searching help pages. :-)

If not, that sounds like a very useful feature for MIPS targets, eh?

Jun

From owner-linux-mips@oss.sgi.com Wed Jan 17 04:08:12 2001
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Hello,

I tried booting my Indy yesturday, but with no root fs. Maciej asked me
to try changing something and give him some outputs.

My Indy is off, but my I2 is finished compiling, so I thought I would
try that. The root fs, I have just had booted with 2.4.0-test9 (001027)
with no problem.

My plan was:

Boot the kernel - post output, cpuinfo and iomem
Make DEBUG change, reboot and repost output, cpuinfo and iomem

However, I booted the I2, and got this:

Activating swap...Adding Swap: 64376k swap-space (priority -1)
[swapon:13] Illegal instruction 0000002c at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 00000040 at 88198008 ra=8814b208
[swapon:13] Illegal instruction 74747978 at 88198008 ra=8814b208
[â.ttyx.#.d.d:13] Illegal instruction 74747978 at 88198008 ra=8814b208
[â.ttyx.#.d.d:-2011578176] Illegal instruction 74747978 at 88198008
ra=8814b208
[â.ttyx.#.d.d:-2011483784] Illegal instruction 74747978 at 88198008
ra=8814b208




I am contating home now to get someone to hit the reset. I will boot
with the test9 and disable swap and carry on.

Consider this a bug report  :)


Bye for Now,

Ian


                                \|||/ 
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |         Budget: A method for going broke methodically.          |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Wed Jan 17 04:56:31 2001
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Date:   Wed, 17 Jan 2001 12:56:03 +0000
From:   Ian Chilton <ian@ichilton.co.uk>
To:     "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc:     ralf@oss.sgi.com, linux-mips@oss.sgi.com
Subject: Kernel Report - 010117 (2.4.0)
Message-ID: <20010117125603.A29302@woody.ichilton.co.uk>
Reply-To: Ian Chilton <ian@ichilton.co.uk>
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Hello,

OK..this is the normal kernel straight from CVS (010117) on my I2 (not
Indy as in yesturday..)

It seems a lot of things are repeated for some reason ?!?

Also, lolo was right...it doesn't shut down..



>> bootp():/vmlinux root=/dev/sda3 console=ttyS0
Obtaining /vmlinux from server slinky
ARCH: SGI-IP22
PROMLIB: ARC firmware Version 1 Revision 10
CPU: MIPS-R4400 FPU<MIPS-R4400FPC> ICACHE DCACHE SCACHE
Loading R4000 MMU routines.
CPU revision is: 00000460
Primary instruction cache 16kb, linesize 16 bytes.
Primary data cache 16kb, linesize 16 bytes.
Secondary cache sized at 1024K linesize 128 bytes.
Linux version 2.4.0 (ian@slinky) (gcc version 2.95.3 19991030
(prerelease)) #2 1
MC: SGI memory controller Revision 3
Determined physical RAM map:
 memory: 00001000 @ 00000000 (reserved)
 memory: 00001000 @ 00001000 (reserved)
 memory: 001d6000 @ 08002000 (reserved)
 memory: 00568000 @ 081d8000 (usable)
 memory: 000c0000 @ 08740000 (ROM data)
 memory: 05800000 @ 08800000 (usable)
On node 0 totalpages: 57344
zone(0): 57344 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/sda3 console=ttyS0
Calibrating system timer... 1000000 [200.00 MHz CPU]
zs0: console input
Console: ttyS0 (Zilog8530)
ARCH: SGI-IP22
PROMLIB: ARC firmware Version 1 Revision 10
CPU: MIPS-R4400 FPU<MIPS-R4400FPC> ICACHE DCACHE SCACHE
Loading R4000 MMU routines.
CPU revision is: 00000460
Primary instruction cache 16kb, linesize 16 bytes.
Primary data cache 16kb, linesize 16 bytes.
Secondary cache sized at 1024K linesize 128 bytes.
Linux version 2.4.0 (ian@slinky) (gcc version 2.95.3 19991030
(prerelease)) #2 1
MC: SGI memory controller Revision 3
Determined physical RAM map:
 memory: 00001000 @ 00000000 (reserved)
 memory: 00001000 @ 00001000 (reserved)
 memory: 001d6000 @ 08002000 (reserved)
 memory: 00568000 @ 081d8000 (usable)
 memory: 000c0000 @ 08740000 (ROM data)
 memory: 05800000 @ 08800000 (usable)
On node 0 totalpages: 57344
zone(0): 57344 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/sda3 console=ttyS0
Calibrating system timer... 1000000 [200.00 MHz CPU]
zs0: console input
Console: ttyS0 (Zilog8530)
Calibrating delay loop... Calibrating delay loop... 99.94 BogoMIPS
99.94 BogoMIPS
Memory: 91792k/95648k available (1560k kernel code, 3856k reserved, 88k
data, 7)
Memory: 91792k/95648k available (1560k kernel code, 3856k reserved, 88k
data, 7)
Dentry-cache hash table entries: 32768 (order: 6, 262144 bytes)
Dentry-cache hash table entries: 32768 (order: 6, 262144 bytes)
Buffer-cache hash table entries: 16384 (order: 4, 65536 bytes)
Buffer-cache hash table entries: 16384 (order: 4, 65536 bytes)
Page-cache hash table entries: 65536 (order: 6, 262144 bytes)
Page-cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 16384 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 5, 131072 bytes)
Checking for 'wait' instruction... Checking for 'wait' instruction...
unavaila.
 unavailable.
POSIX conformance testing by UNIFIX
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Based upon Swansea University Computer Society NET3.039
Starting kswapd v1.8
Starting kswapd v1.8
initialize_kbd: Keyboard failed self test
initialize_kbd: Keyboard failed self test
Keyboard timed out[1]
Keyboard timed out[1]
pty: 256 Unix98 ptys configured
pty: 256 Unix98 ptys configured
keyboard: Timeout - AT keyboard not present?
keyboard: Timeout - AT keyboard not present?
keyboard: Timeout - AT keyboard not present?
keyboard: Timeout - AT keyboard not present?
DS1286 Real Time Clock Driver v1.0
DS1286 Real Time Clock Driver v1.0
streamable misc devices registered (keyb:150, gfx:148)
streamable misc devices registered (keyb:150, gfx:148)
sgiseeq.c: David S. Miller (dm@engr.sgi.com)
sgiseeq.c: David S. Miller (dm@engr.sgi.com)
eth0: SGI Seeq8003 eth0: SGI Seeq8003 08:08:00:00:69:69:08:08:9d:9d:ec
ec

SCSI subsystem driver Revision: 1.00
SCSI subsystem driver Revision: 1.00
wd33c93-0: chip=WD33c93B/13 no_sync=0xff no_dma=0wd33c93-0:
chip=WD33c93B/13 no0
 debug_flags=0x00
           setup_args=           setup_args=,,,,,,,,,,,,,,,,,,

           Version 1.25 - 09/Jul/1997, Compiled Jan 17 2001 at 11:41:43
           Version 1.25 - 09/Jul/1997, Compiled Jan 17 2001 at 11:41:43
wd33c93-1: chip=WD33c93B/13 no_sync=0xff no_dma=0wd33c93-1:
chip=WD33c93B/13 no0
 debug_flags=0x00
           setup_args=           setup_args=,,,,,,,,,,,,,,,,,,

           Version 1.25 - 09/Jul/1997, Compiled Jan 17 2001 at 11:41:43
           Version 1.25 - 09/Jul/1997, Compiled Jan 17 2001 at 11:41:43
scsi0 : SGI WD93
scsi0 : SGI WD93
scsi1 : SGI WD93
scsi1 : SGI WD93
 sending SDTR  sending SDTR
0101030301013f3f0c0csync_xfer=2csync_xfer=2c  VendoA

  Type:   Direct-Access       Type:   Direct-Access
ANSI S2

Detected scsi disk sda at scsi0, channel 0, id 4, lun 0
Detected scsi disk sda at scsi0, channel 0, id 4, lun 0
SCSI device sda: 4226725 512-byte hdwr sectors (2164 MB)
SCSI device sda: 4226725 512-byte hdwr sectors (2164 MB)
Partition check:
Partition check:
 sda: sda: sda1 sda1 sda2 sda2 sda3 sda3 sda4 sda4 sda5 sda5 sda6 sda6

SGI Zilog8530 serial driver version 1.00
SGI Zilog8530 serial driver version 1.00
tty00 at 0xbfbd9830 (irq = 21)tty00 at 0xbfbd9830 (irq = 21) is a
Zilog8530
 is a Zilog8530
tty01 at 0xbfbd9838 (irq = 21)tty01 at 0xbfbd9838 (irq = 21) is a
Zilog8530
 is a Zilog8530
NET4: Linux TCP/IP 1.0 for NET4.0
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: IP Protocols: ICMP, ICMP, UDP, UDP, TCP
TCP
IP: routing cache hash table of 2048 buckets, 16Kbytes
IP: routing cache hash table of 2048 buckets, 16Kbytes
TCP: Hash tables configured (established 16384 bind 16384)
TCP: Hash tables configured (established 16384 bind 16384)
Sending BOOTP requests...Sending BOOTP requests..... OK
 OK
IP-Config: Got BOOTP answer from 192.168.0.11, IP-Config: Got BOOTP
answer from3
my address is 192.168.0.13
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
VFS: Mounted root (ext2 filesystem) readonly.
VFS: Mounted root (ext2 filesystem) readonly.
Freeing prom memory: 768kb freed
Freeing prom memory: 768kb freed
Freeing unused kernel memory: 72k freed
Freeing unused kernel memory: 72k freed
INIT: version 2.78 booting
Bringing up the loopback interface...[  OK  ]
Setting up hostname...[  OK  ]
[SNIP]


root:~# cat /proc/cpuinfo
cpu                     : MIPS
cpu model               : R4000SC V6.0
system type             : SGI Indigo2
BogoMIPS                : 0.00
byteorder               : big endian
unaligned accesses      : 0
wait instruction        : no
microsecond timers      : yes
extra interrupt vector  : no
hardware watchpoint     : yes
VCED exceptions         : not available
VCEI exceptions         : not available
root:~# cat /proc/iomem
00000000-00000fff : reserved
00001000-00001fff : reserved
08002000-081d7fff : reserved
  08002000-08188297 : Kernel code
  0819c300-081b23bf : Kernel data
081d8000-0873ffff : System RAM
08740000-087fffff : System RAM
08800000-0dffffff : System RAM
root:~# uname -a
Linux dale 2.4.0 #2 Wed Jan 17 11:40:09 GMT 2001 mips unknown
root:~# free -m
             total       used       free     shared    buffers
cached
Mem:            89         34         54          0         26
5
-/+ buffers/cache:          2         86
Swap:            0          0          0
root:~#


On reboot, I get *LOTS* of rubbish coming down the serial console.


About to try the DEBUG thing now...


Bye for Now,

Ian


                                \|||/ 
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |         Budget: A method for going broke methodically.          |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Wed Jan 17 05:14:22 2001
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From:   Ian Chilton <mailinglist@ichilton.co.uk>
To:     macro@ds2.pg.gda.pl
Cc:     ralf@oss.sgi.com, linux-mips@oss.sgi.com
Subject: Re: Kernel Report - 010117 (2.4.0)
Message-ID: <20010117131348.A29427@woody.ichilton.co.uk>
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Hello,

OK..this is the same machine, same kernel, but with the #define DEBUG:

>> bootp():/vmlinux root=/dev/sda3 console=ttyS0
Obtaining /vmlinux from server slinky
ARCH: SGI-IP22
PROMLIB: ARC firmware Version 1 Revision 10
ARCS MEMORY DESCRIPTOR dump:
[0,a8748674]: base<00000000> pages<00000001> type<Exception Block>
[1,a8748690]: base<00000001> pages<00000001> type<ARCS Romvec Page>
[2,a8748658]: base<00008002> pages<000001d6> type<Standlong Program
Pages>
[3,a8748aa0]: base<000081d8> pages<00000568> type<Generic Free RAM>
[4,a8748a70]: base<00008740> pages<000000c0> type<ARCS Temp Storage
Area>
[5,a8748a54]: base<00008800> pages<00005800> type<Generic Free RAM>
CPU: MIPS-R4400 FPU<MIPS-R4400FPC> ICACHE DCACHE SCACHE
Loading R4000 MMU routines.
CPU revision is: 00000460
Primary instruction cache 16kb, linesize 16 bytes.
Primary data cache 16kb, linesize 16 bytes.
Secondary cache sized at 1024K linesize 128 bytes.
Linux version 2.4.0 (ian@slinky) (gcc version 2.95.3 19991030
(prerelease)) #3 1
MC: SGI memory controller Revision 3
Determined physical RAM map:
 memory: 00001000 @ 00000000 (reserved)
 memory: 00001000 @ 00001000 (reserved)
 memory: 001d6000 @ 08002000 (reserved)
 memory: 00568000 @ 081d8000 (usable)
 memory: 000c0000 @ 08740000 (ROM data)
 memory: 05800000 @ 08800000 (usable)
On node 0 totalpages: 57344
zone(0): 57344 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/sda3 console=ttyS0
Calibrating system timer... 1000000 [200.00 MHz CPU]
zs0: console input
Console: ttyS0 (Zilog8530)
ARCH: SGI-IP22
PROMLIB: ARC firmware Version 1 Revision 10
CPU: MIPS-R4400 FPU<MIPS-R4400FPC> ICACHE DCACHE SCACHE
Loading R4000 MMU routines.
CPU revision is: 00000460
Primary instruction cache 16kb, linesize 16 bytes.
Primary data cache 16kb, linesize 16 bytes.
Secondary cache sized at 1024K linesize 128 bytes.
Linux version 2.4.0 (ian@slinky) (gcc version 2.95.3 19991030
(prerelease)) #3 1
MC: SGI memory controller Revision 3
Determined physical RAM map:
 memory: 00001000 @ 00000000 (reserved)
 memory: 00001000 @ 00001000 (reserved)
 memory: 001d6000 @ 08002000 (reserved)
 memory: 00568000 @ 081d8000 (usable)
 memory: 000c0000 @ 08740000 (ROM data)
 memory: 05800000 @ 08800000 (usable)
On node 0 totalpages: 57344
zone(0): 57344 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/sda3 console=ttyS0
Calibrating system timer... 1000000 [200.00 MHz CPU]
zs0: console input
Console: ttyS0 (Zilog8530)
Calibrating delay loop... Calibrating delay loop... 99.94 BogoMIPS
99.94 BogoMIPS
Memory: 91792k/95648k available (1560k kernel code, 3856k reserved, 88k
data, 7)
Memory: 91792k/95648k available (1560k kernel code, 3856k reserved, 88k
data, 7)
Dentry-cache hash table entries: 32768 (order: 6, 262144 bytes)
Dentry-cache hash table entries: 32768 (order: 6, 262144 bytes)
Buffer-cache hash table entries: 16384 (order: 4, 65536 bytes)
Buffer-cache hash table entries: 16384 (order: 4, 65536 bytes)
Page-cache hash table entries: 65536 (order: 6, 262144 bytes)
Page-cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 16384 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 5, 131072 bytes)
Checking for 'wait' instruction... Checking for 'wait' instruction...
unavaila.
 unavailable.
POSIX conformance testing by UNIFIX
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Based upon Swansea University Computer Society NET3.039
Starting kswapd v1.8
Starting kswapd v1.8
initialize_kbd: Keyboard failed self test
initialize_kbd: Keyboard failed self test
Keyboard timed out[1]
Keyboard timed out[1]
Keyboard timed out[1]
Keyboard timed out[1]
pty: 256 Unix98 ptys configured
pty: 256 Unix98 ptys configured
keyboard: Timeout - AT keyboard not present?
keyboard: Timeout - AT keyboard not present?
keyboard: Timeout - AT keyboard not present?
keyboard: Timeout - AT keyboard not present?
DS1286 Real Time Clock Driver v1.0
DS1286 Real Time Clock Driver v1.0
streamable misc devices registered (keyb:150, gfx:148)
streamable misc devices registered (keyb:150, gfx:148)
sgiseeq.c: David S. Miller (dm@engr.sgi.com)
sgiseeq.c: David S. Miller (dm@engr.sgi.com)
eth0: SGI Seeq8003 eth0: SGI Seeq8003 08:08:00:00:69:69:08:08:9d:9d:ec
ec

SCSI subsystem driver Revision: 1.00
SCSI subsystem driver Revision: 1.00
wd33c93-0: chip=WD33c93B/13 no_sync=0xff no_dma=0wd33c93-0:
chip=WD33c93B/13 no0
 debug_flags=0x00
           setup_args=           setup_args=,,,,,,,,,,,,,,,,,,

           Version 1.25 - 09/Jul/1997, Compiled Jan 17 2001 at 11:41:43
           Version 1.25 - 09/Jul/1997, Compiled Jan 17 2001 at 11:41:43
wd33c93-1: chip=WD33c93B/13 no_sync=0xff no_dma=0wd33c93-1:
chip=WD33c93B/13 no0
 debug_flags=0x00
           setup_args=           setup_args=,,,,,,,,,,,,,,,,,,

           Version 1.25 - 09/Jul/1997, Compiled Jan 17 2001 at 11:41:43
           Version 1.25 - 09/Jul/1997, Compiled Jan 17 2001 at 11:41:43
scsi0 : SGI WD93
scsi0 : SGI WD93
scsi1 : SGI WD93
scsi1 : SGI WD93
 sending SDTR  sending SDTR
0101030301013f3f0c0csync_xfer=2csync_xfer=2c  VendoA

  Type:   Direct-Access       Type:   Direct-Access
ANSI S2

Detected scsi disk sda at scsi0, channel 0, id 4, lun 0
Detected scsi disk sda at scsi0, channel 0, id 4, lun 0
SCSI device sda: 4226725 512-byte hdwr sectors (2164 MB)
SCSI device sda: 4226725 512-byte hdwr sectors (2164 MB)
Partition check:
Partition check:
 sda: sda: sda1 sda1 sda2 sda2 sda3 sda3 sda4 sda4 sda5 sda5 sda6 sda6

SGI Zilog8530 serial driver version 1.00
SGI Zilog8530 serial driver version 1.00
tty00 at 0xbfbd9830 (irq = 21)tty00 at 0xbfbd9830 (irq = 21) is a
Zilog8530
 is a Zilog8530
tty01 at 0xbfbd9838 (irq = 21)tty01 at 0xbfbd9838 (irq = 21) is a
Zilog8530
 is a Zilog8530
NET4: Linux TCP/IP 1.0 for NET4.0
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: IP Protocols: ICMP, ICMP, UDP, UDP, TCP
TCP
IP: routing cache hash table of 2048 buckets, 16Kbytes
IP: routing cache hash table of 2048 buckets, 16Kbytes
TCP: Hash tables configured (established 16384 bind 16384)
TCP: Hash tables configured (established 16384 bind 16384)
Sending BOOTP requests...Sending BOOTP requests..... OK
 OK
IP-Config: Got BOOTP answer from 192.168.0.11, IP-Config: Got BOOTP
answer from3
my address is 192.168.0.13
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
VFS: Mounted root (ext2 filesystem) readonly.
VFS: Mounted root (ext2 filesystem) readonly.
Freeing prom memory: 768kb freed
Freeing prom memory: 768kb freed
Freeing unused kernel memory: 72k freed
Freeing unused kernel memory: 72k freed
INIT: version 2.78 booting


Bye for Now,

Ian

                                \|||/
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |        Proofread carefully to see if you any words out.         |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Wed Jan 17 05:18:22 2001
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	Wed, 17 Jan 2001 05:18:12 -0800
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        woody.ichilton.co.uk") by oss.sgi.com with SMTP id <S554025AbRAQNR7>;
	Wed, 17 Jan 2001 05:17:59 -0800
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Date:   Wed, 17 Jan 2001 13:17:58 +0000
From:   Ian Chilton <mailinglist@ichilton.co.uk>
To:     macro@ds2.pg.gda.pl, ralf@oss.sgi.com, flo@rfc822.org
Cc:     linux-mips@oss.sgi.com
Subject: 2.4.0 Kernel - Summary
Message-ID: <20010117131758.B29427@woody.ichilton.co.uk>
Reply-To: Ian Chilton <ian@ichilton.co.uk>
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Hello,

So, the outstanding issues so far are:

Major Issues:
- Hang on swap (I get this, Flo doesn't ?)
- Can't reboot (Flo and I get this)

Minor Issues:
- Wierd thing in /proc/cpuinfo (Flo and I get this) 
- Double output on boot ??


Bye for Now,

Ian

                                \|||/
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |        Proofread carefully to see if you any words out.         |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Wed Jan 17 05:20:32 2001
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From:   Kanoj Sarcar <kanoj@google.engr.sgi.com>
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Subject: Re: crash in __alloc_bootmem_core on SGI current cvs
To:     ralf@oss.sgi.com (Ralf Baechle)
Date:   Wed, 17 Jan 2001 05:15:36 -0800 (PST)
Cc:     macro@ds2.pg.gda.pl (Maciej W. Rozycki),
        flo@rfc822.org (Florian Lohoff), linux-mips@oss.sgi.com,
        kanoj@engr.sgi.com (Kanoj Sarcar)
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> 
> On Tue, Jan 16, 2001 at 05:39:40PM +0100, Maciej W. Rozycki wrote:
> 
> > > Wouldnt be this correct ? Realsize is size - holes.
> > > 
> > > Index: mm/page_alloc.c
> > > ===================================================================
> > > RCS file: /cvs/linux/mm/page_alloc.c,v
> > > retrieving revision 1.49
> > > diff -u -r1.49 page_alloc.c
> > > --- mm/page_alloc.c	2001/01/11 04:02:45	1.49
> > > +++ mm/page_alloc.c	2001/01/16 16:26:55
> > > @@ -824,7 +824,7 @@
> > >  		if (zholes_size)
> > >  			realsize -= zholes_size[j];
> > >  
> > > -		printk("zone(%lu): %lu pages.\n", j, size);
> > > +		printk("zone(%lu): %lu pages.\n", j, realsize);
> > >  		zone->size = size;
> > >  		zone->name = zone_names[j];
> > >  		zone->lock = SPIN_LOCK_UNLOCKED;
> > 
> >  It look reasonable but is it what was really intended?  You should ask
> > the author or linux-kernel, I suppose. 
> 
> Which probably is Kanoj who is subscribed to this list.
> 
>   Ralf
> 

realsize is fine, and that is what it is in Linus' tree. We want
to report actual number of pages, not number of pages including
the holes in memory.

Kanoj

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Date:   Wed, 17 Jan 2001 14:17:33 +0100 (MET)
From:   Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
To:     Ian Chilton <ian@ichilton.co.uk>
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Subject: Re: Kernel Report - 010117 (2.4.0)
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On Wed, 17 Jan 2001, Ian Chilton wrote:
> OK..this is the normal kernel straight from CVS (010117) on my I2 (not
> Indy as in yesturday..)
> 
> It seems a lot of things are repeated for some reason ?!?

That's because printk() now uses the prom print routine as well. So you see
  - all early messages (before console init)
  - repeat of all early messages when the console is initialized
  - two copies of each message (after console init)

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven ------------- Sony Software Development Center Europe (SDCE)
Geert.Uytterhoeven@sonycom.com ------------------- Sint-Stevens-Woluwestraat 55
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From owner-linux-mips@oss.sgi.com Wed Jan 17 05:51:11 2001
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From:   Florian Lohoff <flo@rfc822.org>
To:     Ian Chilton <ian@ichilton.co.uk>
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Subject: Re: 2.4.0 Kernel - Summary
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On Wed, Jan 17, 2001 at 01:17:58PM +0000, Ian Chilton wrote:
> Hello,
> 
> So, the outstanding issues so far are:
> 
> Major Issues:
> - Can't reboot (Flo and I get this)

I can reboot - but with "reboot -f" which is - Immediate reset
which is not good(tm) for your filesystems. The bug is definitly
a sgiserial.c problem as it doesnt happen on newport console.

Its probably a problem with console and tty output getting mixed.
Definitly a bigger issue as one should merge driver/sbus/zs.c and
driver/sgi/char/sgiserial.c to one driver. (And probably even
the Decstation one)

> Minor Issues:
> - Wierd thing in /proc/cpuinfo (Flo and I get this) 
Fixed ...

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Wed Jan 17 05:56:41 2001
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Hello,

> I can reboot - but with "reboot -f" which is - Immediate reset
> which is not good(tm) for your filesystems. The bug is definitly
> a sgiserial.c problem as it doesnt happen on newport console.

I have only tried the once, because it's not easy with the machine
being remote...but I typed: shutdown -r now. It said:

Changing to Runlevel 0
£^T%&%£^$%&^%$£
£%$&£%^££"%$"£$"£
$"£*$%£"$%£"^%£"$&
etc...

and that was it  :(


Both this and swap worked fine on 001027 (test9)


Bye for Now,

Ian


                                \|||/ 
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |         Budget: A method for going broke methodically.          |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Wed Jan 17 05:58:51 2001
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Date:   Wed, 17 Jan 2001 14:57:12 +0100 (MET)
From:   Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
To:     Florian Lohoff <flo@rfc822.org>
cc:     Ian Chilton <ian@ichilton.co.uk>, linux-mips@oss.sgi.com
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On Wed, 17 Jan 2001, Florian Lohoff wrote:
> Its probably a problem with console and tty output getting mixed.
> Definitly a bigger issue as one should merge driver/sbus/zs.c and
> driver/sgi/char/sgiserial.c to one driver. (And probably even
> the Decstation one)

And a zillion other SCC drivers, like e.g. drivers/char/vme_scc.c...

Currently there's one-size-fits-all(?) driver for 16550 (serial.c) and a
collection of SCC drivers spread across the whole tree.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven ------------- Sony Software Development Center Europe (SDCE)
Geert.Uytterhoeven@sonycom.com ------------------- Sint-Stevens-Woluwestraat 55
Voice +32-2-7248626 Fax +32-2-7262686 ---------------- B-1130 Brussels, Belgium


From owner-linux-mips@oss.sgi.com Wed Jan 17 06:21:01 2001
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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Ian Chilton <ian@ichilton.co.uk>,
        Ralf Baechle <ralf@uni-koblenz.de>
cc:     linux-mips@oss.sgi.com
Subject: Re: Kernel Report - 010117 (2.4.0)
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On Wed, 17 Jan 2001, Ian Chilton wrote:

> Determined physical RAM map:
>  memory: 00001000 @ 00000000 (reserved)
>  memory: 00001000 @ 00001000 (reserved)
>  memory: 001d6000 @ 08002000 (reserved)
>  memory: 00568000 @ 081d8000 (usable)
>  memory: 000c0000 @ 08740000 (ROM data)
>  memory: 05800000 @ 08800000 (usable)
[...]
> Freeing prom memory: 768kb freed
> Freeing prom memory: 768kb freed

 Good -- I was worrying if the code is able to free areas mared as "ROM
data". 

> root:~# cat /proc/iomem
> 00000000-00000fff : reserved
> 00001000-00001fff : reserved
> 08002000-081d7fff : reserved
>   08002000-08188297 : Kernel code
>   0819c300-081b23bf : Kernel data
> 081d8000-0873ffff : System RAM
> 08740000-087fffff : System RAM
> 08800000-0dffffff : System RAM

 It looks consistent with what was reported previously -- good. 

 Thanks for the report.  From your other report I see the system works
with debugging code enabled as well.  It's consistent with last Florian's,
too.  Therefore I'm considering the previous Florian's failure report an
accident. 

 I have no idea why swap doesn't work -- I'm actually running NFS-rooted
and unless I twiddle with the NBD thingy, I will not be able to test swap
anytime soon.

 The double output looks like a problem with printk.  Ralf, I recall you
made a few changes related to printk on SGI recently -- could you please
look into it?

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Wed Jan 17 06:28:01 2001
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Date:   Wed, 17 Jan 2001 15:26:38 +0100
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When I try to activate swap partitions, I get the following:
Swap area shorter than signature indicates
swapon: /dev/hda2: Invalid argument

Note: that I'm running with a 64 bit kernel on a 32 bit userland.
It works fine with a 32 bit kernel.

Have anyone seen this before ?

/Carsten


--
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From owner-linux-mips@oss.sgi.com Wed Jan 17 06:32:31 2001
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cc:     Ian Chilton <ian@ichilton.co.uk>, linux-mips@oss.sgi.com
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On Wed, 17 Jan 2001, Florian Lohoff wrote:

> Its probably a problem with console and tty output getting mixed.
> Definitly a bigger issue as one should merge driver/sbus/zs.c and
> driver/sgi/char/sgiserial.c to one driver. (And probably even
> the Decstation one)

 It's actually deep on my to do list.  We also miss zs DMA support on
DECstation (no idea if it's possible on other platforms) for decent
synchronous support.  DEC claims /240 can do up to 208kbps synchronous --
I wonder if we can achieve this one day.  HDLC support might be
problematic, though, as there is a Z8530 erratum that supposedly turns
this unreliable.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Wed Jan 17 06:49:41 2001
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From:   Florian Lohoff <flo@rfc822.org>
To:     Guido Guenther <guido.guenther@gmx.net>
Cc:     linux-mips@oss.sgi.com
Subject: Re: patches for dvhtool
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On Sun, Oct 15, 2000 at 02:15:23AM +0200, Guido Guenther wrote:
> Hi,
> with the following two patches (first against dvhtool, second against
> current cvs kernel) it's possible to boot the Indy from a local harddisk
> without the need of IRIX to install it in the volume header. Set 
> setenv OSLoader linux 
> and 
> setenv OSLoadPartition /dev/sd(whatever)
> in the boot-prom and do a: 
> dvhtool -d /dev/sda(whatever) --unix-to-vh (your_favorite_ecoff_kernel) linux

I just retried to put the stuff into the volume header wich worked:

I set this in the prom:

OSLoadFilename=vmlinux
OSLoadPartition=/dev/sda1
OSLoader=vmlinux
SystemPartition=scsi(1)disk(4)rdisk(0)partition(0)

when now typing "boot" i get

Unable to load scsi(1)disk(4)rdisk(0)partition(0)/vmlinux: no recognizable
file system on device.

Whereas this is correct - scsi(1) is the extern SCSI Bus on the Indigo2
and disk(4) is therefor /dev/sde

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


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Hi,
i was just on the way again of detecting the console of the Indigo2
automagically - There are some interesting nifty details.

In arch/mips/sgi/kernel/setup.c i find

    251 #ifdef CONFIG_SERIAL_CONSOLE
    252         /* ARCS console environment variable is set to "g?" for
    253          * graphics console, it is set to "d" for the first serial
    254          * line and "d2" for the second serial line.
    255          */
    256         ctype = ArcGetEnvironmentVariable("console");
    257         if(*ctype == 'd') {
    258                 if(*(ctype+1)=='2')
    259                         console_setup ("ttyS1");
    260                 else
    261                         console_setup ("ttyS0");
    262         }
    263 #endif

Which is ok - But - On my Indigo2 (It has a GFX Board) the prom gives me:

console=g
ConsoleOut=serial(0)
ConsoleIn=serial(0)

So - From the logic above this will give me "graphics" console although
there is no keyboard attached and no Monitor. What do others see there 
especially the ones with an Indy and GFX Console.

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Wed Jan 17 07:27:52 2001
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From:   Guido Guenther <guido.guenther@gmx.net>
To:     Florian Lohoff <flo@rfc822.org>
Cc:     linux-mips@oss.sgi.com
Subject: Re: patches for dvhtool
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On Wed, Jan 17, 2001 at 03:49:37PM +0100, Florian Lohoff wrote:
> I set this in the prom:
> 
> OSLoadFilename=vmlinux
> OSLoadPartition=/dev/sda1
> OSLoader=vmlinux
> SystemPartition=scsi(1)disk(4)rdisk(0)partition(0)
No need to set OSLoadFilename, OSLoader should be sufficient. Could you
try to use SystemPartition=...partition(8)? Since this is the partition
number of the volume header AFAIR.
 -- Guido 

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From:	Ralf Baechle <ralf@oss.sgi.com>
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On Wed, Jan 17, 2001 at 03:15:23PM +0100, Maciej W. Rozycki wrote:

>  The double output looks like a problem with printk.  Ralf, I recall you
> made a few changes related to printk on SGI recently -- could you please
> look into it?

Yes, it's fairly obvious which change is causing it.  It's less obvious
why it happens.  I use the same strategy for the Momentum Ocelot CP7000
and Origin systems and don't get double output.  Will look into it.

  Ralf

From owner-linux-mips@oss.sgi.com Wed Jan 17 08:00:53 2001
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To:     Guido Guenther <guido.guenther@gmx.net>
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Subject: Re: patches for dvhtool
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On Wed, Jan 17, 2001 at 04:27:18PM +0100, Guido Guenther wrote:
> On Wed, Jan 17, 2001 at 03:49:37PM +0100, Florian Lohoff wrote:
> > I set this in the prom:
> > 
> > OSLoadFilename=vmlinux
> > OSLoadPartition=/dev/sda1
> > OSLoader=vmlinux
> > SystemPartition=scsi(1)disk(4)rdisk(0)partition(0)
> No need to set OSLoadFilename, OSLoader should be sufficient. Could you
> try to use SystemPartition=...partition(8)? Since this is the partition
> number of the volume header AFAIR.


>> setenv SystemPartition scsi(1)disk(4)rdisk(0)partition(8)
>> boot
1212416+135264+143084 entry: 0x880025a8                                        

Thats it - Now silence as the serial console will not be detected
automagically or at least not very reliable.

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Wed Jan 17 08:06:32 2001
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Subject: Re: patches for dvhtool
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On Wed, Jan 17, 2001 at 04:51:52PM +0100, Florian Lohoff wrote:
[..snip..] 
> >> setenv SystemPartition scsi(1)disk(4)rdisk(0)partition(8)
> >> boot
> 1212416+135264+143084 entry: 0x880025a8                                        
Good. Will add that to the howto then.
 -- Guido

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On Wed, Jan 17, 2001 at 05:06:03PM +0100, Guido Guenther wrote:
> On Wed, Jan 17, 2001 at 04:51:52PM +0100, Florian Lohoff wrote:
> [..snip..] 
> > >> setenv SystemPartition scsi(1)disk(4)rdisk(0)partition(8)
> > >> boot
> > 1212416+135264+143084 entry: 0x880025a8                                        
> Good. Will add that to the howto then.

BTW: Is there any way of deleteing/renaming files in the
volume-header-directory ? Is there a way to set "bootfile" ?

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Wed Jan 17 08:50:22 2001
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On Wed, Jan 17, 2001 at 05:31:53PM +0100, Florian Lohoff wrote:
> On Wed, Jan 17, 2001 at 05:06:03PM +0100, Guido Guenther wrote:
> > On Wed, Jan 17, 2001 at 04:51:52PM +0100, Florian Lohoff wrote:
> > [..snip..] 
> > > >> setenv SystemPartition scsi(1)disk(4)rdisk(0)partition(8)
> > > >> boot
> > > 1212416+135264+143084 entry: 0x880025a8                                        
> > Good. Will add that to the howto then.
> 
> BTW: Is there any way of deleteing/renaming files in the
> volume-header-directory ? Is there a way to set "bootfile" ?
Not yet. Only thing you can do is replace files by giving them the same
name as an already existent entry in the volume header. This always
bothered me too. Maybe someone wants to fix that on a 'rainy sunday':)
 -- Guido

From owner-linux-mips@oss.sgi.com Wed Jan 17 09:52:43 2001
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From:   Ian Chilton <mailinglist@ichilton.co.uk>
To:     Florian Lohoff <flo@rfc822.org>
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Subject: Re: patches for dvhtool
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Hello,

> BTW: Is there any way of deleteing/renaming files in the
> volume-header-directory ? Is there a way to set "bootfile" ?

You could do what I do with my tftp boot directory.

Bootp or whatever points to vmlinux-hostname.

vmlinux-hostname is a symlink to a kernel.

Changing kernels is just a matter of changing the symlink.

Also, because I have multiple arch's, I put the kernels in subdirs too:

[ian@slinky:~]$ ls -l /export/tftpboot/
total 16
lrwxrwxrwx   1 root     root           23 Jan  6 16:34 192.168.0.21 ->
../javastation/iclinux/
lrwxrwxrwx   1 root     root           18 Jan  4 18:48 C0A8000E.SUN4M
-> sparc/tftpboot.img
lrwxrwxrwx   1 root     root           18 Jan  4 18:03 C0A8000F.SUN4C
-> sparc/tftpboot.img
lrwxrwxrwx   1 root     root           24 Jan  4 23:31 C0A80012.SUN4M
-> sparc/vmlinux-2.4-test12
lrwxrwxrwx   1 root     root           14 Jan  2 18:54 C0A80015 ->
C0A80015.SUN4M
lrwxrwxrwx   1 root     root           36 Jan  4 17:29 C0A80015.PROL ->
javastation/vmlinux-2.4-test12-sparc
lrwxrwxrwx   1 root     root           11 Jan  2 18:42 C0A80015.SUN4M
-> proll.krups
drwxr-xr-x   2 root     root         4096 Jan  4 23:20 javastation
drwxr-xr-x   2 root     root         4096 Jan 17 13:10 mips
lrwxrwxrwx   1 root     root           28 Jan  4 17:32 proll.krups ->
javastation/proll.krups.ID13
drwxr-xr-x   2 root     root         4096 Jan  6 13:21 sparc
drwxr-xr-x   2 root     root         4096 Jan 16 19:24 tmp
lrwxrwxrwx   1 root     root           29 Jan 16 19:25 vmlinux-chip ->
mips/vmlinux-010116-IP22-4400
lrwxrwxrwx   1 root     root           30 Jan 17 13:11 vmlinux-dale ->
mips/vmlinux-010117-IP22-DEBUG

 

Bye for Now,

Ian

                                \|||/
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |        Proofread carefully to see if you any words out.         |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Wed Jan 17 11:01:05 2001
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Subject: Re: Current CVS (010116) Boots OK
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On Tue, Jan 16, 2001 at 09:17:45PM +0100, Maciej W. Rozycki wrote:
> On Tue, 16 Jan 2001, Ian Chilton wrote:
> > Memory: 91868k/95716k available (1517k kernel code, 3848k reserved, 84k
> > data, 6)
> 
>  Great!  The code works.  Thanks for the report.  Hmm, that "6)" at the
> end looks weird, though -- there should be something like "xxxk init, 0k
> highmem)"... 

I belive this is because of the terminal program being used.  It appears to
not have any kind of line wrap, so characters printed after the 80th
overwrite the last column of the display.

-Chris

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Hello,

> I belive this is because of the terminal program being used.  It appears to
> not have any kind of line wrap, so characters printed after the 80th
> overwrite the last column of the display.


humm..could be minicom, but may be my mailer ?


Bye for Now,

Ian


                                \|||/ 
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |         Budget: A method for going broke methodically.          |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Wed Jan 17 19:08:06 2001
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From:   Florian Lohoff <flo@rfc822.org>
To:     Ian Chilton <ian@ichilton.co.uk>
Cc:     linux-mips@oss.sgi.com
Subject: Re: patches for dvhtool
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On Wed, Jan 17, 2001 at 05:52:27PM +0000, Ian Chilton wrote:
> Hello,
> 
> > BTW: Is there any way of deleteing/renaming files in the
> > volume-header-directory ? Is there a way to set "bootfile" ?
> 
> You could do what I do with my tftp boot directory.
> 
> Bootp or whatever points to vmlinux-hostname.
> 
> vmlinux-hostname is a symlink to a kernel.
> 
> Changing kernels is just a matter of changing the symlink.

I do that for a couple of years now for all architectures capable
of netbooting - Nothing new. But as you could read up there
i asked something completely different. I want to boot of DISK !
And i asked questions about dvhtool not tftp and symlinks.

Not my day ...
Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


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To:	Ian Chilton <ian@ichilton.co.uk>
Cc:	Chris Ruvolo <csr6702@grace.rit.edu>, linux-mips@oss.sgi.com
Subject: Re: Current CVS (010116) Boots OK
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On Wed, Jan 17, 2001 at 07:02:19PM +0000, Ian Chilton wrote:

> > I belive this is because of the terminal program being used.  It appears to
> > not have any kind of line wrap, so characters printed after the 80th
> > overwrite the last column of the display.
> 
> humm..could be minicom, but may be my mailer ?

True unixers use cu(1) as terminal program, works great.

  Ralf

From owner-linux-mips@oss.sgi.com Thu Jan 18 00:53:47 2001
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Date:   Thu, 18 Jan 2001 09:01:22 +0100 (MET)
From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Chris Ruvolo <csr6702@grace.rit.edu>
cc:     Ian Chilton <ian@ichilton.co.uk>, linux-mips@oss.sgi.com
Subject: Re: Current CVS (010116) Boots OK
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On Wed, 17 Jan 2001, Chris Ruvolo wrote:
> >  Great!  The code works.  Thanks for the report.  Hmm, that "6)" at the
> > end looks weird, though -- there should be something like "xxxk init, 0k
> > highmem)"... 
> 
> I belive this is because of the terminal program being used.  It appears to
> not have any kind of line wrap, so characters printed after the 80th
> overwrite the last column of the display.

 It's possible.  I'm actually using `cu' and it works fine wrt wrapping
but it requires hw flow control (it sets "-clocal" and "crtscts" 
explicitly) unfortunately, which is why it cannot be used for the
DECstation's REX console I/O (which uses DTR/DSR flow control due to
serial interface limitations on certain DEC hardware).  I'm going to
modify `cu' at one time but since I don't really work with REX that much
I'm just using `cat' for this purpose for now. 

 It's best to use `dmesg' (with "-s 32768" if necessary) if at all
possible to fetch logs anyway.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Thu Jan 18 02:17:07 2001
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From:   Ian Chilton <ian@ichilton.co.uk>
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Cc:     linux-mips@oss.sgi.com
Subject: Re: patches for dvhtool
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Hello,

> Nothing new. But as you could read up there
> i asked something completely different. I want to boot of DISK !
> And i asked questions about dvhtool not tftp and symlinks.


I know!

What I said (or ment to say..) was could you do a similar thing as....


Sorry for the confusion..


Bye for Now,

Ian


                                \|||/ 
                                (o o)
 /---------------------------ooO-(_)-Ooo---------------------------\
 |  Ian Chilton        (IRC Nick - GadgetMan)     ICQ #: 16007717  |
 |-----------------------------------------------------------------|
 |  E-Mail: ian@ichilton.co.uk     Web: http://www.ichilton.co.uk  |
 |-----------------------------------------------------------------|
 |         Budget: A method for going broke methodically.          |
 \-----------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Thu Jan 18 07:31:38 2001
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Date:   Thu, 18 Jan 2001 16:30:15 +0100
From:   Carsten Langgaard <carstenl@mips.com>
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Subject: Can't activate swap partitions
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I'm having some problems with activating swap partitions when using a 64
bit kernel on a 32 bit userland.
I think I know what the problem is.
The structure of the swap devices is that the first 4096 bytes contains
a bitmap. Bits that have been set indicate that the page of memory for
which the number in the swap space matches the offset of the bit at the
start of the space is available for paging.
The problem is then these bits are being checked, through the test_bit
function call, where we read 64 bit at a time, and they where written 32
bit at a time (from the 32 bit kernel).
Note: we are talking about a bigendian system.

A little example to illustrate that I mean:

Set bit 0-53 to 1 and clear bit 54-63 (stored with 32 bit access)
ADDR = 0xffffffff;
ADDR+4 = 0x003fffff;

If I read it as two 32 bit words I get the same result (bit 0-53 is
set), but if I read it as one 64 bit double-word I get.

ADDR = 0xffffffff0003ffff;

Now bit 0-17 and bit 32-63 is set.

The bottom line is that I don't think we can make the address 64 bit
aligned in the "set/clear-and-test" functions in
include/asm-mips64/bitops.h, without hurting a lot of drivers which use
these functions to operate on hw-defined data-structures.

/Carsten



--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Fri Jan 19 00:33:18 2001
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To:     Linux/MIPS Development <linux-mips@oss.sgi.com>
cc:     Rasmus Andersen <rasmus@jaquet.dk>
Subject: [PATCH] make drivers/scsi/dec_esp.c check request_irq return code
 (240p3) (fwd)
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---------- Forwarded message ----------
Date: Wed, 17 Jan 2001 23:18:52 +0100
From: Rasmus Andersen <rasmus@jaquet.dk>
To: linux-kernel@vger.kernel.org
Subject: [PATCH] make drivers/scsi/dec_esp.c check request_irq return code
    (240p3)

Hi.

(I have not been able to find a maintainer for this code.)

This patch makes drivers/scsi/dec_esp.c check the return code of
request_irq. It applies cleanly against 240p3 and ac9.

In the search_tc_slot loop I made it continue the search on failure
for one slot. Would this be correct?

Please comment.


--- linux-ac9/drivers/scsi/dec_esp.c.org	Sun Jan 14 20:03:50 2001
+++ linux-ac9/drivers/scsi/dec_esp.c	Wed Jan 17 22:52:52 2001
@@ -87,7 +87,7 @@
 unsigned char scsi_pmaz_dma_buff_used[ESP_NCMD];
 unsigned char scsi_cur_buff = 1;	/* Leave space for command buffer */
 __u32 esp_virt_buffer;
-int scsi_current_length = 0;
+int scsi_current_length;
 
 volatile unsigned char cmd_buffer[16];
 volatile unsigned char pmaz_cmd_buffer[16];
@@ -181,10 +181,13 @@
 		esp->esp_command_dvma = (__u32) KSEG1ADDR((volatile unsigned char *) cmd_buffer);
 	
 		esp->irq = SCSI_INT;
-	request_irq(esp->irq, esp_intr, SA_INTERRUPT, "NCR 53C94 SCSI",
-	            NULL);
-		request_irq(SCSI_DMA_INT, scsi_dma_int, SA_INTERRUPT, "JUNKIO SCSI DMA",
-			    NULL);
+		if (request_irq(esp->irq, esp_intr, SA_INTERRUPT, 
+				"NCR 53C94 SCSI", NULL))
+			goto err_dealloc;
+		if (request_irq(SCSI_DMA_INT, scsi_dma_int, SA_INTERRUPT, 
+				"JUNKIO SCSI DMA", NULL))
+			goto err_free_irq;
+			
 
 	esp->scsi_id = 7;
 		
@@ -257,7 +260,12 @@
 			esp->dma_mmu_release_scsi_sgl = 0;
 			esp->dma_advance_sg = 0;
 
-			request_irq(esp->irq, esp_intr, SA_INTERRUPT, "PMAZ_AA", NULL);
+			if (request_irq(esp->irq, esp_intr, SA_INTERRUPT, 
+					 "PMAZ_AA", NULL)) {
+				esp_deallocate(esp);
+				release_tc_card(slot);
+				continue;
+			}
 			esp->scsi_id = 7;
 			esp->diff = 0;
 			esp_initialize(esp);
@@ -267,10 +275,16 @@
 
 	if(nesps) {
 		printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps, esps_in_use);
-	esps_running = esps_in_use;
-	return esps_in_use;
-	} else
-    return 0;
+		esps_running = esps_in_use;
+		return esps_in_use;
+	}
+	return 0;
+
+ err_free_irq:
+	free_irq(esp->irq, esp_intr);
+ err_dealloc:
+	esp_deallocate(esp);
+	return 0;
 }
 
 /************************************************************* DMA Functions */
@@ -524,4 +538,4 @@
 	    (char *) KSEG0ADDR((sp->request_buffer));
 }
 
-#endif
\ No newline at end of file
+#endif

-- 
Regards,
        Rasmus(rasmus@jaquet.dk)

``When the president does it, that means that it is not illegal.''
             --Richard M. Nixon, TV interview with David Frost, 1977 May 4
-
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From owner-linux-mips@oss.sgi.com Fri Jan 19 00:35:19 2001
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Subject: [PATCH] make drivers/scsi/sgiwd93.c check some more return codes
 (240p3) (fwd)
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---------- Forwarded message ----------
Date: Wed, 17 Jan 2001 23:26:53 +0100
From: Rasmus Andersen <rasmus@jaquet.dk>
To: andrewb@uab.edu
Cc: linux-kernel@vger.kernel.org
Subject: [PATCH] make drivers/scsi/sgiwd93.c check some more return codes
    (240p3)

Hi.

The following patch makes drivers/scsi/sgiwd93.c check the return code
from request_irq and get_free_pages. It also removes a line already done
a bit higher up (the dma_cache_wback_inv one).

Please comment.



--- linux-ac9/drivers/scsi/sgiwd93.c.org	Sun Jan 14 21:33:29 2001
+++ linux-ac9/drivers/scsi/sgiwd93.c	Sun Jan 14 22:57:46 2001
@@ -281,6 +281,11 @@
 	sgiwd93_host->irq = SGI_WD93_0_IRQ;
 
 	buf = (uchar *) get_free_page(GFP_KERNEL);
+	if (!buf) {
+		printk(KERN_WARNING "sgiwd93: Could not allocate memory for host0 buffer.\n");
+		scsi_unregister(sgiwd93_host);
+		return 0;
+	}
 	init_hpc_chain(buf);
 	dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE);
 	/* HPC_SCSI_REG0 | 0x03 | KSEG1 */
@@ -290,9 +295,14 @@
 	hdata = (struct WD33C93_hostdata *)sgiwd93_host->hostdata;
 	hdata->no_sync = 0;
 	hdata->dma_bounce_buffer = (uchar *) (KSEG1ADDR(buf));
-	dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE);
 
-	request_irq(SGI_WD93_0_IRQ, sgiwd93_intr, 0, "SGI WD93", (void *) sgiwd93_host);
+	if (request_irq(SGI_WD93_0_IRQ, sgiwd93_intr, 0, "SGI WD93", (void *) sgiwd93_host)) {
+		printk(KERN_WARNING "sgiwd93: Could not register IRQ %d (for host 0).\n", sgiwd93_intr);
+		wd33c93_release();
+		free_page(buf);
+		scsi_unregister(sgiwd93_host);
+		return 0;
+	}
         /* set up second controller on the Indigo2 */
 	if(!sgi_guiness) {
 		sgiwd93_host1 = scsi_register(SGIblows, sizeof(struct WD33C93_hostdata));
@@ -302,6 +312,12 @@
 			sgiwd93_host1->irq = SGI_WD93_1_IRQ;
 	
 			buf = (uchar *) get_free_page(GFP_KERNEL);
+			if (!buf) {
+				printk(KERN_WARNING "sgiwd93: Could not allocate memory for host1 buffer.\n");
+				scsi_unregister(sgiwd93_host1);
+				called = 1;
+				return 1; /* We registered host0 so return success*/
+			}
 			init_hpc_chain(buf);
 			dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE);
 			/* HPC_SCSI_REG1 | 0x03 | KSEG1 */
@@ -313,7 +329,13 @@
 			hdata1->dma_bounce_buffer = (uchar *) (KSEG1ADDR(buf));
 			dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE);
 	
-			request_irq(SGI_WD93_1_IRQ, sgiwd93_intr, 0, "SGI WD93", (void *) sgiwd93_host1);
+			if (request_irq(SGI_WD93_1_IRQ, sgiwd93_intr, 0, "SGI WD93", (void *) sgiwd93_host1)) {
+				printk(KERN_WARNING "sgiwd93: Could not allocate irq %d (for host1).\n", sgiwd93_intr);
+				wd33c93_release();
+				free_page(buf);
+				scsi_unregister(sgiwd93_host1);
+				/* Fall through since host0 registered OK */
+			}
 		}
 	}
 	

-- 
Regards,
        Rasmus(rasmus@jaquet.dk)

Smoking kills. If you're killed, you've lost a very important part of your
life.  -Brooke Shields, during an interview to become spokesperson for a
federal anti-smoking campaign.
-
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From owner-linux-mips@oss.sgi.com Fri Jan 19 00:41:19 2001
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Date:   Fri, 19 Jan 2001 09:40:44 +0100
From:   "Houten K.H.C. van (Karel)" <K.H.C.vanHouten@research.kpn.com>
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Subject: Re: [PATCH] make drivers/scsi/dec_esp.c check request_irq return code
 (240p3) (fwd)
In-reply-to: "Your message of Fri, 19 Jan 2001 09:31:54 +0100."
 <Pine.LNX.4.05.10101190931310.27117-100000@callisto.of.borg>
To:     Geert Uytterhoeven <geert@linux-m68k.org>
Cc:     Linux/MIPS Development <linux-mips@oss.sgi.com>,
        Rasmus Andersen <rasmus@jaquet.dk>,
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Hi all,

Geert Forwarded:
> Date: Wed, 17 Jan 2001 23:18:52 +0100
> From: Rasmus Andersen <rasmus@jaquet.dk>
> To: linux-kernel@vger.kernel.org
> Subject: [PATCH] make drivers/scsi/dec_esp.c check request_irq return code
>     (240p3)
> 
> Hi.
> 
> (I have not been able to find a maintainer for this code.)
> 
> This patch makes drivers/scsi/dec_esp.c check the return code of
> request_irq. It applies cleanly against 240p3 and ac9.
> 
> In the search_tc_slot loop I made it continue the search on failure
> for one slot. Would this be correct?
> 
> Please comment.

Would this be the cause of the problem I have in my 5000/260
that I can only use the on-board SCSI interface, and not
the TC scsi card (which should use the same driver)?

I hope to be able to test this patch this weekend!

Regards,
Karel.
-- 
Karel van Houten

----------------------------------------------------------
The box said "Requires Windows 95 or better."
I can't understand why it won't work on my Linux computer. 
----------------------------------------------------------



From owner-linux-mips@oss.sgi.com Fri Jan 19 03:04:39 2001
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        Rasmus Andersen <rasmus@jaquet.dk>,
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Subject: Re: [PATCH] make drivers/scsi/dec_esp.c check request_irq return code (240p3) (fwd)
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On Fri, Jan 19, 2001 at 09:40:44AM +0100, Houten K.H.C. van (Karel) wrote:
> Hi all,
> 
> Would this be the cause of the problem I have in my 5000/260
> that I can only use the on-board SCSI interface, and not
> the TC scsi card (which should use the same driver)?
> 
> I hope to be able to test this patch this weekend!

I dont think so - The addtional cards have been broken since early
2.4.0 and i tried once to fix it and clean up the spaghetti stuff
but i think i failed horribly and made it worse in the cvs.

I'll have a look at it soon(tm).

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Fri Jan 19 03:46:09 2001
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Subject: Re: [PATCH] make drivers/scsi/dec_esp.c check request_irq return code (240p3) (fwd)
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On Fri, Jan 19, 2001 at 11:58:05AM +0100, Florian Lohoff wrote:
> On Fri, Jan 19, 2001 at 09:40:44AM +0100, Houten K.H.C. van (Karel) wrote:
> > Hi all,
> > 
> > Would this be the cause of the problem I have in my 5000/260
> > that I can only use the on-board SCSI interface, and not
> > the TC scsi card (which should use the same driver)?
> > 
> > I hope to be able to test this patch this weekend!
> 
> I dont think so - The addtional cards have been broken since early
> 2.4.0 and i tried once to fix it and clean up the spaghetti stuff
> but i think i failed horribly and made it worse in the cvs.
> 
> I'll have a look at it soon(tm).

Sorry - Meant early 2.3. 

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Fri Jan 19 10:14:02 2001
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Subject: R[45]KC PRiD fields?
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Does anyone happen to know what the R4Kc anc R5KC use for the company ID of the
PrID register (bits 23-16)?  I'm assuming it's 1, which is reserved for MTI,
but bits 15-8 seem to be carefully chosen not to conflict with previous
processors in the non-MIPS32/MIPS64 PRiD space. 

I'm trying to not break detection of those processors in cpu_probe()...

-Justin

From owner-linux-mips@oss.sgi.com Fri Jan 19 10:38:51 2001
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Date:   Fri, 19 Jan 2001 11:38:16 -0700
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Subject: Re: Glibc-error.
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I'm curious which version of glibc incorporated
support for syscall changes that have occured
with the 2.4.0 kernel.  Or is it all there yet
even with glibc 2.2.1?

Quinn

owner-linux-mips@oss.sgi.com wrote:

>>>>>> Nicu Popovici writes:
>>>>> 
> 
>  > Hello ,
>  > I am struggling to get glibc 2.1.3 working for mips. I have to do this
>  > so please not redirect me to another glibc. I did a diff between glibc
>  > 2.0.6 for mips and glibc 2.1.3 and now I applied the patch obtained on
>  > glibc 2.1.3 . At make I get the following error and I don't know what to
>  > do. Maybe someone will help me.
> 
> You just can't apply the patch from 2.0.6 to 2.1.3 without any changes
> - and you also want to check how I've done it for glibc 2.2.1.  To
> much has changed in between and 2.0.6 might just be a basis for you.
> 
> Andreas


From owner-linux-mips@oss.sgi.com Fri Jan 19 10:44:02 2001
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On Fri, Jan 19, 2001 at 11:38:16AM -0700, Quinn Jensen wrote:

> I'm curious which version of glibc incorporated
> support for syscall changes that have occured
> with the 2.4.0 kernel.  Or is it all there yet
> even with glibc 2.2.1?

They're in 2.2.x.

  Ralf

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Subject: Re: [PATCH] make drivers/scsi/dec_esp.c check request_irq return code (240p3) (fwd)
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On Fri, Jan 19, 2001 at 09:40:44AM +0100, Houten K.H.C. van (Karel) wrote:
> Would this be the cause of the problem I have in my 5000/260
> that I can only use the on-board SCSI interface, and not
> the TC scsi card (which should use the same driver)?

As Florian Lohoff commented I doubt this patch will be of any
help for you. My comment wrt. continuing in the tc loop was
merely in case of a request_irq failure, a failure ignored
earlier. So I would guess that this patch is not your
problemkiller. But testing is always nice :)

-- 
Regards,
        Rasmus(rasmus@jaquet.dk)

There are two major products that come out of Berkeley: LSD and UNIX. We 
don't believe this to be a coincidence. -- Jeremy S. Anderson 

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Maciej W. Rozycki wrote:
[snip]
> It's possible.  I'm actually using `cu' and it works fine wrt wrapping
>but it requires hw flow control (it sets "-clocal" and "crtscts" 
>explicitly) unfortunately, which is why it cannot be used for the
>DECstation's REX console I/O (which uses DTR/DSR flow control due to
>serial interface limitations on certain DEC hardware).  I'm going to
>modify `cu' at one time but since I don't really work with REX that much
>I'm just using `cat' for this purpose for now.

You might try 'screen'. I don't know if it requires Hardware
flow control, but it works for me via

screen screen /dev/ttyS1


Thiemo


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Subject: Re: R[45]KC PRiD fields?
Date:   Fri, 19 Jan 2001 23:39:09 +0100
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> Does anyone happen to know what the R4Kc anc R5KC use for the company ID
of the
> PrID register (bits 23-16)?  I'm assuming it's 1, which is reserved for
MTI,
> but bits 15-8 seem to be carefully chosen not to conflict with previous
> processors in the non-MIPS32/MIPS64 PRiD space.

The MIPS 4KC has a PrID of 0x000180xx
The MIPS 5KC has a PrID of 0x000181xx

            Kevin K.




From owner-linux-mips@oss.sgi.com Sat Jan 20 05:33:57 2001
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To:     Quinn Jensen <jensenq@Lineo.COM>
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From:   Andreas Jaeger <aj@suse.de>
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Quinn Jensen <jensenq@Lineo.COM> writes:

> I'm curious which version of glibc incorporated
> support for syscall changes that have occured
> with the 2.4.0 kernel.  Or is it all there yet
> even with glibc 2.2.1?

glibc 2.2 and 2.2.1 should support all features and syscalls of 2.4.0
- if not it's a bug in glibc ;-)

Andreas
-- 
 Andreas Jaeger
  SuSE Labs aj@suse.de
   private aj@arthur.inka.de
    http://www.suse.de/~aj

From owner-linux-mips@oss.sgi.com Sat Jan 20 15:45:31 2001
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From:   Guido Guenther <guido.guenther@gmx.net>
To:     Florian Lohoff <flo@rfc822.org>
Cc:     linux-mips@oss.sgi.com
Subject: Re: patches for dvhtool
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On Wed, Jan 17, 2001 at 03:49:37PM +0100, Florian Lohoff wrote:
> On Sun, Oct 15, 2000 at 02:15:23AM +0200, Guido Guenther wrote:
> > Hi,
> > with the following two patches (first against dvhtool, second against
> > current cvs kernel) it's possible to boot the Indy from a local harddisk
> > without the need of IRIX to install it in the volume header. Set 
> > setenv OSLoader linux 
> > and 
> > setenv OSLoadPartition /dev/sd(whatever)
> > in the boot-prom and do a: 
> > dvhtool -d /dev/sda(whatever) --unix-to-vh (your_favorite_ecoff_kernel) linux

I just noticed that the kernel patch is slightly broken, it fails when
you specify additional boot parameters. Fixed one is at:
    http://honk.physik.uni-konstanz.de/linux-mips/indy-boot/linux-2001-01-20.diff

From owner-linux-mips@oss.sgi.com Sat Jan 20 17:58:02 2001
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I've got a 5231-based board running a test9-ish kernel. The board is
quite stable and I don't have any problems using the serial console,
running Bonnie, etc.  However, when I enable a virtual terminal and ps2
keyboard, I have problems running commands at the virt terminal.  I
traced it to the init task seg faulting and getting killed by the
kernel, which in turn kills my system. One of the easiest way to
reproduce this problem is to try filename completion, such as "ls
/etc/nss <tab>" -- hangs just about all the time.  Has anyone else
experienced similar problems with any other mips workstation/board?

Pete

From owner-linux-mips@oss.sgi.com Sat Jan 20 18:04:52 2001
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From:   Dave Gilbert <gilbertd@treblig.org>
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Subject: Trying to boot an Indy
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Hi,
  I'm trying to boot my Indy into Linux for the first time and not having
any luck.

1) I tried bootp - bootp()vmlinux - it says 'no server for vmlinux'.  The
bootp server is a Linux/Alpha box running 2.4.0-ac9 - I've already done
the trick with no_pmtu.  tcpdump shows bootp sending a packet with
apparently the correct mac address.

2) So I ftp'd the file over under Irix, gzip -d'd it and then rebooted and
from sash did boot indyvmlinux - this immediatly after starting gave
'Exception: <vector=UTLB Miss>' plus details (available on request).
(This is kernel vmlinux=001027-test9-r4x00.gz off
download.ichilton.co.uk/pub/ichilton/linux-mips/kernels).

This is an Indy R4600PC with 64MB RAM.

Ideas appreciated.

Dave

P.S. I've got a lead wired here to do the 13w3 but it doesn't seem to be
spot on - I don't get any green, but it is sync'd - this is going to an
Iiyama 8617 (original 17") monitor. Ideas on that would also be
appreciated.

-- 
 ---------------- Have a happy GNU millennium! ----------------------   
/ Dr. David Alan Gilbert      | Running GNU/Linux on m68k, |  Happy  \ 
\   gro.gilbert @ treblig.org |  Alpha, x86, ARM and SPARC |  In Hex /
 \ ___________________________|___ http://www.treblig.org  |________/


From owner-linux-mips@oss.sgi.com Sat Jan 20 20:40:42 2001
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From:	Ralf Baechle <ralf@oss.sgi.com>
To:	Dave Gilbert <gilbertd@treblig.org>
Cc:	linux-mips@oss.sgi.com
Subject: Re: Trying to boot an Indy
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On Sun, Jan 21, 2001 at 02:01:15AM +0000, Dave Gilbert wrote:

> 2) So I ftp'd the file over under Irix, gzip -d'd it and then rebooted and
> from sash did boot indyvmlinux - this immediatly after starting gave
> 'Exception: <vector=UTLB Miss>' plus details (available on request).
> (This is kernel vmlinux=001027-test9-r4x00.gz off
> download.ichilton.co.uk/pub/ichilton/linux-mips/kernels).
> 
> This is an Indy R4600PC with 64MB RAM.

You may have become a victim of a sash bug which makes the firmware report
used memory as free memory and in the end results in the kernel overwriting
itself.  The solution is easy; don't use sash.  This means you either
have to boot the kernel via ``bootp() -f ...'' from the network or you
use IRIX's dvhtool to write it into the volume header, then boot it from
the kernel prompt by just entering the kernel name.

  Ralf

From owner-linux-mips@oss.sgi.com Sun Jan 21 05:31:16 2001
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On Sun, 21 Jan 2001, Ralf Baechle wrote:

> On Sun, Jan 21, 2001 at 02:01:15AM +0000, Dave Gilbert wrote:
> 
> > 2) So I ftp'd the file over under Irix, gzip -d'd it and then rebooted and
> > from sash did boot indyvmlinux - this immediatly after starting gave
> > 'Exception: <vector=UTLB Miss>' plus details (available on request).
> > (This is kernel vmlinux=001027-test9-r4x00.gz off
> > download.ichilton.co.uk/pub/ichilton/linux-mips/kernels).
> > 
> > This is an Indy R4600PC with 64MB RAM.
> 
> You may have become a victim of a sash bug which makes the firmware report
> used memory as free memory and in the end results in the kernel overwriting
> itself.  The solution is easy; don't use sash.  This means you either
> have to boot the kernel via ``bootp() -f ...'' from the network or you
> use IRIX's dvhtool to write it into the volume header, then boot it from
> the kernel prompt by just entering the kernel name.

Well the bootp() stuff still won't respond so that is out, and dvhtool is
saying there isn't enough room for my linux image. Hmph.

Running bootpc under Irix seems to give sensible results.

Is there any other mechanism for loading other than bootp ?

Dave

-- 
 ---------------- Have a happy GNU millennium! ----------------------   
/ Dr. David Alan Gilbert      | Running GNU/Linux on m68k, |  Happy  \ 
\   gro.gilbert @ treblig.org |  Alpha, x86, ARM and SPARC |  In Hex /
 \ ___________________________|___ http://www.treblig.org  |________/


From owner-linux-mips@oss.sgi.com Sun Jan 21 09:15:07 2001
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From:   Dave Gilbert <gilbertd@treblig.org>
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Hi,
  With thanks to the guys on the #mipslinux IRC channel my Indy (dino) is
booting.

Points:

1) I needed to put an sa=hostip in the bootp to point to my server.
2) The 2.4.x kernels will not boot from Sash on my machine - they are OK
via bootp/tftp.
3) The ncurses in the base off
/ftp.uni-mainz.de/pub/Linux/debian-local/mips/ is duff; but there is a
slightly newer ncurses in there which springs it into life.

(My green gun is going now - but my red is off - time to hack the little
lead for the 13w3).

Dave

-- 
 ---------------- Have a happy GNU millennium! ----------------------   
/ Dr. David Alan Gilbert      | Running GNU/Linux on Alpha, | Happy  \ 
\   gro.gilbert @ treblig.org | 68K,MIPS,x86,ARM and SPARC  | In Hex /
 \ ___________________________|___ http://www.treblig.org   |_______/


From owner-linux-mips@oss.sgi.com Sun Jan 21 13:26:27 2001
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Date:   Sun, 21 Jan 2001 13:26:32 -0800
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Ralf Baechle wrote:
> 
> On Sat, Jan 20, 2001 at 05:58:03PM -0800, Pete Popov wrote:
> 
> > I've got a 5231-based board running a test9-ish kernel. The board is
> > quite stable and I don't have any problems using the serial console,
> > running Bonnie, etc.  However, when I enable a virtual terminal and ps2
> > keyboard, I have problems running commands at the virt terminal.  I
> > traced it to the init task seg faulting and getting killed by the
> > kernel, which in turn kills my system. One of the easiest way to
> > reproduce this problem is to try filename completion, such as "ls
> > /etc/nss <tab>" -- hangs just about all the time.  Has anyone else
> > experienced similar problems with any other mips workstation/board?
> 
> Seems to work with other machines.

Thanks Ralf, knowing that helped.  The command line completion failed
when there are more than one matching files or no matching files at all,
which results in an error bell.  A quick experiment definitely pointed
to the error bell as the problem.  I took a look at drivers/char/vt.c
and found this:


#if defined(__i386__) || defined(__alpha__) || defined(__powerpc__) \
    || (defined(__mips__) && defined(CONFIG_ISA)) \
    || (defined(__arm__) && defined(CONFIG_HOST_FOOTBRIDGE))
 
static void
kd_nosound(unsigned long ignored)
{
        /* disable counter 2 */
        outb(inb_p(0x61)&0xFC, 0x61);
        return;
}
 
void
_kd_mksound(unsigned int hz, unsigned int ticks)
{
        static struct timer_list sound_timer = { function: kd_nosound };
        unsigned int count = 0;
        unsigned long flags;
 
        if (hz > 20 && hz < 32767)
                count = 1193180 / hz;
 
        save_flags(flags);
        cli();
        del_timer(&sound_timer);
        if (count) {
                /* enable counter 2 */
                outb_p(inb_p(0x61)|3, 0x61);
                /* set command for counter 2, 2 byte write */
                outb_p(0xB6, 0x43);
                /* select desired HZ */
                outb_p(count & 0xff, 0x42);
                outb((count >> 8) & 0xff, 0x42);
 
                if (ticks) {
                        sound_timer.expires = jiffies+ticks;
                        add_timer(&sound_timer);
                }
        } else
                kd_nosound(0);
        restore_flags(flags);
        return;
}
 
#else
 
void
_kd_mksound(unsigned int hz, unsigned int ticks)
{
}                                 

#endif

I see other mips systems which have defined CONFIG_ISA and I guess I'm
rather surprised that it works on those systems.  I suppose if you
define mips_io_port_base to be equal to the ISA start address, then the
above would work. But then the PCI IO accesses wouldn't work with the
inb(), outb(), etc macros, if the PCI IO space is discontinous from the
ISA IO space -- which it typically is.  The whole inb()/outb() design,
thanks to the x86, really doesn't work all that great for embedded mips
boards -- especially when you start supporting legally ISA devices.

Pete

From owner-linux-mips@oss.sgi.com Sun Jan 21 15:57:08 2001
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From:   Guido Guenther <guido.guenther@gmx.net>
To:     linux-mips@oss.sgi.com
Subject: pthread in glibc 2.2.1
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--YiEDa0DAkWCtVeE4
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline

Hi,
even the simplest pthread-program dies with a bus error(see attachment)
on my I2.  glibc is 2.2.1(same for 2.1.97), kernel is 2.4.0-test9.
Interesting enough I can't even get a core dump. Any starting points to
track this down?
Regards, 
 -- Guido

--YiEDa0DAkWCtVeE4
Content-Type: text/plain; charset=us-ascii
Content-Description: pthread_create.c
Content-Disposition: attachment; filename="pthreadcreate.c.orig"

#include <pthread.h>
#ifndef NULL
#define NULL (void*)0
#endif

static void *task(p)
	void *p;
{
	return (void *) (p == NULL);
}

int main(argc, argv)
	int argc;
	char **argv;
{
	pthread_t t;
	exit(pthread_create(&t, NULL, task, NULL));
}


--YiEDa0DAkWCtVeE4--

From owner-linux-mips@oss.sgi.com Sun Jan 21 16:08:07 2001
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From:   "James McD" <vile8@hotmail.com>
To:     linux-mips@oss.sgi.com
Subject: Fwd: pthread in glibc 2.2.1
Date:   Mon, 22 Jan 2001 00:07:32 
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>From what I have seen the gdb bombs out on 90% of pthread programs as
well. This includes all platforms as far as I am aware. There is a fix
posted on bugzilla stating you need to recompile the gdb from the cvs tree 
and that should fix. However I have had mixed luck.
Hope that helps somewhat!

Sincerely,

James McDermott
>
>Hi,
>even the simplest pthread-program dies with a bus error(see attachment)
>on my I2.  glibc is 2.2.1(same for 2.1.97), kernel is 2.4.0-test9.
>Interesting enough I can't even get a core dump. Any starting points to
>track this down?
>Regards,
>  -- Guido

_________________________________________________________________
Get your FREE download of MSN Explorer at http://explorer.msn.com

------=_NextPart_000_1656_4a88_499f
Content-Type: text/plain; charset=us-ascii
Content-Description: pthread_create.c
Content-Disposition: attachment; filename="pthreadcreate.c.orig"

#include <pthread.h>
#ifndef NULL
#define NULL (void*)0
#endif

static void *task(p)
	void *p;
{
	return (void *) (p == NULL);
}

int main(argc, argv)
	int argc;
	char **argv;
{
	pthread_t t;
	exit(pthread_create(&t, NULL, task, NULL));
}



------=_NextPart_000_1656_4a88_499f--

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To:     linux-mips@oss.sgi.com
Subject: Fwd: pthread in glibc 2.2.1
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>From what I have seen the gdb bombs out on 90% of pthread programs as
well. This includes all platforms as far as I am aware. There is a fix
posted on bugzilla stating you need to recompile the gdb from the cvs tree 
and that should fix. However I have had mixed luck.
Hope that helps somewhat!

Sincerely,

James McDermott
>
>Hi,
>even the simplest pthread-program dies with a bus error(see attachment)
>on my I2.  glibc is 2.2.1(same for 2.1.97), kernel is 2.4.0-test9.
>Interesting enough I can't even get a core dump. Any starting points to
>track this down?
>Regards,
>  -- Guido

_________________________________________________________________
Get your FREE download of MSN Explorer at http://explorer.msn.com

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 charset=us-ascii
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 filename=pthreadcreate.c.orig
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#include <pthread.h>
#ifndef NULL
#define NULL (void*)0
#endif

static void *task(p)
	void *p;
{
	return (void *) (p == NULL);
}

int main(argc, argv)
	int argc;
	char **argv;
{
	pthread_t t;
	exit(pthread_create(&t, NULL, task, NULL));
}



------=_NextPart_000_1656_4a88_499f--


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--YiEDa0DAkWCtVeE4
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 charset=us-ascii
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Hi,
even the simplest pthread-program dies with a bus error(see attachment)
on my I2.  glibc is 2.2.1(same for 2.1.97), kernel is 2.4.0-test9.
Interesting enough I can't even get a core dump. Any starting points to
track this down?
Regards, 
 -- Guido

--YiEDa0DAkWCtVeE4
Content-Type: text/plain; 
 charset=us-ascii
Content-Description: pthread_create.c
Content-Disposition: attachment; 
 filename=pthreadcreate.c.orig
Content-Transfer-Encoding: 7bit

#include <pthread.h>
#ifndef NULL
#define NULL (void*)0
#endif

static void *task(p)
	void *p;
{
	return (void *) (p == NULL);
}

int main(argc, argv)
	int argc;
	char **argv;
{
	pthread_t t;
	exit(pthread_create(&t, NULL, task, NULL));
}


--YiEDa0DAkWCtVeE4--


From owner-linux-mips@oss.sgi.com Mon Jan 22 06:47:32 2001
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Date:   Mon, 22 Jan 2001 15:46:09 +0100
From:   Carsten Langgaard <carstenl@mips.com>
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No one seemed to answer, so I try again, because I think we have a
general problem with the "bit"-functions in include/asm-mips64/bitops.h.
I don't think we can make the address 64-bit aligned in these functions,
without hurting a lot of drivers which use these functions to operate on
32-bit aligned data.
One of the issues is that "integer" and "long integer" used to be 32-bit
(in the 32-bit kernel), but now "long" is 64 bit. 
I can see on the ia64 part, they already has taken care of this by
saying that bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
This is the beauty about little endian, the lower 32 bit are located on
the same address no matter if you access the data as a 32-bit or 64-bit
access. This of course doesn't count for big endian, so the ia64
approach can't be used on a big endian system.

Has anyone any ideas how to handle this without making a lot of changes
in the general code and thereby hurting the other architectures.

/Carsten



-------- Original Message --------
Subject: Can't activate swap partitions
Date: Thu, 18 Jan 2001 16:30:15 +0100
From: Carsten Langgaard <carstenl@mips.com>
To: linux-mips@oss.sgi.com

I'm having some problems with activating swap partitions when using a 64
bit kernel on a 32 bit userland.
I think I know what the problem is.
The structure of the swap devices is that the first 4096 bytes contains
a bitmap. Bits that have been set indicate that the page of memory for
which the number in the swap space matches the offset of the bit at the
start of the space is available for paging.
The problem is then these bits are being checked, through the test_bit
function call, where we read 64 bit at a time, and they where written 32
bit at a time (from the 32 bit kernel).
Note: we are talking about a bigendian system.

A little example to illustrate that I mean:

Set bit 0-53 to 1 and clear bit 54-63 (stored with 32 bit access)
ADDR = 0xffffffff;
ADDR+4 = 0x003fffff;

If I read it as two 32 bit words I get the same result (bit 0-53 is
set), but if I read it as one 64 bit double-word I get.

ADDR = 0xffffffff0003ffff;

Now bit 0-17 and bit 32-63 is set.

The bottom line is that I don't think we can make the address 64 bit
aligned in the "set/clear-and-test" functions in
include/asm-mips64/bitops.h, without hurting a lot of drivers which use
these functions to operate on hw-defined data-structures.

/Carsten



--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com

From owner-linux-mips@oss.sgi.com Mon Jan 22 07:02:02 2001
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Date:   Mon, 22 Jan 2001 16:00:24 +0100 (MET)
From:   Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
To:     Carsten Langgaard <carstenl@mips.com>
cc:     linux-mips@oss.sgi.com
Subject: Re: [Fwd: Can't activate swap partitions]
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On Mon, 22 Jan 2001, Carsten Langgaard wrote:
> No one seemed to answer, so I try again, because I think we have a
> general problem with the "bit"-functions in include/asm-mips64/bitops.h.
> I don't think we can make the address 64-bit aligned in these functions,
> without hurting a lot of drivers which use these functions to operate on
> 32-bit aligned data.
> One of the issues is that "integer" and "long integer" used to be 32-bit
> (in the 32-bit kernel), but now "long" is 64 bit. 

The consensus about bitops is to always use `unsigned long', although IMHO a
predefined type (bitops_t) would be better. On e.g. m68k a byte would be
sufficient, assumed you don't need more than 8 bits. Or bitsops_t8 for minimum
8 bits, bitsops_t16 for minimum 16 bits, etc....

> I can see on the ia64 part, they already has taken care of this by
> saying that bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
> This is the beauty about little endian, the lower 32 bit are located on
> the same address no matter if you access the data as a 32-bit or 64-bit
> access. This of course doesn't count for big endian, so the ia64
> approach can't be used on a big endian system.
> 
> Has anyone any ideas how to handle this without making a lot of changes
> in the general code and thereby hurting the other architectures.

Your problem is special because you have a machine that can run in either
32-bit or 64-bit mode.

> I'm having some problems with activating swap partitions when using a 64
> bit kernel on a 32 bit userland.
> I think I know what the problem is.
> The structure of the swap devices is that the first 4096 bytes contains
> a bitmap. Bits that have been set indicate that the page of memory for
> which the number in the swap space matches the offset of the bit at the
> start of the space is available for paging.
> The problem is then these bits are being checked, through the test_bit
> function call, where we read 64 bit at a time, and they where written 32
> bit at a time (from the 32 bit kernel).
> Note: we are talking about a bigendian system.

I suggest to put an explicit `mkswap' command in the startup scripts. It's not
needed to preserver the swap space contents between successive reboots (you
can't switch from 32-bit to 64-bit or vice versa without rebooting, right?).

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven ------------- Sony Software Development Center Europe (SDCE)
Geert.Uytterhoeven@sonycom.com ------------------- Sint-Stevens-Woluwestraat 55
Voice +32-2-7248626 Fax +32-2-7262686 ---------------- B-1130 Brussels, Belgium


From owner-linux-mips@oss.sgi.com Mon Jan 22 07:26:02 2001
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Geert Uytterhoeven wrote:

> On Mon, 22 Jan 2001, Carsten Langgaard wrote:
> > No one seemed to answer, so I try again, because I think we have a
> > general problem with the "bit"-functions in include/asm-mips64/bitops.h.
> > I don't think we can make the address 64-bit aligned in these functions,
> > without hurting a lot of drivers which use these functions to operate on
> > 32-bit aligned data.
> > One of the issues is that "integer" and "long integer" used to be 32-bit
> > (in the 32-bit kernel), but now "long" is 64 bit.
>
> The consensus about bitops is to always use `unsigned long', although IMHO a
> predefined type (bitops_t) would be better. On e.g. m68k a byte would be
> sufficient, assumed you don't need more than 8 bits. Or bitsops_t8 for minimum
> 8 bits, bitsops_t16 for minimum 16 bits, etc....
>
> > I can see on the ia64 part, they already has taken care of this by
> > saying that bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
> > This is the beauty about little endian, the lower 32 bit are located on
> > the same address no matter if you access the data as a 32-bit or 64-bit
> > access. This of course doesn't count for big endian, so the ia64
> > approach can't be used on a big endian system.
> >
> > Has anyone any ideas how to handle this without making a lot of changes
> > in the general code and thereby hurting the other architectures.
>
> Your problem is special because you have a machine that can run in either
> 32-bit or 64-bit mode.
>
> > I'm having some problems with activating swap partitions when using a 64
> > bit kernel on a 32 bit userland.
> > I think I know what the problem is.
> > The structure of the swap devices is that the first 4096 bytes contains
> > a bitmap. Bits that have been set indicate that the page of memory for
> > which the number in the swap space matches the offset of the bit at the
> > start of the space is available for paging.
> > The problem is then these bits are being checked, through the test_bit
> > function call, where we read 64 bit at a time, and they where written 32
> > bit at a time (from the 32 bit kernel).
> > Note: we are talking about a bigendian system.
>
> I suggest to put an explicit `mkswap' command in the startup scripts. It's not
> needed to preserver the swap space contents between successive reboots (you
> can't switch from 32-bit to 64-bit or vice versa without rebooting, right?).

That will probably solve my swap partition problem, but I think there are other
potential problems as mention above.
I don't think we can guarantee that data always are 32-bit aligned.

>
> Gr{oetje,eeting}s,
>
>                                                 Geert
>
> --
> Geert Uytterhoeven ------------- Sony Software Development Center Europe (SDCE)
> Geert.Uytterhoeven@sonycom.com ------------------- Sint-Stevens-Woluwestraat 55
> Voice +32-2-7248626 Fax +32-2-7262686 ---------------- B-1130 Brussels, Belgium

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Mon Jan 22 08:30:23 2001
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Date:   Mon, 22 Jan 2001 17:28:27 +0100
From:   Carsten Langgaard <carstenl@mips.com>
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Subject: Re: [Fwd: Can't activate swap partitions]
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Geert Uytterhoeven wrote:

> On Mon, 22 Jan 2001, Carsten Langgaard wrote:
> > No one seemed to answer, so I try again, because I think we have a
> > general problem with the "bit"-functions in include/asm-mips64/bitops.h.
> > I don't think we can make the address 64-bit aligned in these functions,
> > without hurting a lot of drivers which use these functions to operate on
> > 32-bit aligned data.
> > One of the issues is that "integer" and "long integer" used to be 32-bit
> > (in the 32-bit kernel), but now "long" is 64 bit.
>
> The consensus about bitops is to always use `unsigned long', although IMHO a
> predefined type (bitops_t) would be better. On e.g. m68k a byte would be
> sufficient, assumed you don't need more than 8 bits. Or bitsops_t8 for minimum
> 8 bits, bitsops_t16 for minimum 16 bits, etc....
>
> > I can see on the ia64 part, they already has taken care of this by
> > saying that bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
> > This is the beauty about little endian, the lower 32 bit are located on
> > the same address no matter if you access the data as a 32-bit or 64-bit
> > access. This of course doesn't count for big endian, so the ia64
> > approach can't be used on a big endian system.
> >
> > Has anyone any ideas how to handle this without making a lot of changes
> > in the general code and thereby hurting the other architectures.
>
> Your problem is special because you have a machine that can run in either
> 32-bit or 64-bit mode.
>
> > I'm having some problems with activating swap partitions when using a 64
> > bit kernel on a 32 bit userland.
> > I think I know what the problem is.
> > The structure of the swap devices is that the first 4096 bytes contains
> > a bitmap. Bits that have been set indicate that the page of memory for
> > which the number in the swap space matches the offset of the bit at the
> > start of the space is available for paging.
> > The problem is then these bits are being checked, through the test_bit
> > function call, where we read 64 bit at a time, and they where written 32
> > bit at a time (from the 32 bit kernel).
> > Note: we are talking about a bigendian system.
>
> I suggest to put an explicit `mkswap' command in the startup scripts. It's not
> needed to preserver the swap space contents between successive reboots (you
> can't switch from 32-bit to 64-bit or vice versa without rebooting, right?).
>

I tried to use mkswap, but it also fails:

mkswap /dev/hda2
unknown ioctl: 00001260

>
> Gr{oetje,eeting}s,
>
>                                                 Geert
>
> --
> Geert Uytterhoeven ------------- Sony Software Development Center Europe (SDCE)
> Geert.Uytterhoeven@sonycom.com ------------------- Sint-Stevens-Woluwestraat 55
> Voice +32-2-7248626 Fax +32-2-7262686 ---------------- B-1130 Brussels, Belgium

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




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From:   =?iso-8859-1?Q?Augusto_C=E9sar_Radtke?= <radtke@conectiva.com>
To:     "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
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Subject: Re: strace package
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Maciej W. Rozycki wrote:

>  Where is the CVS you refer to?  A working strace would help me a lot.

http://sourceforge.net/projects/strace
http://sourceforge.net/cvs/?group_id=2861
	
	Augusto

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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
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On Mon, 22 Jan 2001, [iso-8859-1] Augusto César Radtke wrote:

> >  Where is the CVS you refer to?  A working strace would help me a lot.
> 
> http://sourceforge.net/projects/strace
> http://sourceforge.net/cvs/?group_id=2861

 Thanks a lot -- these do work!

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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Forwaring this email which got bounced to me due to the policy of
posting only for subscribers.

  Ralf


----- Forwarded message from Maciej Szwajcowski <szwajc@ernie.icslab.agh.edu.pl> -----

From: Maciej Szwajcowski <szwajc@ernie.icslab.agh.edu.pl>
Date: Thu, 18 Jan 2001 14:50:38 +0100 (MET)
To: <linux-mips@fnet.fr>
Subject: Mips R14000

Hello ,
Could Anybody provide me please any information about MIPS R14000 SGI
Processor?
I'm making a degree based on this and I'm very much looking for any
information associated to it .
Thank you very much in advance for your help ,
Very Best Wishes  ,

Maciej Szwajcowski
University of Mining and Metallurgy ,
Computer Sciences Center , Cracow - POLAND.





----- End forwarded message -----

  Ralf

From owner-linux-mips@oss.sgi.com Tue Jan 23 08:12:20 2001
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To:     Dave Gilbert <gilbertd@treblig.org>
Cc:     linux-mips@oss.sgi.com
Subject: Re: Trying to boot an Indy
References: <Pine.LNX.4.10.10101210150410.964-100000@tardis.home.dave>
From:   Christoph Martin <martin@uni-mainz.de>
Date:   23 Jan 2001 17:11:44 +0100
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Dave Gilbert <gilbertd@treblig.org> writes:

> 
> Hi,
>   I'm trying to boot my Indy into Linux for the first time and not having
> any luck.
> 
> 1) I tried bootp - bootp()vmlinux - it says 'no server for vmlinux'.  The
> bootp server is a Linux/Alpha box running 2.4.0-ac9 - I've already done
> the trick with no_pmtu.  tcpdump shows bootp sending a packet with
> apparently the correct mac address.
> 

I have the same problem serving bootp from my i386 2.4.0 box. bootp
with kernel 2.2.x on the same box works. And it is only the bootp from
the command console that is failing. the bootp part later on in the
kernel is working from the 2.4.0 box.

Weird.

-- 
============================================================================
Christoph Martin, Uni-Mainz, Germany
 Internet-Mail:  Christoph.Martin@Uni-Mainz.DE
--------------export-a-crypto-system-sig -RSA-3-lines-PERL------------------
#!/usr/bin/perl -sp0777i<X+d*lMLa^*lN%0]dsXx++lMlN/dsM0<j]dsj
$/=unpack('H*',$_);$_=`echo 16dio\U$k"SK$/SM$n\EsN0p[lN*1
lK[d2%Sa2/d0$^Ixp"|dc`;s/\W//g;$_=pack('H*',/((..)*)$/)
#what's this? see http://www.dcs.ex.ac.uk/~aba/rsa/

From owner-linux-mips@oss.sgi.com Tue Jan 23 08:35:11 2001
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On 23 Jan 2001, Christoph Martin wrote:

> Dave Gilbert <gilbertd@treblig.org> writes:

> > 1) I tried bootp - bootp()vmlinux - it says 'no server for vmlinux'.  The
> > bootp server is a Linux/Alpha box running 2.4.0-ac9 - I've already done
> > the trick with no_pmtu.  tcpdump shows bootp sending a packet with
> > apparently the correct mac address.
> >
>
> I have the same problem serving bootp from my i386 2.4.0 box. bootp
> with kernel 2.2.x on the same box works. And it is only the bootp from
> the command console that is failing. the bootp part later on in the
> kernel is working from the 2.4.0 box.

This sprang into life when I added the 'sa' entry in the bootp file - that
is the server address.

Dave

-- 
/------------------------------------------------------------------\
| Dr. David Alan Gilbert | Work:dg@px.uk.com +44-161-286-2000 Ex258|
| -------- G7FHJ --------|---------------------------------------- |
| Home: dave@treblig.org            http://www.treblig.org         |
\------------------------------------------------------------------/


From owner-linux-mips@oss.sgi.com Tue Jan 23 08:35:50 2001
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From:   Jim Freeman <jfree@sovereign.org>
Date:   Tue, 23 Jan 2001 09:35:23 -0700
To:     linux-mips@oss.sgi.com, dhinds@zen.stanford.edu
Subject: mips vs pcmcia - which wins?
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The following mips kernel patchlet:

	diff -u --new-file --recursive --exclude-from diff.exclude \
		linux-2.4.0/include/linux/sched.h \
		linux-mips.cvs/include/linux/sched.h
	--- linux-2.4.0/include/linux/sched.h   Thu Jan  4 15:50:47 2001
	+++ linux-mips.cvs/include/linux/sched.h        Wed Jan 10 21:52:59 2001
	@@ -562,6 +562,8 @@
	 extern int in_group_p(gid_t);
	 extern int in_egroup_p(gid_t);

	+extern void release(struct task_struct * p);
	+
	 extern void proc_caches_init(void);
	 extern void flush_signals(struct task_struct *);
	 extern void flush_signal_handlers(struct task_struct *);



causes i386 builds to fail:

make -C pcmcia modules
make[5]: Entering directory `/autobuild/public_html/project/build/rpmdir/BUILD/linux/drivers/pcmcia'
...
cs.c:93: `release' redeclared as different kind of symbol
/autobuild/public_html/project/build/rpmdir/BUILD/linux/include/linux/sched.h:565: previous declaration of `release'
cs.c:93: warning: `release' was declared `extern' and later `static'
make[5]: *** [cs.o] Error 1
make[5]: Leaving directory `/autobuild/public_html/project/build/rpmdir/BUILD/linux/drivers/pcmcia'
make[4]: *** [_modsubdir_pcmcia] Error 2



with the following i386 config options:

	...
	CONFIG_HOTPLUG=y

	#
	# PCMCIA/CardBus support
	#
	CONFIG_PCMCIA=m
	# CONFIG_CARDBUS is not set
	# CONFIG_I82365 is not set
	# CONFIG_TCIC is not set
	...

...jfree

From owner-linux-mips@oss.sgi.com Tue Jan 23 09:06:10 2001
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To:	Christoph Martin <martin@uni-mainz.de>
Cc:	Dave Gilbert <gilbertd@treblig.org>, linux-mips@oss.sgi.com
Subject: Re: Trying to boot an Indy
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On Tue, Jan 23, 2001 at 05:11:44PM +0100, Christoph Martin wrote:

> > 1) I tried bootp - bootp()vmlinux - it says 'no server for vmlinux'.  The
> > bootp server is a Linux/Alpha box running 2.4.0-ac9 - I've already done
> > the trick with no_pmtu.  tcpdump shows bootp sending a packet with
> > apparently the correct mac address.
> > 
> 
> I have the same problem serving bootp from my i386 2.4.0 box. bootp
> with kernel 2.2.x on the same box works. And it is only the bootp from
> the command console that is failing. the bootp part later on in the
> kernel is working from the 2.4.0 box.
> 
> Weird.

Not weired at all.  The firmware bootp()... does bootp and then uses tftp
to download the kernel; the kernel then only uses bootp to figure out it's
network configuration.  So the two are not only doing different things,
they're also two are not only two independant and completly different
implementations.

  Ralf

From owner-linux-mips@oss.sgi.com Tue Jan 23 09:10:41 2001
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From:	Ralf Baechle <ralf@oss.sgi.com>
To:	Jim Freeman <jfree@sovereign.org>
Cc:	linux-mips@oss.sgi.com, dhinds@zen.stanford.edu
Subject: Re: mips vs pcmcia - which wins?
Message-ID: <20010123090756.C945@bacchus.dhis.org>
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On Tue, Jan 23, 2001 at 09:35:23AM -0700, Jim Freeman wrote:
> From: Jim Freeman <jfree@sovereign.org>
> Date:   Tue, 23 Jan 2001 09:35:23 -0700
> To: linux-mips@oss.sgi.com, dhinds@zen.stanford.edu
> Subject: mips vs pcmcia - which wins?
> 
> The following mips kernel patchlet:
> 
> 	diff -u --new-file --recursive --exclude-from diff.exclude \
> 		linux-2.4.0/include/linux/sched.h \
> 		linux-mips.cvs/include/linux/sched.h
> 	--- linux-2.4.0/include/linux/sched.h   Thu Jan  4 15:50:47 2001
> 	+++ linux-mips.cvs/include/linux/sched.h        Wed Jan 10 21:52:59 2001
> 	@@ -562,6 +562,8 @@
> 	 extern int in_group_p(gid_t);
> 	 extern int in_egroup_p(gid_t);
> 
> 	+extern void release(struct task_struct * p);
> 	+

The function getting exported here changed it's name to release_task in
2.4; I've adjusted above declaration accordingly.

  Ralf

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From:	Ralf Baechle <ralf@oss.sgi.com>
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Subject: Re: Fwd: pthread in glibc 2.2.1
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> >even the simplest pthread-program dies with a bus error(see attachment)
> >on my I2.  glibc is 2.2.1(same for 2.1.97), kernel is 2.4.0-test9.
> >Interesting enough I can't even get a core dump. Any starting points to
> >track this down?

Last I checked the kernel didn't dump core for multithreaded programs
since the core file's data structure doesn't support that yet.

  Ralf

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  I am also suddenly without success:

> > > 1) I tried bootp - bootp()vmlinux - it says 'no server for vmlinux'.  The
> > > bootp server is a Linux/Alpha box running 2.4.0-ac9 - I've already done
> > > the trick with no_pmtu.  tcpdump shows bootp sending a packet with
> > > apparently the correct mac address.
> >
> > I have the same problem serving bootp from my i386 2.4.0 box. bootp
> > with kernel 2.2.x on the same box works. And it is only the bootp from
> > the command console that is failing. the bootp part later on in the
> > kernel is working from the 2.4.0 box.
> 
> This sprang into life when I added the 'sa' entry in the bootp file - that
> is the server address.

  I have a new set of IP addresses, new (2.2.18) kernel, new nfs
server utilities (all together, unfortunately) since my Indy last
spoke sanely to my intel linux box; neither the 'sa' bootptab entry
nor /proc/sys/net/ipv4/ip_no_pmtu_disc content tips have any evident
effect - ie. I will see "Setting $netaddr...", but the "obtaining
[...]" ticker no longer appears. I am eventually told, variously,
"netaddr may be set incorrectly or network too busy" or "unable to
execute bootp():vmlinux"



:(
	Wills.


From owner-linux-mips@oss.sgi.com Tue Jan 23 15:27:12 2001
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Ralf,

On some machines with weird firmware (e.g. IDT 334 board)
the processor comes up with the cache already enabled for
kseg0.  In this case, the set_cp0_config() call in mips32.c
to turn off the cache (gated by CONFIG_MIPS_UNCACHED) should
probably come after the first call to flush_cache_all(),
which is safer but still not totally safe, I suppose.
Or am I totally hosed trying to turn the kseg0 cache off
after it was once on?

Quinn Jensen


From owner-linux-mips@oss.sgi.com Tue Jan 23 15:53:31 2001
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Quinn Jensen wrote:
> 
> Ralf,
> 
> On some machines with weird firmware (e.g. IDT 334 board)
> the processor comes up with the cache already enabled for
> kseg0.  In this case, the set_cp0_config() call in mips32.c
> to turn off the cache (gated by CONFIG_MIPS_UNCACHED) should
> probably come after the first call to flush_cache_all(),
> which is safer but still not totally safe, I suppose.
> Or am I totally hosed trying to turn the kseg0 cache off
> after it was once on?

That's an issue not only when you're "turning off" the cache, but
whenever you muck with the kseg0 cache coherency attribute.  The Galileo
EV96100, running Galileo's pmon, comes up with kseg0 set to 3, which is
the default linux kseg0 cache coherency attribute. However, calling
set_cp0_config() without first flushing the cache destroys some data,
eventhough the same exact kseg0 attribute is set. 

I think a complete cache flush is in order before calling
set_cp0_config() and that's a change we should make for all cpus.

Pete

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From:   Florian Lohoff <flo@rfc822.org>
To:     linux-mips@oss.sgi.com
Subject: OOps - very obscure
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Hi,
here a short oops while trying to run "find" in a glibc 2.2 root
on a Indigo2 with a current cvs 2.4.0 kernel.

Unable to handle kernel paging request at virtual address 00000000, epc == 00000000, ra == 00000000
Oops in fault.c:do_page_fault, line 172:
$0 : 00000000 1004fc00 fffffff2 00000001
$4 : fffffff2 00000000 00000001 00000000
$8 : 00000000 2abf3a94 8800f4a0 00000004
$12: 8ec57f10 7ffffaf8 8ec57f18 8ec57f18
$16: 8801acf8 00000000 10011510 00000002
$20: 10011510 7ffffdd4 7ffffdcc 00000001
$24: 00000000 2abf3a80
$28: 8ec56000 8ec57ef8 7ffffd10 00000000
epc   : 00000000
Status: 1004fc03
Cause : 30000008
Process find (pid: 227, stackpage=8ec56000)
Stack: 10011510 7ffffd10 88028344 00000000 7ffffc80 00402440 2aca4e00 2ac95d10
       00000000 2ac95d10 10011510 00000002 00000001 8800fa88 000007d1 100234f0
       10011510 00000000 00000003 00012000 00000000 1004fc01 00001035 00000000
       000007d1 10011510 00000001 00000000 0000fc00 00000010 00000000 8ec57f0c
       8ec57f10 8ec57f14 8ec57ef8 8ec57efc 2aca4e00 2ac95d10 10011510 00000002
       00000001 ...
Call Trace: [<88028344>] [<8800fa88>]
Code: (Bad address in epc)

I cant identify which system.map ist the correct one - -ETOMANYKERNEL
i extracted this from /proc/ksyms

8800ecb8 __rwsem_wake
8801122c do_gettimeofday

88027394 del_timer
8802869c flush_signals

This oops is reproduceable but not really nice as the fsck takes
~30 minutes :)

I'll build a fresh kernel and retry ...

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Wed Jan 24 07:59:35 2001
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From:   Florian Lohoff <flo@rfc822.org>
To:     linux-mips@oss.sgi.com
Subject: Re: OOps - very obscure
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On Wed, Jan 24, 2001 at 04:30:48PM +0100, Florian Lohoff wrote:
> Hi,
> here a short oops while trying to run "find" in a glibc 2.2 root
> on a Indigo2 with a current cvs 2.4.0 kernel.
> 
> Unable to handle kernel paging request at virtual address 00000000, epc == 00000000, ra == 00000000

Decoded this is:

Unable to handle kernel paging request at virtual address 00000000, epc == 00000000, ra == 00000000
$0 : 00000000 1004fc00 fffffff2 00000001
$4 : fffffff2 00000000 00000001 00000000
$8 : 00000000 2abf3a94 8800f4a0 00000004
$12: 8ec09f10 7ffffaf8 8ec09f18 8ec09f18
$16: 8801acf8 00000000 10011510 00000002
$20: 10011510 7ffffdd8 7ffffdcc 00000002
$24: 00000000 2abf3a80
$28: 8ec08000 8ec09ef8 7ffffd10 00000000
epc   : 00000000
Using defaults from ksymoops -t elf32-bigmips -a mips:3000
Status: 1004fc03
Cause : 30000008
Process find (pid: 242, stackpage=8ec08000)
Stack: 10011510 7ffffd10 88028344 00000000 7ffffc80 00402440 2aca4e00 2ac95d10
       00000000 2ac95d10 10011510 00000002 00000001 8800fa88 000007d1 100235b0
       10011510 00000000 00000003 00012000 00000000 1004fc01 00001035 00000000
       000007d1 10011510 00000001 00000000 0000fc00 00000010 00000000 8ec09f0c
       8ec09f10 8ec09f14 8ec09ef8 8ec09efc 2aca4e00 2ac95d10 10011510 00000002
       00000001 ...
Call Trace: [<88028344>] [<8800fa88>]
Code: (Bad address in epc)
Warning (Oops_code): trailing garbage ignored on Code: line
  Text: 'Code: (Bad address in epc)'
  Garbage: 'ress in epc)'
Warning (Oops_code_values): Code looks like message, not hex digits.  No disassembly attempted.

>>RA;  00000000 Before first symbol
>>PC;  00000000 Before first symbol
Trace; 88028344 <sys_nanosleep+190/24c>
Trace; 8800fa88 <stack_done+1c/38>

I guess the "Garbage" stuff has to be fixed in ksymoops

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Wed Jan 24 08:22:46 2001
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To:     linux-mips@oss.sgi.com
Subject: Re: OOps - very obscure
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On Wed, Jan 24, 2001 at 04:59:19PM +0100, Florian Lohoff wrote:
> On Wed, Jan 24, 2001 at 04:30:48PM +0100, Florian Lohoff wrote:

> Process find (pid: 242, stackpage=8ec08000)
> Stack: 10011510 7ffffd10 88028344 00000000 7ffffc80 00402440 2aca4e00 2ac95d10
>        00000000 2ac95d10 10011510 00000002 00000001 8800fa88 000007d1 100235b0
>        10011510 00000000 00000003 00012000 00000000 1004fc01 00001035 00000000
>        000007d1 10011510 00000001 00000000 0000fc00 00000010 00000000 8ec09f0c
>        8ec09f10 8ec09f14 8ec09ef8 8ec09efc 2aca4e00 2ac95d10 10011510 00000002
>        00000001 ...
[...]
> >>RA;  00000000 Before first symbol
> >>PC;  00000000 Before first symbol
> Trace; 88028344 <sys_nanosleep+190/24c>
> Trace; 8800fa88 <stack_done+1c/38>

This is the relevant code piece in sys_nanosleep:

    88028338:   af820000        sw      $v0,0($gp)
    8802833c:   0e006b70        jal     8801adc0 <schedule_timeout>
    88028340:   00642021        addu    $a0,$v1,$a0
    88028344:   50400028        beqzl   $v0,880283e8 <sys_nanosleep+0x234>
    88028348:   00001021        move    $v0,$zero
    8802834c:   12000025        beqz    $s0,880283e4 <sys_nanosleep+0x230>

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Wed Jan 24 10:26:56 2001
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Subject: Linux/MIPS installation (FAQ? HOWTO?)
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Hello,

I know this has got to be a FAQ of some sort, but I can't find
the answer (and I _have_ looked everywhere!): How do I go about
installing Linux on my Indy? Does it have to co-exist w/ IRIX?

Please point me to any document offering step-by-step instructions
(if that exists).

Regards,
Richard Duran

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Hello,

Can anyone recommend an R5000/R7000 machine
which can run Linux 2.4 and would be an appropriate
platform on which to build the libraries for an R5000/R7000
embedded Linux application? Which platform has the
most stable version of Linux 2.4 available?

Thanks in advance,
-John Van Horne
jvhorne@cosinecom.com


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<TITLE>MIPS platform recommendations</TITLE>
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<P><FONT SIZE=2 FACE="Arial">Hello,</FONT>
</P>

<P><FONT SIZE=2 FACE="Arial">Can anyone recommend an R5000/R7000 machine</FONT>
<BR><FONT SIZE=2 FACE="Arial">which can run Linux 2.4 and would be an appropriate</FONT>
<BR><FONT SIZE=2 FACE="Arial">platform on which to build the libraries for an R5000/R7000</FONT>
<BR><FONT SIZE=2 FACE="Arial">embedded Linux application? Which platform has the</FONT>
<BR><FONT SIZE=2 FACE="Arial">most stable version of Linux 2.4 available?</FONT>
</P>

<P><FONT SIZE=2 FACE="Arial">Thanks in advance,</FONT>
<BR><FONT SIZE=2 FACE="Arial">-John Van Horne</FONT>
<BR><FONT SIZE=2 FACE="Arial">jvhorne@cosinecom.com</FONT>
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From owner-linux-mips@oss.sgi.com Wed Jan 24 12:11:47 2001
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Subject: Re: CONFIG_MIPS_UNCACHED
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Pete Popov wrote:
> 
> Quinn Jensen wrote:
> >
> > Ralf,
> >
> > On some machines with weird firmware (e.g. IDT 334 board)
> > the processor comes up with the cache already enabled for
> > kseg0.  In this case, the set_cp0_config() call in mips32.c
> > to turn off the cache (gated by CONFIG_MIPS_UNCACHED) should
> > probably come after the first call to flush_cache_all(),
> > which is safer but still not totally safe, I suppose.
> > Or am I totally hosed trying to turn the kseg0 cache off
> > after it was once on?
> 
> That's an issue not only when you're "turning off" the cache, but
> whenever you muck with the kseg0 cache coherency attribute.  The Galileo
> EV96100, running Galileo's pmon, comes up with kseg0 set to 3, which is
> the default linux kseg0 cache coherency attribute. However, calling
> set_cp0_config() without first flushing the cache destroys some data,
> eventhough the same exact kseg0 attribute is set.
>

It is really surprising to know this.  It sounds like a CPU bug to me.  Can
some MIPS "gods" clarify if such a behaviour is a bug or allowed?

BTW, the CPU in EV96100 is QED RM7000, I believe.

Jun

From owner-linux-mips@oss.sgi.com Wed Jan 24 12:30:17 2001
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> John Van Horne wrote:
> 
> Hello,
> 
> Can anyone recommend an R5000/R7000 machine
> which can run Linux 2.4 and would be an appropriate
> platform on which to build the libraries for an R5000/R7000
> embedded Linux application? Which platform has the
> most stable version of Linux 2.4 available?

The EV96100 (PMC RM7000 cpu) might do the job. It's overall stable and
runs with primary and secondary caches turned on.  I merged a network
fix yesterday so I need to do a new kernel release and uploaded it to
ftp.mvista.com. The previous kernel with the network bug is on the ftp
site already.

However, if you're only interested in rebuilding libraries for those
cpus, why not do a cross-build?  We cross build all userland apps
including the libraries.  

Pete

From owner-linux-mips@oss.sgi.com Wed Jan 24 13:19:17 2001
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To:     Florian Lohoff <flo@rfc822.org>
cc:     linux-mips@oss.sgi.com
Subject: Re: OOps - very obscure 
In-reply-to: Your message of "Wed, 24 Jan 2001 16:59:19 BST."
             <20010124165919.C15348@paradigm.rfc822.org> 
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On Wed, 24 Jan 2001 16:59:19 +0100, 
Florian Lohoff <flo@rfc822.org> wrote:
>Code: (Bad address in epc)
>Warning (Oops_code): trailing garbage ignored on Code: line
>  Text: 'Code: (Bad address in epc)'
>  Garbage: 'ress in epc)'
>Warning (Oops_code_values): Code looks like message, not hex digits.  No disassembly attempted.
>I guess the "Garbage" stuff has to be fixed in ksymoops

ksymoops understands "(Bad EIP value.*)", it does not know about "(Bad
address in epc)".  I will add it to ksymoops 2.4.1.


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On Wed, Jan 24, 2001 at 11:23:00AM -0800, John Van Horne wrote:

> Can anyone recommend an R5000/R7000 machine
> which can run Linux 2.4 and would be an appropriate
> platform on which to build the libraries for an R5000/R7000
> embedded Linux application? Which platform has the
> most stable version of Linux 2.4 available?

I'm doing all this work on a SGI's Origin 200/2000 series machines.  They
may be a tad on the expensive side but they're the only thing that avoids
the major pain of having to modify large amounts of software for propper
crosscompilation and also has serious compute power.

  Ralf

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On Wed, Jan 24, 2001 at 12:10:32PM -0800, Jun Sun wrote:

> It is really surprising to know this.  It sounds like a CPU bug to me.  Can
> some MIPS "gods" clarify if such a behaviour is a bug or allowed?
> 
> BTW, the CPU in EV96100 is QED RM7000, I believe.

If you want to be strictly correct you have to execute the code that
disables caching of KSEG0 in uncached space like KSEG1, then flush the
caches before you can resume execution in KSEG0.  Otherwise you might
end up with dirty d-caches which when flushed will overwrite more
uptodate data in memory.  The window is very small but yet exists if
things are just right.

  Ralf

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Ralf Baechle wrote:
> 
> On Wed, Jan 24, 2001 at 12:10:32PM -0800, Jun Sun wrote:
> 
> > It is really surprising to know this.  It sounds like a CPU bug to me.  Can
> > some MIPS "gods" clarify if such a behaviour is a bug or allowed?
> >
> > BTW, the CPU in EV96100 is QED RM7000, I believe.
> 
> If you want to be strictly correct you have to execute the code that
> disables caching of KSEG0 in uncached space like KSEG1, then flush the
> caches before you can resume execution in KSEG0.  Otherwise you might
> end up with dirty d-caches which when flushed will overwrite more
> uptodate data in memory.  The window is very small but yet exists if
> things are just right.

The EV96100 running Galileo's pmon exhibits exactly this symptom.  Pmon
apparently sets up kseg0 to cache coherency 3;  but eventhough the
kernel also sets it to 3, if I don't flush the caches first I end up
with overwritten data.  A different version of pmon that I have sets
kseg0 to 1 (writethrough). Changing that to 3 isn't a problem -- or at
least it doesn't seem to cause any problems.

Pete

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Ralf Baechle wrote:
> 
> On Wed, Jan 24, 2001 at 11:23:00AM -0800, John Van Horne wrote:
> 
> > Can anyone recommend an R5000/R7000 machine
> > which can run Linux 2.4 and would be an appropriate
> > platform on which to build the libraries for an R5000/R7000
> > embedded Linux application? Which platform has the
> > most stable version of Linux 2.4 available?
> 
> I'm doing all this work on a SGI's Origin 200/2000 series machines.  They
> may be a tad on the expensive side but they're the only thing that avoids
> the major pain of having to modify large amounts of software for propper
> crosscompilation and also has serious compute power.

Yes, that's a pain in the neck. But we already have the entire cross
environment built and available at ftp.mvista.com for both, little and
big endian. The only issue is that test10 and beyond require a slighly
newer tools, but those are coming up as well.  


Pete

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Pete Popov wrote:
> 
> Ralf Baechle wrote:
> >
> > On Wed, Jan 24, 2001 at 12:10:32PM -0800, Jun Sun wrote:
> >
> > > It is really surprising to know this.  It sounds like a CPU bug to me.  Can
> > > some MIPS "gods" clarify if such a behaviour is a bug or allowed?
> > >
> > > BTW, the CPU in EV96100 is QED RM7000, I believe.
> >
> > If you want to be strictly correct you have to execute the code that
> > disables caching of KSEG0 in uncached space like KSEG1, then flush the
> > caches before you can resume execution in KSEG0.  Otherwise you might
> > end up with dirty d-caches which when flushed will overwrite more
> > uptodate data in memory.  The window is very small but yet exists if
> > things are just right.
> 
> The EV96100 running Galileo's pmon exhibits exactly this symptom.  Pmon
> apparently sets up kseg0 to cache coherency 3;  but eventhough the
> kernel also sets it to 3, if I don't flush the caches first I end up
> with overwritten data.  A different version of pmon that I have sets
> kseg0 to 1 (writethrough). Changing that to 3 isn't a problem -- or at
> least it doesn't seem to cause any problems.
> 

I don't think it is the same problem.

Here is the simplified view of the process, if I understand Pete correctly:

1. pmon sets kseg0 to 3 (cache enabled)
2. kernel starts in KSEG0 
3. kernel sets kseg0 to 3 again (essentially keeps the same config value)
4. kernel flushes cache
  ===> Q: data corruption or not?

I think the data should be consistent.  Otherwise it looks like a CPU bug to
me.

What ralf described is something like the following:

1. pmon sets kseg0 to 3 (KSEG0 cache enabled)
2. kernel starts in KSEG0 
3. kernel sets kseg0 to 2 (disable kseg0 cache)
4. kernel flushes cache
  ===> Q: data corruption or not?  YES, data can be corrupted!

Jun

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This simple test fails on a Nevada (5231) cpu:

int main()
{
    float x1,x2,x3;

    x1 = 7.5;
    x2 = 2.0;
    x3 = x1/x2;
    printf("x3 = %f\n", x3);
}

Has anyone else used floating point with 52xx processors?

Pete

From owner-linux-mips@oss.sgi.com Wed Jan 24 18:33:30 2001
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On Wed, 24 Jan 2001, Pete Popov wrote:
> This simple test fails on a Nevada (5231) cpu:
> 
> int main()
> {
>     float x1,x2,x3;
> 
>     x1 = 7.5;
>     x2 = 2.0;
>     x3 = x1/x2;
>     printf("x3 = %f\n", x3);
> }
> 

Ummm...care to tell *how* it fails?

-Justin

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Justin Carlson wrote:
> 
> On Wed, 24 Jan 2001, Pete Popov wrote:
> > This simple test fails on a Nevada (5231) cpu:
> >
> > int main()
> > {
> >     float x1,x2,x3;
> >
> >     x1 = 7.5;
> >     x2 = 2.0;
> >     x3 = x1/x2;
> >     printf("x3 = %f\n", x3);
> > }
> >
> 
> Ummm...care to tell *how* it fails?

Here it is:

sh-2.03# ./fl
x3 = 0.000000


I'm running a test9 based kernel, but the same kernel compiled for my
Indigo2 produces the right result.  Also, the uptime commands complains
with:


Unknown HZ value! (2147483647) Assume 100.


At the console, I get "Setting flush to zero for uptime."  So, I took a
look at arch/mips/kernel/traps.c and the kernel retries the instruction
with denormalized instructions flushed to zero. However, the 5200
signals an unimplemented operation even if the FS bit is set. 

In any case, the first simple test doesn't run into the "flush to zero"
problem but the result is still bad.

Pete

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Justin Carlson wrote:
> 
> On Wed, 24 Jan 2001, Pete Popov wrote:
> > This simple test fails on a Nevada (5231) cpu:
> >
> > int main()
> > {
> >     float x1,x2,x3;
> >
> >     x1 = 7.5;
> >     x2 = 2.0;
> >     x3 = x1/x2;
> >     printf("x3 = %f\n", x3);
> > }
> >
> 
> Ummm...care to tell *how* it fails?

Looks like there's something more basic that fails here.  This:

#include <stdio.h>
int main()
{
    float x1,x2,x3,x4,x5;

    x1 = 7.5;
    x2 = 2.0;
    x3 = x1/x2;
    x4 = x1*x2;
    x5 = x1-x2;
    printf("x1 %f x2 %f x3 %f x4 %f x5 %f\n", x1, x2, x3, x4, x5);
}


produces this:

sh-2.03# ./fl 
x1 0.000000 x2 0.000000 x3 0.000000 x4 0.000000 x5 0.000000


Pete

From owner-linux-mips@oss.sgi.com Wed Jan 24 19:13:40 2001
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On Wed, 24 Jan 2001, you wrote:
> Justin Carlson wrote:
> > 
> > On Wed, 24 Jan 2001, Pete Popov wrote:
> > > This simple test fails on a Nevada (5231) cpu:
> > >
> > > int main()
> > > {
> > >     float x1,x2,x3;
> > >
> > >     x1 = 7.5;
> > >     x2 = 2.0;
> > >     x3 = x1/x2;
> > >     printf("x3 = %f\n", x3);
> > > }
> > >
> > 
> > Ummm...care to tell *how* it fails?
> 
> Here it is:
> 
> sh-2.03# ./fl
> x3 = 0.000000
> 
> 
> I'm running a test9 based kernel, but the same kernel compiled for my
> Indigo2 produces the right result.  

Hmmm...the only thing here that should involve kernel support is the lazy FPU
register saving.   I'm not terribly familiar with that portion of the kernel,
but it should take an unimplemented instruction trap on the first fpu op, set
up a flag for saving FP state on context switches, enable the FPU, then let the
program run.  From what I *have* seen of that code, it's shared between many
processors; doesn't seem like a likely candidate for such a simple problem.

If you compile that code snippet and optimize it with gcc, you actually won't
invoke any fpu ops, as gcc is smart enough to precalculate the result, and
just load that before jumping to printf().

How are you compiling the code?  And are you compiling it the same way on both
platforms?  Do you have fpu emulation enabled on a kernel that doesn't need it? 

These are the potential problems that jump to mind...

-Justin

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On Wed, 24 Jan 2001, Pete Popov wrote:

> Looks like there's something more basic that fails here.  This:
> 
> #include <stdio.h>
> int main()
> {
>     float x1,x2,x3,x4,x5;
> 
>     x1 = 7.5;
>     x2 = 2.0;
>     x3 = x1/x2;
>     x4 = x1*x2;
>     x5 = x1-x2;
>     printf("x1 %f x2 %f x3 %f x4 %f x5 %f\n", x1, x2, x3, x4, x5);
> }
> 
> 
> produces this:
> 
> sh-2.03# ./fl 
> x1 0.000000 x2 0.000000 x3 0.000000 x4 0.000000 x5 0.000000
> 

Try this:

int main()
{
	printf("%f\n", (float)3.14159);
}

If *that* fails, check your libraries and make sure the calling conventions,
etc. match what you think they should be...

-Justin

From owner-linux-mips@oss.sgi.com Thu Jan 25 04:43:34 2001
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On Wed, Jan 24, 2001 at 04:59:19PM +0100, Florian Lohoff wrote:

> Decoded this is:

> >>RA;  00000000 Before first symbol
> >>PC;  00000000 Before first symbol
> Trace; 88028344 <sys_nanosleep+190/24c>
> Trace; 8800fa88 <stack_done+1c/38>

I am trying to track this down a bit more:

with strace (very old version) 

rt_sigaction(34, {SIG_DFL}, NULL, 16)   = 0
rt_sigprocmask(SIG_BLOCK, [], NULL, 16) = 0
sysmips(0x7d1, 0x2ac95d24, 0x1, 0)      = 4149
sched_yield(0x7d1, 0x2ac95d24, 0x1, 0, 0x2acfad50) = 0
sysmips(0x7d1, 0x2ac95d24, 0x1, 0)      = 4149
sched_yield(0x7d1, 0x2ac95d24, 0x1, 0, 0x2acfad50) = 0
sysmips(0x7d1, 0x2ac95d24, 0x1, 0)      = 4149
sched_yield(0x7d1, 0x2ac95d24, 0x1, 0, 0x2acfad50) = 0
sysmips(0x7d1, 0x2ac95d24, 0x1, 0)      = 4149
sched_yield(0x7d1, 0x2ac95d24, 0x1, 0, 0x2acfad50) = 0
sysmips(0x7d1, 0x2ac95d24, 0x1, 0)      = 4149
[... repeated this 2 lines ...]

Every 1000 lines or something:

nanosleep({0, 2000001}, NULL)           = 0

But with strace it doesnt crash it seems at least not within 10 Minutes
i let it run ...

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Thu Jan 25 06:21:54 2001
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On Wed, Jan 24, 2001 at 11:21:34AM -0700, Richard Duran wrote:
> I know this has got to be a FAQ of some sort, but I can't find
> the answer (and I _have_ looked everywhere!): How do I go about
> installing Linux on my Indy? Does it have to co-exist w/ IRIX?
> 
> Please point me to any document offering step-by-step instructions
> (if that exists).
Have a look at www.linux-mips.org. You can find some documentation
there, along with links to various base system which you can use as
a starting point. There's no "ready to install" distribution for
linux/mips yet, although the debian mips port is currently making big
steps forward...and yes, it can easily coexist with Irix.
 -- Guido

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Pete,

    We had a problem in user-space apps all showing 0 for floating-point
results because we hadn't set the ST0_FR bit to 0, and we had a mis-match
between user libraries (MIPS3k-compatible) and the floating point registers.
We noticed the problem when we couldn't run "ps" or "rm" correctly and tracked
it down from some old postings by Ralf and friends.  Maybe this is your
problem, too?

    I added this to our setup call:

    set_cp0_status(ST0_FR, 0);

    Steve


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Date:   Thu, 25 Jan 2001 16:55:31 +0100
From:   Florian Lohoff <flo@rfc822.org>
To:     linux-mips@oss.sgi.com
Subject: [FIX] sysmips(MIPS_ATMIC_SET, ...) ret_from_sys_call vs. o32_ret_from_sys_call
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On Wed, Jan 24, 2001 at 04:59:19PM +0100, Florian Lohoff wrote:
> Decoded this is:
> 
> Unable to handle kernel paging request at virtual address 00000000, epc == 00000000, ra == 00000000
> $0 : 00000000 1004fc00 fffffff2 00000001
> $4 : fffffff2 00000000 00000001 00000000
> $8 : 00000000 2abf3a94 8800f4a0 00000004
> $12: 8ec09f10 7ffffaf8 8ec09f18 8ec09f18
> $16: 8801acf8 00000000 10011510 00000002
> $20: 10011510 7ffffdd8 7ffffdcc 00000002
> $24: 00000000 2abf3a80
> $28: 8ec08000 8ec09ef8 7ffffd10 00000000
> epc   : 00000000
> Using defaults from ksymoops -t elf32-bigmips -a mips:3000
> Status: 1004fc03
> Cause : 30000008

Ok - another one (sorry to spam you) 

>From "handle_sys" i see that system call address and no of
args are in t2 and t3 which are 0x8800f4a0 and 4 with the register
dump above.

8800f4a0 is sys_sysmips which i also saw in the find strace.

>From the strace i find

sysmips(0x7d1, 0x2ac95d24, 0x1, 0)      = 4149

all the time - 0x7d1 is "MIPS_ATOMIC_SET" - Ok from the trace
i see the call comes from handle_sys which itself would end with
o32_ret_from_sys_call.

sysmips(MIPS_ATOMIC_SET, ...) 

would itself return with "ret_from_sys_call".

If i now apply

Index: arch/mips/kernel/sysmips.c
===================================================================
RCS file: /cvs/linux/arch/mips/kernel/sysmips.c,v
retrieving revision 1.15
diff -u -r1.15 sysmips.c
--- arch/mips/kernel/sysmips.c	2000/11/18 01:19:35	1.15
+++ arch/mips/kernel/sysmips.c	2001/01/25 15:48:44
@@ -111,7 +111,7 @@
 
 		__asm__ __volatile__(
 			"move\t$29, %0\n\t"
-			"j\tret_from_sys_call"
+			"j\to32_ret_from_sys_call"
 			: /* No outputs */
 			: "r" (&cmd));
 		/* Unreached */

The machine now at least doesnt crash anymore - Others have to decide
if this is correct. (Nevertheless find doesnt return but this might
be a different problem)

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


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When booting any of three different kernels I have found, including a
working one from Bacchus I get this:
>> bootp():
Setting $netaddr to 10.1.1.2 (from server 10.1.1.1)
Obtaining  from server 10.1.1.1
1464880+388016+339100 entry: 0xa800000000188000
ARCH: SGI-IP27
PROMLIB: ARC firmware Version 64 Revision 0
Discovered 1 cpus on 1 nodes
Total memory probed : 0x14000 pages
Linux version 2.4.0-test11 (ralf@dbear.engr.sgi.com) (gcc version
egcs-2.91.66 19990314 (egcs-1.1.2 release)) #3 SMP Tue Dec 26 11:0
Loading R10000 MMU routines.
CPU revision is: 00000926
Primary instruction cache 32kb, linesize 64 bytes
Primary data cache 32kb, linesize 32 bytes
Secondary cache sized at 1024K, linesize 128
IP27: Running on node 0.
Node 0 has a primary CPU, CPU is running.
Node 0 has no secondary CPU.
Machine is in M mode.
Cpu 0, Nasid 0x0, pcibr_setup(): found partnum= 0xc002...is bridge
CPU 0 clock is 65535MHz.
On node 0 totalpages: 294912
zone(0): 294912 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: OSLoadOptions=INST
Entering 64-bit mode.
Calibrating delay loop... 179.81 BogoMIPS
Memory: 286120k/327680k available (1430k kernel code, 41560k reserved,
150k data, 208k init)
Dentry-cache hash table entries: 65536 (order: 8, 1048576 bytes)
Buffer-cache hash table entries: 32768 (order: 6, 262144 bytes)
Page-cache hash table entries: 131072 (order: 8, 1048576 bytes)
Inode-cache hash table entries: 32768 (order: 7, 524288 bytes)
Checking for 'wait' instruction...  unavailable.
POSIX conformance testing by UNIFIX
REPLICATION: ON nasid 0, ktext from nasid 0, kdata from nasid 0
PCI: Probing PCI hardware on host bus  0.
PCI: Fixing isp1020 in [bus:slot.fn] 00:00.0
PCI: Fixing isp1020 in [bus:slot.fn] 00:01.0
PCI: Fixing base addresses for IOC3 device 00:02.0
PCI: Fixing base addresses for IOC3 device 00:05.0
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Starting kswapd v1.8
ttyS00 at iomem 0x9200000008620178 (irq = 0) is a 16550ASHARE_IRQ
SERIAL_PCI enabled
ttyS01 at iomem 0x9200000008920178 (irq = 0) is a 16550A
Using PHY 31, vendor 0x20005c0, model 0, rev 1.
eth0:  MII transceiver found at MDIO address 31, config 3100 status 786f.
IOC3 SSRAM has 128 kbyte.
Found DS1981U NIC registration number 2a:e8:02:00:70:5e, CRC b9.
Ethernet address is 08:00:69:05:77:36.
Using PHY 31, vendor 0x20005c0, model 0, rev 1.
eth1:  MII transceiver found at MDIO address 31, config 3100 status 7849.
IOC3 SSRAM has 128 kbyte.
Found DS1981U NIC registration number 49:d1:01:00:70:5e, CRC dc.
Ethernet address is 08:00:69:05:45:f1.
SCSI subsystem driver Revision: 1.00
qlogicisp : new isp1020 revision ID (5)
qlogicisp : new isp1020 revision ID (5)
scsi0 : QLogic ISP1020 SCSI on PCI bus 00 device 00 irq 4 I/O base
0x8200000
scsi1 : QLogic ISP1020 SCSI on PCI bus 00 device 08 irq 5 I/O base
0x8400000
Got dbe at 0xffffffff8013f43c
Cpu 0
$0      : 0000000000000000 0000000014201ce0 a80000000028d040
a80000000028d000
$4      : a80000000028d080 0000000000000000 0000000000000040
ffffffff801ccc80
$8      : 0000000014201ce1 0000000000000000 0000000000000004
0000000000000000
$12     : 0000000000000000 a80000000028d080 ffffffffffffffff
a80000000028d014
$16     : 0000000000000040 0000000014201ce1 a80000000028d040
0000000000000002
$20     : a800000047ffcc00 a8000000002e8800 0000000000000000
a8000000002e88b8
$24     : 0000000000000040 a8000000002e8800
$28     : a800000003678000 a80000000367bb20 a800000003667c30
ffffffff800ddacc
Hi      : 0000000000000000
Lo      : 0000000000000040
epc     : ffffffff8013f43c
badvaddr: a800000047ffde60
badvaddr: a800000047ffde60
Status  : 14201ce2
Cause   : 0000901c
Cause   : 0000901c
Index:  0 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  1 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  2 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  3 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  4 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  5 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  6 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  7 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  8 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index:  9 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 10 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 11 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 12 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 13 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 14 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 15 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 16 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 17 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 18 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 19 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 20 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 21 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 22 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 23 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 24 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 25 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 26 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 27 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 28 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 29 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 30 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 31 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 32 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 33 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 34 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 35 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 36 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 37 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 38 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 39 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 40 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 41 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 42 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 43 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 44 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 45 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 46 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 47 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 48 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 49 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 50 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 51 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 52 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 53 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 54 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 55 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 56 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 57 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 58 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 59 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 60 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 61 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 62 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]
Index: 63 pgmask=00000000 va=c0000fff80000000 asid=00  [pa=000000 c=0 d=0
v=0 g=0]  [pa=000000 c=0 d=0 v=0 g=0]

Any suggestions/ideas?
	Thanks
		Nick



From owner-linux-mips@oss.sgi.com Thu Jan 25 09:11:47 2001
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To:     Guido Guenther <guido.guenther@gmx.net>
cc:     linux-mips@oss.sgi.com
Subject: Re: Linux/MIPS installation (FAQ? HOWTO?) 
In-Reply-To: Your message of "Thu, 25 Jan 2001 15:21:19 +0100."
             <20010125152119.A12907@bilbo.physik.uni-konstanz.de> 
Date:   Thu, 25 Jan 2001 09:11:09 -0800
From:   Mike McDonald <mikemac@mikemac.com>
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>Date:   Thu, 25 Jan 2001 15:21:19 +0100
>From: Guido Guenther <guido.guenther@gmx.net>
>To: linux-mips@oss.sgi.com
>Subject: Re: Linux/MIPS installation (FAQ? HOWTO?)
>
>On Wed, Jan 24, 2001 at 11:21:34AM -0700, Richard Duran wrote:
>> I know this has got to be a FAQ of some sort, but I can't find
>> the answer (and I _have_ looked everywhere!): How do I go about
>> installing Linux on my Indy? Does it have to co-exist w/ IRIX?
>> 
>> Please point me to any document offering step-by-step instructions
>> (if that exists).
>Have a look at www.linux-mips.org.

  www.linux-mips.org seems to be a http redirect to
http://linuxmips.ichilton.co.uk/. (Why didn't "they" just update the
DNS entry to point to http://linuxmips.ichilton.co.uk/ instead of
using a redirect?)


  Mike McDonald
  mikemac@mikemac.com

From owner-linux-mips@oss.sgi.com Thu Jan 25 10:03:08 2001
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To:     Steve Johnson <stevej@ridgerun.com>
CC:     "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Subject: Re: floating point on Nevada cpu
References: <3A6F8F66.6258801@mvista.com> <0101241833281Q.00834@plugh.sibyte.com> <3A6F9814.3E39027@mvista.com> <0101241917341S.00834@plugh.sibyte.com> <3A703E3C.360FB4FF@ridgerun.com>
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Steve,

Steve Johnson wrote:
> 
> Pete,
> 
>     We had a problem in user-space apps all showing 0 for floating-point
> results because we hadn't set the ST0_FR bit to 0, and we had a mis-match
> between user libraries (MIPS3k-compatible) and the floating point registers.
> We noticed the problem when we couldn't run "ps" or "rm" correctly and tracked
> it down from some old postings by Ralf and friends.  Maybe this is your
> problem, too?
> 
>     I added this to our setup call:
> 
>     set_cp0_status(ST0_FR, 0);

Problem solved before I finished my first cup of coffee. Thanks!

I bet this problem will show up here and there depending on how the boot
code sets cp0.  Seems like adding the above line in a mips generic init
routine would be a good thing.

Pete

From owner-linux-mips@oss.sgi.com Thu Jan 25 10:26:08 2001
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Subject: Re: [FIX] sysmips(MIPS_ATMIC_SET, ...) ret_from_sys_call vs. o32_ret_from_sys_call
References: <20010124163048.B15348@paradigm.rfc822.org> <20010124165919.C15348@paradigm.rfc822.org> <20010125165530.B12576@paradigm.rfc822.org>
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I'm trying to implement MIPS_ATOMIC_SET for the Vr4181, which has no ll, 
sc operations. It looks to me like the function does something like

sysmips(MIPS_ATOMIC_SET,ptr,val)
{

}

Florian Lohoff wrote:

> On Wed, Jan 24, 2001 at 04:59:19PM +0100, Florian Lohoff wrote:
> 
>> Decoded this is:
>> 
>> Unable to handle kernel paging request at virtual address 00000000, epc == 00000000, ra == 00000000
>> $0 : 00000000 1004fc00 fffffff2 00000001
>> $4 : fffffff2 00000000 00000001 00000000
>> $8 : 00000000 2abf3a94 8800f4a0 00000004
>> $12: 8ec09f10 7ffffaf8 8ec09f18 8ec09f18
>> $16: 8801acf8 00000000 10011510 00000002
>> $20: 10011510 7ffffdd8 7ffffdcc 00000002
>> $24: 00000000 2abf3a80
>> $28: 8ec08000 8ec09ef8 7ffffd10 00000000
>> epc   : 00000000
>> Using defaults from ksymoops -t elf32-bigmips -a mips:3000
>> Status: 1004fc03
>> Cause : 30000008
> 
> 
> Ok - another one (sorry to spam you) 
> 
>>From "handle_sys" i see that system call address and no of
> args are in t2 and t3 which are 0x8800f4a0 and 4 with the register
> dump above.
> 
> 8800f4a0 is sys_sysmips which i also saw in the find strace.
> 
>>From the strace i find
> 
> sysmips(0x7d1, 0x2ac95d24, 0x1, 0)      = 4149
> 
> all the time - 0x7d1 is "MIPS_ATOMIC_SET" - Ok from the trace
> i see the call comes from handle_sys which itself would end with
> o32_ret_from_sys_call.
> 
> sysmips(MIPS_ATOMIC_SET, ...) 
> 
> would itself return with "ret_from_sys_call".
> 
> If i now apply
> 
> Index: arch/mips/kernel/sysmips.c
> ===================================================================
> RCS file: /cvs/linux/arch/mips/kernel/sysmips.c,v
> retrieving revision 1.15
> diff -u -r1.15 sysmips.c
> --- arch/mips/kernel/sysmips.c	2000/11/18 01:19:35	1.15
> +++ arch/mips/kernel/sysmips.c	2001/01/25 15:48:44
> @@ -111,7 +111,7 @@
>  
>  		__asm__ __volatile__(
>  			"move\t$29, %0\n\t"
> -			"j\tret_from_sys_call"
> +			"j\to32_ret_from_sys_call"
>  			: /* No outputs */
>  			: "r" (&cmd));
>  		/* Unreached */
> 
> The machine now at least doesnt crash anymore - Others have to decide
> if this is correct. (Nevertheless find doesnt return but this might
> be a different problem)
> 
> Flo


-- 
Joe deBlaquiere
Red Hat, Inc.
307 Wynn Drive
Huntsville AL, 35805
voice : (256)-704-9200
fax   : (256)-837-3839


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Subject: Re: OOps - very obscure
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Florian,

What is the kernel version?  Your symptom seems to remind me the corrupted s0
bug in several syscalls. The bug is fixed around test9 I believe.  Check for
"save_static_function(sys_sigsuspend);" statement in arch/mips/kernel/signal.c
file.  If you have it, then you don't have the bug.


Jun

Florian Lohoff wrote:
> 
> On Wed, Jan 24, 2001 at 04:59:19PM +0100, Florian Lohoff wrote:
> 
> > Decoded this is:
> 
> > >>RA;  00000000 Before first symbol
> > >>PC;  00000000 Before first symbol
> > Trace; 88028344 <sys_nanosleep+190/24c>
> > Trace; 8800fa88 <stack_done+1c/38>
> 
> I am trying to track this down a bit more:
> 
> with strace (very old version)
> 
> rt_sigaction(34, {SIG_DFL}, NULL, 16)   = 0
> rt_sigprocmask(SIG_BLOCK, [], NULL, 16) = 0
> sysmips(0x7d1, 0x2ac95d24, 0x1, 0)      = 4149
> sched_yield(0x7d1, 0x2ac95d24, 0x1, 0, 0x2acfad50) = 0
> sysmips(0x7d1, 0x2ac95d24, 0x1, 0)      = 4149
> sched_yield(0x7d1, 0x2ac95d24, 0x1, 0, 0x2acfad50) = 0
> sysmips(0x7d1, 0x2ac95d24, 0x1, 0)      = 4149
> sched_yield(0x7d1, 0x2ac95d24, 0x1, 0, 0x2acfad50) = 0
> sysmips(0x7d1, 0x2ac95d24, 0x1, 0)      = 4149
> sched_yield(0x7d1, 0x2ac95d24, 0x1, 0, 0x2acfad50) = 0
> sysmips(0x7d1, 0x2ac95d24, 0x1, 0)      = 4149
> [... repeated this 2 lines ...]
> 
> Every 1000 lines or something:
> 
> nanosleep({0, 2000001}, NULL)           = 0
> 
> But with strace it doesnt crash it seems at least not within 10 Minutes
> i let it run ...
> 
> Flo
> --
> Florian Lohoff                  flo@rfc822.org             +49-5201-669912
>      Why is it called "common sense" when nobody seems to have any?

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Subject: Re: OOps - very obscure
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On Thu, Jan 25, 2001 at 10:59:07AM -0800, Jun Sun wrote:
> Florian,
> 
> What is the kernel version?  Your symptom seems to remind me the corrupted s0
> bug in several syscalls. The bug is fixed around test9 I believe.  Check for
> "save_static_function(sys_sigsuspend);" statement in arch/mips/kernel/signal.c
> file.  If you have it, then you don't have the bug.

2.4.0 final - checkout on 20010111

And i have it ...

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


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Subject: Re: floating point on Nevada cpu
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On Wed, Jan 24, 2001 at 07:16:04PM -0800, Justin Carlson wrote:

> int main()
> {
> 	printf("%f\n", (float)3.14159);
> }

Note that above cast is useless; in C all floats are implicitly converted
to doubles for passing to a varargs function.

  Ralf

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On Wed, Jan 24, 2001 at 06:57:04PM -0800, Justin Carlson wrote:

> How are you compiling the code?  And are you compiling it the same way on
> both platforms?  Do you have fpu emulation enabled on a kernel that doesn't
> need it? 

All MIPS FPUs need it; the architecture specification leaves it to the
implementor of a CPU which parts of the FP architecture are implemented
in hardware if at all; the missing parts have to be replaced in
software.

This piece of code shouldn't result in any FPU operations as printf is
very careful to avoid inaccuracies that might result from floating point
operations.

  Ralf


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Subject: Re: [FIX] sysmips(MIPS_ATMIC_SET, ...) ret_from_sys_call vs. o32_ret_from_sys_call
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that didn't make sense, did it... ;o)

what I meant to say is that it works like

sysmips(MIPS_ATOMIC_SET,ptr,val)
{
	 *ptr = val ;
	val 0 ;
}

but it is an atomic operation

if this correct in a pseudo-code sense?

Joe deBlaquiere wrote:

> I'm trying to implement MIPS_ATOMIC_SET for the Vr4181, which has no ll, 
> sc operations. It looks to me like the function does something like
> 
> sysmips(MIPS_ATOMIC_SET,ptr,val)
> {
> 
> }
> 
> Florian Lohoff wrote:
> 
>> On Wed, Jan 24, 2001 at 04:59:19PM +0100, Florian Lohoff wrote:
>> 
>>> Decoded this is:
>>> 
>>> Unable to handle kernel paging request at virtual address 00000000, 
>>> epc == 00000000, ra == 00000000
>>> $0 : 00000000 1004fc00 fffffff2 00000001
>>> $4 : fffffff2 00000000 00000001 00000000
>>> $8 : 00000000 2abf3a94 8800f4a0 00000004
>>> $12: 8ec09f10 7ffffaf8 8ec09f18 8ec09f18
>>> $16: 8801acf8 00000000 10011510 00000002
>>> $20: 10011510 7ffffdd8 7ffffdcc 00000002
>>> $24: 00000000 2abf3a80
>>> $28: 8ec08000 8ec09ef8 7ffffd10 00000000
>>> epc   : 00000000
>>> Using defaults from ksymoops -t elf32-bigmips -a mips:3000
>>> Status: 1004fc03
>>> Cause : 30000008
>> 
>> 
>> 
>> Ok - another one (sorry to spam you)
>> 
>>>  From "handle_sys" i see that system call address and no of
>> 
>> args are in t2 and t3 which are 0x8800f4a0 and 4 with the register
>> dump above.
>> 
>> 8800f4a0 is sys_sysmips which i also saw in the find strace.
>> 
>>>  From the strace i find
>> 
>> 
>> sysmips(0x7d1, 0x2ac95d24, 0x1, 0)      = 4149
>> 
>> all the time - 0x7d1 is "MIPS_ATOMIC_SET" - Ok from the trace
>> i see the call comes from handle_sys which itself would end with
>> o32_ret_from_sys_call.
>> 
>> sysmips(MIPS_ATOMIC_SET, ...)
>> would itself return with "ret_from_sys_call".
>> 
>> If i now apply
>> 
>> Index: arch/mips/kernel/sysmips.c
>> ===================================================================
>> RCS file: /cvs/linux/arch/mips/kernel/sysmips.c,v
>> retrieving revision 1.15
>> diff -u -r1.15 sysmips.c
>> --- arch/mips/kernel/sysmips.c    2000/11/18 01:19:35    1.15
>> +++ arch/mips/kernel/sysmips.c    2001/01/25 15:48:44
>> @@ -111,7 +111,7 @@
>>  
>>          __asm__ __volatile__(
>>              "move\t$29, %0\n\t"
>> -            "j\tret_from_sys_call"
>> +            "j\to32_ret_from_sys_call"
>>              : /* No outputs */
>>              : "r" (&cmd));
>>          /* Unreached */
>> 
>> The machine now at least doesnt crash anymore - Others have to decide
>> if this is correct. (Nevertheless find doesnt return but this might
>> be a different problem)
>> 
>> Flo


-- 
Joe deBlaquiere
Red Hat, Inc.
307 Wynn Drive
Huntsville AL, 35805
voice : (256)-704-9200
fax   : (256)-837-3839


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On Thu, 25 Jan 2001, Ralf Baechle wrote:
> On Wed, Jan 24, 2001 at 07:16:04PM -0800, Justin Carlson wrote:
> 
> > int main()
> > {
> > 	printf("%f\n", (float)3.14159);
> > }
> 
> Note that above cast is useless; in C all floats are implicitly converted
> to doubles for passing to a varargs function.

Yah, I remembered this after I sent it.  I sometimes get confused with K&R
rules on promotion vs. ANSI, and forgot the varargs handling...

>All MIPS FPUs need it; the architecture specification leaves it to the
>implementor of a CPU which parts of the FP architecture are implemented
>in hardware if at all; the missing parts have to be replaced in
>software.

And here I was remembering the i386 FPU configuration options.  Just spewing
all sorts if incorrect information today!  <sigh>

Thanks for the corrections,
-Justin

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Hello all,

I would like to ask if someone knows some more or less widely available 
PCI network card that is compatible with MIPS/Linux.

I have heard of Tulip and AMD's PCnet. I wonder if you heard of others.

Thanks in advance,
Sorry if this mail bothered you...

Sincerely yours,
Michael Shmulevich
______________________________________
Software Developer
Jungo - R&D 
email: michaels@jungo.com
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To:     Pete Popov <ppopov@mvista.com>
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Subject: Re: floating point on Nevada cpu
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On Wed, Jan 24, 2001 at 06:28:54PM -0800, Pete Popov wrote:

> Has anyone else used floating point with 52xx processors?

Cobalt Qube since '97.  It's working :-)

  Ralf

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To:     Michael Shmulevich <michaels@jungo.com>
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Subject: Re: MIPS/linux compatible PCI network cards
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On Fri, Jan 26, 2001 at 12:06:14AM +0200, Michael Shmulevich wrote:
> Date:   Fri, 26 Jan 2001 00:06:14 +0200
> From: Michael Shmulevich <michaels@jungo.com>
> To: "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
> Subject: MIPS/linux compatible PCI network cards
> 
> Hello all,
> 
> I would like to ask if someone knows some more or less widely available 
> PCI network card that is compatible with MIPS/Linux.
> 
> I have heard of Tulip and AMD's PCnet. I wonder if you heard of others.

These all have already been used with Linux/MIPS.  I don't have any reports
on the current status of these drivers.  If they don't work they should
be reasonably easy to fix.

  Ralf

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Michael Shmulevich wrote:
> 
> Hello all,
> 
> I would like to ask if someone knows some more or less widely available
> PCI network card that is compatible with MIPS/Linux.
> 
> I have heard of Tulip and AMD's PCnet. I wonder if you heard of others.
> 
> Thanks in advance,
> Sorry if this mail bothered you...

Another one is the RTL8139.  It's quite cheap (I think less than $20).

Pete

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To:     Joe deBlaquiere <jadb@redhat.com>
Cc:     Florian Lohoff <flo@rfc822.org>, linux-mips@oss.sgi.com
Subject: Re: [FIX] sysmips(MIPS_ATMIC_SET, ...) ret_from_sys_call vs. o32_ret_from_sys_call
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On Thu, Jan 25, 2001 at 01:35:23PM -0600, Joe deBlaquiere wrote:

> sysmips(MIPS_ATOMIC_SET,ptr,val)
> {
> 	 *ptr = val ;
> 	val 0 ;
> }
> 
> but it is an atomic operation
> 
> if this correct in a pseudo-code sense?

It's more:

sysmips(MIPS_ATOMIC_SET, ptr, val)
{
	result = *ptr;
	*ptr = val;

	return result;
}

   Ralf

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Cc:     Michael Shmulevich <michaels@jungo.com>,
        "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
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On Thu, Jan 25, 2001 at 02:22:16PM -0800, Pete Popov wrote:

> > I would like to ask if someone knows some more or less widely available
> > PCI network card that is compatible with MIPS/Linux.
> > 
> > I have heard of Tulip and AMD's PCnet. I wonder if you heard of others.
> > 
> > Thanks in advance,
> > Sorry if this mail bothered you...
> 
> Another one is the RTL8139.  It's quite cheap (I think less than $20).

In the dark past I had great success with the NE2k's.  They PIO, so no
driver hacking necessary at all.

  Ralf

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Subject: Re: [FIX] sysmips(MIPS_ATMIC_SET, ...) ret_from_sys_call vs. o32_ret_from_sys_call
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Ralf,
	Thanks for the help. I generally consider myself a pseudo-expert on 
Linux, but at the same time I'm amazed by how much I learn on a daily basis.

So I've got the following code which seems to work... (I can't use the 
ll/sc ops on the Vr41xx since they are not implemeted!)

#ifdef CONFIG_CPU_VR41XX
	/* this version is inherently single processor! */
	
	case MIPS_ATOMIC_SET: {
		unsigned int tmp;
		unsigned long flags;

		p = (int *) arg1;
		errno = verify_area(VERIFY_WRITE, p, sizeof(*p));
		if (errno)
			return errno;
		errno = 0;

		/* the Vr processors can't be SMP, so just lock ints */
		save_and_cli(flags);
		tmp = *p ;
		*p = arg2 ;
		restore_flags(flags);
		return tmp;

	}
#endif

The trailer in the normal call is like :

		/* We're skipping error handling etc.  */
		if (current->ptrace & PT_TRACESYS)
			syscall_trace();

		__asm__ __volatile__(
			"move\t$29, %0\n\t"
			"j\tret_from_sys_call"
			: /* No outputs */
			: "r" (&cmd));
		/* Unreached */

Which says "no outputs" although sysmips is specified as

extern int sysmips __P ((__const cmd, __const int arg1,
			 __const int arg2, __const int arg3));

and the usage of this call in glibc pthreads implies that there should 
be a return value. Should I be bypassing the scheduler to return also?

The end goal of this is to make pthreads work on the Vr4181...it's 
certainly an interesting task so far...

Ralf Baechle wrote:

> On Thu, Jan 25, 2001 at 01:35:23PM -0600, Joe deBlaquiere wrote:
> 
> 
>> sysmips(MIPS_ATOMIC_SET,ptr,val)
>> {
>> 	 *ptr = val ;
>> 	val 0 ;
>> }
>> 
>> but it is an atomic operation
>> 
>> if this correct in a pseudo-code sense?
> 
> 
> It's more:
> 
> sysmips(MIPS_ATOMIC_SET, ptr, val)
> {
> 	result = *ptr;
> 	*ptr = val;
> 
> 	return result;
> }
> 
>    Ralf


-- 
Joe deBlaquiere
Red Hat, Inc.
307 Wynn Drive
Huntsville AL, 35805
voice : (256)-704-9200
fax   : (256)-837-3839


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Ralf Baechle wrote:

> On Fri, Jan 26, 2001 at 12:06:14AM +0200, Michael Shmulevich wrote:
> > Date:   Fri, 26 Jan 2001 00:06:14 +0200
> > From: Michael Shmulevich <michaels@jungo.com>
> > To: "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
> > Subject: MIPS/linux compatible PCI network cards
> >
> > Hello all,
> >
> > I would like to ask if someone knows some more or less widely available
> > PCI network card that is compatible with MIPS/Linux.
> >
> > I have heard of Tulip and AMD's PCnet. I wonder if you heard of others.
>
> These all have already been used with Linux/MIPS.  I don't have any reports
> on the current status of these drivers.  If they don't work they should
> be reasonably easy to fix.

The tulip driver worked fine at least in the past. The AMD PCnet driver works
just fine, we are using it on our reference boards.


>
>
>   Ralf

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




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Subject: Re: MIPS/linux compatible PCI network cards
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On Fri, Jan 26, 2001 at 08:42:10AM +0100, Carsten Langgaard wrote:

> The tulip driver worked fine at least in the past. The AMD PCnet driver works
> just fine, we are using it on our reference boards.

The biggest grief I had was that about every embedded system I ever had
uses violates the common standard for what is supposed to be in the
EEPROMs of the Tulip or simply doesn't have one at all ...

  Ralf

From owner-linux-mips@oss.sgi.com Thu Jan 25 23:54:02 2001
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I have been run on a QED RM5261 for quite some time now.
Notice that even it got a FPU, you need to enable the FP emulator to be
fully IEEE compliant.

/Carsten

Ralf Baechle wrote:

> On Wed, Jan 24, 2001 at 06:28:54PM -0800, Pete Popov wrote:
>
> > Has anyone else used floating point with 52xx processors?
>
> Cobalt Qube since '97.  It's working :-)
>
>   Ralf

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
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Pete Popov wrote:
> 
> 
> Another one is the RTL8139.  It's quite cheap (I think less than $20).
> 
> Pete

Surprisingly enough, Realtek's driver is quite x86-oriented. It uses
some ugly outb() functtions without any ioremap()'ping.

We tried to modify it to work for MIPS, but failed. There are some
hard-to-detect situations, when driver just cannot talk to the hardware,
probably due to transmit/receive buffer synchronization. But after some
period the connection is restored (reset?). 

Michael Shmulevich
______________________________________
Software Developer
Jungo - R&D 
email: michaels@jungo.com
web: http://www.jungo.com
Phone: 1-877-514-0537(USA)  +972-9-8859365(Worldwide) ext. 233
Fax:   1-877-514-0538(USA)  +972-9-8859366(Worldwide)

From owner-linux-mips@oss.sgi.com Fri Jan 26 01:44:13 2001
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Subject: Re: MIPS platform recommendations
Date:   Fri, 26 Jan 2001 10:47:13 +0100
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MIPS platform recommendationsPersonally, I use an Algorithmics P-5064 =
board
with an R5260 CPU for this sort of thing.  It's an
ATX board that I've got bolted into a cheapo
generic ATX enclosure on my lab network. They
also have an RM7000 CPU module available.
I'm running the MIPS 2.2.x port on it, however,
not 2.4.  See www.algor.co.uk for info on the
board.

            Kevin K.
  ----- Original Message -----=20
  From: John Van Horne=20
  To: 'linux-mips@oss.sgi.com'=20
  Cc: Paul Lambert=20
  Sent: Wednesday, January 24, 2001 8:23 PM
  Subject: MIPS platform recommendations


  Hello,=20

  Can anyone recommend an R5000/R7000 machine=20
  which can run Linux 2.4 and would be an appropriate=20
  platform on which to build the libraries for an R5000/R7000=20
  embedded Linux application? Which platform has the=20
  most stable version of Linux 2.4 available?=20

  Thanks in advance,=20
  -John Van Horne=20
  jvhorne@cosinecom.com=20


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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD><TITLE>MIPS platform recommendations</TITLE>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4134.600" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV>Personally, I use an Algorithmics P-5064 board</DIV>
<DIV>with an R5260 CPU for this sort of thing.&nbsp; It's an</DIV>
<DIV>ATX board that I've got bolted into a cheapo</DIV>
<DIV>generic ATX enclosure on my lab network.&nbsp;They</DIV>
<DIV>also have an RM7000 CPU module available.</DIV>
<DIV>I'm running the MIPS 2.2.x port on it, however,</DIV>
<DIV>not 2.4.&nbsp; See <A =
href=3D"http://www.algor.co.uk">www.algor.co.uk</A> for=20
info on the</DIV>
<DIV>board.</DIV>
<DIV>&nbsp;</DIV>
<DIV><FONT size=3D2>&nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; =
&nbsp;&nbsp;&nbsp;=20
</FONT><FONT size=3D3>Kevin K.</FONT></DIV>
<BLOCKQUOTE dir=3Dltr=20
style=3D"PADDING-RIGHT: 0px; PADDING-LEFT: 5px; MARGIN-LEFT: 5px; =
BORDER-LEFT: #000000 2px solid; MARGIN-RIGHT: 0px">
  <DIV style=3D"FONT: 10pt arial">----- Original Message ----- </DIV>
  <DIV=20
  style=3D"BACKGROUND: #e4e4e4; FONT: 10pt arial; font-color: =
black"><B>From:</B>=20
  <A title=3DJohnVan.Horne@cosinecom.com=20
  href=3D"mailto:JohnVan.Horne@cosinecom.com">John Van Horne</A> </DIV>
  <DIV style=3D"FONT: 10pt arial"><B>To:</B> <A =
title=3Dlinux-mips@oss.sgi.com=20
  href=3D"mailto:'linux-mips@oss.sgi.com'">'linux-mips@oss.sgi.com'</A> =
</DIV>
  <DIV style=3D"FONT: 10pt arial"><B>Cc:</B> <A =
title=3DPaul.Lambert@cosinecom.com=20
  href=3D"mailto:Paul.Lambert@cosinecom.com">Paul Lambert</A> </DIV>
  <DIV style=3D"FONT: 10pt arial"><B>Sent:</B> Wednesday, January 24, =
2001 8:23=20
  PM</DIV>
  <DIV style=3D"FONT: 10pt arial"><B>Subject:</B> MIPS platform=20
  recommendations</DIV>
  <DIV><BR></DIV>
  <P><FONT face=3DArial size=3D2>Hello,</FONT> </P>
  <P><FONT face=3DArial size=3D2>Can anyone recommend an R5000/R7000 =
machine</FONT>=20
  <BR><FONT face=3DArial size=3D2>which can run Linux 2.4 and would be =
an=20
  appropriate</FONT> <BR><FONT face=3DArial size=3D2>platform on which =
to build the=20
  libraries for an R5000/R7000</FONT> <BR><FONT face=3DArial =
size=3D2>embedded Linux=20
  application? Which platform has the</FONT> <BR><FONT face=3DArial =
size=3D2>most=20
  stable version of Linux 2.4 available?</FONT> </P>
  <P><FONT face=3DArial size=3D2>Thanks in advance,</FONT> <BR><FONT =
face=3DArial=20
  size=3D2>-John Van Horne</FONT> <BR><FONT face=3DArial size=3D2><A=20
  href=3D"mailto:jvhorne@cosinecom.com">jvhorne@cosinecom.com</A></FONT> =

</P></BLOCKQUOTE></BODY></HTML>

------=_NextPart_000_00C7_01C08785.57A97F60--


From owner-linux-mips@oss.sgi.com Fri Jan 26 01:59:43 2001
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Subject: Re: CONFIG_MIPS_UNCACHED
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>
> > It is really surprising to know this.  It sounds like a CPU bug to me.
Can
> > some MIPS "gods" clarify if such a behaviour is a bug or allowed?
> >
> > BTW, the CPU in EV96100 is QED RM7000, I believe.
>
> If you want to be strictly correct you have to execute the code that
> disables caching of KSEG0 in uncached space like KSEG1, then flush the
> caches before you can resume execution in KSEG0.  Otherwise you might
> end up with dirty d-caches which when flushed will overwrite more
> uptodate data in memory.  The window is very small but yet exists if
> things are just right.

That's one possible failure mode.   The other is that there
are dirty lines (those that were brought into the cache and
modified by stores, but never written back to memory) that
are rendered invisible by forcing KSEG0 to go uncached.
This will cause failure of any code that is expecting to see
the results of those stores if said code executes before
some other event causes the write-back - and if the
machine is running with cacheing completely disabled,
as it would be in the case under discussion, such an
event may never occur!

            Regards,

            Kevin K.


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Subject: Re: floating point on Nevada cpu
Date:   Fri, 26 Jan 2001 11:14:38 +0100
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> >     We had a problem in user-space apps all showing 0 for floating-point
> > results because we hadn't set the ST0_FR bit to 0, and we had a
mis-match
> > between user libraries (MIPS3k-compatible) and the floating point
registers.
> > We noticed the problem when we couldn't run "ps" or "rm" correctly and
tracked
> > it down from some old postings by Ralf and friends.  Maybe this is your
> > problem, too?
> >
> >     I added this to our setup call:
> >
> >     set_cp0_status(ST0_FR, 0);
>
> Problem solved before I finished my first cup of coffee. Thanks!
>
> I bet this problem will show up here and there depending on how the boot
> code sets cp0.  Seems like adding the above line in a mips generic init
> routine would be a good thing.

I had essentially the same problem at MIPS a year or two ago,
and I could have *sworn* that my fix, which ORed ST0_FR into
the initial Status register value set in the startup assembly code,
had made it into the standard distributions.  It's at about line 530
of head.S, where a term is added to make the instruction

li t1,~(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR)

I spent days thinking it was a mipsel library problem,
because it only turned up when I tried exercising a
little-endian version of the same kernel that worked
sell big-endian on the Indy.  But of course it was all
due to the mipsel system having a boot-prom that
cleverly enabled all the FP registers for me...

            Kevin K.


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On Thu, 25 Jan 2001, Joe deBlaquiere wrote:

> So I've got the following code which seems to work... (I can't use the 
> ll/sc ops on the Vr41xx since they are not implemeted!)
> 
> #ifdef CONFIG_CPU_VR41XX

 You are perfectly correct, with the exception you really want to make it: 

#ifndef CONFIG_CPU_HAS_LLSC

as that's the correct option -- just undef it in arch/mips/config.in for
your CPU like it's done for others already.

 Shame on me I haven't sent the patch for MIPS_ATMIC_SET for non-ll/sc
processors yet.  I have it but it needs a few minor cleanups.

 Ralf, BTW, what do you think if we send a segfault on a memory access
violation instead of returning an error?  That would make the behaviour of
MIPS_ATMIC_SET consistent for any memory contents.  Does anything actually
rely on the function to return an error in such a situation? 

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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Subject: Re: MIPS/linux compatible PCI network cards
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> > > Hello all,
> > >
> > > I would like to ask if someone knows some more or less widely
available
> > > PCI network card that is compatible with MIPS/Linux.
> > >
> > > I have heard of Tulip and AMD's PCnet. I wonder if you heard of
others.
> >
> > These all have already been used with Linux/MIPS.  I don't have any
reports
> > on the current status of these drivers.  If they don't work they should
> > be reasonably easy to fix.
>
> The tulip driver worked fine at least in the past. The AMD PCnet driver
works
> just fine, we are using it on our reference boards.

Note, however, that the Tulip driver that was part of the
standard 2.2/2.3 repository at oss.sgi.com was both
downrev with regard to the author's own web site and
subobtimal if not outright buggy in it's cache management.
The AMD PCnet driver as we found it was clean and efficient
but had no MIPS cache hooks.   I had to put those in.
So unless Ralf or someone at SGI that the versions
on oss.sgi.com are the versions I cleaned up for MIPS,
I would recommend pulling them off the MIPS site.

            Regards,

            Kevin K.



From owner-linux-mips@oss.sgi.com Fri Jan 26 03:48:04 2001
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Subject: Re: MIPS/linux compatible PCI network cards
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"Kevin D. Kissell" wrote:

> > > > Hello all,
> > > >
> > > > I would like to ask if someone knows some more or less widely
> available
> > > > PCI network card that is compatible with MIPS/Linux.
> > > >
> > > > I have heard of Tulip and AMD's PCnet. I wonder if you heard of
> others.
> > >
> > > These all have already been used with Linux/MIPS.  I don't have any
> reports
> > > on the current status of these drivers.  If they don't work they should
> > > be reasonably easy to fix.
> >
> > The tulip driver worked fine at least in the past. The AMD PCnet driver
> works
> > just fine, we are using it on our reference boards.
>
> Note, however, that the Tulip driver that was part of the
> standard 2.2/2.3 repository at oss.sgi.com was both
> downrev with regard to the author's own web site and
> subobtimal if not outright buggy in it's cache management.
> The AMD PCnet driver as we found it was clean and efficient
> but had no MIPS cache hooks.   I had to put those in.
> So unless Ralf or someone at SGI that the versions
> on oss.sgi.com are the versions I cleaned up for MIPS,
> I would recommend pulling them off the MIPS site.
>

The AMD PCnet driver should be OK in the CVS from oss.sgi.com

>
>             Regards,
>
>             Kevin K.

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Fri Jan 26 03:49:43 2001
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Carsten Langgaard wrote:

> "Kevin D. Kissell" wrote:
>
> > > > > Hello all,
> > > > >
> > > > > I would like to ask if someone knows some more or less widely
> > available
> > > > > PCI network card that is compatible with MIPS/Linux.
> > > > >
> > > > > I have heard of Tulip and AMD's PCnet. I wonder if you heard of
> > others.
> > > >
> > > > These all have already been used with Linux/MIPS.  I don't have any
> > reports
> > > > on the current status of these drivers.  If they don't work they should
> > > > be reasonably easy to fix.
> > >
> > > The tulip driver worked fine at least in the past. The AMD PCnet driver
> > works
> > > just fine, we are using it on our reference boards.
> >
> > Note, however, that the Tulip driver that was part of the
> > standard 2.2/2.3 repository at oss.sgi.com was both
> > downrev with regard to the author's own web site and
> > subobtimal if not outright buggy in it's cache management.
> > The AMD PCnet driver as we found it was clean and efficient
> > but had no MIPS cache hooks.   I had to put those in.
> > So unless Ralf or someone at SGI that the versions
> > on oss.sgi.com are the versions I cleaned up for MIPS,
> > I would recommend pulling them off the MIPS site.
> >
>
> The AMD PCnet driver should be OK in the CVS from oss.sgi.com

At least in the 2.4.0 version.

>
> >
> >             Regards,
> >
> >             Kevin K.
>
> --
> _    _ ____  ___   Carsten Langgaard  Mailto:carstenl@mips.com
> |\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
> | \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
>   TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
>                    Denmark            http://www.mips.com

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




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Subject: Re: floating point on Nevada cpu
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"Kevin D. Kissell" wrote:

> I had essentially the same problem at MIPS a year or two ago,
> and I could have *sworn* that my fix, which ORed ST0_FR into
> the initial Status register value set in the startup assembly code,
> had made it into the standard distributions.  It's at about line 530
> of head.S, where a term is added to make the instruction
>
> li t1,~(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR)
>
> I spent days thinking it was a mipsel library problem,
> because it only turned up when I tried exercising a
> little-endian version of the same kernel that worked
> sell big-endian on the Indy.  But of course it was all
> due to the mipsel system having a boot-prom that
> cleverly enabled all the FP registers for me...
>
>             Kevin K.

Kevin,

    Your/Flo's/Ralf's thread in the MIPS Linux archives from last January was
what clued me into the ST0_FR setting in the first place.  Ralf gave arguments
why he wouldn't take your change at that time, which is why that line isn't in
the 2.4.x kernel.

    Steve


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From owner-linux-mips@oss.sgi.com Fri Jan 26 05:54:14 2001
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Subject: Re: floating point on Nevada cpu
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> "Kevin D. Kissell" wrote:
>
> > I had essentially the same problem at MIPS a year or two ago,
> > and I could have *sworn* that my fix, which ORed ST0_FR into
> > the initial Status register value set in the startup assembly code,
> > had made it into the standard distributions.  It's at about line 530
> > of head.S, where a term is added to make the instruction
> >
> > li t1,~(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR)
> >
> > I spent days thinking it was a mipsel library problem,
> > because it only turned up when I tried exercising a
> > little-endian version of the same kernel that worked
> > sell big-endian on the Indy.  But of course it was all
> > due to the mipsel system having a boot-prom that
> > cleverly enabled all the FP registers for me...
> >
> >             Kevin K.
>
> Kevin,
>
>     Your/Flo's/Ralf's thread in the MIPS Linux archives from last January
was
> what clued me into the ST0_FR setting in the first place.  Ralf gave
arguments
> why he wouldn't take your change at that time, which is why that line
isn't in
> the 2.4.x kernel.

Yeah, and I still think they are piss-poor arguments.  ;-)

I still do not see much virtue in saying that one has a binary
kernel that supports either FR=0 or FR=1, *provided*
that the entire userland from init inward is built with the same
"polarity" *and* that the boot monitor is  guaranteed to have
set FR the right way before launching the kernel.  FR=0 (o32)
and FR=1 (n32, n64) binaries should be distinguishable at
exec() time, and the FR bit set appropriately at
that time.  Making assumptions  about what the bootloader
or bootprom has done is just plain foolish, IMHO.

            Kevin K.


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Thanks to everyone who responded! This is my first time with Linux/MIPS, so
you probably haven't heard the last of me!

-richard

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Ralf gently pointed out that there was the possibility of needing to 
fault the page for *p, which couldn't occur with ints off. So here's an 
updated version...

#ifndef CONFIG_CPU_HAS_LLSC
	/* this version is inherently single processor! */
	/* borrowed from Linux-2.4.0-test12 */
	/* mlock/munlock added - jadb@redhat.com */
	
	case MIPS_ATOMIC_SET: {
		unsigned int tmp;
		unsigned int flags;

		p = (int *) arg1;
		errno = verify_area(VERIFY_WRITE, p, sizeof(*p));
		if (errno)
			return errno;
		errno = 0;
		
		/* need to prevent page faults with ints off */
		if (sys_mlock(p,sizeof(*p)) != 0)
		{
			return -EAGAIN;
		}
		
		/* actually _do_ the exchange */
		save_and_cli(flags);
		errno |= __get_user(tmp, p);
		errno |= __put_user(arg2, p);
		restore_flags(flags);
		
		/* i don't think sys_munlock can fail here, and */
		/* I wouldn't know what to do if it did, so no  */
		/* reason to pay attention to the return value  */
		sys_munlock(p,sizeof(*p));

		return tmp;
	}
#endif

comments anyone?

Joe

Maciej W. Rozycki wrote:

> On Thu, 25 Jan 2001, Joe deBlaquiere wrote:
> 
> 
>> So I've got the following code which seems to work... (I can't use the 
>> ll/sc ops on the Vr41xx since they are not implemeted!)
>> 
>> #ifdef CONFIG_CPU_VR41XX
> 
> 
>  You are perfectly correct, with the exception you really want to make it: 
> 
> #ifndef CONFIG_CPU_HAS_LLSC
> 
> as that's the correct option -- just undef it in arch/mips/config.in for
> your CPU like it's done for others already.
> 
>  Shame on me I haven't sent the patch for MIPS_ATMIC_SET for non-ll/sc
> processors yet.  I have it but it needs a few minor cleanups.
> 
>  Ralf, BTW, what do you think if we send a segfault on a memory access
> violation instead of returning an error?  That would make the behaviour of
> MIPS_ATMIC_SET consistent for any memory contents.  Does anything actually
> rely on the function to return an error in such a situation? 
> 
>   Maciej


-- 
Joe deBlaquiere
Red Hat, Inc.
307 Wynn Drive
Huntsville AL, 35805
voice : (256)-704-9200
fax   : (256)-837-3839


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Date:   Fri, 26 Jan 2001 18:12:49 +0100
From:   Carsten Langgaard <carstenl@mips.com>
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Has anyone put together an easy-to-install tar file, similar to the old
hard-hat 5.1 tarfile, where you could install everything though an
install program running on a nfs server ?
I really like the old hard-hat approach, it was easy to install and
everything seems to work, but it would be nice to have a newer release.
The old hard-hat install program doesn't work with the new 2.4.0 kernel.

/Carsten

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Fri Jan 26 09:21:56 2001
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On Fri, Jan 26, 2001 at 06:12:49PM +0100, Carsten Langgaard wrote:
> 
> Has anyone put together an easy-to-install tar file, similar to the old
> hard-hat 5.1 tarfile, where you could install everything though an
> install program running on a nfs server ?
> I really like the old hard-hat approach, it was easy to install and
> everything seems to work, but it would be nice to have a newer release.
> The old hard-hat install program doesn't work with the new 2.4.0 kernel.
> 

There is a big endian glibc 2.2 debian base - Look at
ftp.uni-mainz.de/pub/debian-local/mips. I hope to produce something similar
for mipsel with the next days.

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


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Subject: Cross compiling RPMs
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  Can anyone point me to some references of techniques for cross
compiling RPMs? I want to build some packages for my little endian
MIPS but I haven't found any info on cross compiling RPMs in the RPM
docs nor "Maximum RPM". Any pointers would be appreciated. (I'm
particularly interested in how to specify the tool chain.)

  Thanks,

  Mike McDonald
  mikemac@mikemac.com

From owner-linux-mips@oss.sgi.com Fri Jan 26 10:17:46 2001
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Michael Shmulevich wrote:
> 
> Pete Popov wrote:
> >
> >
> > Another one is the RTL8139.  It's quite cheap (I think less than $20).
> >
> > Pete
> 
> Surprisingly enough, Realtek's driver is quite x86-oriented. It uses
> some ugly outb() functtions without any ioremap()'ping.

> We tried to modify it to work for MIPS, but failed. There are some
> hard-to-detect situations, when driver just cannot talk to the hardware,
> probably due to transmit/receive buffer synchronization. But after some
> period the connection is restored (reset?).


The 8139 driver (at least the latest one) has an "ifdef" option to use
I/O or memory mapping. I've tried both and both work fine without any
modifications.  The I/O works fine, provided that you've set things up
correctly.

The inb()/outb() functions are part of just about every driver,
unfortunately.  I really don't like this x86 emulation, but if you want
to be able to use drivers without having to modify every one of them,
you'll have to do this.

To get the realtek driver to work, all you need to do is to set
mips_io_port_base to KSEG1.  Let's assume that the ethernet card has
been assigned i/o space at 0x14000000.  The driver will pick that up as
the ioaddr and use the 0x1400000 as the "port". The inb()/outb() macros
add mips_io_port_base to the "port" value and now you have 0xB4000000,
so you can access the card.  

Pete

From owner-linux-mips@oss.sgi.com Fri Jan 26 10:37:16 2001
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Mike McDonald wrote:
> 
>   Can anyone point me to some references of techniques for cross
> compiling RPMs? I want to build some packages for my little endian
> MIPS but I haven't found any info on cross compiling RPMs in the RPM
> docs nor "Maximum RPM". Any pointers would be appreciated. (I'm
> particularly interested in how to specify the tool chain.)

To start with, you'll need a cross tool chain setup properly with the
headers and libraries.  One option is
ftp.mvista.com:/pub/Area51/mips_fp_le. You can grab everything (the
entire root fs) or just the tools: binutils, gcc, kernel headers,
glibc.  Others might have similar toolchains they can point you at. 
Another option is native builds, which I personally don't like.

Pete

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>Date: Fri, 26 Jan 2001 10:37:03 -0800
>From: Pete Popov <ppopov@mvista.com>
>To: Mike McDonald <mikemac@mikemac.com>
>Subject: Re: Cross compiling RPMs

>To start with, you'll need a cross tool chain setup properly with the
>headers and libraries.  One option is
>ftp.mvista.com:/pub/Area51/mips_fp_le. You can grab everything (the
>entire root fs) or just the tools: binutils, gcc, kernel headers,
>glibc.  Others might have similar toolchains they can point you at. 
>Another option is native builds, which I personally don't like.
>
>Pete

  I have a working tool chain that I use to cross compile a kernel
with sources from. How do I convince rpm to use that chain?

  Mike McDonald
  mikemac@mikemac.com

From owner-linux-mips@oss.sgi.com Fri Jan 26 11:39:47 2001
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Mike McDonald wrote:
> 
> >Date: Fri, 26 Jan 2001 10:37:03 -0800
> >From: Pete Popov <ppopov@mvista.com>
> >To: Mike McDonald <mikemac@mikemac.com>
> >Subject: Re: Cross compiling RPMs
> 
> >To start with, you'll need a cross tool chain setup properly with the
> >headers and libraries.  One option is
> >ftp.mvista.com:/pub/Area51/mips_fp_le. You can grab everything (the
> >entire root fs) or just the tools: binutils, gcc, kernel headers,
> >glibc.  Others might have similar toolchains they can point you at.
> >Another option is native builds, which I personally don't like.
> >
> >Pete
> 
>   I have a working tool chain that I use to cross compile a kernel
> with sources from. How do I convince rpm to use that chain?

Is that tool chain setup to compile userland apps? Can you cross compile
this:

hello.c:

int main()
{
    printf("hello world\n");
}

with a command such as "mips_fp_le-gcc -o hello hello.c" and get a
little endian mips binary that runs on your system?  

If so, then you need to modify the .spec file for the given rpm to pick
up the right tool chain, ... and you'll probably need to add macro files
that rpm picks up so  that you can do something like:

rpm -ba --target=xxxxx <spec file>

it works.

That's easier said than done.  I wouldn't know how to do it myself --
someone else has done it for me here.

Pete

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In-Reply-To: Your message of "Fri, 26 Jan 2001 11:39:17 PST."
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>Date: Fri, 26 Jan 2001 11:39:17 -0800
>From: Pete Popov <ppopov@mvista.com>
>To: Mike McDonald <mikemac@mikemac.com>
>Subject: Re: Cross compiling RPMs
>
>Mike McDonald wrote:

>>   I have a working tool chain that I use to cross compile a kernel
>> with sources from. How do I convince rpm to use that chain?
>
>Is that tool chain setup to compile userland apps? Can you cross compile
>this:

  Not yet. One of the rpms I'd like to be able to compile is one
of the libc variants. :-)

>If so, then you need to modify the .spec file for the given rpm ...

  I was afraid you were going to say that! I was hoping there was some
way to do it without modifying the spec files by hand. Of course,
the Makefiles would also have to modified to support $(ROOT). Hmm,
maybe I need to write a script that'll build a sandbox that I can
chroot to before I do a 'rpm -ba'.

  Mike McDonald
  mikemac@mikemac.com

From owner-linux-mips@oss.sgi.com Fri Jan 26 11:54:36 2001
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From:   Jun Sun <jsun@mvista.com>
To:     Michael Shmulevich <michaels@jungo.com>
Cc:     "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
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On Fri, Jan 26, 2001 at 12:06:14AM +0200, Michael Shmulevich wrote:
> Hello all,
> 
> I would like to ask if someone knows some more or less widely available 
> PCI network card that is compatible with MIPS/Linux.
> 
> I have heard of Tulip and AMD's PCnet. I wonder if you heard of others.
> 
> Thanks in advance,
> Sorry if this mail bothered you...
>

Intel eepro100 works on mips too.  What I had to modify is to
1) take care of the non-standard EEPROM
2) set rx_copybreak to 1518 to avoid some cache problem.
3) remove a buggy cpu_to_le32() coversion

I sent a patch to the author.  Hopefully next release it will be
ready for MIPS.

Jun 

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On Thu, Jan 25, 2001 at 06:53:44PM -0600, Joe deBlaquiere wrote:
> 
> The end goal of this is to make pthreads work on the Vr4181...it's 
> certainly an interesting task so far...
> 

We have got pthreads working on Vr4181 for a couple of months already.
What version of kernel are you using?  The toughest problem is not
MIPS_AUTOMIC_SET.  It is a kernel s0 register corruption bug, which is
already fixed in the current CVS tree.

Jun

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On Fri, Jan 26, 2001 at 10:37:03AM -0800, Pete Popov wrote:
> glibc.  Others might have similar toolchains they can point you at. 
> Another option is native builds, which I personally don't like.

Cross compiling is definitly no option for debian as the dependencies
etc are all made from "ldd binary" which has to fail for cross-compiling.
I guess this also happens to rpm packages so cross-compiling to really
get a correct distribution is definitly no option.

The larger the packages are the harder it is to get them cross-compiled
correctly as they run nifty little check programs from configure which
cant work. I guess you had similar problems as all rpms are
"noarch" which is definitly - ummm - interesting.

I definitly go for native builds - Once you have a working stable 
base you can set up debian autobuilders which will do nearly 
everything for you except signing and uploading the package into
the main repository.

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


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Cc:     linux-mips@oss.sgi.com
Subject: Re: Cross compiling RPMs
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On Fri, Jan 26, 2001 at 10:15:21AM -0800, Mike McDonald wrote:
> 
>   Can anyone point me to some references of techniques for cross
> compiling RPMs? I want to build some packages for my little endian
> MIPS but I haven't found any info on cross compiling RPMs in the RPM
> docs nor "Maximum RPM". Any pointers would be appreciated. (I'm
> particularly interested in how to specify the tool chain.)
>

Mike,

Most GNU packages allow you to specify environment variables such
as CC, AR, RANLIB, etc when invoking the "configure" command.  So
you will need to set those variables in your spec file
where "configure" is invoked.

If a package itself is not cross-compiling friendly, you need to 
make it cross-compilable first. :-)

If you only cross-compile one package, I suggest you read through
spec file and do the job manually (untar, applying patch, configure,
make, make install, etc).

Jun

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Jun Sun wrote:

> On Thu, Jan 25, 2001 at 06:53:44PM -0600, Joe deBlaquiere wrote:
> 
>> The end goal of this is to make pthreads work on the Vr4181...it's 
>> certainly an interesting task so far...
>> 
> 
> 
> We have got pthreads working on Vr4181 for a couple of months already.
> What version of kernel are you using?  The toughest problem is not
> MIPS_AUTOMIC_SET.  It is a kernel s0 register corruption bug, which is
> already fixed in the current CVS tree.
> 

which current CVS tree, the linuxvr tree?

what is the s0 register corruption bug?

> Jun


-- 
Joe


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Subject: Re: Cross compiling RPMs
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On Fri, Jan 26, 2001 at 09:23:41PM +0100, Florian Lohoff wrote:
> On Fri, Jan 26, 2001 at 10:37:03AM -0800, Pete Popov wrote:
> > glibc.  Others might have similar toolchains they can point you at. 
> > Another option is native builds, which I personally don't like.
> 
> Cross compiling is definitly no option for debian as the dependencies
> etc are all made from "ldd binary" which has to fail for cross-compiling.
> I guess this also happens to rpm packages so cross-compiling to really
> get a correct distribution is definitly no option.
> 

There are other ways to figure out the dependency in a cross-compiling 
environment.  We have an internal tool that does just that and more (some
size/fs optimization stuff).  It is not used in the current release, though.

> The larger the packages are the harder it is to get them cross-compiled
> correctly as they run nifty little check programs from configure which
> cant work. I guess you had similar problems as all rpms are
> "noarch" which is definitly - ummm - interesting.
> 

The "noarch" means the installed target is arch-independent.  The
standard setup in mvista CDK is to let target boot from NFS root fs, 
where NFS host can be linux/i386, Linux/ppc and Sun/Sparc (perhaps
Win/i386 as well, I am not sure).  Those packages are meant to be 
installed to all those hosts, and therefore "noarch" :-0.

> I definitly go for native builds - Once you have a working stable 
> base you can set up debian autobuilders which will do nearly 
> everything for you except signing and uploading the package into
> the main repository.
>

Native compiling is easy.  Cross-compiling is cool. :-)

Well, not exactly.  When you are dealing with head-less, disk-less 
memory-scarce embedded devices with ad hoc run-time environments,
cross-compiling is your only choice.

Jun

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Subject: Re: [FIX] sysmips(MIPS_ATMIC_SET, ...) ret_from_sys_call vs. o32_ret_from_sys_call
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On Fri, Jan 26, 2001 at 02:38:15PM -0600, Joe deBlaquiere wrote:
> 
> Jun Sun wrote:
> 
> > On Thu, Jan 25, 2001 at 06:53:44PM -0600, Joe deBlaquiere wrote:
> > 
> >> The end goal of this is to make pthreads work on the Vr4181...it's 
> >> certainly an interesting task so far...
> >> 
> > 
> > 
> > We have got pthreads working on Vr4181 for a couple of months already.
> > What version of kernel are you using?  The toughest problem is not
> > MIPS_AUTOMIC_SET.  It is a kernel s0 register corruption bug, which is
> > already fixed in the current CVS tree.
> > 
> 
> which current CVS tree, the linuxvr tree?
> 

What do you think "CVS tree" is on an oss.sgi.com mailing list? :-0

> what is the s0 register corruption bug?
> 

Check back with the mailing list archive.  There was a thread about this.  
Basically, the s0 register can be corrupted during a few syscalls.  
pthread_create() uses one of the syscalls and thus fails even though the 
new thread is actually created.

Jun

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From:   Ralf Baechle <ralf@oss.sgi.com>
To:     "Kevin D. Kissell" <kevink@mips.com>
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On Fri, Jan 26, 2001 at 12:45:45PM +0100, Kevin D. Kissell wrote:

> Note, however, that the Tulip driver that was part of the
> standard 2.2/2.3 repository at oss.sgi.com was both
> downrev with regard to the author's own web site and
> subobtimal if not outright buggy in it's cache management.
> The AMD PCnet driver as we found it was clean and efficient
> but had no MIPS cache hooks.   I had to put those in.
> So unless Ralf or someone at SGI that the versions
> on oss.sgi.com are the versions I cleaned up for MIPS,
> I would recommend pulling them off the MIPS site.

Linux 2.4 has a new DMA API which is documented in
Documentation/DMA-mapping.txt.  So today drivers which don't work out of
the box on a MIPS system should be considered broken.

  Ralf

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Subject: Re: Cross compiling RPMs 
In-Reply-To: Your message of "Fri, 26 Jan 2001 12:51:31 PST."
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>Date:   Fri, 26 Jan 2001 12:51:31 -0800
>From: Jun Sun <jsun@mvista.com>
>To: Florian Lohoff <flo@rfc822.org>
>Subject: Re: Cross compiling RPMs

>The "noarch" means the installed target is arch-independent.  The
>standard setup in mvista CDK is to let target boot from NFS root fs, 
>where NFS host can be linux/i386, Linux/ppc and Sun/Sparc (perhaps
>Win/i386 as well, I am not sure).  Those packages are meant to be 
>installed to all those hosts, and therefore "noarch" :-0.

 Hmm, I would have thought they should be designated for the type of
system they were instead to run on. The fast you're installing them
into an NFS root on some other machine shouldn't change that. Can't
any ole rpm be forced to install on some random NFS server? Then by
your reasoning, all rpms would be noarch, wouldn't they?

>Native compiling is easy.  Cross-compiling is cool. :-)
>
>Well, not exactly.  When you are dealing with head-less, disk-less 
>memory-scarce embedded devices with ad hoc run-time environments,
>cross-compiling is your only choice.
>
>Jun

  Precisely! In our case, we get drops from various contractors who
are doing developement/porting to a wide variety of platforms. (So far
we have i386, mipsel, arm, and sh3. No alpha or sparc yet.) We'll get
multiple drops from the contractors over time. We need to be able to
1) rebuild the binaries from the supplied sources (some vendors have
delivered binaries that did NOT come from the sources they claimed!),
2) build a test suite for that drop and 3) build an initial ramdisk,
bootable CD, or NFS root dir to test the drop. Building the test
environment will include some subset (usually a real small subset) of
the whole drop but we still need to be able to rebuild everything.
Most of these systems we're dealing with have no native compiling
capability, so cross compiling is the only choice. 

  And then sometimes we get tarballs instead of rpms, but that's a
different can of worms.

  Mike McDonald
  mikemac@mikemac.com

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>Date:   Fri, 26 Jan 2001 21:23:41 +0100
>From: Florian Lohoff <flo@rfc822.org>
>To: Pete Popov <ppopov@mvista.com>
>Subject: Re: Cross compiling RPMs

>I definitly go for native builds - 

  If one were to go the native compiling route, what would the minimum
set of rpms needed be? kernel, bin-utils, cc. file-utils? ???

  Mike McDonald
  mikemac@mikemac.com

From owner-linux-mips@oss.sgi.com Fri Jan 26 13:19:07 2001
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To:     "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
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On Fri, Jan 26, 2001 at 11:21:43AM +0100, Maciej W. Rozycki wrote:

>  Ralf, BTW, what do you think if we send a segfault on a memory access
> violation instead of returning an error?  That would make the behaviour of
> MIPS_ATMIC_SET consistent for any memory contents.  Does anything actually
> rely on the function to return an error in such a situation? 

Afaik the only user of MIPS_ATOMIC_SET ever running on Linux/MIPS is the
Linuxthreads code you wrote, so no.  Aside of that the semantics of this
syscall were defined by older MIPS operating systems such as Risc/OS and
I think we should follow their example.

  Ralf

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Subject: Re: [FIX] sysmips(MIPS_ATMIC_SET, ...) ret_from_sys_call vs. o32_ret_from_sys_call
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On Fri, Jan 26, 2001 at 09:41:49AM -0600, Joe deBlaquiere wrote:

> 		sys_munlock(p,sizeof(*p));

> 
> comments anyone?

Mlock(2) doesn't nest.  So if the page was mlocked before, you just unlocked
it.

  Ralf

From owner-linux-mips@oss.sgi.com Fri Jan 26 16:31:49 2001
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Date:   Fri, 26 Jan 2001 16:31:24 -0800
From:   Pete Popov <ppopov@mvista.com>
Organization: Monta Vista Software
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To:     Mike McDonald <mikemac@mikemac.com>
CC:     linux-mips@oss.sgi.com
Subject: Re: Cross compiling RPMs
References: <200101262111.NAA13006@saturn.mikemac.com>
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Mike,

> >The "noarch" means the installed target is arch-independent.  The
> >standard setup in mvista CDK is to let target boot from NFS root fs,
> >where NFS host can be linux/i386, Linux/ppc and Sun/Sparc (perhaps
> >Win/i386 as well, I am not sure).  Those packages are meant to be
> >installed to all those hosts, and therefore "noarch" :-0.
> 
>  Hmm, I would have thought they should be designated for the type of
> system they were instead to run on. The fast you're installing them
> into an NFS root on some other machine shouldn't change that. Can't
> any ole rpm be forced to install on some random NFS server? Then by
> your reasoning, all rpms would be noarch, wouldn't they?
> 
> >Native compiling is easy.  Cross-compiling is cool. :-)
> >
> >Well, not exactly.  When you are dealing with head-less, disk-less
> >memory-scarce embedded devices with ad hoc run-time environments,
> >cross-compiling is your only choice.
> >
> >Jun
> 
>   Precisely! In our case, we get drops from various contractors who
> are doing developement/porting to a wide variety of platforms. (So far
> we have i386, mipsel, arm, and sh3. No alpha or sparc yet.) We'll get
> multiple drops from the contractors over time. We need to be able to
> 1) rebuild the binaries from the supplied sources (some vendors have
> delivered binaries that did NOT come from the sources they claimed!),
> 2) build a test suite for that drop and 3) build an initial ramdisk,
> bootable CD, or NFS root dir to test the drop. Building the test
> environment will include some subset (usually a real small subset) of
> the whole drop but we still need to be able to rebuild everything.
> Most of these systems we're dealing with have no native compiling
> capability, so cross compiling is the only choice.

Here's the recipe for rebuilding all packages from our (MontaVista)
SRPMs:

from ftp.mvista.com:

* download
/pub/CDK/1.2/Latest/MIPS/common/hhl-rpmconfig-0.16-1.noarch.rpm

Install that package. It will go in /opt/hardhat/xxxx

Read carefully /opt/hardhat/config/rpm/README.  That README has all the
info you need to:

* setup your macros files
* download all the tools and SRPMS from the ftp site
* rebuild all of the packages we support, including glibc (glibc is the
only one you have to rebuild as root user)

You can rebuild any package for any of the architectures we support by
doing something like this:

rpm -ba --target=mips_fp_le-linux hhl-glibc.spec

You should be able to setup the environment and start rebuilding
packages within a couple of hours. 

Pete

From owner-linux-mips@oss.sgi.com Fri Jan 26 17:51:09 2001
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From:   Justin Carlson <carlson@sibyte.com>
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To:     linux-mips@oss.sgi.com
Subject: GDB 5 for mips-linux/Shared library loading with new binutils/glibc
Date:   Fri, 26 Jan 2001 17:40:07 -0800
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Working with some pretty bleeding edge GNU tools, here, and there doesn't seem
to be any support for mips-linux in GDB 5.  Has anyone else run across this,
and, if so, are there patches available somewhere?

Also, I've run into a problem with ld.so from glibc-2.2 on mips32-linux.  After
some hunting, I found that the templates in elf32bsmip.sh for gnu ld have
recently changed to support SHLIB_TEXT_START_ADDR as a (non-zero) base address
for shared library loading.  SHLIB_TEXT_START_ADDR defaults to 0x5ffe0000 in
the current sources.

I'm curious if anyone knows the rationale for these changes.  Best conjecture
I've heard is that it allows ld.so to not have to relocate itself, as it will
load by default to the high address.  

However, ld.so seems to know nothing about relocating shared library with a
non-zero shared library base address, which causes dynamically linked stuff to
crash spectacularly.  

I think fixing ld.so won't be too difficult, but I'm really wanting to find out
why these changes were made.  And whether I'm reinventing some wheels by fixing
ld.so to cope with the new binutils stuff.

Anyone tread the ground before?

binutils we're using is from CVS as of about Dec 17th.  Glibc is also a
snapshot from about the same time.

-Justin

From owner-linux-mips@oss.sgi.com Fri Jan 26 23:20:10 2001
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Date:   Sat, 27 Jan 2001 08:20:04 +0100 (MET)
From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Reply-To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Joe deBlaquiere <jadb@redhat.com>
cc:     Ralf Baechle <ralf@oss.sgi.com>, Florian Lohoff <flo@rfc822.org>,
        linux-mips@oss.sgi.com
Subject: Re: [FIX] sysmips(MIPS_ATMIC_SET, ...) ret_from_sys_call vs. o32_ret_from_sys_call
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On Fri, 26 Jan 2001, Joe deBlaquiere wrote:

> Ralf gently pointed out that there was the possibility of needing to 
> fault the page for *p, which couldn't occur with ints off. So here's an 
> updated version...

 I don't think you get a page fault that would lead to an inconsistent
state.  See below:

> 		/* actually _do_ the exchange */
> 		save_and_cli(flags);
> 		errno |= __get_user(tmp, p);

 You may get a page fault on accessing *p here.  Not a problem.  When we
return to the faulting "lw" instruction, it will fetch the current value
of *p whether it changed before or not.  Also the TLB will get filled here
if needed. 

> 		errno |= __put_user(arg2, p);

 You may get a page fault on accessing *p here.  But since interrupts are
disabled since getting back from the page fault at the above "lw"
instruction, no context switch could have happened, so the page *p lies on
is already swapped in.  So the only reason of the fault might be write
protection (read protection was already checked by the fault above).  In
this case we don't care if *p changed meanwhile as we won't write it
anyway.  TLB got already filled above so no TLB fault will happen. 

> 		restore_flags(flags);

 Remember we are running UP.

 If anyone sees any other page fault scenario I would be pleased to read
it. 

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Fri Jan 26 23:28:00 2001
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Date:   Sat, 27 Jan 2001 08:28:05 +0100 (MET)
From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Ralf Baechle <ralf@oss.sgi.com>
cc:     Joe deBlaquiere <jadb@redhat.com>, Florian Lohoff <flo@rfc822.org>,
        linux-mips@oss.sgi.com
Subject: Re: [FIX] sysmips(MIPS_ATMIC_SET, ...) ret_from_sys_call vs. o32_ret_from_sys_call
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On Fri, 26 Jan 2001, Ralf Baechle wrote:

> Afaik the only user of MIPS_ATOMIC_SET ever running on Linux/MIPS is the
> Linuxthreads code you wrote, so no.  Aside of that the semantics of this
> syscall were defined by older MIPS operating systems such as Risc/OS and
> I think we should follow their example.

 I still haven't seen a definite spec for the call.  Since you suggest the
Linuxthreads code is the only user of the code (also remember the
_test_and_set library function as specified by the ABI), we might abandon
MIPS_ATOMIC_SET and write a _test_and_set syscall instead.  No
compatibility issues would be involved and the definition is clear in the
ABI (the library function would become a simple wrapper). 

 I'm still uncertain if wasting a syscall number is that great idea, but
we would be free from any compatibility problems.  And yes, I still think
an ll/sc emulation could be done independently anyway. 

 Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Fri Jan 26 23:42:40 2001
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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Florian Lohoff <flo@rfc822.org>
cc:     Pete Popov <ppopov@mvista.com>, linux-mips@oss.sgi.com
Subject: Re: Cross compiling RPMs
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On Fri, 26 Jan 2001, Florian Lohoff wrote:

> Cross compiling is definitly no option for debian as the dependencies
> etc are all made from "ldd binary" which has to fail for cross-compiling.
> I guess this also happens to rpm packages so cross-compiling to really
> get a correct distribution is definitly no option.

 See how my RPM got modified to make use of readelf and objdump if
available to circumvent this problem.  I'm actually going to contribute
these changes to RPM one day (I've just got bored trying to figure the
right e-mail address last time) -- using ldd for this purpose is
definitely broken as it pulls in indirect dependencies (see e.g. dnet vs
non-dnet versions of libX11). 

 All my cross-compiled packages have correct dependencies. 8-}

> I definitly go for native builds - Once you have a working stable 
> base you can set up debian autobuilders which will do nearly 
> everything for you except signing and uploading the package into
> the main repository.

 Yep, native builds are more likely to get correct as that's what most
developers out there check (there are actually developers who never heard
of something like a cross-compilation, sigh...).  But not everyone can
afford a week to build glibc or X11... 

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Sat Jan 27 00:01:59 2001
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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Justin Carlson <carlson@sibyte.com>
cc:     linux-mips@oss.sgi.com
Subject: Re: GDB 5 for mips-linux/Shared library loading with new binutils/glibc
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On Fri, 26 Jan 2001, Justin Carlson wrote:

> Working with some pretty bleeding edge GNU tools, here, and there doesn't seem
> to be any support for mips-linux in GDB 5.  Has anyone else run across this,
> and, if so, are there patches available somewhere?

 Get gdb 5.0 from my site, at 'ftp://ftp.ds2.pg.gda.pl/pub/macro/'.

 I've contributed all patches I've written myself.  Unfortunately, most of
the code needed for gdb 5.0 to run on MIPS was taken from the 4.x CVS at
oss.sgi.com.  As such it is required all authors of patches have to have
their copyright assigned to FSF before committing them to the gdb CVS.

 I've asked people to resolve ownership of the code here some time ago,
but it seems nobody is really interested in getting this code into
official gdb, sigh... 

> Also, I've run into a problem with ld.so from glibc-2.2 on mips32-linux.  After
> some hunting, I found that the templates in elf32bsmip.sh for gnu ld have
> recently changed to support SHLIB_TEXT_START_ADDR as a (non-zero) base address
> for shared library loading.  SHLIB_TEXT_START_ADDR defaults to 0x5ffe0000 in
> the current sources.

 It's not that recent, actually.  What's the problem with this?  I can't
see any on mipsel-linux here.

> I'm curious if anyone knows the rationale for these changes.  Best conjecture
> I've heard is that it allows ld.so to not have to relocate itself, as it will
> load by default to the high address.  

 Not sure about this -- there are comments on it in glibc in
sysdeps/mips/dl-machine.h.

> However, ld.so seems to know nothing about relocating shared library with a
> non-zero shared library base address, which causes dynamically linked stuff to
> crash spectacularly.  

 Does it?  Please provide more details.  All of my system (linux 2.4.0,
glibc 2.2.1) is dynamically linked and it works fine.

> binutils we're using is from CVS as of about Dec 17th.  Glibc is also a
> snapshot from about the same time.

 Glibc should be fine as is although you might consider getting the 2.2.1
release.  You may try to check if patches from my binutils package (also
available at the mentioned site) solve certain or all of your problems. 
The patches have been proposed for an inclusion in the upcoming binutils
2.11 release -- I hope they will finally get there.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Sat Jan 27 00:54:29 2001
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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Harald Koerfgen <Harald.Koerfgen@home.ivm.de>
cc:     linux-mips@fnet.fr, linux-mips@oss.sgi.com
Subject: Z8530, LK201 fixes
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Hi,

 After recent Z8530 and LK201 changes for the DECstation, modem lines do
not work anymore.  Also my keyboard timeouts on init, which results in a
hang. 

 I've been working on these issues during a few past days and following is
the result.  The list of changes:

- The LK201 driver may now be compiled with CONFIG_MAGIC_SYSRQ enabled (it
would not link before).  It doesn't support SysRq, though, as I haven't
decided how to do it, yet.  For LK443/444 we might do this
straightforward, but I'm not sure about others (<Compose> + <F13> is one
of options).

- The LK201 driver does not hang on a timeout upon init -- if one happens,
the driver breaks initialization.  I'm thinking on a hot plug support, but
that's not high-priority.

- There is some code to encourage people with unknown keyboard IDs to
report them here -- it would be nice to be able to identify LK421, LK443
and LK444 to map certain keys automatically for modifier keys and <Scroll
Lock> handling, for example. 

- Placeholders for scancodes existing on LK421, LK443 and LK444 has been
added.  I've yet to decide which codes to use -- I need to review
carefully the whole code path that is executed for scancode handling.

- The keyboard init timeout has been fixed -- Z8530 hooks need to be
installed earlier.

- Asynchronous speeds of 57600 and 115200 has been added.  They work very
nicely. 8-}

- DTR changes has been removed from rs_throttle/rs_unthrottle -- we don't
want to hang up on an overrun, do we? 

- Handling of modem lines as wired for the DECstation has been fixed. 
Some clown wired RTS and DTR incorrectly, limiting their functionality
somewhat -- the Z8530 is able to drive RTS synchronously, for example, but
this is broken for the DECstation.  I understand DEC needed a few
additional GPIO lines to wire synchronous RS232, but they could have wired
port B correctly and use spare lines of port A for GPIO instead, couldn't
they? 

 Harald, I'm afraid the last change breaks CONFIG_BAGET_MIPS.  I have no
idea how to share two configurations of drivers/tc/zs.c sanely with this
driver.  Until we have a unified Z8530 driver the only solution is to add
a bunch of ugly #ifdefs, I believe.

 I hope the patch is fine to apply.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

patch-mips-2.4.0-test12-20010110-lk201-41
diff -up --recursive --new-file linux-mips-2.4.0-test12-20010110.macro/drivers/tc/lk201-remap.c linux-mips-2.4.0-test12-20010110/drivers/tc/lk201-remap.c
--- linux-mips-2.4.0-test12-20010110.macro/drivers/tc/lk201-remap.c	Sat Dec 30 15:55:57 2000
+++ linux-mips-2.4.0-test12-20010110/drivers/tc/lk201-remap.c	Fri Jan 26 20:50:39 2001
@@ -3,7 +3,7 @@
  * 
  * 17.05.99 Michael Engel (engel@unix-ag.org)
  *
- * DEC keyboard generate keycodes in the range 0x56 - 0xfb
+ * DEC US keyboards generate keycodes in the range 0x55 - 0xfb
  *
  * This conflicts with Linux scancode conventions which define 
  * 0x00-0x7f as "normal" and 0x80-0xff as "shifted" scancodes, so we
@@ -15,6 +15,28 @@
  * lk501*map[] arrays which define scancode -> Linux code mapping
  *
  * Oh man is this horrible ;-)
+ *
+ * Scancodes with dual labels exist for keyboards as follows:
+ *
+ * code:  left label          / right label
+ *
+ * 0x73:  LKx01, LK421        / LK443, LK444
+ * 0x74:  LKx01, LK421        / LK443, LK444
+ * 0x7c:  LKx01, LK421        / LK443, LK444
+ * 0x8a:  LKx01, LK421        / LK443, LK444
+ * 0x8b:  LKx01, LK421        / LK443, LK444
+ * 0x8c:  LKx01, LK421        / LK443, LK444
+ * 0x8d:  LKx01, LK421        / LK443, LK444
+ * 0x8e:  LKx01, LK421        / LK443, LK444
+ * 0x8f:  LKx01, LK421        / LK443, LK444
+ * 0x9c:  LKx01, LK421        / LK443, LK444
+ * 0xa1:  LKx01, LK421        / LK443, LK444
+ * 0xa2:  LKx01, LK421        / LK443, LK444
+ * 0xa3:  LKx01, LK421        / LK443, LK444
+ * 0xa4:  LKx01, LK421        / LK443, LK444
+ * 0xad:         LK421        / LK443, LK444
+ * 0xc9:  LKx01, LK421, LK443 /        LK444
+ * 0xf7:  LKx01,        LK443 /        LK444
  */
 
 unsigned char scancodeRemap[256] = {
@@ -60,35 +82,35 @@ unsigned char scancodeRemap[256] = {
 /* 4c */ 0,		0,		0,		0,
 /* ----- 								*/
 /* 50 */ 0,		0,		0,		0,
-/* ----- 	 			F1,		F2, 		*/
+/* ----- 	 	ESC		F1		F2 		*/
 /* 54 */ 0,		0,		0x01,  		0x02,
-/* ----- F3,		F4,		F5,				*/
+/* ----- F3		F4		F5				*/
 /* 58 */ 0x03,  	0x04,		0x05,		0,
 /* ----- 								*/
 /* 5c */ 0,		0,		0,		0,
 /* ----- 								*/
 /* 60 */ 0,		0,		0,		0,
-/* ----- F6,		F7,		F8,		F9,		*/
+/* ----- F6		F7		F8		F9		*/
 /* 64 */ 0x06,		0x07,		0x08,		0x09, 
-/* ----- F10,								*/
+/* ----- F10								*/
 /* 68 */ 0x0a,		0,		0,		0,
 /* ----- 								*/
 /* 6c */ 0,		0,		0,		0,
-/* ----- 		F11,   		F12,		F13,		*/
+/* ----- 		F11   		F12		F13/PRNT SCRN	*/
 /* 70 */ 0,		0x0b,  		0x0c,		0x0d,
-/* ----- F14								*/
+/* ----- F14/SCRL LCK							*/
 /* 74 */ 0x0e,		0,		0,		0,
 /* ----- 								*/
 /* 78 */ 0,		0,		0,		0,
-/* ----- HELP		DO						*/
+/* ----- HELP/PAUSE	DO						*/
 /* 7c */ 0x0f,		0x10,		0,		0,
 /* ----- F17		F18		F19		F20		*/
 /* 80 */ 0x11,		0x12,		0x13,		0x14,
 /* ----- 								*/
 /* 84 */ 0,		0,		0,		0,
-/* ----- 								*/
+/* ----- 				FIND/INSERT	INSERT/HOME	*/
 /* 88 */ 0,		0,		0x23,		0x24,
-/* ----- REMOVE		SELECT		PREVIOUS	NEXT		*/
+/* ----- REMOVE/PG UP	SELECT/DELETE	PREVIOUS/END	NEXT/PG DN	*/
 /* 8c */ 0x25,		0x38,		0x39,		0x3a,
 /* ----- 				KP 0				*/
 /* 90 */ 0,		0,		0x6b,		0,
@@ -96,17 +118,17 @@ unsigned char scancodeRemap[256] = {
 /* 94 */ 0x6c,		0x65,		0x62,		0x63,
 /* ----- KP 3		KP 4		KP 5		KP 6		*/
 /* 98 */ 0x64,		0x4e,		0x4f,		0x50,
-/* ----- KP ,		KP 7		KP 8		KP 9		*/
+/* ----- KP ,/KP +	KP 7		KP 8		KP 9		*/
 /* 9c */ 0x51,		0x3b,		0x3c,		0x3d,
-/* ----- KP -		KP F1		KP F2		KP F3		*/
+/* ----- KP -		KP F1/NUM LCK	KP F2/KP /	KP F3/KP *	*/
 /* a0 */ 0x3e,		0x26,		0x27,		0x28,
-/* ----- KP F4						LEFT		*/
+/* ----- KP F4/KP -					LEFT		*/
 /* a4 */ 0x29,		0,		0,		0x5f,
 /* ----- RIGHT		DOWN		UP		SHIFT Rt	*/
 /* a8 */ 0x61,		0x60, 		0x4d,		0x5e,
-/* ----- 				SHIFT		CONTROL		*/
+/* ----- ALT		COMP Rt/CTRL Rt	SHIFT		CONTROL		*/
 /* ac */ 0,		0,		0x52,		0x3f,
-/* ----- CAPS		ALT						*/
+/* ----- CAPS		COMPOSE		ALT Rt				*/
 /* b0 */ 0x40,		0x67,		0,		0,
 /* ----- 								*/
 /* b4 */ 0,		0,		0,		0,
@@ -118,7 +140,7 @@ unsigned char scancodeRemap[256] = {
 /* c0 */ 0x16,		0x2b,		0x41,		0x54,
 /* ----- 		2		w		s		*/
 /* c4 */ 0,		0x17,		0x2c,		0x42,
-/* ----- x		<				3		*/
+/* ----- x		</\\				3		*/
 /* c8 */ 0x55,		0x53,		0,		0x18,
 /* ----- e		d		c				*/
 /* cc */ 0x2d,		0x43,		0x56,		0,
@@ -134,13 +156,13 @@ unsigned char scancodeRemap[256] = {
 /* e0 */ 0x1c,		0x31,		0x47,		0x5a,
 /* ----- 		8		i		k		*/
 /* e4 */ 0,		0x1d,		0x32,		0x48,
-/* ----- ,				9		o	*/
+/* ----- ,				9		o		*/
 /* e8 */ 0x5b,		0,		0x1e,		0x33,
 /* ----- l		.				0		*/
 /* ec */ 0x49,		0x5c,		0,		0x1f,
 /* ----- p				;		/		*/
 /* f0 */ 0x34,		0,		0x4a,		0x5d,
-/* ----- 		=		]		\\		*/
+/* ----- 		=		]		\\/\'		*/
 /* f4 */ 0,		0x21,		0x36,		0x4c,
 /* ----- 		-		[		\'		*/
 /* f8 */ 0,		0x20,		0x35,		0x4b,
diff -up --recursive --new-file linux-mips-2.4.0-test12-20010110.macro/drivers/tc/lk201.c linux-mips-2.4.0-test12-20010110/drivers/tc/lk201.c
--- linux-mips-2.4.0-test12-20010110.macro/drivers/tc/lk201.c	Sat Dec 30 15:55:57 2000
+++ linux-mips-2.4.0-test12-20010110/drivers/tc/lk201.c	Fri Jan 26 21:31:36 2001
@@ -18,9 +18,20 @@
 #include "zs.h"
 #include "lk201.h"
 
+/* Simple translation table for the SysRq keys */
+
+#ifdef CONFIG_MAGIC_SYSRQ
+/*
+ * Actually no translation at all, at least until we figure out
+ * how to define SysRq for LK201 and friends. --macro
+ */
+unsigned char lk201_sysrq_xlate[128];
+unsigned char *kbd_sysrq_xlate = lk201_sysrq_xlate;
+#endif
+
 #define KEYB_LINE	3
 
-static void __init lk201_init(struct dec_serial *);
+static int __init lk201_init(struct dec_serial *);
 static void __init lk201_info(struct dec_serial *);
 static void lk201_kbd_rx_char(unsigned char, unsigned char);
 
@@ -60,13 +71,16 @@ static unsigned char lk201_reset_string[
 	LK_CMD_LEDS_OFF, LK_PARAM_LED_MASK(0xf)
 };
 
-static void __init lk201_reset(struct dec_serial *info)
+static int __init lk201_reset(struct dec_serial *info)
 {
 	int i;
 
 	for (i = 0; i < sizeof(lk201_reset_string); i++)
-		if(info->hook->poll_tx_char(info, lk201_reset_string[i]))
+		if (info->hook->poll_tx_char(info, lk201_reset_string[i])) {
 			printk(__FUNCTION__" transmit timeout\n");
+			return -EIO;
+		}
+	return 0;
 }
 
 void kbd_leds(unsigned char leds)
@@ -149,21 +163,24 @@ static void __init lk201_info(struct dec
 {
 }
 
-static void __init lk201_init(struct dec_serial *info)
+static int __init lk201_init(struct dec_serial *info)
 {
-	unsigned int ch, id;
+	unsigned int ch, id = 0;
+	int result;
 
 	printk("DECstation LK keyboard driver v0.04... ");
 
-	lk201_reset(info);
-	udelay(10000);
+	result = lk201_reset(info);
+	if (result)
+		return result;
+	mdelay(10);
 
 	/*
-	 * Detect wether there is an LK201 or an LK401
+	 * Detect whether there is an LK201 or an LK401
 	 * The LK401 has ALT keys...
 	 */
 	info->hook->poll_tx_char(info, LK_CMD_REQ_ID);
-	while((ch = info->hook->poll_rx_char(info)) > 0)
+	while ((ch = info->hook->poll_rx_char(info)) > 0)
 		id = ch;
 
 	switch (id) {
@@ -174,13 +191,16 @@ static void __init lk201_init(struct dec
 		printk("LK401 detected\n");
 		break;
 	default:
-		printk("unkown keyboard, ID %d\n", id);
+		printk("unknown keyboard, ID %d,\n", id);
+		printk("... please report to <linux-mips@oss.sgi.com>\n");
 	}
 
 	/*
 	 * now we're ready
 	 */
 	info->hook->rx_char = lk201_kbd_rx_char;
+
+	return 0;
 }
 
 void __init kbd_init_hw(void)
@@ -206,7 +226,7 @@ void __init kbd_init_hw(void)
 	} else {
 		/*
 		 * TODO: modify dz.c to allow similar hooks
-		 * for LK201 handling on DS2100, Ds3100, and DS5000/200
+		 * for LK201 handling on DS2100, DS3100, and DS5000/200
 		 */
 		printk("LK201 Support for DS3100 not yet ready ...\n");
 	}
diff -up --recursive --new-file linux-mips-2.4.0-test12-20010110.macro/drivers/tc/zs.c linux-mips-2.4.0-test12-20010110/drivers/tc/zs.c
--- linux-mips-2.4.0-test12-20010110.macro/drivers/tc/zs.c	Sun Dec 31 05:26:37 2000
+++ linux-mips-2.4.0-test12-20010110/drivers/tc/zs.c	Fri Jan 26 21:09:56 2001
@@ -1,17 +1,42 @@
 /*
- * decserial.c: Serial port driver for IOASIC DECsatations.
+ * decserial.c: Serial port driver for IOASIC DECstations.
  *
  * Derived from drivers/sbus/char/sunserial.c by Paul Mackerras.
  * Derived from drivers/macintosh/macserial.c by Harald Koerfgen.
  *
  * DECstation changes
  * Copyright (C) 1998-2000 Harald Koerfgen (Harald.Koerfgen@home.ivm.de)
- * Copyright (C) 2000 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
+ * Copyright (C) 2000,2001 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
  *
  * For the rest of the code the original Copyright applies:
  * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au)
  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  *
+ *
+ * Note: for IOASIC systems the wiring is as follows:
+ *
+ * mouse/keyboard:
+ * DIN-7 MJ-4  signal        SCC
+ * 2     1     TxD       <-  A.TxD
+ * 3     4     RxD       ->  A.RxD
+ *
+ * EIA-232/EIA-423:
+ * DB-25 MMJ-6 signal        SCC
+ * 2     2     TxD       <-  B.TxD
+ * 3     5     RxD       ->  B.RxD
+ * 4           RTS       <- ~A.RTS
+ * 5           CTS       -> ~B.CTS
+ * 6     6     DSR       -> ~A.SYNC
+ * 8           CD        -> ~B.DCD
+ * 12          DSRS(DCE) -> ~A.CTS  (*)
+ * 15          TxC       ->  B.TxC
+ * 17          RxC       ->  B.RxC
+ * 20    1     DTR       <- ~A.DTR
+ * 22          RI        -> ~A.DCD
+ * 23          DSRS(DTE) <- ~B.RTS
+ *
+ * (*) EIA-232 defines the signal at this pin to be SCD, while DSRS(DCE)
+ *     is shared with DSRS(DTE) at pin 23.
  */
 
 #include <linux/config.h>
@@ -63,7 +88,6 @@ unsigned long system_base;
 
 #include "zs.h"
 
-
 /*
  * It would be nice to dynamically allocate everything that
  * depends on NUM_SERIAL, so we could support any number of
@@ -237,7 +261,7 @@ static inline int serial_paranoia_check(
  */
 static int baud_table[] = {
 	0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
-	9600, 19200, 38400, 57600, 0, 0 };
+	9600, 19200, 38400, 57600, 115200, 0 };
 
 /* 
  * Reading and writing Z8530 registers.
@@ -309,18 +333,21 @@ static inline void load_zsregs(struct de
 }
 
 /* Sets or clears DTR/RTS on the requested line */
-static inline void zs_rtsdtr(struct dec_serial *info, int set)
+static inline void zs_rtsdtr(struct dec_serial *info, int which, int set)
 {
         unsigned long flags;
 
-        save_flags(flags); cli();
-        if(set) {
-                info->zs_channel->curregs[5] |= (RTS | DTR);
-        } else {
-                info->zs_channel->curregs[5] &= ~(RTS | DTR);
+
+	save_flags(flags); cli();
+	if (info->zs_channel != info->zs_chan_a) {
+		if (set) {
+			info->zs_chan_a->curregs[5] |= (which & (RTS | DTR));
+		} else {
+			info->zs_chan_a->curregs[5] &= ~(which & (RTS | DTR));
+		}
+		write_zsreg(info->zs_chan_a, 5, info->zs_chan_a->curregs[5]);
 	}
-	write_zsreg(info->zs_channel, 5, info->zs_channel->curregs[5]);
-        restore_flags(flags);
+	restore_flags(flags);
 }
 
 /* Utility routines for the Zilog */
@@ -493,34 +520,31 @@ static _INLINE_ void status_handle(struc
 		tty_break = 1;
 	}
 
-	/* FIXEM: Check for DCD transitions */
-	if (((stat ^ info->read_reg_zero) & DCD) != 0
-	    && info->tty && !C_CLOCAL(info->tty)) {
-		if (stat & DCD) {
-			wake_up_interruptible(&info->open_wait);
-		} else if (!(info->flags & ZILOG_CALLOUT_ACTIVE)) {
-			tty_hangup(info->tty);
+	if (info->zs_channel != info->zs_chan_a) {
+
+		/* FIXEM: Check for DCD transitions */
+		if (((stat ^ info->read_reg_zero) & DCD) != 0
+		    && info->tty && !C_CLOCAL(info->tty)) {
+			if (stat & DCD) {
+				wake_up_interruptible(&info->open_wait);
+			} else if (!(info->flags & ZILOG_CALLOUT_ACTIVE)) {
+				tty_hangup(info->tty);
+			}
 		}
-	}
 
-	/* Check for CTS transitions */
-	if (info->tty && C_CRTSCTS(info->tty)) {
-		/*
-		 * For some reason, on the Power Macintosh,
-		 * it seems that the CTS bit is 1 when CTS is
-		 * *negated* and 0 when it is asserted.
-		 * The DCD bit doesn't seem to be inverted
-		 * like this.
-		 */
-		if ((stat & CTS) != 0) {
-			if (info->tx_stopped) {
-				info->tx_stopped = 0;
-				if (!info->tx_active)
-					transmit_chars(info);
+		/* Check for CTS transitions */
+		if (info->tty && C_CRTSCTS(info->tty)) {
+			if ((stat & CTS) != 0) {
+				if (info->tx_stopped) {
+					info->tx_stopped = 0;
+					if (!info->tx_active)
+						transmit_chars(info);
+				}
+			} else {
+				info->tx_stopped = 1;
 			}
-		} else {
-			info->tx_stopped = 1;
 		}
+
 	}
 
 	/* Clear status condition... */
@@ -708,7 +732,7 @@ int zs_startup(struct dec_serial * info)
 	/*
 	 * Turn on RTS and DTR.
 	 */
-	zs_rtsdtr(info, 1);
+	zs_rtsdtr(info, RTS | DTR, 1);
 
 	/*
 	 * Finally, enable sequencing and interrupts
@@ -779,7 +803,7 @@ static void shutdown(struct dec_serial *
 	info->zs_channel->curregs[5] &= ~TxENAB;
 	write_zsreg(info->zs_channel, 5, info->zs_channel->curregs[5]);
 	if (!info->tty || C_HUPCL(info->tty)) {
-		zs_rtsdtr(info, 0);
+		zs_rtsdtr(info, RTS | DTR, 0);
 	}
 
 	if (info->tty)
@@ -801,27 +825,39 @@ static void change_speed(struct dec_seri
 	unsigned long flags;
 
 	if (!info->hook) {
-	if (!info->tty || !info->tty->termios)
-		return;
-	cflag = info->tty->termios->c_cflag;
+		if (!info->tty || !info->tty->termios)
+			return;
+		cflag = info->tty->termios->c_cflag;
 		if (!info->port)
-		return;
+			return;
 	} else {
 		cflag = info->hook->cflags;
 	}
+
 	i = cflag & CBAUD;
+	if (i & CBAUDEX) {
+		i &= ~CBAUDEX;
+		if (i < 1 || i > 2) {
+			if (!info->hook)
+				info->tty->termios->c_cflag &= ~CBAUDEX;
+			else
+				info->hook->cflags &= ~CBAUDEX;
+		} else
+			i += 15;
+	}
+
 	save_flags(flags); cli();
 	info->zs_baud = baud_table[i];
 	info->clk_divisor = 16;
-        if (info->zs_baud) {
+	if (info->zs_baud) {
 		info->zs_channel->curregs[4] = X16CLK;
 		brg = BPS_TO_BRG(info->zs_baud, zs_parms->clock/info->clk_divisor);
 		info->zs_channel->curregs[12] = (brg & 255);
 		info->zs_channel->curregs[13] = ((brg >> 8) & 255);
-		zs_rtsdtr(info, 1); 
+		zs_rtsdtr(info, DTR, 1); 
 	} else {
-                zs_rtsdtr(info, 0);
-                return;
+		zs_rtsdtr(info, RTS | DTR, 0);
+		return;
 	}
 
 	/* byte size and parity */
@@ -875,7 +911,7 @@ static void change_speed(struct dec_seri
 		info->zs_channel->curregs[15] &= ~DCDIE;
 	if (cflag & CRTSCTS) {
 		info->zs_channel->curregs[15] |= CTSIE;
-		if ((read_zsreg(info->zs_channel, 0) & CTS) != 0)
+		if ((read_zsreg(info->zs_channel, 0) & CTS) == 0)
 			info->tx_stopped = 1;
 	} else {
 		info->zs_channel->curregs[15] &= ~CTSIE;
@@ -1020,7 +1056,7 @@ static void rs_throttle(struct tty_struc
 	}
 
 	if (C_CRTSCTS(tty)) {
-		zs_rtsdtr(info, 0);
+		zs_rtsdtr(info, RTS, 0);
 	}
 }
 
@@ -1052,7 +1088,7 @@ static void rs_unthrottle(struct tty_str
 	}
 
 	if (C_CRTSCTS(tty)) {
-		zs_rtsdtr(info, 1);
+		zs_rtsdtr(info, RTS, 1);
 	}
 }
 
@@ -1150,18 +1186,25 @@ static int get_lsr_info(struct dec_seria
 
 static int get_modem_info(struct dec_serial *info, unsigned int *value)
 {
-	unsigned char control, status;
+	unsigned char control, status_a, status_b;
 	unsigned int result;
 
-	cli();
-	control = info->zs_channel->curregs[5];
-	status = read_zsreg(info->zs_channel, 0);
-	sti();
-	result =  ((control & RTS) ? TIOCM_RTS: 0)
-		| ((control & DTR) ? TIOCM_DTR: 0)
-		| ((status  & DCD) ? TIOCM_CAR: 0)
-		| ((status  & CTS) ? 0: TIOCM_CTS);
-	put_user(result,value);
+	if (info->zs_channel == info->zs_chan_a)
+		result = 0;
+	else {
+		cli();
+		control = info->zs_chan_a->curregs[5];
+		status_a = read_zsreg(info->zs_chan_a, 0);
+		status_b = read_zsreg(info->zs_channel, 0);
+		sti();
+		result =  ((control  & RTS) ? TIOCM_RTS: 0)
+			| ((control  & DTR) ? TIOCM_DTR: 0)
+			| ((status_b & DCD) ? TIOCM_CAR: 0)
+			| ((status_a & DCD) ? TIOCM_RNG: 0)
+			| ((status_a & SYNC_HUNT) ? TIOCM_DSR: 0)
+			| ((status_b & CTS) ? TIOCM_CTS: 0);
+	}
+	put_user(result, value);
 	return 0;
 }
 
@@ -1174,25 +1217,29 @@ static int set_modem_info(struct dec_ser
 	error = verify_area(VERIFY_READ, value, sizeof(int));
 	if (error)
 		return error;
+
+	if (info->zs_channel == info->zs_chan_a)
+		return 0;
+
 	get_user(arg, value);
 	bits = (arg & TIOCM_RTS? RTS: 0) + (arg & TIOCM_DTR? DTR: 0);
 	cli();
 	switch (cmd) {
 	case TIOCMBIS:
-		info->zs_channel->curregs[5] |= bits;
+		info->zs_chan_a->curregs[5] |= bits;
 		break;
 	case TIOCMBIC:
-		info->zs_channel->curregs[5] &= ~bits;
+		info->zs_chan_a->curregs[5] &= ~bits;
 		break;
 	case TIOCMSET:
-		info->zs_channel->curregs[5] = 
-			(info->zs_channel->curregs[5] & ~(DTR | RTS)) | bits;
+		info->zs_chan_a->curregs[5] = 
+			(info->zs_chan_a->curregs[5] & ~(DTR | RTS)) | bits;
 		break;
 	default:
 		sti();
 		return -EINVAL;
 	}
-	write_zsreg(info->zs_channel, 5, info->zs_channel->curregs[5]);
+	write_zsreg(info->zs_chan_a, 5, info->zs_chan_a->curregs[5]);
 	sti();
 	return 0;
 }
@@ -1538,7 +1585,7 @@ static int block_til_ready(struct tty_st
 		cli();
 		if (!(info->flags & ZILOG_CALLOUT_ACTIVE) &&
 		    (tty->termios->c_cflag & CBAUD))
-			zs_rtsdtr(info, 1);
+			zs_rtsdtr(info, RTS | DTR, 1);
 		sti();
 		set_current_state(TASK_INTERRUPTIBLE);
 		if (tty_hung_up_p(filp) ||
@@ -1794,9 +1841,9 @@ static void __init probe_sccs(void)
 /*	save_and_cli(flags);
 	for (n = 0; n < zs_channels_found; n++) {
 		if (((int)zs_channels[n].control & 0xf) == 1) {
-			write_zsreg(zs_soft[channel].zs_chan_a, R9, FHWRES);
-			udelay(10000);
-			write_zsreg(zs_soft[channel].zs_chan_a, R9, 0);
+			write_zsreg(zs_soft[n].zs_chan_a, R9, FHWRES);
+			mdelay(10);
+			write_zsreg(zs_soft[n].zs_chan_a, R9, 0);
 		}
 		load_zsregs(zs_soft[n].zs_channel, zs_soft[n].zs_channel->curregs);
 	} 
@@ -1887,7 +1934,8 @@ int __init zs_init(void)
 	for (channel = 0; channel < zs_channels_found; ++channel) {
 		if (zs_soft[channel].hook &&
 		    zs_soft[channel].hook->init_channel)
-			(*zs_soft[channel].hook->init_channel)(&zs_soft[channel]);
+			(*zs_soft[channel].hook->init_channel)
+				(&zs_soft[channel]);
 
 		zs_soft[channel].clk_divisor = 16;
 		zs_soft[channel].zs_baud = get_zsbaud(&zs_soft[channel]);
@@ -1917,7 +1965,7 @@ int __init zs_init(void)
 		info->blocked_open = 0;
 		info->tqueue.routine = do_softint;
 		info->tqueue.data = info;
-		info->callout_termios =callout_driver.init_termios;
+		info->callout_termios = callout_driver.init_termios;
 		info->normal_termios = serial_driver.init_termios;
 		init_waitqueue_head(&info->open_wait);
 		init_waitqueue_head(&info->close_wait);
@@ -2016,23 +2064,24 @@ unsigned int register_zs_hook(unsigned i
 {
 	struct dec_serial *info = &zs_soft[channel];
 
-        if (info->hook) {
-                printk(__FUNCTION__": line %d has already a hook registered\n", channel);
+	if (info->hook) {
+		printk(__FUNCTION__": line %d has already a hook registered\n", channel);
+
+		return 0;
+	} else {
+		info->hook = hook;
 
-                return 0;
-        } else {
 		if (zs_chain == 0)
 			probe_sccs();
 
 		if (!(info->flags & ZILOG_INITIALIZED))
 			zs_startup(info);
 
-                hook->poll_rx_char = zs_poll_rx_char;
-                hook->poll_tx_char = zs_poll_tx_char;
-                info->hook = hook;
+		hook->poll_rx_char = zs_poll_rx_char;
+		hook->poll_tx_char = zs_poll_tx_char;
 
-                return 1;
-        }
+		return 1;
+	}
 }
 
 unsigned int unregister_zs_hook(unsigned int channel)
@@ -2184,7 +2233,7 @@ static int __init serial_console_setup(s
 	/*
 	 * Turn on RTS and DTR.
 	 */
-	zs_rtsdtr(info, 1);
+	zs_rtsdtr(info, RTS | DTR, 1);
 
 	/*
 	 * Finally, enable sequencing
@@ -2285,8 +2334,9 @@ void kgdb_interruptible(int yes)
 	write_zsreg(chan, 9, nine);
 }
 
-static void kgdbhook_init_channel(struct dec_serial* info) 
+static int kgdbhook_init_channel(struct dec_serial* info) 
 {
+	return 0;
 }
 
 static void kgdbhook_init_info(struct dec_serial* info)
diff -up --recursive --new-file linux-mips-2.4.0-test12-20010110.macro/drivers/tc/zs.h linux-mips-2.4.0-test12-20010110/drivers/tc/zs.h
--- linux-mips-2.4.0-test12-20010110.macro/drivers/tc/zs.h	Sun Dec 31 05:26:37 2000
+++ linux-mips-2.4.0-test12-20010110/drivers/tc/zs.h	Thu Jan 25 22:53:26 2001
@@ -92,7 +92,7 @@ struct dec_zschannel {
 struct dec_serial;
 
 struct zs_hook {
-	void (*init_channel)(struct dec_serial* info);
+	int (*init_channel)(struct dec_serial* info);
 	void (*init_info)(struct dec_serial* info);
 	void (*rx_char)(unsigned char ch, unsigned char stat);
 	int  (*poll_rx_char)(struct dec_serial* info);
diff -up --recursive --new-file linux-mips-2.4.0-test12-20010110.macro/include/asm-mips/keyboard.h linux-mips-2.4.0-test12-20010110/include/asm-mips/keyboard.h
--- linux-mips-2.4.0-test12-20010110.macro/include/asm-mips/keyboard.h	Tue Jan 16 09:55:31 2001
+++ linux-mips-2.4.0-test12-20010110/include/asm-mips/keyboard.h	Tue Jan 16 23:52:46 2001
@@ -47,6 +47,7 @@ extern int kbd_translate(unsigned char s
 extern char kbd_unexpected_up(unsigned char keycode);
 extern void kbd_leds(unsigned char leds);
 extern void kbd_init_hw(void);
+extern unsigned char *kbd_sysrq_xlate;
 
 #endif
 


From owner-linux-mips@oss.sgi.com Sat Jan 27 00:58:40 2001
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	Sat, 27 Jan 2001 09:58:39 +0100 (MET)
Date:   Sat, 27 Jan 2001 09:58:38 +0100 (MET)
From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Ralf Baechle <ralf@uni-koblenz.de>
cc:     linux-mips@fnet.fr, linux-mips@oss.sgi.com
Subject: A few memory map updates
Message-ID: <Pine.GSO.3.96.1010127095516.29150G-100000@delta.ds2.pg.gda.pl>
Organization: Technical University of Gdansk
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Hi,

 Below is a patch that cleans-up a few remaining memory map bits.  Please
apply.  Thanks.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

patch-mips-2.4.0-20010126-mem_map-42
diff -up --recursive --new-file linux-mips-2.4.0-20010126.macro/arch/mips/baget/prom/init.c linux-mips-2.4.0-20010126/arch/mips/baget/prom/init.c
--- linux-mips-2.4.0-20010126.macro/arch/mips/baget/prom/init.c	Thu Dec 14 05:26:23 2000
+++ linux-mips-2.4.0-20010126/arch/mips/baget/prom/init.c	Tue Jan 16 01:00:28 2001
@@ -4,16 +4,22 @@
  * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov 
  */
 #include <linux/init.h>
+#include <asm/addrspace.h>
 #include <asm/bootinfo.h>
 
 char arcs_cmdline[COMMAND_LINE_SIZE];
 
 void __init prom_init(unsigned int mem_upper)
 {
-	mips_memory_upper = mem_upper;
+	mem_upper = PHYSADDR(mem_upper);
+
 	mips_machgroup  = MACH_GROUP_UNKNOWN;
 	mips_machtype   = MACH_UNKNOWN;
 	arcs_cmdline[0] = 0;
+
+	vac_memory_upper = mem_upper;
+
+	add_memory_region(0, mem_upper, BOOT_MEM_RAM);
 }
 
 void prom_free_prom_memory (void)
diff -up --recursive --new-file linux-mips-2.4.0-20010126.macro/arch/mips/baget/setup.c linux-mips-2.4.0-20010126/arch/mips/baget/setup.c
--- linux-mips-2.4.0-20010126.macro/arch/mips/baget/setup.c	Tue Mar 28 04:26:01 2000
+++ linux-mips-2.4.0-20010126/arch/mips/baget/setup.c	Tue Jan 16 01:43:10 2001
@@ -14,7 +14,7 @@
 
 #include <asm/baget/baget.h>
 
-extern long mips_memory_upper;
+long int vac_memory_upper;
 
 #define CACHEABLE_STR(val) ((val) ? "not cached" : "cached")
 #define MIN(a,b)           (((a)<(b)) ? (a):(b)) 
@@ -172,7 +172,7 @@ static void __init vac_show(void)
 
 static void __init vac_init(void)
 {
-	unsigned short mem_limit = ((mips_memory_upper-KSEG0) >> 16);
+	unsigned short mem_limit = (vac_memory_upper >> 16);
 
 	switch(vac_inw(VAC_ID)) {
 	case 0x1AC0:
diff -up --recursive --new-file linux-mips-2.4.0-20010126.macro/arch/mips/galileo-boards/ev64120/setup.c linux-mips-2.4.0-20010126/arch/mips/galileo-boards/ev64120/setup.c
--- linux-mips-2.4.0-20010126.macro/arch/mips/galileo-boards/ev64120/setup.c	Thu Jan  4 05:26:53 2001
+++ linux-mips-2.4.0-20010126/arch/mips/galileo-boards/ev64120/setup.c	Tue Jan 16 00:37:52 2001
@@ -133,7 +133,6 @@ void ev64120_setup(void)
 
 	board_time_init = galileo_time_init;
 	mips_io_port_base = KSEG1;
-	mips_memory_upper = 32 * 1024 * 1024 | KSEG0;
 	set_cp0_status(ST0_FR, 0);
 
 #ifdef CONFIG_L2_L3_CACHE
@@ -174,7 +173,6 @@ void SetUpBootInfo(int argc, char **argv
 	mips_machtype = MACH_EV64120A;
 }
 
-unsigned long mem_size;
 void __init prom_init(int a, char **b, char **c, int *d)
 {
 	unsigned long free_start, free_end, start_pfn, bootmap_size;
diff -up --recursive --new-file linux-mips-2.4.0-20010126.macro/arch/mips/galileo-boards/ev96100/setup.c linux-mips-2.4.0-20010126/arch/mips/galileo-boards/ev96100/setup.c
--- linux-mips-2.4.0-20010126.macro/arch/mips/galileo-boards/ev96100/setup.c	Mon Nov  6 22:59:55 2000
+++ linux-mips-2.4.0-20010126/arch/mips/galileo-boards/ev96100/setup.c	Tue Jan 16 00:35:49 2001
@@ -86,9 +86,6 @@ static void __init ev96100_irq_setup(voi
 void __init ev96100_setup(void)
 {
 
-	unsigned long mem_size, free_start, free_end, start_pfn,
-	    bootmap_size;
-
 #ifdef CONFIG_REMOTE_DEBUG
 	int rs_putDebugChar(char);
 	char rs_getDebugChar(void);
diff -up --recursive --new-file linux-mips-2.4.0-20010126.macro/arch/mips/mips-boards/generic/memory.c linux-mips-2.4.0-20010126/arch/mips/mips-boards/generic/memory.c
--- linux-mips-2.4.0-20010126.macro/arch/mips/mips-boards/generic/memory.c	Sat Dec 30 05:26:48 2000
+++ linux-mips-2.4.0-20010126/arch/mips/mips-boards/generic/memory.c	Fri Jan 26 22:04:35 2001
@@ -135,7 +135,7 @@ void __init prom_meminit(void)
 		long type;
 
 		type = prom_memtype_classify (p->type);
-		base = __pa(p->base);			/* Fix up from KSEG0 */
+		base = p->base;
 		size = p->size;
 
 		add_memory_region(base, size, type);


From owner-linux-mips@oss.sgi.com Sat Jan 27 00:59:40 2001
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From:   Michael Shmulevich <michaels@jungo.com>
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Subject: Re: MIPS/linux compatible PCI network cards
References: <3A70A356.F3CA71F1@jungo.com> <3A70A718.F0628BBB@mvista.com> <3A712D90.3CC9EBAF@jungo.com> <3A71BF37.7DBE8234@mvista.com>
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Pete Popov wrote:
 
> To get the realtek driver to work, all you need to do is to set
> mips_io_port_base to KSEG1.  Let's assume that the ethernet card has
> been assigned i/o space at 0x14000000.  The driver will pick that up as
> the ioaddr and use the 0x1400000 as the "port". The inb()/outb() macros
> add mips_io_port_base to the "port" value and now you have 0xB4000000,
> so you can access the card.
> 
> Pete

The KSEG1() is indeed what I did, however the driver, as I tried to
describe, starts to loose synchronization on buffer at some point and
just waits quietly... Even with all the DEBUG and mental effort switched
on I can't get the reason why this happens...

By the way, which version of the driver are you talking about? Mine
doesn't have any ifdef on anything... besides MODULE of course:-)

Mine is:

static const char *version =
"rtl8139.c:v1.07 5/6/99 Donald Becker
http://cesdis.gsfc.nasa.gov/linux/drivers/"

-- 
Sincerely yours,
Michael Shmulevich
______________________________________
Software Developer
Jungo - R&D 
email: michaels@jungo.com
web: http://www.jungo.com
Phone: 1-877-514-0537(USA)  +972-9-8859365(Worldwide) ext. 233
Fax:   1-877-514-0538(USA)  +972-9-8859366(Worldwide)

From owner-linux-mips@oss.sgi.com Sat Jan 27 02:52:41 2001
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Date:   Sat, 27 Jan 2001 11:52:05 +0100 (MET)
From:   Karel van Houten <K.H.C.vanHouten@research.kpn.com>
Subject: Re: Cross compiling RPMs
In-reply-to: <200101262114.NAA26672@saturn.mikemac.com>
To:     mikemac@mikemac.com (Mike McDonald)
Cc:     flo@rfc822.org (Florian Lohoff), linux-mips@oss.sgi.com
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Mike wrote:
> 
>   If one were to go the native compiling route, what would the minimum
> set of rpms needed be? kernel, bin-utils, cc. file-utils? ???
> 

It depends on what and how you want to compile. To use rpm, you need
quite a lot tools (db3, patch, sed, grep, find,...). Beside that
you'll at least need glibc, binutils, gcc, and make. But you'll find
out that you'll have to compile flex, bison, m4, automake, autoconf,
and even perl to get rpm builds going. My mipsel native environment
currently has the following packages:

MAKEDEV-3.0.6-5         gcc-c++-2.95.3-14       newt-devel-0.50.17-1
SysVinit-2.78-10        gcc-libstdc++-2.95.3-14 pam-0.72-26
XFree86-4.0.1-1lm       gdbm-1.8.0-5            patch-2.5.4-4
XFree86-devel-4.0.1-1lm gdbm-devel-1.8.0-5      perl-5.6.0-9
XFree86-libs-4.0.1-1lm  gettext-0.10.35-23      popt-1.6-4lm
autoconf-2.13-9         glib-1.2.8-4            pwdb-0.61.1-1
automake-1.4-8          glib-devel-1.2.8-4      python-1.5.2-27
basesystem-7.0-2        glibc-2.1.97-1          python-devel-1.5.2-27
bash-2.04-11            glibc-devel-2.1.97-1    python-tools-1.5.2-27
bc-1.05a-13             gmp-3.0.1-5             readline-4.1-5
bdflush-1.5-14          gmp-devel-3.0.1-5       readline-devel-4.1-5
binutils-2.10.1-3       gpm-1.19.3-4            rpm-4.0-4lm
binutils-libs-2.10.1-3  gpm-devel-1.19.3-4      rpm-build-4.0-4lm
bison-1.28-5            grep-2.4.2-4            sed-3.02-8
byacc-1.9-16            groff-1.16-7            sh-utils-2.0-11
bzip2-1.0.1-3           gtk+-1.2.8-7            slang-1.4.1-5
bzip2-devel-1.0.1-3     gtk+-devel-1.2.8-7      slang-devel-1.4.1-5
cpio-2.4.2-20           gzip-1.3-6              tar-1.13-4
db1-1.85-4              info-4.0-15             tcl-8.3.1-46
db1-devel-1.85-4        ldconfig-1.9.5-16       tcllib-0.4-46
db2-2.4.14-4            libelf-0.7.0-3          termcap-11.0.1-3
db2-devel-2.4.14-4      libelf-devel-0.7.0-3    texinfo-4.0-15
db3-3.1.14-6lm          libpng-1.0.8-1          textutils-2.0e-8
db3-devel-3.1.14-6lm    libpng-devel-1.0.8-1    tix-4.1.0.6-46
db3-utils-3.1.14-6lm    libtermcap-2.0.8-25     tk-8.3.1-46
dev-3.0.6-5             libtermcap-devel-2.0.8- tkinter-1.5.2-27
diffutils-2.7-21        libtool-1.3.4-3lm       unzip-5.41-3
fileutils-4.0x-3        m4-1.4.1-3              utempter-0.5.2-4
findutils-4.1.5-4       make-3.79.1-5           vim-common-5.7-6
flex-2.5.4a-11          ncurses-5.1-2           vim-minimal-5.7-6
gawk-3.0.6-1            ncurses-devel-5.1-2     zlib-1.1.3-12
gcc-2.95.3-14           newt-0.50.17-1          zlib-devel-1.1.3-12

But you surely can start with less... :-)
-- 
Karel van Houten

----------------------------------------------------------
The box said "Requires Windows 95 or better."
I can't understand why it won't work on my Linux computer. 
----------------------------------------------------------

From owner-linux-mips@oss.sgi.com Sat Jan 27 13:31:53 2001
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Organization: Monta Vista Software
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Subject: Re: MIPS/linux compatible PCI network cards
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Michael Shmulevich wrote:
> 
> Pete Popov wrote:
> 
> > To get the realtek driver to work, all you need to do is to set
> > mips_io_port_base to KSEG1.  Let's assume that the ethernet card has
> > been assigned i/o space at 0x14000000.  The driver will pick that up as
> > the ioaddr and use the 0x1400000 as the "port". The inb()/outb() macros
> > add mips_io_port_base to the "port" value and now you have 0xB4000000,
> > so you can access the card.
> >
> > Pete
> 
> The KSEG1() is indeed what I did, however the driver, as I tried to
> describe, starts to loose synchronization on buffer at some point and
> just waits quietly... Even with all the DEBUG and mental effort switched
> on I can't get the reason why this happens...
> 
> By the way, which version of the driver are you talking about? Mine
> doesn't have any ifdef on anything... besides MODULE of course:-)
> 
> Mine is:
> 
> static const char *version =
> "rtl8139.c:v1.07 5/6/99 Donald Becker
> http://cesdis.gsfc.nasa.gov/linux/drivers/"

Hmmm, the above looks like the header for the 8129 driver, except that
it says rtl8139.  Make sure you're using drivers/net/8139too.c   I see
this in the driver:   #define RTL8139_VERSION "0.9.10". I'm using test9
kernel, I doubt that you're driver is out of date -- it seems you're
perhaps using the wrong driver.

Regarding the I/O vs MEM accesses, look for this:


/* define to 1 to enable PIO instead of MMIO */
#undef USE_IO_OPS


Pete

From owner-linux-mips@oss.sgi.com Sat Jan 27 14:49:43 2001
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To:     "Kevin D. Kissell" <kevink@mips.com>
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Subject: Re: MIPS platform recommendations 
In-Reply-To: Your message of "Fri, 26 Jan 2001 10:47:13 +0100."
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>From: "Kevin D. Kissell" <kevink@mips.com>
>To: "John Van Horne" <JohnVan.Horne@cosinecom.com>, <linux-mips@oss.sgi.com>
>Subject: Re: MIPS platform recommendations
>Date:   Fri, 26 Jan 2001 10:47:13 +0100
>
>This is a multi-part message in MIME format.
>
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>
>MIPS platform recommendationsPersonally, I use an Algorithmics P-5064 =
>board
>with an R5260 CPU for this sort of thing.  It's an
>ATX board that I've got bolted into a cheapo
>generic ATX enclosure on my lab network. They
>also have an RM7000 CPU module available.
>I'm running the MIPS 2.2.x port on it, however,
>not 2.4.  See www.algor.co.uk for info on the
>board.

  At (US) $3900 a copy, you have deeper pockets than I do. MUCH
deeper! (http://www.algor.co.uk/algor/info/p5064-benefits.html)

  Mike McDonald
  mikemac@mikemac.com

From owner-linux-mips@oss.sgi.com Sat Jan 27 14:58:03 2001
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Subject: Re: Cross compiling RPMs 
In-Reply-To: Your message of "Sat, 27 Jan 2001 11:52:05 +0100."
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Date:   Sat, 27 Jan 2001 14:57:24 -0800
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>Date: Sat, 27 Jan 2001 11:52:05 +0100 (MET)
>From: Karel van Houten <K.H.C.vanHouten@research.kpn.com>
>Subject: Re: Cross compiling RPMs
>To: mikemac@mikemac.com (Mike McDonald)
>
>Mike wrote:
>> 
>>   If one were to go the native compiling route, what would the minimum
>> set of rpms needed be? kernel, bin-utils, cc. file-utils? ???
>> 
>
>It depends on what and how you want to compile. To use rpm, you need
>quite a lot tools (db3, patch, sed, grep, find,...). Beside that
>you'll at least need glibc, binutils, gcc, and make. But you'll find
>out that you'll have to compile flex, bison, m4, automake, autoconf,
>and even perl to get rpm builds going. My mipsel native environment
>currently has the following packages:

  I was thinking of what the MINIMUM set of RPMs you needed installed
so you could bootstrap a system up from sources, not what's the
minimum needed to recompile any arbitrary RPM.

>But you surely can start with less... :-)

  With less than 150 files installed in a root file system, I can
install the bin-utils, gcc, make, and glibc RPMs. From there, I should
be able to begin cross compiling the other basic RPMs for a system.
That's my ultimate goal.

  Mike McDonald
  mikemac@mikemac.com

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To:     Jun Sun <jsun@mvista.com>
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On Fri, Jan 26, 2001 at 11:53:10AM -0800, Jun Sun wrote:

> 2) set rx_copybreak to 1518 to avoid some cache problem.

Now I wonder changing rx_copybreak is supposed to fix a cache problem?
This sounds broken ...

  Ralf

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On Fri, Jan 26, 2001 at 11:14:38AM +0100, Kevin D. Kissell wrote:

> I had essentially the same problem at MIPS a year or two ago,
> and I could have *sworn* that my fix, which ORed ST0_FR into
> the initial Status register value set in the startup assembly code,
> had made it into the standard distributions.  It's at about line 530
> of head.S, where a term is added to make the instruction
> 
> li t1,~(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR)

It's not in the CVS 2.2 kernel.  I've added this patch to my kernel and
will commit it when I'm online again.

  Ralf

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On Fri, Jan 26, 2001 at 09:56:00AM +0200, Michael Shmulevich wrote:
> Date:   Fri, 26 Jan 2001 09:56:00 +0200
> From: Michael Shmulevich <michaels@jungo.com>
> CC: "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
> Subject: Re: MIPS/linux compatible PCI network cards
> To: unlisted-recipients:; (no To-header on input)
> 
> Pete Popov wrote:
> > 
> > 
> > Another one is the RTL8139.  It's quite cheap (I think less than $20).
> > 
> > Pete
> 
> Surprisingly enough, Realtek's driver is quite x86-oriented. It uses
> some ugly outb() functtions without any ioremap()'ping.

inb() and friends are for what Inhell calls I/O space.  Ioremap is for
memory mapped I/O.  So you usually don't find both of them in the same
driver.

  Ralf

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On Sat, Jan 27, 2001 at 09:01:47AM +0100, Maciej W. Rozycki wrote:

>  I've contributed all patches I've written myself.  Unfortunately, most of
> the code needed for gdb 5.0 to run on MIPS was taken from the 4.x CVS at
> oss.sgi.com.  As such it is required all authors of patches have to have
> their copyright assigned to FSF before committing them to the gdb CVS.
> 
>  I've asked people to resolve ownership of the code here some time ago,
> but it seems nobody is really interested in getting this code into
> official gdb, sigh... 

The only people who have contributed amounts of code large enough for the
FSF to requires an assignment are David Miller (davem@redhat.com) and
myself.  I've already signed an assignment with the FSF and I'm also sure
David has.  I btw. cannot remember having seen any mail from you regarding
copyright assignments of GDB.

> > However, ld.so seems to know nothing about relocating shared library with a
> > non-zero shared library base address, which causes dynamically linked
> > stuff to crash spectacularly.  
> 
>  Does it?  Please provide more details.  All of my system (linux 2.4.0,
> glibc 2.2.1) is dynamically linked and it works fine.

I don't know what you look at - ld.so fails to handle libraries which are
not linked to 0x5fffe000 ...

> > binutils we're using is from CVS as of about Dec 17th.  Glibc is also a
> > snapshot from about the same time.
> 
>  Glibc should be fine as is although you might consider getting the 2.2.1
> release.  You may try to check if patches from my binutils package (also
> available at the mentioned site) solve certain or all of your problems. 
> The patches have been proposed for an inclusion in the upcoming binutils
> 2.11 release -- I hope they will finally get there.

Ulf?

  Ralf

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On Fri, Jan 26, 2001 at 05:40:07PM -0800, Justin Carlson wrote:

> Also, I've run into a problem with ld.so from glibc-2.2 on mips32-linux.
> After some hunting, I found that the templates in elf32bsmip.sh for gnu
> ld have recently changed to support SHLIB_TEXT_START_ADDR as a (non-zero)
> base address for shared library loading.  SHLIB_TEXT_START_ADDR defaults
> to 0x5ffe0000 in the current sources.

For obscure reasons which probably spell IRIX 5.x ELF compatibility ELF
shared objects except the dynamic linker itself are linked to this base
address.

> I'm curious if anyone knows the rationale for these changes.  Best conjecture
> I've heard is that it allows ld.so to not have to relocate itself, as it will
> load by default to the high address.  

By default ld.so get loaded to 0xfb60000.  Again this is an obscure IRIXism.

> However, ld.so seems to know nothing about relocating shared library with a
> non-zero shared library base address, which causes dynamically linked stuff
> to crash spectacularly.  
> 
> I think fixing ld.so won't be too difficult, but I'm really wanting to
> find out why these changes were made.  And whether I'm reinventing some
> wheels by fixing ld.so to cope with the new binutils stuff.

Glibc 2.0 as of '96 already does this just as glibc 2.2 is supposed to.
You may look at the source in the srpm package of glibc 2.1.95 on oss which
definately handles this right.

  Ralf

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On Sat, Jan 27, 2001 at 08:28:05AM +0100, Maciej W. Rozycki wrote:

> > Afaik the only user of MIPS_ATOMIC_SET ever running on Linux/MIPS is the
> > Linuxthreads code you wrote, so no.  Aside of that the semantics of this
> > syscall were defined by older MIPS operating systems such as Risc/OS and
> > I think we should follow their example.
> 
>  I still haven't seen a definite spec for the call.

Sorry, the specs is code and docs I have access to here inside SGI and which
I cannot pass on ...

>  Since you suggest the Linuxthreads code is the only user of the code
> (also remember the _test_and_set library function as specified by the ABI),
> we might abandon MIPS_ATOMIC_SET and write a _test_and_set syscall
> instead.  No compatibility issues would be involved and the definition is
> clear in the ABI (the library function would become a simple wrapper). 

We have an IRIX 5 emulation and if I remember right for IRIX 5
MIPS_ATOMIC_SET is still supported, so we need to also.  So I fear we'll
have to keep sysmips.  Which still doesn't mean we should come up with
something better.

>  I'm still uncertain if wasting a syscall number is that great idea, but
> we would be free from any compatibility problems.  And yes, I still think
> an ll/sc emulation could be done independently anyway. 

  Ralf

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From:   Ralf Baechle <ralf@oss.sgi.com>
To:     "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc:     Florian Lohoff <flo@rfc822.org>, Pete Popov <ppopov@mvista.com>,
        linux-mips@oss.sgi.com
Subject: Re: Cross compiling RPMs
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On Sat, Jan 27, 2001 at 08:42:34AM +0100, Maciej W. Rozycki wrote:

> > I definitly go for native builds - Once you have a working stable 
> > base you can set up debian autobuilders which will do nearly 
> > everything for you except signing and uploading the package into
> > the main repository.
> 
>  Yep, native builds are more likely to get correct as that's what most
> developers out there check (there are actually developers who never heard
> of something like a cross-compilation, sigh...).  But not everyone can
> afford a week to build glibc or X11... 

Sounds like DECstation results.  Building all the Redhat 7.0 packages which
are on oss + some others which could build for MIPS but don't for some
reason to the point where the build fails takes approx 40h on an Origin 200
with 2 180MHz R10000 processors and 1.5gb RAM.

I recently was told there is some m68k VME system out there which needs
approx. 3 days to rebuild it's kernel.

  Ralf

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From:   Ralf Baechle <ralf@oss.sgi.com>
To:     Carsten Langgaard <carstenl@mips.com>
Cc:     linux-mips@oss.sgi.com
Subject: Re: RedHat 7.0 ?
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On Fri, Jan 26, 2001 at 06:12:49PM +0100, Carsten Langgaard wrote:
> Date:   Fri, 26 Jan 2001 18:12:49 +0100
> From: Carsten Langgaard <carstenl@mips.com>
> To: linux-mips@oss.sgi.com
> Subject: RedHat 7.0 ?
> 
> Has anyone put together an easy-to-install tar file, similar to the old
> hard-hat 5.1 tarfile, where you could install everything though an
> install program running on a nfs server ?
> I really like the old hard-hat approach, it was easy to install and
> everything seems to work, but it would be nice to have a newer release.
> The old hard-hat install program doesn't work with the new 2.4.0 kernel.

At this time we don't have an easy installer for it.  I intend to strip
down an RH 7.0 installation which I'm running on an Origin here and put
it up for ftp somewhen soon.

  Ralf

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Subject: Re: MIPS/linux compatible PCI network cards
References: <3A70A356.F3CA71F1@jungo.com> <3A70A718.F0628BBB@mvista.com> <3A712D90.3CC9EBAF@jungo.com> <20010127112204.J867@bacchus.dhis.org>
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Ralf Baechle wrote:
> 
> On Fri, Jan 26, 2001 at 09:56:00AM +0200, Michael Shmulevich wrote:
> > Date:   Fri, 26 Jan 2001 09:56:00 +0200
> > From: Michael Shmulevich <michaels@jungo.com>
> > CC: "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
> > Subject: Re: MIPS/linux compatible PCI network cards
> > To: unlisted-recipients:; (no To-header on input)
> >
> > Pete Popov wrote:
> > >
> > >
> > > Another one is the RTL8139.  It's quite cheap (I think less than $20).
> > >
> > > Pete
> >
> > Surprisingly enough, Realtek's driver is quite x86-oriented. It uses
> > some ugly outb() functtions without any ioremap()'ping.
> 
> inb() and friends are for what Inhell calls I/O space.  Ioremap is for
> memory mapped I/O.  So you usually don't find both of them in the same
> driver.
> 
>   Ralf

I guess I will not. But at least hoped to see some io_port_base (?)
reference somewhere. neither ioremap, nor io_port_base is found in
rtl8139.c... I have tried to add some, but the results are still quite
disencouraging. 

Newer version of rtl8139.c (from the Scyld) have pci-scan dependency
which is not compatible with 2.2.14...

 
Sincerely yours,
Michael Shmulevich
______________________________________
Software Developer
Jungo - R&D 
email: michaels@jungo.com
web: http://www.jungo.com
Phone: 1-877-514-0537(USA)  +972-9-8859365(Worldwide) ext. 233
Fax:   1-877-514-0538(USA)  +972-9-8859366(Worldwide)

From owner-linux-mips@oss.sgi.com Sun Jan 28 02:21:37 2001
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Pete Popov wrote:
> 
> >
> > By the way, which version of the driver are you talking about? Mine
> > doesn't have any ifdef on anything... besides MODULE of course:-)
> >
> > Mine is:
> >
> > static const char *version =
> > "rtl8139.c:v1.07 5/6/99 Donald Becker
> > http://cesdis.gsfc.nasa.gov/linux/drivers/"
> 
> Hmmm, the above looks like the header for the 8129 driver, except that
> it says rtl8139.  Make sure you're using drivers/net/8139too.c   I see
> this in the driver:   #define RTL8139_VERSION "0.9.10". I'm using test9
> kernel, I doubt that you're driver is out of date -- it seems you're
> perhaps using the wrong driver.
> 
> Regarding the I/O vs MEM accesses, look for this:
> 
> /* define to 1 to enable PIO instead of MMIO */
> #undef USE_IO_OPS
> 
> Pete

I have checked the Scyld web page, this is where D. Becker currently
work on the driver (http://www.scyld.com/network/rtl8139.html)

Newer driver indeed seem to be more multi-platform aware, though
out-of-box compilation still crashed the kernel (access to 0x18000051
instead of 0xb8000051, KSEG1 stuff again). Corrected. Still no luck,
driver seems not to find where the card is. Switched cards to another
manufacturer [compatible, of course :-)] -- same result.

Sincerely yours,
Michael Shmulevich
______________________________________
Software Developer
Jungo - R&D 
email: michaels@jungo.com
web: http://www.jungo.com
Phone: 1-877-514-0537(USA)  +972-9-8859365(Worldwide) ext. 233
Fax:   1-877-514-0538(USA)  +972-9-8859366(Worldwide)

From owner-linux-mips@oss.sgi.com Sun Jan 28 04:00:28 2001
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Ralf Baechle <ralf@oss.sgi.com> writes:

> On Sat, Jan 27, 2001 at 09:01:47AM +0100, Maciej W. Rozycki wrote:
> 
> >  I've contributed all patches I've written myself.  Unfortunately, most of
> > the code needed for gdb 5.0 to run on MIPS was taken from the 4.x CVS at
> > oss.sgi.com.  As such it is required all authors of patches have to have
> > their copyright assigned to FSF before committing them to the gdb CVS.
> > 
> >  I've asked people to resolve ownership of the code here some time ago,
> > but it seems nobody is really interested in getting this code into
> > official gdb, sigh... 
> 
> The only people who have contributed amounts of code large enough for the
> FSF to requires an assignment are David Miller (davem@redhat.com) and
> myself.  I've already signed an assignment with the FSF and I'm also sure
> David has.  I btw. cannot remember having seen any mail from you regarding
> copyright assignments of GDB.

David has only disclaimers for Binutils and GCC but not for GDB in the
FSF list.

Andreas
-- 
 Andreas Jaeger
  SuSE Labs aj@suse.de
   private aj@arthur.inka.de
    http://www.suse.de/~aj

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From:   Ralf Baechle <ralf@oss.sgi.com>
To:     Mike McDonald <mikemac@mikemac.com>
Cc:     Karel van Houten <K.H.C.vanHouten@research.kpn.com>,
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On Sat, Jan 27, 2001 at 02:57:24PM -0800, Mike McDonald wrote:

>   I was thinking of what the MINIMUM set of RPMs you needed installed
> so you could bootstrap a system up from sources, not what's the
> minimum needed to recompile any arbitrary RPM.

Really depends on what you want to do.  Many packages detect other packages
or features of other packages.  This builds a big evil network of
dependencies which make bootstrapping somewhat hard.  It's a good idea to
start with an as complete installation as possible.

>   With less than 150 files installed in a root file system, I can
> install the bin-utils, gcc, make, and glibc RPMs. From there, I should
> be able to begin cross compiling the other basic RPMs for a system.
> That's my ultimate goal.

  Ralf

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Hi,
shouldnt the srl at least stall for a cycle on interlocked CPUs ?

Index: arch/mips/kernel/r4k_misc.S
===================================================================
RCS file: /cvs/linux/arch/mips/kernel/r4k_misc.S,v
retrieving revision 1.10
diff -u -r1.10 r4k_misc.S
--- arch/mips/kernel/r4k_misc.S	2000/12/14 21:39:51	1.10
+++ arch/mips/kernel/r4k_misc.S	2001/01/28 16:03:44
@@ -37,8 +37,8 @@
 	 */
 #define LOAD_PTE(pte, ptr) \
 	mfc0	pte, CP0_BADVADDR; \
-	srl	pte, pte, 22; \
 	lw	ptr, current_pgd; \
+	srl	pte, pte, 22; \
 	sll	pte, pte, 2; \
 	addu	ptr, ptr, pte; \
 	mfc0	pte, CP0_BADVADDR; \

-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


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From:   Florian Lohoff <flo@rfc822.org>
To:     linux-mips@oss.sgi.com
Subject: [RESUME] R3000 swapping problems
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Hi,
after a weekend research i am a bit stuck in my understanding of the
R3000 swapping problems 

When changing

Index: include/asm-mips/pgtable.h
===================================================================
RCS file: /cvs/linux/include/asm-mips/pgtable.h,v
retrieving revision 1.48
diff -u -r1.48 pgtable.h
--- include/asm-mips/pgtable.h	2000/12/03 15:30:52	1.48
+++ include/asm-mips/pgtable.h	2001/01/28 16:08:17
@@ -457,8 +457,8 @@
 				unsigned long address, pte_t pte);
 
 #define SWP_TYPE(x)		(((x).val >> 1) & 0x3f)
-#define SWP_OFFSET(x)		((x).val >> 8)
-#define SWP_ENTRY(type,offset)	((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
+#define SWP_OFFSET(x)		((x).val >> 10)
+#define SWP_ENTRY(type,offset)	((swp_entry_t) { ((type) << 1) | ((offset) << 10) })
 #define pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
 #define swp_entry_to_pte(x)	((pte_t) { (x).val })


The R3k machine (Decstation 5000/120) does survive swapping. The 
idea is that the bits 9 & 10 on the R3k are

#define _PAGE_VALID                 (1<<9)
#define _PAGE_SILENT_READ           (1<<9)  /* synonym                 */
#define _PAGE_DIRTY                 (1<<10) /* The MIPS dirty bit      */
#define _PAGE_SILENT_WRITE          (1<<10)

Whereas this on R4k is 

#define _PAGE_VALID                 (1<<7)
#define _PAGE_SILENT_READ           (1<<7)  /* synonym                 */
#define _PAGE_DIRTY                 (1<<8)  /* The MIPS dirty bit      */
#define _PAGE_SILENT_WRITE          (1<<8)

OTOH when following the code paths the pte gets completely replaced
with the swap entry and not bitmasked/and/ored with the original 
pte or the ptes flags. So i find no dependencie to the SWP_ macros.

Swapin is in mm/memory.c:do_swap_page

   1039         pte = mk_pte(page, vma->vm_page_prot);
   1040 
   1041         /*
   1042          * Freeze the "shared"ness of the page, ie page_count + swap_count.
   1043          * Must lock page before transferring our swap count to already
   1044          * obtained page count.
   1045          */
   1046         lock_page(page);
   1047         swap_free(entry);
   1048         if (write_access && !is_page_shared(page))
   1049                 pte = pte_mkwrite(pte_mkdirty(pte));
   1050         UnlockPage(page);
   1051 
   1052         set_pte(page_table, pte);
   1053 
   1054         /* No need to invalidate - it was non-present before */
   1055         update_mmu_cache(vma, address, pte);
   1056         return 1;       /* Minor fault */

The swapout code is in mm/vmscan.c:try_to_swap_out

    144         entry = get_swap_page();
    145         if (!entry.val)
    146                 goto out_unlock_restore; /* No swap space left */
    147 
    148         /* Add it to the swap cache and mark it dirty */
    149         add_to_swap_cache(page, entry);
    150         set_page_dirty(page);
    151         goto set_swap_pte;

     98 set_swap_pte:
     99                 swap_duplicate(entry);
    100                 set_pte(page_table, swp_entry_to_pte(entry));
    101 drop_pte:
    102                 UnlockPage(page);
    103                 mm->rss--;
    104                 deactivate_page(page);
    105                 page_cache_release(page);
    106 out_failed:
    107                 return 0;
    108         }

When adding debug code there i can see the flags getting restored
correctly on swapping in.

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Sun Jan 28 09:46:10 2001
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Subject: Re: Cross compiling RPMs 
In-Reply-To: Your message of "Sun, 28 Jan 2001 04:10:26 PST."
             <20010128041025.C4287@bacchus.dhis.org> 
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>Date: 	Sun, 28 Jan 2001 04:10:26 -0800
>From: Ralf Baechle <ralf@oss.sgi.com>
>To: Mike McDonald <mikemac@mikemac.com>
>Subject: Re: Cross compiling RPMs
>
>On Sat, Jan 27, 2001 at 02:57:24PM -0800, Mike McDonald wrote:
>
>>   I was thinking of what the MINIMUM set of RPMs you needed installed
>> so you could bootstrap a system up from sources, not what's the
>> minimum needed to recompile any arbitrary RPM.
>
>Really depends on what you want to do.  Many packages detect other packages
>or features of other packages.  This builds a big evil network of
>dependencies which make bootstrapping somewhat hard.  It's a good idea to
>start with an as complete installation as possible.

  I want to do just the opposite. I want to start with the minimum set
of installed binaries and build a complete binary distribution from
its sources. (That means finding the root of the dependency graph and
starting there, assuming there actually is one. It isn't necessarily a
single rpm. People like to make circular dependancies!)

  Mike McDonald
  mikemac@mikemac.com

From owner-linux-mips@oss.sgi.com Sun Jan 28 10:56:31 2001
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On Sat, 27 Jan 2001, Ralf Baechle wrote:
> I recently was told there is some m68k VME system out there which needs
> approx. 3 days to rebuild it's kernel.

Since even my 25 MHz 68040 only ca. 6 hours to build a complete 2.4.0 kernel
(incl. lots of modules) these days, that's probably an underclocked 68020 or
so? :-)

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From owner-linux-mips@oss.sgi.com Sun Jan 28 10:56:51 2001
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On Fri, 26 Jan 2001, Florian Lohoff wrote:
> On Fri, Jan 26, 2001 at 10:37:03AM -0800, Pete Popov wrote:
> > glibc.  Others might have similar toolchains they can point you at. 
> > Another option is native builds, which I personally don't like.
> 
> Cross compiling is definitly no option for debian as the dependencies
> etc are all made from "ldd binary" which has to fail for cross-compiling.
> I guess this also happens to rpm packages so cross-compiling to really
> get a correct distribution is definitly no option.

    [...]

> I definitly go for native builds - Once you have a working stable 
> base you can set up debian autobuilders which will do nearly 
> everything for you except signing and uploading the package into
> the main repository.

I really like what they did for ia64 (cfr. the Linux Kongress talk in 1999):
they are running an (emulated) ia64 chrooted environment on an ia32 box.
Binaries in the chrooted environment can be both native (ia32, fast) or
non-native (ia64, emulated and slower). May help for autobuilders for `slow'
architectures (emulated m68k may be faster than the fastest existing '060) as
well...

Using such a technique would allow to let weird stuff like `ldd' and
intermediate created binaries work.

Gr{oetje,eeting}s,

						Geert

P.S. I also think Debian should provide cross-gccs and cross-binutils for all
     architectures it supports, so I don't have to build them myself. And if I
     then could install any lib*-dev*.deb for architecture <arch> into
     /usr/<arch>-linux/ I can cross-compile userspace as well...
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From owner-linux-mips@oss.sgi.com Sun Jan 28 11:48:22 2001
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On Sun, 28 Jan 2001, Geert Uytterhoeven wrote:

> On Sat, 27 Jan 2001, Ralf Baechle wrote:
> > I recently was told there is some m68k VME system out there which needs
> > approx. 3 days to rebuild it's kernel.
>
> Since even my 25 MHz 68040 only ca. 6 hours to build a complete 2.4.0 kernel
> (incl. lots of modules) these days, that's probably an underclocked 68020 or
> so? :-)

I would bet on an 68030 with 4MB of memory and a SCSI Winchester for a
swapdrive. Ah, the memories :).

Pi

-- 
Live phase 1    <-->    RJ45 pin 3      GND     <-->    RJ45 pin 8
Live phase 2    <-->    RJ45 pin 6
Live phase 3    <-->    RJ45 pin 2      Is this suitable?
Neutral         <-->    RJ45 pin 1      Or should we kill phones too?



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On Sun, Jan 28, 2001 at 07:30:40PM +0100, Geert Uytterhoeven wrote:

> > I recently was told there is some m68k VME system out there which needs
> > approx. 3 days to rebuild it's kernel.
> 
> Since even my 25 MHz 68040 only ca. 6 hours to build a complete 2.4.0 kernel
> (incl. lots of modules) these days, that's probably an underclocked 68020 or
> so?:-)

It's a memory starved '030.

Reminds me of my good old Amiga.  Anybody got me a power supply for it, I
feel like reactiviting it :-)

  Ralf

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From:   Ralf Baechle <ralf@oss.sgi.com>
To:     Mike McDonald <mikemac@mikemac.com>
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Subject: Re: Cross compiling RPMs
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On Sun, Jan 28, 2001 at 09:45:39AM -0800, Mike McDonald wrote:

> >>   I was thinking of what the MINIMUM set of RPMs you needed installed
> >> so you could bootstrap a system up from sources, not what's the
> >> minimum needed to recompile any arbitrary RPM.
> >
> >Really depends on what you want to do.  Many packages detect other packages
> >or features of other packages.  This builds a big evil network of
> >dependencies which make bootstrapping somewhat hard.  It's a good idea to
> >start with an as complete installation as possible.
> 
>   I want to do just the opposite. I want to start with the minimum set
> of installed binaries and build a complete binary distribution from
> its sources. (That means finding the root of the dependency graph and
> starting there, assuming there actually is one. It isn't necessarily a
> single rpm. People like to make circular dependancies!)

Rpm is a particularly sucky self dependency.  One generation of rpm
inherits certain settings from it's ancestor so bootstrapping only from
sources is a royally sucky.

  Ralf

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To:     Ralf Baechle <ralf@oss.sgi.com>
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On Sun, 28 Jan 2001, Ralf Baechle wrote:
> On Sun, Jan 28, 2001 at 07:30:40PM +0100, Geert Uytterhoeven wrote:
> > > I recently was told there is some m68k VME system out there which needs
> > > approx. 3 days to rebuild it's kernel.
> > 
> > Since even my 25 MHz 68040 only ca. 6 hours to build a complete 2.4.0 kernel
> > (incl. lots of modules) these days, that's probably an underclocked 68020 or
> > so?:-)
> 
> It's a memory starved '030.
> 
> Reminds me of my good old Amiga.  Anybody got me a power supply for it, I
> feel like reactiviting it :-)

What kind of Amiga was it? If it was an A3000, you may get a PSU from Jes,
since he's in 110V country now.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven ------------- Sony Software Development Center Europe (SDCE)
Geert.Uytterhoeven@sonycom.com ------------------- Sint-Stevens-Woluwestraat 55
Voice +32-2-7248626 Fax +32-2-7262686 ---------------- B-1130 Brussels, Belgium


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Ralf Baechle wrote:

> On Fri, Jan 26, 2001 at 06:12:49PM +0100, Carsten Langgaard wrote:
> > Date:   Fri, 26 Jan 2001 18:12:49 +0100
> > From: Carsten Langgaard <carstenl@mips.com>
> > To: linux-mips@oss.sgi.com
> > Subject: RedHat 7.0 ?
> >
> > Has anyone put together an easy-to-install tar file, similar to the old
> > hard-hat 5.1 tarfile, where you could install everything though an
> > install program running on a nfs server ?
> > I really like the old hard-hat approach, it was easy to install and
> > everything seems to work, but it would be nice to have a newer release.
> > The old hard-hat install program doesn't work with the new 2.4.0 kernel.
>
> At this time we don't have an easy installer for it.  I intend to strip
> down an RH 7.0 installation which I'm running on an Origin here and put
> it up for ftp somewhen soon.

Great, please let me know when you have done it.

>
>   Ralf

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Mon Jan 29 07:06:19 2001
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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Ralf Baechle <ralf@oss.sgi.com>
cc:     Joe deBlaquiere <jadb@redhat.com>, Florian Lohoff <flo@rfc822.org>,
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Subject: Re: [FIX] sysmips(MIPS_ATMIC_SET, ...) ret_from_sys_call vs. o32_ret_from_sys_call
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On Sat, 27 Jan 2001, Ralf Baechle wrote:

> Sorry, the specs is code and docs I have access to here inside SGI and which
> I cannot pass on ...

 Hmm, weird -- I thought a manual page would be available somewhere, as
it's practised in Unix.  Error conditions is what would be most
interesting.

> We have an IRIX 5 emulation and if I remember right for IRIX 5
> MIPS_ATOMIC_SET is still supported, so we need to also.  So I fear we'll
> have to keep sysmips.  Which still doesn't mean we should come up with
> something better.

 OK, then, but still we should do it properly, even for MIPS1.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Jan 29 07:35:49 2001
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Date:   Mon, 29 Jan 2001 16:23:36 +0100 (MET)
From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Mike McDonald <mikemac@mikemac.com>
cc:     Ralf Baechle <ralf@oss.sgi.com>, linux-mips@oss.sgi.com
Subject: Re: Cross compiling RPMs 
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On Sun, 28 Jan 2001, Mike McDonald wrote:

>   I want to do just the opposite. I want to start with the minimum set
> of installed binaries and build a complete binary distribution from
> its sources. (That means finding the root of the dependency graph and
> starting there, assuming there actually is one. It isn't necessarily a
> single rpm. People like to make circular dependancies!)

 If you have another working Linux system, you may see what I have at
ftp://ftp.ds2.pg.gda.pl/pub/macro/.  I built my mipsel-linux (not complete
yet, e.g. no perl nor X11) system from scratch, i.e. having no MIPS
binaries at all using my i386-linux build system.  All RPM packages have
spec files with explicit "BuildRequires"  dependencies -- you may find
from these what else is needed to build a particular package.

 Only for binutils, gcc and glibc you would need: autoconf, automake,
bash, binutils, bzip2, diffutils, fileutils, findutils, flex, gawk, gcc,
gettext, glibc, grep, gzip, m4, make, patch, perl, rpm, sed, sh-utils,
texinfo, textutils.  You may need additional software to compile some of
these. ;-)

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Jan 29 07:36:09 2001
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To:     Ralf Baechle <ralf@oss.sgi.com>
cc:     Justin Carlson <carlson@sibyte.com>, linux-mips@oss.sgi.com
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On Sat, 27 Jan 2001, Ralf Baechle wrote:

> The only people who have contributed amounts of code large enough for the
> FSF to requires an assignment are David Miller (davem@redhat.com) and
> myself.  I've already signed an assignment with the FSF and I'm also sure

 Ok, I'll dig out the patch and contact all interested parties again.

> David has.  I btw. cannot remember having seen any mail from you regarding
> copyright assignments of GDB.

 It was back in July, 2000, so it a long time ago...

> >  Does it?  Please provide more details.  All of my system (linux 2.4.0,
> > glibc 2.2.1) is dynamically linked and it works fine.
> 
> I don't know what you look at - ld.so fails to handle libraries which are
> not linked to 0x5fffe000 ...

 Does it?  I admit I haven't checked it specifically.  It needs to be
fixed if so.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Jan 29 07:58:39 2001
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To:     Ralf Baechle <ralf@oss.sgi.com>
cc:     Florian Lohoff <flo@rfc822.org>, Pete Popov <ppopov@mvista.com>,
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On Sat, 27 Jan 2001, Ralf Baechle wrote:

> >  Yep, native builds are more likely to get correct as that's what most
> > developers out there check (there are actually developers who never heard
> > of something like a cross-compilation, sigh...).  But not everyone can
> > afford a week to build glibc or X11... 
> 
> Sounds like DECstation results.  Building all the Redhat 7.0 packages which
> are on oss + some others which could build for MIPS but don't for some
> reason to the point where the build fails takes approx 40h on an Origin 200
> with 2 180MHz R10000 processors and 1.5gb RAM.

 It's mostly RAM-dependent.  A machine with about 4 MB of memory will suck
for compilation regardless of the CPU type.  If you have a decent native
system, why to bother with cross-compiling? 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Jan 29 13:59:00 2001
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From:   Ralf Baechle <ralf@oss.sgi.com>
To:     Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
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On Mon, Jan 29, 2001 at 09:44:08AM +0100, Geert Uytterhoeven wrote:

> What kind of Amiga was it? If it was an A3000, you may get a PSU from Jes,
> since he's in 110V country now.

A2000C.

  Ralf

From owner-linux-mips@oss.sgi.com Mon Jan 29 15:52:50 2001
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From:   Florian Lohoff <flo@rfc822.org>
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Subject: [PATCH] clean error in arch/mips/pmc/cp7000/irq.c:request_irq
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Hi,
i think this is more correct - On failing of shared irqs one should
at least reenable interrupts and free the allocated buffer.

Apply before anyone copys this into his/her code ...


Index: arch/mips/pmc/cp7000/irq.c
===================================================================
RCS file: /cvs/linux/arch/mips/pmc/cp7000/irq.c,v
retrieving revision 1.1
diff -u -r1.1 irq.c
--- arch/mips/pmc/cp7000/irq.c	2000/12/13 21:07:34	1.1
+++ arch/mips/pmc/cp7000/irq.c	2001/01/29 23:50:34
@@ -327,8 +327,11 @@
 
 	if ((old = *p) != NULL) {
 		/* Can't share interrupts unless both agree to */
-		if (!(old->flags & action->flags & SA_SHIRQ))
+		if (!(old->flags & action->flags & SA_SHIRQ)) {
+			restore_flags(flags);
+			kfree(action);
 			return -EBUSY;
+		}
 		/* add new interrupt at end of irq queue */
 		do {
 			p = &old->next;


-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Mon Jan 29 16:12:51 2001
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Subject: Re: Cross compiling RPMs 
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             <Pine.GSO.3.96.1010129164905.20889E-100000@delta.ds2.pg.gda.pl> 
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>Date:   Mon, 29 Jan 2001 16:57:08 +0100 (MET)
>From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
>To: Ralf Baechle <ralf@oss.sgi.com>
>Subject: Re: Cross compiling RPMs

>   If you have a decent native
>system, why to bother with cross-compiling? 

  Because that's a huge IF! Most of the systems I deal with aren't
"decent" enough to support native compilation of the system. (The
systems of interest to me are embedded and handheld units.)

  Mike McDonald
  mikemac@mikemac.com

From owner-linux-mips@oss.sgi.com Tue Jan 30 01:49:55 2001
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From:   "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To:     Mike McDonald <mikemac@mikemac.com>
cc:     linux-mips@oss.sgi.com
Subject: Re: Cross compiling RPMs 
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On Mon, 29 Jan 2001, Mike McDonald wrote:

> >Date:   Mon, 29 Jan 2001 16:57:08 +0100 (MET)
> >From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
> >To: Ralf Baechle <ralf@oss.sgi.com>
> >Subject: Re: Cross compiling RPMs
> 
> >   If you have a decent native
> >system, why to bother with cross-compiling? 
> 
>   Because that's a huge IF! Most of the systems I deal with aren't
> "decent" enough to support native compilation of the system. (The
> systems of interest to me are embedded and handheld units.)

 Of course, but Ralf was mentioning some R10k system with 1.5GB of RAM... 
Much enough to buffer all binaries executed during a build as well as all
glibc and X11 sources together with intermediate object and library files
at once. 8-}

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Tue Jan 30 22:15:37 2001
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From:   Calvine Chew <calvine@sgi.com>
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Subject: Building XFree86 4.0.2?
Date:   Wed, 31 Jan 2001 14:20:17 +0800
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Hello all!

I'm trying to build XFree86 4.0.2 on HardHat 5.1 (unpatched) and I'm looking
at the Mips.cf, which mentions a bootstrapcflag, but the relnotes say
supported configs don't need bootstrapcflag="-DMips" passed to make. If I
pass bootstrap I get a conflict on stdio.h early on (conflicting type
sys_errlist), whereas if I don't pass bootstrapcflag, I get an error around
after 5000 lines of output (undefined references to __libc_accept, etc, from
libpthread.so when trying to make makekeys.c).

Seems to be an incompatible glibc library. Is XFree86 4.0.2 only for glibc
2.1 and above (I believe the raw Hardhat install comes with glibc2.0?)?
Anyone know where I can either grab the 402 binaries or the glibc2.1/2.2
binaries for Hardhat? Thanks!

Regards...

--
Calvine Chew, Technical Consultant
Technology & Industry Consulting Group (Asia South), SGI.
***************************************************************
Inter spem curamque, timores inter et iras, omnem crede diem tibi
diluxisse supremum: grata superveniet quae sperabitur hora.
http://calvine
***************************************************************





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Date:   Wed, 31 Jan 2001 08:15:13 +0100 (MET)
From:   Geert Uytterhoeven <geert@linux-m68k.org>
To:     Linux/MIPS Development <linux-mips@oss.sgi.com>
cc:     Sam Creasey <sammy@oh.verio.com>
Subject: sonic driver for 2.4.0-test10-pre5 (fwd)
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When cleaning up my patchqueue I noticed this patch also contains some fixes
(e.g. netif_*() updates) for the Olivetti M700-10 Risc PC sonic driver
(sonic.c). Probably this driver is in bad shape anyway, since it's not
mentioned in drivers/net/Makefile?

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

---------- Forwarded message ----------
Date: Tue, 31 Oct 2000 21:39:26 -0500 (EST)
From: Creasey <sammy@oh.verio.com>
To: linux-m68k@lists.linux-m68k.org
Subject: sonic driver for 2.4.0-test10-pre5
Resent-Date: Wed, 1 Nov 2000 03:38:19 +0100 (MET)
Resent-From: linux-m68k@phil.uni-sb.de




I've got the onboard sonic in my Centris 610 working in geert's kernel...

This patch is only known to work for machines with 32bit dma transfer, and
it definatlely won't work on machines which had the sonic registers at an
offset.

ftp://sammy.net/pub/m68k/patches/linux-2.4.0-test10-pre5-sonic.diff.gz

Enjoy.




"UN-altered REPRODUCTION and DISSEMINATION of this IMPORTANT
Information is ENCOURAGED, ESPECIALLY to COMPUTER BULLETIN BOARDS."
	-- Robert E. McElwaine




From owner-linux-mips@oss.sgi.com Wed Jan 31 02:16:18 2001
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On Wed, Jan 31, 2001 at 02:20:17PM +0800, Calvine Chew wrote:
> I'm trying to build XFree86 4.0.2 on HardHat 5.1 (unpatched) and I'm looking
> at the Mips.cf, which mentions a bootstrapcflag, but the relnotes say
> supported configs don't need bootstrapcflag="-DMips" passed to make. If I
> pass bootstrap I get a conflict on stdio.h early on (conflicting type
> sys_errlist), whereas if I don't pass bootstrapcflag, I get an error around
> after 5000 lines of output (undefined references to __libc_accept, etc, from
> libpthread.so when trying to make makekeys.c).
I'm running 4.0.2 on glib2.0.6 fine here. There are updated glibc2.0
rpms on oss.sgi.com/mips. With them you can build 4.0.2 without any need
to pass additional flags.
 -- Guido

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Has anyone seen problems with fsck on the latest 2.4.0 kernel ?
My filesystem gets corrupted from time to time when I use the latest
2.4.0 kernel.

/Carsten


--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Wed Jan 31 08:03:51 2001
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On Wed, Jan 31, 2001 at 03:20:35PM +0100, Carsten Langgaard wrote:
> 
> Has anyone seen problems with fsck on the latest 2.4.0 kernel ?
> My filesystem gets corrupted from time to time when I use the latest
> 2.4.0 kernel.
> 

Hmm - nope - 2.4.0 Bigendian here 

resume:~# uptime
 3:50pm  up 6 days, 10 min,  1 user,  load average: 0.00, 0.00, 0.00
resume:~# uname -a
Linux resume.rfc822.org 2.4.0 #3 Thu Jan 25 16:25:23 CET 2001 mips unknown

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Wed Jan 31 08:28:22 2001
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Try use fsck.

/Carsten

Florian Lohoff wrote:

> On Wed, Jan 31, 2001 at 03:20:35PM +0100, Carsten Langgaard wrote:
> >
> > Has anyone seen problems with fsck on the latest 2.4.0 kernel ?
> > My filesystem gets corrupted from time to time when I use the latest
> > 2.4.0 kernel.
> >
>
> Hmm - nope - 2.4.0 Bigendian here
>
> resume:~# uptime
>  3:50pm  up 6 days, 10 min,  1 user,  load average: 0.00, 0.00, 0.00
> resume:~# uname -a
> Linux resume.rfc822.org 2.4.0 #3 Thu Jan 25 16:25:23 CET 2001 mips unknown
>
> Flo
> --
> Florian Lohoff                  flo@rfc822.org             +49-5201-669912
>      Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Wed Jan 31 08:48:41 2001
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On Wed, Jan 31, 2001 at 05:24:58PM +0100, Carsten Langgaard wrote:
> 
> Try use fsck.
> 

*Urgs* Trouble ...



resume:~# df
Filesystem           1k-blocks      Used Available Use% Mounted on
/dev/sda1              2074328   1360061    607040  70% /
/dev/sde1              3839092    217476   3426600   6% /chroot
/dev/sdb1              4003992   3708044     89260  98% /home2
/dev/sdc1              4003992    449472   3347832  12% /home3
/dev/sdd1              4003992   1134620   2662684  30% /ftp.rfc822.org
resume:~# umount /ftp.rfc822.org/
resume:~# fsck -f /dev/sdd1
Parallelizing fsck version 1.18 (11-Nov-1999)
e2fsck 1.18, 11-Nov-1999 for EXT2 FS 0.5b, 95/08/09
Pass 1: Checking inodes, blocks, and sizes
Inode 64654, i_blocks is 42696, should be 44744.  Fix<y>? yes

Duplicate blocks found... invoking duplicate block passes.
Pass 1B: Rescan for duplicate/bad blocks
Duplicate/bad block(s) in inode 64654: 265881 ... ... ...
Duplicate/bad block(s) in inode 193927: 265881 ... ... ...
Pass 1C: Scan directories for inodes with dup blocks.
Pass 1D: Reconciling duplicate blocks
(There are 2 inodes containing duplicate/bad blocks.)

File /kernel/kernel-image-2.4.0-ip22-r4k.tgz (inode #193927, mod time Thu Jan 25 11:17:00 2001) 
  has 251 duplicate block(s), shared with 1 file(s):
	/devel/gcc-20000822-mips.tar.gz (inode #64654, mod time Mon Aug 28 17:14:56 2000)
Clone duplicate/bad blocks<y>? yes

File /devel/gcc-20000822-mips.tar.gz (inode #64654, mod time Mon Aug 28 17:14:56 2000) 
  has 251 duplicate block(s), shared with 1 file(s):
	/kernel/kernel-image-2.4.0-ip22-r4k.tgz (inode #193927, mod time Thu Jan 25 11:17:00 2001)
Duplicated blocks already reassigned or cloned.

Pass 2: Checking directory structure
Pass 3: Checking directory connectivity
Pass 4: Checking reference counts
Pass 5: Checking group summary information
Block bitmap differences:  +265876 +265877 +265878 +265879 +265880
Fix<y>? yes

Free blocks count wrong for group #0 (29960, counted=29709).
Fix<y>? yes

Free blocks count wrong for group #8 (5, counted=0).
Fix<y>? yes

Free blocks count wrong (717343, counted=717087).
Fix<y>? yes


/dev/sdd1: ***** FILE SYSTEM WAS MODIFIED *****
/dev/sdd1: 6277/1034240 files (21.0% non-contiguous), 316359/1033446 blocks



I ran -test6 and -test9 before.

Flo
-- 
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
     Why is it called "common sense" when nobody seems to have any?


From owner-linux-mips@oss.sgi.com Wed Jan 31 12:51:54 2001
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Does anyone have (or could anyone natively compile for me) a statically
linked ash binary (big endian)?

Or is there a static ash in one of those Debian base tar balls floating
around?  (I assume not, as Debian doesn't statically link much anymore).

tia! :)

-- 
Jamie Fifield

Software Designer		Jamie.Fifield@amirix.com
AMIRIX Systems Inc.		http://www.amirix.com/
Embedded Debian Project		http://www.emdebian.org/
77 Chain Lake Drive		902-450-1700 x247 (Phone)
Halifax, N.S. B3S 1E1		902-450-1704 (FAX)

From owner-linux-mips@oss.sgi.com Wed Jan 31 14:37:28 2001
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From:   Kenneth C Barr <kbarr@MIT.EDU>
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I finally got bootp/tftp to answer my indy's pleas for an image, but get
the following behavior (with my own IP addr and server, obviously):

>> boot bootp():/vmlinux
   73264+592+11520+331680+27848d+3628+5792 entry: 0x8df9a960
   Setting $netaddres to 192.168.1.5 (from server deadmoon)
   Obtaining /vmlinux from server deadmoon

i get a spinning cursor, which becomes the letter "n" and the entire
machine (including keyboard, mouse) locks.

A packet trace with ethereal reveals the indy ack'ing 2730 packets of 512
bytes each (1,397,760) before sending a "TFTP Error Code" packet:

Opcode: Error Code (5)
Error Code: Disk full or allocation exceeded (3)

The server's disks are not full, and my impression was that the indy would
be d/ling the vmlinux image into memory, not disk.  I have 64MB of RAM.

I repeated the process and got the same "n"-freeze a second time.

What does this behavior indicate?  (I didn't see it in HOWTO common
errors)  How can I fix it?

Thanks for your ideas,
Ken


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On Wed, Jan 31, 2001 at 08:15:13AM +0100, Geert Uytterhoeven wrote:
> 
> When cleaning up my patchqueue I noticed this patch also contains some fixes
> (e.g. netif_*() updates) for the Olivetti M700-10 Risc PC sonic driver
> (sonic.c). Probably this driver is in bad shape anyway, since it's not
> mentioned in drivers/net/Makefile?

it's not in the Makefile, because the MIPS part of the driver hasn't been
merged. And I haven't even powered up the M700 for over a year... 

So I'd say forget the M700 part, the last time I looked, there was more code,
which looks non working for it.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessary a
good idea.                                 [ Alexander Viro on linux-kernel ]

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From:   Calvine Chew <calvine@sgi.com>
To:     "'Guido Guenther'" <guido.guenther@uni-konstanz.de>
Cc:     "'linux-mips'" <linux-mips@oss.sgi.com>
Subject: RE: Building XFree86 4.0.2?
Date:   Thu, 1 Feb 2001 09:57:53 +0800 
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I'll try that, thanks!!

Regards...

--
Calvine Chew, Technical Consultant
Technology & Industry Consulting Group (Asia South), SGI.
***************************************************************
Inter spem curamque, timores inter et iras, omnem crede diem tibi
diluxisse supremum: grata superveniet quae sperabitur hora.
http://calvine
***************************************************************





> -----Original Message-----
> From: Guido Guenther [mailto:guido.guenther@uni-konstanz.de]
> Sent: Wednesday, January 31, 2001 6:15 PM
> To: Calvine Chew
> Cc: 'linux-mips'
> Subject: Re: Building XFree86 4.0.2?
> 
> 
> On Wed, Jan 31, 2001 at 02:20:17PM +0800, Calvine Chew wrote:
> > I'm trying to build XFree86 4.0.2 on HardHat 5.1 
> (unpatched) and I'm looking
> > at the Mips.cf, which mentions a bootstrapcflag, but the 
> relnotes say
> > supported configs don't need bootstrapcflag="-DMips" passed 
> to make. If I
> > pass bootstrap I get a conflict on stdio.h early on 
> (conflicting type
> > sys_errlist), whereas if I don't pass bootstrapcflag, I get 
> an error around
> > after 5000 lines of output (undefined references to 
> __libc_accept, etc, from
> > libpthread.so when trying to make makekeys.c).
> I'm running 4.0.2 on glib2.0.6 fine here. There are updated glibc2.0
> rpms on oss.sgi.com/mips. With them you can build 4.0.2 
> without any need
> to pass additional flags.
>  -- Guido
> 

From owner-linux-mips@oss.sgi.com Wed Jan 31 22:51:12 2001
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Message-ID: <43FECA7CDC4CD411A4A3009027999112267E49@sgp-apsa001e--n.singapore.sgi.com>
From:   Calvine Chew <calvine@sgi.com>
To:     "'Guido Guenther'" <guido.guenther@uni-konstanz.de>
Cc:     "'linux-mips'" <linux-mips@oss.sgi.com>
Subject: RE: Building XFree86 4.0.2?
Date:   Thu, 1 Feb 2001 14:55:28 +0800 
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Thanks Guido. Do I need to patch rpm too? Will glibc 2.0.6-7 do or do I need
2.1.95?

Regards...

--
Calvine Chew, Technical Consultant
Technology & Industry Consulting Group (Asia South), SGI.
***************************************************************
Inter spem curamque, timores inter et iras, omnem crede diem tibi
diluxisse supremum: grata superveniet quae sperabitur hora.
http://calvine
***************************************************************





> -----Original Message-----
> From: Guido Guenther [mailto:guido.guenther@uni-konstanz.de]
> Sent: Wednesday, January 31, 2001 6:15 PM
> To: Calvine Chew
> Cc: 'linux-mips'
> Subject: Re: Building XFree86 4.0.2?
> 
> 
> On Wed, Jan 31, 2001 at 02:20:17PM +0800, Calvine Chew wrote:
> > I'm trying to build XFree86 4.0.2 on HardHat 5.1 
> (unpatched) and I'm looking
> > at the Mips.cf, which mentions a bootstrapcflag, but the 
> relnotes say
> > supported configs don't need bootstrapcflag="-DMips" passed 
> to make. If I
> > pass bootstrap I get a conflict on stdio.h early on 
> (conflicting type
> > sys_errlist), whereas if I don't pass bootstrapcflag, I get 
> an error around
> > after 5000 lines of output (undefined references to 
> __libc_accept, etc, from
> > libpthread.so when trying to make makekeys.c).
> I'm running 4.0.2 on glib2.0.6 fine here. There are updated glibc2.0
> rpms on oss.sgi.com/mips. With them you can build 4.0.2 
> without any need
> to pass additional flags.
>  -- Guido
> 

