Subject: i8259.c in big endian

From: Atsushi Nemoto <[email-masked]>
Date: Thu, 08 Nov 2001 15:47:02 +0900 (JST)

arch/mips/kernel/i8259.c seems not working in big endian.

Here is a patch to fix this.

--- linux-sgi-cvs/arch/mips/kernel/i8259.c	Mon Sep 10 02:43:01 2001
+++ linux.new/arch/mips/kernel/i8259.c	Thu Nov  8 15:40:03 2001
@@ -70,8 +70,13 @@
 static unsigned int cached_irq_mask = 0xffff;
 
 #define __byte(x,y) 	(((unsigned char *)&(y))[x])
+#ifdef __BIG_ENDIAN
+#define cached_21	(__byte(1,cached_irq_mask))
+#define cached_A1	(__byte(0,cached_irq_mask))
+#else
 #define cached_21	(__byte(0,cached_irq_mask))
 #define cached_A1	(__byte(1,cached_irq_mask))
+#endif
 
 void disable_8259A_irq(unsigned int irq)
 {
---
Atsushi Nemoto

---

From: James Simmons <[email-masked]>
Date: Thu, 8 Nov 2001 09:45:02 -0800 (PST)

Also I like to see away to pass in a base offset. I have a mips device
which has a i8259 chip but its io is offseted by 0xb0000000.

---

From: Ralf Baechle <[email-masked]>
Date: Thu, 8 Nov 2001 12:13:48 -0800

> which has a i8259 chip but its io is offseted by 0xb0000000.

Then it's almost certainly an legacy ISA device with it's ports in ISA space,
so set mips_io_port_base to an apropriate value or does that not work for
you?

  Ralf

---

From: James Simmons <[email-masked]>
Date: Thu, 8 Nov 2001 12:20:20 -0800 (PST)

> so set mips_io_port_base to an apropriate value or does that not work for

The mips_io_port_base is 0xa0000000. Whereas the i8259 chip is at
0xb0000000. The 0xa000000 value could be wrong. I will give it a try.

---

From: Ralf Baechle <[email-masked]>
Date: Thu, 8 Nov 2001 12:41:19 -0800

> 0xb0000000. The 0xa000000 value could be wrong. I will give it a try. 

As your board must have RAM at physical address zero 0xa0000000 is almost
certainly a wrong value.

  Ralf

---

From: James Simmons <[email-masked]>
Date: Thu, 8 Nov 2001 13:37:36 -0800 (PST)

> As your board must have RAM at physical address zero 0xa0000000 is almost

Your right. The address of 0xb000000 is bogus. This is the value from the
old code. I will migrate the code over to the i8259.c stuff now. Thanks.

---

From: James Simmons <[email-masked]>
Date: Thu, 8 Nov 2001 13:53:07 -0800 (PST)

> old code. I will migrate the code over to the i8259.c stuff now. Thanks. 

Actually looking threw other mips branches now I see what the 0xb000000
is. It is the isa_port_base.

---

From: Jun Sun <[email-masked]>
Date: Fri, 09 Nov 2001 10:30:45 -0800

> is. It is the isa_port_base.

You are probably referring to isa_slot_offset?

isa_slot_offset is an obselete garbage.  Can someone do Ralf's a favor and
send him a patch to get rid of it (as if he can't do it himself :-0) ?

Jun

---

From: James Simmons <[email-masked]>
Date: Fri, 9 Nov 2001 10:44:04 -0800 (PST)

> You are probably referring to isa_slot_offset?

Yes. I meant isa_slot_offset.

> send him a patch to get rid of it (as if he can't do it himself :-0) ?

Oh.

---

From: Jim Paris <[email-masked]>
Date: Fri, 9 Nov 2001 14:44:21 -0500

> send him a patch to get rid of it (as if he can't do it himself :-0) ?

How should it be properly done?

-jim

---

From: Jun Sun <[email-masked]>
Date: Fri, 09 Nov 2001 12:50:20 -0800

> How should it be properly done?

Use an ax!

Jun

P.S., I meant "just delete it wherever it appears."

---

From: Ralf Baechle <[email-masked]>
Date: Sat, 10 Nov 2001 04:41:59 +1100

On Thu, Nov 08, 2001 at 03:47:02PM +0900, Atsushi Nemoto wrote:
> Date: Thu, 08 Nov 2001 15:47:02 +0900 (JST)
> To: [email-masked]
> Cc: [email-masked]
> Subject: i8259.c in big endian
> From: Atsushi Nemoto <[email-masked]>
> 

Below the fix I'm going to checkin.  Highly untested as I'm sitting in a
plase 800km northeast of New Zealand :-)

  Ralf

---

From: Ralf Baechle <[email-masked]>
Date: Mon, 12 Nov 2001 23:15:28 +1100

> send him a patch to get rid of it (as if he can't do it himself :-0) ?

Nope.  Somebody could fix isa_{read,write}[bwl] to use isa_slot_offset.
Right now all the ISA functions are broken.  So in case you're ISA drivers
seem to work that's the proof that they're broken *evil grin* :-)

  Ralf

---

From: Jun Sun <[email-masked]>
Date: Mon, 12 Nov 2001 10:31:54 -0800

> seem to work that's the proof that they're broken *evil grin* :-)

I doubt if there is any MIPS machine using standard PC ISA bus that is *not*
on a PCI bus ...

Jun

---

From: Florian Laws <[email-masked]>
Date: Mon, 12 Nov 2001 20:56:45 +0100

> I doubt if there is any MIPS machine using standard PC ISA bus that is *not*

FWIW, there is.
There are some old Siemens RM400 models (1989 vintage) with R3000 CPU and ISA 
bus.

Pretty unlikely that they'll be supportet any time, though... :-(

Florian

---

From: James Simmons <[email-masked]>
Date: Mon, 12 Nov 2001 13:49:28 -0800 (PST)

> seem to work that's the proof that they're broken *evil grin* :-)

I see you fixed this. Thank you :-)

---

From: Ralf Baechle <[email-masked]>
Date: Tue, 13 Nov 2001 10:56:37 +1100

> I doubt if there is any MIPS machine using standard PC ISA bus that is *not*

Many more than you'd ever want to support :-(  And yes, EISA and VLB bus
also.  I even heared the rumour about SBUS in MIPS machines.

  Ralf