Subject: [patch] linux: declance multicast filter fixes

From: "Maciej W. Rozycki" <[email-masked]>
Date: Thu, 21 Mar 2002 19:04:10 +0100 (MET)

Hello,

 Following are a few trivial fixes for the DECstation's LANCE driver
needed for the chip's multicast filter to be set up correctly.  The patch
is needed for multicast reception to work, in particular for the IPv6's
neighbor discovery.  The CRC generation was verified using the AMD's
reference code and it was checked at the run time for selected multicast
addresses as well.  Please apply. 

 Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: [email-masked], PGP key available        +

patch-mips-2.4.17-20020129-declance-mcast-11
diff -up --recursive --new-file linux-mips-2.4.17-20020129.macro/drivers/net/declance.c linux-mips-2.4.17-20020129/drivers/net/declance.c
--- linux-mips-2.4.17-20020129.macro/drivers/net/declance.c	Wed Aug 22 04:27:03 2001
+++ linux-mips-2.4.17-20020129/drivers/net/declance.c	Tue Mar 19 19:42:20 2002
@@ -793,6 +793,8 @@ static int lance_open(struct net_device 
 	ib->mode = 0;
 	ib->filter [0] = 0;
 	ib->filter [2] = 0;
+	ib->filter [4] = 0;
+	ib->filter [6] = 0;
 
 	lance_init_ring(dev);
 	load_csrs(lp);
@@ -920,7 +922,7 @@ static void lance_load_multicast(struct 
 	struct dev_mc_list *dmi = dev->mc_list;
 	char *addrs;
 	int i, j, bit, byte;
-	u32 crc, poly = CRC_POLYNOMIAL_BE;
+	u32 crc, poly = CRC_POLYNOMIAL_LE;
 
 	/* set all multicast bits */
 	if (dev->flags & IFF_ALLMULTI) {
@@ -959,7 +961,7 @@ static void lance_load_multicast(struct 
 			}
 
 		crc = crc >> 26;
-		mcast_table[crc >> 3] |= 1 << (crc & 0xf);
+		mcast_table[2 * (crc >> 4)] |= 1 << (crc & 0xf);
 	}
 	return;
 }

---

From: Dave Airlie <[email-masked]>
Date: Fri, 22 Mar 2002 11:08:27 +0000 (GMT)

I've created declance_2_4.c on http://www.csn.ul.ie/~airlied/mips

for the DS5000/200 series of DecStations..

it only required the BE -> LE and the additional zeroing of the filter, it
already did the mcast_table access correctly... (by luck rather than
design :-)

un-compiled and untested but it should work ..

Dave.

-- 
David Airlie, Software Engineer
http://www.skynet.ie/~airlied / [email-masked]
pam_smb / Linux DecStation / Linux VAX / ILUG person

---

From: "Maciej W. Rozycki" <[email-masked]>
Date: Sat, 23 Mar 2002 15:01:48 +0100 (MET)

> for the DS5000/200 series of DecStations..

 Thanks for the reference -- I definitely want to look how to merge the
drivers one day (well, actually the LANCE core should be common to all
drivers eventually).  There is certainly no point in keeping your code
separately.  I suppose your driver should work for the PMAD card as well. 

> already did the mcast_table access correctly... (by luck rather than

 Well, the I/O ASIC wiring of LANCE is weird.

---

From: Dave Airlie <[email-masked]>
Date: Sun, 24 Mar 2002 13:51:22 +0000 (GMT)

> separately.  I suppose your driver should work for the PMAD card as well.

well it should work for the PMAD and I've got a version for the VAX that
splits off from my one, the VAX uses a similiar wiring as the DS5000/200,
I've been waiting for the LANCE core to be separated out a lot of people
have talked about it and I hear for 2.5 maybe someone is actually going to
do it ...

Dave

---

From: "Maciej W. Rozycki" <[email-masked]>
Date: Mon, 25 Mar 2002 12:40:09 +0100 (MET)

> have talked about it and I hear for 2.5 maybe someone is actually going to

 Well, the core seems to be already separated -- see drivers/net/7990.c.
I haven't yet checked how suitable it is and many front-end drivers use it
already.

 For the I/O ASIC front-end I'm going to check if the ASIC is capable of
mapping the LANCE more sensibly before starting any further work.  The
current configuration is a major loss, doubling the CPU's work and I can't
see any reasonable explanation for such a setup.

---

From: Harald Koerfgen <[email-masked]>
Date: Wed, 27 Mar 2002 22:20:46 +0100

Hi,

> see any reasonable explanation for such a setup.

It's been quite some time since I have hacked the declance driver and I don't 
remember all the details, so take the following with a grain of salt.

The 7990 is basically a 16-bit chip in a 32-bit environment, and, AFAIR, uses 
two different DMA modes to access host memory. One is a 16-bit word-by-word 
access for the ring descriptors and the other is 8 16-bit-words-bursts for 
accessing the ring buffers themselves, where the LANCE only generates one 
target address per burst.

The IOASIC is, just as the CPU, only capable of doing 32-bit transfers 
to/from memory. So 16-bit LANCE accesses are translated into 32-bit IOASIC 
accesses but a part of the DMA target addresses are generated by the LANCE.

This leads to a 16-bit -> 32-bit mapping for the ring descriptors and a 
8*16-bit -> 8*32-bit mapping for ring buffers. Very efficient :-(.

Greetings,
Harald

---

From: "Maciej W. Rozycki" <[email-masked]>
Date: Thu, 28 Mar 2002 14:01:51 +0100 (MET)

> accesses but a part of the DMA target addresses are generated by the LANCE.

 But the I/O ASIC chip is smart enough to merge data from the 8-bit ROM
device without problems and present four consecutive bytes as 32-bit
quantities to the host CPU.  Why couldn't it do the same for the LANCE?
Host memory addresses are generated on behalf of the LANCE by the I/O ASIC
anyway.

 Of course not all designers have a clue, sigh...  A brief study of
available documentation suggests no merging mode was implemented for the
LANCE and bit 0 of addresses generated is simply hardwired to 0. :-(

---

From: Harald Koerfgen <[email-masked]>
Date: Fri, 29 Mar 2002 08:57:50 +0100

On Thursday 28 March 2002 14:01, Maciej W. Rozycki wrote:
> quantities to the host CPU.

A simple 4 to 1 mapping is easy, even for the average hardware developer :-)

> Why couldn't it do the same for the LANCE?

Probably because this would have made the IOASIC 0.0034 cents more expensive?

> LANCE and bit 0 of addresses generated is simply hardwired to 0. :-(

That's my interpretation as well.

Greetings,
Harald