From owner-linux-mips@oss.sgi.com Mon Apr  1 14:16:56 2002
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Date: Mon, 1 Apr 2002 14:16:40 -0800
From: Ralf Baechle <ralf@oss.sgi.com>
To: Florian Lohoff <flo@rfc822.org>
Cc: Raoul Borenius <raoul@shuttle.de>, linux-mips@oss.sgi.com,
   devfs@oss.sgi.com
Subject: Re: broken devfs-support in SGI Zilog8530 serial driver
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References: <20020329103244.GA15765@bunny.shuttle.de> <20020329233559.A31160@dea.linux-mips.net> <20020330132856.GA24305@bunny.shuttle.de> <20020331150023.GA30224@bunny.shuttle.de> <20020401192957.GA1389@paradigm.rfc822.org>
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On Mon, Apr 01, 2002 at 09:29:57PM +0200, Florian Lohoff wrote:

> > Could you commit that too?
> > 
> 
> I thought the callout devices are officially "dead" and should disappear
> "Real Soon Now(tm)" as beeing a locking hell and unneeded.

Really Soon Now doesn't mean what you want it to mean in a world that is
driven by backward compatibility ...

  Ralf

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Date: Mon, 1 Apr 2002 21:29:57 +0200
From: Florian Lohoff <flo@rfc822.org>
To: Raoul Borenius <raoul@shuttle.de>
Cc: Ralf Baechle <ralf@oss.sgi.com>, linux-mips@oss.sgi.com, devfs@oss.sgi.com
Subject: Re: broken devfs-support in SGI Zilog8530 serial driver
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On Sun, Mar 31, 2002 at 05:00:23PM +0200, Raoul Borenius wrote:
> Thanks for including the changes fr the ttyS's. But it seems you forgot t=
he
> callout-devices:
>=20
> > @@ -1911,7 +1915,11 @@
> >          * major number and the subtype code.
> >          */
> >         callout_driver =3D serial_driver;
> > +#ifdef CONFIG_DEVFS_FS
> > +       callout_driver.name =3D "cua/%d";
> > +#else
> >         callout_driver.name =3D "cua";
> > +#endif
> >         callout_driver.major =3D TTYAUX_MAJOR;
> >         callout_driver.subtype =3D SERIAL_TYPE_CALLOUT;
> >=20
>=20
> Could you commit that too?
>=20

I thought the callout devices are officially "dead" and should disappear
"Real Soon Now(tm)" as beeing a locking hell and unneeded.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
Nine nineth on september the 9th              Welcome to the new billenium

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From owner-linux-mips@oss.sgi.com Mon Apr  8 01:27:38 2002
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--------------------------------
$B"#A49q$N?M:`%P%s%/$XE>?&$N(B
  $B0l3g%(%s%H%j!<EPO?<uIU$1!*(B
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From owner-linux-mips@oss.sgi.com Mon Apr  8 10:06:40 2002
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	Mon, 8 Apr 2002 18:37:30 +0200 (MET DST)
Date: Mon, 8 Apr 2002 18:37:30 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Ralf Baechle <ralf@uni-koblenz.de>
cc: linux-mips@fnet.fr, linux-mips@oss.sgi.com
Subject: [patch] linux: A correct implementation of barriers
Message-ID: <Pine.GSO.3.96.1020408182445.26107G-100000@delta.ds2.pg.gda.pl>
Organization: Technical University of Gdansk
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Hello,

 Here is the barrier patch again.  It was discussed quite extensively a
few weeks ago.  It makes rmb(), wmb() and mb() use sync as needed (Tx39xx
included) and take writeback buffers into account (no Tx39xx code here --
someone interested in such a system should add it).  It also adds iob() 
for code that needs to assure not only the order of the preceding and the
following operations but also the completion of the preceding ones as well
(from the CPU's point of view). 

 Please apply.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

patch-mips-2.4.17-20020129-mb-wb-6
diff -up --recursive --new-file linux-mips-2.4.17-20020129.macro/arch/mips/config.in linux-mips-2.4.17-20020129/arch/mips/config.in
--- linux-mips-2.4.17-20020129.macro/arch/mips/config.in	Fri Jan 25 05:26:34 2002
+++ linux-mips-2.4.17-20020129/arch/mips/config.in	Thu Feb 21 21:31:42 2002
@@ -384,6 +384,11 @@ else
       fi
    fi
 fi
+if [ "$CONFIG_CPU_R3000" = "y" ]; then
+   define_bool CONFIG_CPU_HAS_SYNC n
+else
+   define_bool CONFIG_CPU_HAS_SYNC y
+fi
 endmenu
 
 mainmenu_option next_comment
diff -up --recursive --new-file linux-mips-2.4.17-20020129.macro/include/asm-mips/system.h linux-mips-2.4.17-20020129/include/asm-mips/system.h
--- linux-mips-2.4.17-20020129.macro/include/asm-mips/system.h	Sun Jan 27 05:27:59 2002
+++ linux-mips-2.4.17-20020129/include/asm-mips/system.h	Thu Feb 21 21:33:54 2002
@@ -18,9 +18,12 @@
 
 #include <linux/config.h>
 #include <asm/sgidefs.h>
-#include <asm/ptrace.h>
+
 #include <linux/kernel.h>
 
+#include <asm/addrspace.h>
+#include <asm/ptrace.h>
+
 __asm__ (
 	".macro\t__sti\n\t"
 	".set\tpush\n\t"
@@ -166,32 +169,58 @@ extern void __global_restore_flags(unsig
 #define local_irq_disable()	__cli();
 #define local_irq_enable()	__sti();
 
-/*
- * These are probably defined overly paranoid ...
- */
+#ifdef CONFIG_CPU_HAS_SYNC
+#define __sync()				\
+	__asm__ __volatile__(			\
+		".set	push\n\t"		\
+		".set	noreorder\n\t"		\
+		".set	mips2\n\t"		\
+		"sync\n\t"			\
+		".set	pop"			\
+		: /* no output */		\
+		: /* no input */		\
+		: "memory")
+#else
+#define __sync()	do { } while(0)
+#endif
+
+#define __fast_iob()				\
+	__asm__ __volatile__(			\
+		".set	push\n\t"		\
+		".set	noreorder\n\t"		\
+		"lw	$0,%0\n\t"		\
+		"nop\n\t"			\
+		".set	pop"			\
+		: /* no output */		\
+		: "m" (*(int *)KSEG1)		\
+		: "memory")
+
+#define fast_wmb()	__sync()
+#define fast_rmb()	__sync()
+#define fast_mb()	__sync()
+#define fast_iob()				\
+	do {					\
+		__sync();			\
+		__fast_iob();			\
+	} while (0)
+
 #ifdef CONFIG_CPU_HAS_WB
 
 #include <asm/wbflush.h>
-#define rmb()	do { } while(0)
-#define wmb()	wbflush()
-#define mb()	wbflush()
-
-#else /* CONFIG_CPU_HAS_WB  */
-
-#define mb()						\
-__asm__ __volatile__(					\
-	"# prevent instructions being moved around\n\t"	\
-	".set\tnoreorder\n\t"				\
-	"# 8 nops to fool the R4400 pipeline\n\t"	\
-	"nop;nop;nop;nop;nop;nop;nop;nop\n\t"		\
-	".set\treorder"					\
-	: /* no output */				\
-	: /* no input */				\
-	: "memory")
-#define rmb() mb()
-#define wmb() mb()
 
-#endif /* CONFIG_CPU_HAS_WB  */
+#define wmb()		fast_wmb()
+#define rmb()		fast_rmb()
+#define mb()		wbflush();
+#define iob()		wbflush();
+
+#else /* !CONFIG_CPU_HAS_WB */
+
+#define wmb()		fast_wmb()
+#define rmb()		fast_rmb()
+#define mb()		fast_mb()
+#define iob()		fast_iob()
+
+#endif /* !CONFIG_CPU_HAS_WB */
 
 #ifdef CONFIG_SMP
 #define smp_mb()	mb()
diff -up --recursive --new-file linux-mips-2.4.17-20020129.macro/include/asm-mips/wbflush.h linux-mips-2.4.17-20020129/include/asm-mips/wbflush.h
--- linux-mips-2.4.17-20020129.macro/include/asm-mips/wbflush.h	Fri Sep  7 04:26:33 2001
+++ linux-mips-2.4.17-20020129/include/asm-mips/wbflush.h	Mon Feb  4 02:52:11 2002
@@ -6,29 +6,30 @@
  * for more details.
  *
  * Copyright (c) 1998 Harald Koerfgen
+ * Copyright (C) 2002 Maciej W. Rozycki
  */
 #ifndef __ASM_MIPS_WBFLUSH_H
 #define __ASM_MIPS_WBFLUSH_H
 
 #include <linux/config.h>
 
-#if defined(CONFIG_CPU_HAS_WB)
-/*
- * R2000 or R3000
- */
-extern void (*__wbflush) (void);
+#ifdef CONFIG_CPU_HAS_WB
 
-#define wbflush() __wbflush()
+extern void (*__wbflush)(void);
+extern void wbflush_setup(void);
 
-#else
-/*
- * we don't need no stinkin' wbflush
- */
+#define wbflush()			\
+	do {				\
+		__sync();		\
+		__wbflush();		\
+	} while (0)
 
-#define wbflush()  do { } while(0)
+#else /* !CONFIG_CPU_HAS_WB */
 
-#endif
+#define wbflush_setup() do { } while (0)
 
-extern void wbflush_setup(void);
+#define wbflush() fast_iob()
+
+#endif /* !CONFIG_CPU_HAS_WB */
 
 #endif /* __ASM_MIPS_WBFLUSH_H */
diff -up --recursive --new-file linux-mips-2.4.17-20020129.macro/include/asm-mips64/system.h linux-mips-2.4.17-20020129/include/asm-mips64/system.h
--- linux-mips-2.4.17-20020129.macro/include/asm-mips64/system.h	Sun Jan 27 05:27:59 2002
+++ linux-mips-2.4.17-20020129/include/asm-mips64/system.h	Mon Feb  4 02:12:27 2002
@@ -11,12 +11,13 @@
 #define _ASM_SYSTEM_H
 
 #include <linux/config.h>
-
 #include <asm/sgidefs.h>
-#include <asm/ptrace.h>
 
 #include <linux/kernel.h>
 
+#include <asm/addrspace.h>
+#include <asm/ptrace.h>
+
 __asm__ (
 	".macro\t__sti\n\t"
 	".set\tpush\n\t"
@@ -163,20 +164,32 @@ extern void __global_restore_flags(unsig
 #define local_irq_disable()	__cli();
 #define local_irq_enable()	__sti();
 
-/*
- * These are probably defined overly paranoid ...
- */
-#define mb()						\
-__asm__ __volatile__(					\
-	"# prevent instructions being moved around\n\t"	\
-	".set\tnoreorder\n\t"				\
-	"sync\n\t"					\
-	".set\treorder"					\
-	: /* no output */				\
-	: /* no input */				\
-	: "memory")
-#define rmb() mb()
-#define wmb() mb()
+#define __sync()				\
+	__asm__ __volatile__(			\
+		".set	push\n\t"		\
+		".set	noreorder\n\t"		\
+		"sync\n\t"			\
+		".set	pop"			\
+		: /* no output */		\
+		: /* no input */		\
+		: "memory")
+
+#define wmb()		__sync()
+#define rmb()		__sync()
+#define mb()		__sync()
+#define iob()					\
+	do {					\
+		__sync();			\
+		__asm__ __volatile__(		\
+			".set	push\n\t"	\
+			".set	noreorder\n\t"	\
+			"lw	$0,%0\n\t"	\
+			"nop\n\t"		\
+			".set	pop"		\
+			: /* no output */	\
+			: "m" (*(int *)KSEG1)	\
+			: "memory");		\
+	} while (0)
 
 #ifdef CONFIG_SMP
 #define smp_mb()	mb()


From owner-linux-mips@oss.sgi.com Mon Apr  8 10:07:08 2002
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	Mon, 8 Apr 2002 19:04:13 +0200 (MET DST)
Date: Mon, 8 Apr 2002 19:04:12 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Ralf Baechle <ralf@uni-koblenz.de>
cc: linux-mips@fnet.fr, linux-mips@oss.sgi.com
Subject: [patch] linux: New style IRQs for DECstation
Message-ID: <Pine.GSO.3.96.1020408184203.26107I-100000@delta.ds2.pg.gda.pl>
Organization: Technical University of Gdansk
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Hello,

 Here is code that implements new style IRQ handlers for DECstation. 
Beside obvious things, like mask/unmask, etc. functions it adds IRQ
routing tables for individual systems (including somewhat more complete
basic support for the 5100) so that device drivers for onboard devices do
not have to code IRQ guesswork based on model types.  I tried to make
hardware documentation more complete as well as its external sources are
scarce to say at least, so it might be best to keep bits described within
the code that deals with them. 

 Also included there are a few updates to generic code:

1. A few clean-ups to arch/mips/kernel/irq_cpu.c.  Just a five minute
approach to fix obvious things.  A deeper action is needed, in particular
locking is missing altogether.

2. A new mips_cpu option to denote the dedicated FPU exception is present
as there is currently no sane way to conclude whether it's available or
not.

3. A few missing header inclusions.

 Actually the code is nothing new, but since I'm resubmitting it and a few
people confirmed their interest in the DECstation port since the previous
submission, I'm making the patch available to the public.  I'm running the
code since mid January successfully with only a few minor fixes since
then.

 Due to a relatively large size the patch is available here:
'ftp://ftp.ds2.pg.gda.pl/pub/macro/linux/patch-mips-2.4.18-20020402-irq-48.gz'.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Apr  8 10:27:20 2002
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	Mon, 8 Apr 2002 19:16:06 +0200 (MET DST)
Date: Mon, 8 Apr 2002 19:16:05 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Ralf Baechle <ralf@uni-koblenz.de>
cc: linux-mips@fnet.fr, linux-mips@oss.sgi.com
Subject: [patch] linux: A wbflush() rework
Message-ID: <Pine.GSO.3.96.1020408190651.26107K-100000@delta.ds2.pg.gda.pl>
Organization: Technical University of Gdansk
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Sender: owner-linux-mips@oss.sgi.com
Precedence: bulk

Hello,

 Here is a rework of the wbflush() that makes code use iob() and possibly
fast_iob() where appropriate.  Additionally the DECstation __wbflush() 
backends are updated to match reality, yielding better and reliability
performance for I/O ASIC systems.  The code is needed specifically for R4k
not to generate an excessive number of spurious interrupts on DECstation. 

 The code applies on top of the "mb-wb" and "irq" patches. 

 Please apply.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

patch-mips-2.4.18-20020323-wbflush-3
diff -up --recursive --new-file linux-mips-2.4.18-20020323.macro/arch/mips/dec/Makefile linux-mips-2.4.18-20020323/arch/mips/dec/Makefile
--- linux-mips-2.4.18-20020323.macro/arch/mips/dec/Makefile	Tue Jan 22 07:32:00 2002
+++ linux-mips-2.4.18-20020323/arch/mips/dec/Makefile	Mon Feb  4 01:06:32 2002
@@ -17,9 +17,10 @@ all: dec.o
 
 export-objs := setup.o wbflush.o
 obj-y	 := int-handler.o ioasic-irq.o kn02-irq.o reset.o rtc-dec.o setup.o \
-	time.o wbflush.o
+	time.o
 
 obj-$(CONFIG_PROM_CONSOLE)	+= promcon.o
+obj-$(CONFIG_CPU_HAS_WB)	+= wbflush.o
 
 int-handler.o:	int-handler.S
 
diff -up --recursive --new-file linux-mips-2.4.18-20020323.macro/arch/mips/dec/ioasic-irq.c linux-mips-2.4.18-20020323/arch/mips/dec/ioasic-irq.c
--- linux-mips-2.4.18-20020323.macro/arch/mips/dec/ioasic-irq.c	Tue Jan 22 06:44:47 2002
+++ linux-mips-2.4.18-20020323/arch/mips/dec/ioasic-irq.c	Mon Feb  4 01:00:53 2002
@@ -84,6 +84,7 @@ static inline void ack_ioasic_irq(unsign
 	spin_lock(&ioasic_lock);
 	mask_ioasic_irq(irq);
 	spin_unlock(&ioasic_lock);
+	fast_iob();
 }
 
 static inline void end_ioasic_irq(unsigned int irq)
@@ -119,6 +120,7 @@ static struct hw_interrupt_type ioasic_i
 static inline void end_ioasic_dma_irq(unsigned int irq)
 {
 	clear_ioasic_irq(irq);
+	fast_iob();
 	end_ioasic_irq(irq);
 }
 
@@ -142,6 +144,7 @@ void __init init_ioasic_irqs(int base)
 
 	/* Mask interrupts. */
 	ioasic_write(SIMR, 0);
+	fast_iob();
 
 	for (i = base; i < base + IO_INR_DMA; i++) {
 		irq_desc[i].status = IRQ_DISABLED;
diff -up --recursive --new-file linux-mips-2.4.18-20020323.macro/arch/mips/dec/kn02-irq.c linux-mips-2.4.18-20020323/arch/mips/dec/kn02-irq.c
--- linux-mips-2.4.18-20020323.macro/arch/mips/dec/kn02-irq.c	Tue Jan 22 06:47:34 2002
+++ linux-mips-2.4.18-20020323/arch/mips/dec/kn02-irq.c	Mon Feb  4 01:01:59 2002
@@ -83,6 +83,7 @@ static void ack_kn02_irq(unsigned int ir
 	spin_lock(&kn02_lock);
 	mask_kn02_irq(irq);
 	spin_unlock(&kn02_lock);
+	iob();
 }
 
 static void end_kn02_irq(unsigned int irq)
@@ -113,6 +114,7 @@ void __init init_kn02_irqs(int base)
 	/* Mask interrupts and preset write-only bits. */
 	cached_kn02_csr = (*csr & ~0xff0000) | 0xff;
 	*csr = cached_kn02_csr;
+	iob();
 
 	for (i = base; i < base + KN02_IRQ_LINES; i++) {
 		irq_desc[i].status = IRQ_DISABLED;
diff -up --recursive --new-file linux-mips-2.4.18-20020323.macro/arch/mips/dec/setup.c linux-mips-2.4.18-20020323/arch/mips/dec/setup.c
--- linux-mips-2.4.18-20020323.macro/arch/mips/dec/setup.c	Tue Jan 22 07:31:08 2002
+++ linux-mips-2.4.18-20020323/arch/mips/dec/setup.c	Mon Feb  4 01:10:36 2002
@@ -24,6 +24,7 @@
 #include <asm/irq_cpu.h>
 #include <asm/mipsregs.h>
 #include <asm/reboot.h>
+#include <asm/wbflush.h>
 
 #include <asm/dec/interrupts.h>
 #include <asm/dec/kn01.h>
@@ -87,8 +88,6 @@ static struct irqaction fpuirq = {NULL, 
 
 static struct irqaction haltirq = {dec_intr_halt, 0, 0, "halt", NULL, NULL};
 
-
-extern void wbflush_setup(void);
 
 extern struct rtc_ops dec_rtc_ops;
 
diff -up --recursive --new-file linux-mips-2.4.18-20020323.macro/arch/mips/dec/wbflush.c linux-mips-2.4.18-20020323/arch/mips/dec/wbflush.c
--- linux-mips-2.4.18-20020323.macro/arch/mips/dec/wbflush.c	Tue Nov  6 05:26:15 2001
+++ linux-mips-2.4.18-20020323/arch/mips/dec/wbflush.c	Mon Feb  4 01:03:17 2002
@@ -11,15 +11,18 @@
  * for more details.
  *
  * Copyright (C) 1998 Harald Koerfgen
+ * Copyright (C) 2002 Maciej W. Rozycki
  */
 
-#include <asm/bootinfo.h>
 #include <linux/init.h>
 
+#include <asm/bootinfo.h>
+#include <asm/system.h>
+#include <asm/wbflush.h>
+
 static void wbflush_kn01(void);
 static void wbflush_kn210(void);
-static void wbflush_kn02ba(void);
-static void wbflush_kn03(void);
+static void wbflush_mips(void);
 
 void (*__wbflush) (void);
 
@@ -27,28 +30,23 @@ void __init wbflush_setup(void)
 {
 	switch (mips_machtype) {
 	case MACH_DS23100:
-	    __wbflush = wbflush_kn01;
-	    break;
-	case MACH_DS5100:	/*  DS5100 MIPSMATE */
-	    __wbflush = wbflush_kn210;
-	    break;
 	case MACH_DS5000_200:	/* DS5000 3max */
-	    __wbflush = wbflush_kn01;
-	    break;
+		__wbflush = wbflush_kn01;
+		break;
+	case MACH_DS5100:	/* DS5100 MIPSMATE */
+		__wbflush = wbflush_kn210;
+		break;
 	case MACH_DS5000_1XX:	/* DS5000/100 3min */
-	    __wbflush = wbflush_kn02ba;
-	    break;
-	case MACH_DS5000_2X0:	/* DS5000/240 3max+ */
-	    __wbflush = wbflush_kn03;
-	    break;
 	case MACH_DS5000_XX:	/* Personal DS5000/2x */
-	    __wbflush = wbflush_kn02ba;
-	    break;
+	case MACH_DS5000_2X0:	/* DS5000/240 3max+ */
+	default:
+		__wbflush = wbflush_mips;
+		break;
 	}
 }
 
 /*
- * For the DS3100 and DS5000/200 the writeback buffer functions
+ * For the DS3100 and DS5000/200 the R2020/R3220 writeback buffer functions
  * as part of Coprocessor 0.
  */
 static void wbflush_kn01(void)
@@ -78,29 +76,16 @@ static void wbflush_kn210(void)
 	"mtc0\t$2,$12\n\t"
 	"nop\n\t"
 	".set\tpop"
-  : : :"$2", "$3");
-}
-
-/*
- * Looks like some magic with the System Interrupt Mask Register
- * in the famous IOASIC for kmins and maxines.
- */
-static void wbflush_kn02ba(void)
-{
-    asm(".set\tpush\n\t"
-	".set\tnoreorder\n\t"
-	"lui\t$2,0xbc04\n\t"
-	"lw\t$3,0x120($2)\n\t"
-	"lw\t$3,0x120($2)\n\t"
-	".set\tpop"
-  : : :"$2", "$3");
+	: : : "$2", "$3");
 }
 
 /*
- * The DS500/2x0 doesnt need to write back the WB.
+ * I/O ASIC systems use a standard writeback buffer that gets flushed
+ * upon an uncached read.
  */
-static void wbflush_kn03(void)
+static void wbflush_mips(void)
 {
+	__fast_iob();
 }
 
 #include <linux/module.h>
diff -up --recursive --new-file linux-mips-2.4.18-20020323.macro/arch/mips/mm/c-r3k.c linux-mips-2.4.18-20020323/arch/mips/mm/c-r3k.c
--- linux-mips-2.4.18-20020323.macro/arch/mips/mm/c-r3k.c	Tue Feb 19 05:28:14 2002
+++ linux-mips-2.4.18-20020323/arch/mips/mm/c-r3k.c	Sun Mar 24 21:16:14 2002
@@ -19,7 +19,6 @@
 #include <asm/system.h>
 #include <asm/isadep.h>
 #include <asm/io.h>
-#include <asm/wbflush.h>
 #include <asm/bootinfo.h>
 #include <asm/cpu.h>
 
@@ -314,7 +313,7 @@ static void r3k_flush_cache_sigtramp(uns
 
 static void r3k_dma_cache_wback_inv(unsigned long start, unsigned long size)
 {
-	wbflush();
+	iob();
 	r3k_flush_dcache_range(start, start + size);
 }
 
diff -up --recursive --new-file linux-mips-2.4.18-20020323.macro/arch/mips/mm/c-tx39.c linux-mips-2.4.18-20020323/arch/mips/mm/c-tx39.c
--- linux-mips-2.4.18-20020323.macro/arch/mips/mm/c-tx39.c	Sat Dec  1 05:26:01 2001
+++ linux-mips-2.4.18-20020323/arch/mips/mm/c-tx39.c	Mon Feb  4 01:12:41 2002
@@ -20,7 +20,6 @@
 #include <asm/system.h>
 #include <asm/isadep.h>
 #include <asm/io.h>
-#include <asm/wbflush.h>
 #include <asm/bootinfo.h>
 #include <asm/cpu.h>
 
@@ -63,8 +62,8 @@ static void tx39h_flush_icache_all(void)
 static void tx39h_dma_cache_wback_inv(unsigned long addr, unsigned long size)
 {
 	unsigned long end, a;
-	wbflush();
 
+	iob();
 	a = addr & ~(dcache_lsize - 1);
 	end = (addr + size) & ~(dcache_lsize - 1);
 	while (1) {
diff -up --recursive --new-file linux-mips-2.4.18-20020323.macro/arch/mips/mm/tlb-r3k.c linux-mips-2.4.18-20020323/arch/mips/mm/tlb-r3k.c
--- linux-mips-2.4.18-20020323.macro/arch/mips/mm/tlb-r3k.c	Fri Jan 18 05:28:05 2002
+++ linux-mips-2.4.18-20020323/arch/mips/mm/tlb-r3k.c	Mon Feb  4 00:59:46 2002
@@ -19,7 +19,6 @@
 #include <asm/system.h>
 #include <asm/isadep.h>
 #include <asm/io.h>
-#include <asm/wbflush.h>
 #include <asm/bootinfo.h>
 #include <asm/cpu.h>
 
diff -up --recursive --new-file linux-mips-2.4.18-20020323.macro/drivers/char/dz.c linux-mips-2.4.18-20020323/drivers/char/dz.c
--- linux-mips-2.4.18-20020323.macro/drivers/char/dz.c	Sun Jan 20 21:37:53 2002
+++ linux-mips-2.4.18-20020323/drivers/char/dz.c	Mon Feb  4 01:13:30 2002
@@ -35,7 +35,6 @@
 #include <linux/param.h>
 #include <linux/tqueue.h>
 #include <linux/interrupt.h>
-#include <asm-mips/wbflush.h>
 #include <asm/dec/interrupts.h>
 
 #include <linux/console.h>
@@ -53,6 +52,8 @@
 #include <linux/fs.h>
 #include <asm/bootinfo.h>
 
+#include <asm/system.h>
+
 #define CONSOLE_LINE (3)	/* for definition of struct console */
 
 extern int (*prom_printf) (char *,...);
@@ -1420,7 +1421,7 @@ int __init dz_init(void)
 #ifndef CONFIG_SERIAL_CONSOLE
 	dz_out(info, DZ_CSR, DZ_CLR);
 	while ((tmp = dz_in(info, DZ_CSR)) & DZ_CLR);
-	wbflush();
+	iob();
 
 	/* enable scanning */
 	dz_out(info, DZ_CSR, DZ_MSE);
diff -up --recursive --new-file linux-mips-2.4.18-20020323.macro/drivers/net/declance.c linux-mips-2.4.18-20020323/drivers/net/declance.c
--- linux-mips-2.4.18-20020323.macro/drivers/net/declance.c	Sun Mar 24 20:58:18 2002
+++ linux-mips-2.4.18-20020323/drivers/net/declance.c	Sun Mar 24 21:16:14 2002
@@ -60,7 +60,7 @@ static char *lancestr = "lance";
 #include <asm/dec/machtype.h>
 #include <asm/dec/tc.h>
 #include <asm/dec/kn01.h>
-#include <asm/wbflush.h>
+#include <asm/system.h>
 #include <asm/addrspace.h>
 
 #include <linux/config.h>
@@ -306,7 +306,7 @@ int dec_lance_debug = 2;
 static inline void writereg(volatile unsigned short *regptr, short value)
 {
 	*regptr = value;
-	wbflush();
+	iob();
 }
 
 /* Load the CSR registers */
@@ -386,7 +386,7 @@ void cp_to_buf(void *to, const void *fro
 		}
 	}
 
-	wbflush();
+	iob();
 }
 
 void cp_from_buf(void *to, unsigned char *from, int len)
@@ -514,7 +514,7 @@ static void lance_init_ring(struct net_d
 		if (i < 3 && ZERO)
 			printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->rx_buf_ptr_cpu[i]);
 	}
-	wbflush();
+	iob();
 }
 
 static int init_restart_lance(struct lance_private *lp)
@@ -1084,7 +1084,7 @@ static int __init dec_lance_init(struct 
 		lp->dma_ptr_reg = (unsigned long *) (system_base + IOCTL + LANCE_DMA_P);
 		*(lp->dma_ptr_reg) = PHYSADDR(dev->mem_start) << 3;
 		*(unsigned long *) (system_base + IOCTL + SSR) |= (1 << 16);
-		wbflush();
+		fast_iob();
 
 		break;
 	case PMAD_LANCE:
diff -up --recursive --new-file linux-mips-2.4.18-20020323.macro/drivers/scsi/NCR53C9x.h linux-mips-2.4.18-20020323/drivers/scsi/NCR53C9x.h
--- linux-mips-2.4.18-20020323.macro/drivers/scsi/NCR53C9x.h	Fri Oct 19 04:29:11 2001
+++ linux-mips-2.4.18-20020323/drivers/scsi/NCR53C9x.h	Mon Feb  4 01:14:34 2002
@@ -144,12 +144,7 @@
 
 #ifndef MULTIPLE_PAD_SIZES
 
-#ifdef CONFIG_CPU_HAS_WB
-#include <asm/wbflush.h>
-#define esp_write(__reg, __val) do{(__reg) = (__val); wbflush();} while(0)
-#else
-#define esp_write(__reg, __val) ((__reg) = (__val))
-#endif
+#define esp_write(__reg, __val) do{(__reg) = (__val); iob();} while(0)
 #define esp_read(__reg) (__reg)
 
 struct ESP_regs {
diff -up --recursive --new-file linux-mips-2.4.18-20020323.macro/drivers/scsi/dec_esp.c linux-mips-2.4.18-20020323/drivers/scsi/dec_esp.c
--- linux-mips-2.4.18-20020323.macro/drivers/scsi/dec_esp.c	Tue Jan 22 03:06:51 2002
+++ linux-mips-2.4.18-20020323/drivers/scsi/dec_esp.c	Mon Feb  4 01:15:48 2002
@@ -46,6 +46,8 @@
 #include <asm/dec/ioasic_ints.h>
 #include <asm/dec/machtype.h>
 
+#include <asm/system.h>
+
 /*
  * Once upon a time the pmaz code used to be working but
  * it hasn't been maintained for quite some time.
@@ -308,17 +310,9 @@ static void scsi_dma_err_int(int irq, vo
 
 static void scsi_dma_int(int irq, void *dev_id, struct pt_regs *regs)
 {
-	volatile unsigned int *dummy = (volatile unsigned int *)KSEG1;
-
 	/* next page */
 	*scsi_next_ptr = ((*scsi_dma_ptr + PAGE_SIZE) & PAGE_MASK) << 3;
-
-	/*
-	 * This routine will only work on IOASIC machines
-	 * so we can avoid an indirect function call here
-	 * and flush the writeback buffer the fast way
-	 */
-	*dummy;
+	fast_iob();
 }
 
 static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
@@ -370,8 +364,6 @@ static void dma_dump_state(struct NCR_ES
 
 static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length)
 {
-	volatile unsigned int *dummy = (volatile unsigned int *)KSEG1;
-
 	if (vaddress & 3)
 		panic("dec_efs.c: unable to handle partial word transfers, yet...");
 
@@ -384,17 +376,11 @@ static void dma_init_read(struct NCR_ESP
 	/* prepare for next page */
 	*scsi_next_ptr = ((vaddress + PAGE_SIZE) & PAGE_MASK) << 3;
 	*ioasic_ssr |= (SCSI_DMA_DIR | SCSI_DMA_EN);
-
-	/*
-	 * see above
-	 */
-	*dummy;
+	fast_iob();
 }
 
 static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length)
 {
-	volatile unsigned int *dummy = (volatile unsigned int *)KSEG1;
-
 	if (vaddress & 3)
 		panic("dec_efs.c: unable to handle partial word transfers, yet...");
 
@@ -407,11 +393,7 @@ static void dma_init_write(struct NCR_ES
 	/* prepare for next page */
 	*scsi_next_ptr = ((vaddress + PAGE_SIZE) & PAGE_MASK) << 3;
 	*ioasic_ssr |= SCSI_DMA_EN;
-
-	/*
-	 * see above
-	 */
-	*dummy;
+	fast_iob();
 }
 
 static void dma_ints_off(struct NCR_ESP *esp)
diff -up --recursive --new-file linux-mips-2.4.18-20020323.macro/drivers/tc/zs.c linux-mips-2.4.18-20020323/drivers/tc/zs.c
--- linux-mips-2.4.18-20020323.macro/drivers/tc/zs.c	Sun Mar 24 21:02:44 2002
+++ linux-mips-2.4.18-20020323/drivers/tc/zs.c	Sun Mar 24 21:16:14 2002
@@ -67,7 +67,6 @@
 #include <asm/segment.h>
 #include <asm/bitops.h>
 #include <asm/uaccess.h>
-#include <asm/wbflush.h>
 #include <asm/bootinfo.h>
 #ifdef CONFIG_DECSTATION
 #include <asm/dec/interrupts.h>
@@ -276,7 +275,7 @@ static inline unsigned char read_zsreg(s
 
 	if (reg != 0) {
 		*channel->control = reg & 0xf;
-		wbflush(); RECOVERY_DELAY;
+		fast_iob(); RECOVERY_DELAY;
 	}
 	retval = *channel->control;
 	RECOVERY_DELAY;
@@ -288,10 +287,10 @@ static inline void write_zsreg(struct de
 {
 	if (reg != 0) {
 		*channel->control = reg & 0xf;
-		wbflush(); RECOVERY_DELAY;
+		fast_iob(); RECOVERY_DELAY;
 	}
 	*channel->control = value;
-	wbflush(); RECOVERY_DELAY;
+	fast_iob(); RECOVERY_DELAY;
 	return;
 }
 
@@ -308,7 +307,7 @@ static inline void write_zsdata(struct d
 				unsigned char value)
 {
 	*channel->data = value;
-	wbflush(); RECOVERY_DELAY;
+	fast_iob(); RECOVERY_DELAY;
 	return;
 }
 


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Subject: Re: [patch] linux: New style IRQs for DECstation
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What is the intention of introducing MIPS_CPU_FPUEX?  It seems an overkill if 
it is just needed by DecStation.  How many CPUs really need this?


Jun

Maciej W. Rozycki wrote:

> Hello,
> 
>  Here is code that implements new style IRQ handlers for DECstation. 
> Beside obvious things, like mask/unmask, etc. functions it adds IRQ
> routing tables for individual systems (including somewhat more complete
> basic support for the 5100) so that device drivers for onboard devices do
> not have to code IRQ guesswork based on model types.  I tried to make
> hardware documentation more complete as well as its external sources are
> scarce to say at least, so it might be best to keep bits described within
> the code that deals with them. 
> 
>  Also included there are a few updates to generic code:
> 
> 1. A few clean-ups to arch/mips/kernel/irq_cpu.c.  Just a five minute
> approach to fix obvious things.  A deeper action is needed, in particular
> locking is missing altogether.
> 
> 2. A new mips_cpu option to denote the dedicated FPU exception is present
> as there is currently no sane way to conclude whether it's available or
> not.
> 
> 3. A few missing header inclusions.
> 
>  Actually the code is nothing new, but since I'm resubmitting it and a few
> people confirmed their interest in the DECstation port since the previous
> submission, I'm making the patch available to the public.  I'm running the
> code since mid January successfully with only a few minor fixes since
> then.
> 
>  Due to a relatively large size the patch is available here:
> 'ftp://ftp.ds2.pg.gda.pl/pub/macro/linux/patch-mips-2.4.18-20020402-irq-48.gz'.
> 
>   Maciej
> 
> 



From owner-linux-mips@oss.sgi.com Mon Apr  8 11:03:19 2002
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From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Jun Sun <jsun@mvista.com>
cc: Ralf Baechle <ralf@uni-koblenz.de>, linux-mips@fnet.fr,
   linux-mips@oss.sgi.com
Subject: Re: [patch] linux: New style IRQs for DECstation
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On Mon, 8 Apr 2002, Jun Sun wrote:

> What is the intention of introducing MIPS_CPU_FPUEX?  It seems an overkill if 
> it is just needed by DecStation.  How many CPUs really need this?

 It's needed by any system using a (logically) external FPU.  If set it
means there is no need to install a special FPU exception handler using a
general-purpose interrupt line.  It's a generic flag. 

 Even if it's only of limited use now, it is not an excuse for not writing
clean code.  I'm afraid the current mess within the MIPS port is a result
of people trying to think locally and I'm trying to avoid it.  Are there
any trade-offs of this flags you see and I don't?  I'm willing to change
the code if there really are. 

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Apr  8 11:25:55 2002
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Maciej W. Rozycki wrote:

> On Mon, 8 Apr 2002, Jun Sun wrote:
> 
> 
>>What is the intention of introducing MIPS_CPU_FPUEX?  It seems an overkill if 
>>it is just needed by DecStation.  How many CPUs really need this?
>>
> 
>  It's needed by any system using a (logically) external FPU.  If set it
> means there is no need to install a special FPU exception handler using a
> general-purpose interrupt line.  It's a generic flag. 
> 
>  Even if it's only of limited use now, it is not an excuse for not writing
> clean code.  I'm afraid the current mess within the MIPS port is a result
> of people trying to think locally and I'm trying to avoid it.  Are there
> any trade-offs of this flags you see and I don't?  I'm willing to change
> the code if there really are. 
> 


Generally interrupt dispatching belongs to machine/board-specific code.  So I 
think FPU exeption through an interrupt is probably best handled within DEC's 
code, instead of being generalized to the common code.

In addition, conceptional you might have a system where FPU exception is 
handled through an interrupt and yet CPU has FPU exception.

Of course abstraction and generalization can happen later when it becomes 
obvious.  It is just not obvious, at least to me.

Jun





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Hi,
Where can I download the latest development kernel for MIPS?
Thanks,
Muthu.





From owner-linux-mips@oss.sgi.com Tue Apr  9 01:50:44 2002
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On Mon, Apr 08, 2002 at 09:33:57PM -0700, Muthukumar Ratty wrote:

> Where can I download the latest development kernel for MIPS?

cvs -d :pserver:cvs@oss.sgi.com:/cvs login
(no password)
cvs -z4 -d :pserver:cvs@oss.sgi.com:/cvs co linux

or if you would like to get kernel version 2.4.x:

cvs -z4 -d :pserver:cvs@oss.sgi.com:/cvs co -r linux_2_4 linux

HTH,
Karsten
-- 
#include <standard_disclaimer>
Nach Paragraph 28 Abs. 3 Bundesdatenschutzgesetz widerspreche ich der Nutzung
oder Uebermittlung meiner Daten fuer Werbezwecke oder fuer die Markt- oder
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From owner-linux-mips@oss.sgi.com Tue Apr  9 07:44:40 2002
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From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Jun Sun <jsun@mvista.com>
cc: Ralf Baechle <ralf@uni-koblenz.de>, linux-mips@fnet.fr,
   linux-mips@oss.sgi.com
Subject: Re: [patch] linux: New style IRQs for DECstation
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On Mon, 8 Apr 2002, Jun Sun wrote:

> Generally interrupt dispatching belongs to machine/board-specific code.  So I 
> think FPU exeption through an interrupt is probably best handled within DEC's 
> code, instead of being generalized to the common code.

 The dispatching of the FPU interrupt for the DECstation is local to
DEC-specific code (note that it's so mainly due to performance reasons
anyway -- there is no problem with making dispatcher's code common with
appropriate backends installed for different IRQ types, like it is already
done in generic controller-based IRQ handling code).  Any other system
using a CPU/FPU in such a configuration has to provide its own dispatcher.
The handler for the FPU interrupt is the very same handler used for the
FPU exception; only a different entry point is used to accomodate the fact
registers are already saved on the stack. 

 And for safety you don't want the FPU exception handler to be enabled for
FPUs that report exceptions via an FPU interrupt.  For such systems a
spurious FPU exception should be treated as a system error.

> In addition, conceptional you might have a system where FPU exception is 
> handled through an interrupt and yet CPU has FPU exception.

 Not quite.  The FPU exception is not maskable, so you can't make a choice
at the run time.  It has to be hardwired. 

> Of course abstraction and generalization can happen later when it becomes 
> obvious.  It is just not obvious, at least to me.

 MIPS_CPU_FPUEX is specific to the CPU not to the system.  IDT R3081 is
another example (mysterious R3400 used in DECstation 5000/240 being the
first one) of a CPU with an integrated FPU unit which is logically
external and uses an interrupt to report FPU exceptions.  And all R2k/R3k
setups using a physically separate FPU deliver FPU exceptions via an
interrupt line.  I can't see a reason why to handle this option in
system-specific code.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Tue Apr  9 10:36:26 2002
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Maciej W. Rozycki wrote:

> I can't see a reason why to handle this option in
> system-specific code.
> 


How about "there will be likely no such CPUs/systems in the future"?

Your patch will force every new CPU to add FPUEX option to the cpu_option, 
where apparently no place really need to use it.


Leaving FPU exception enabled for a CPU that does not generate FPU exception 
is acceptable. (because it does *not* generate FPU exceptions).  And hooking 
up/dispatching the FPU exception interrupt is system-specific already anyway.

It, however, makes sense to provide a common wrapper code for fpu interrupt to 
jump to fpu exception handling code.

Over-abstraction can make the picture cloudy rather than clear.  My 2 cents.

Jun


From owner-linux-mips@oss.sgi.com Tue Apr  9 19:13:48 2002
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From: Rani Assaf <rani@paname.org>
Date: Wed, 10 Apr 2002 04:14:08 +0200
To: linux-mips@oss.sgi.com
Subject: Question about r4k_clear_page_xxx()
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Hi,

I was cleaning  duplicate code between my port of  IDT RC32355 and the
current tree. I want to use r4k_clear_page_d16() but the function uses
store double (sd) which is not available on this processor.

What's the reason for having r4k_clear_page_xxx() use store double and
not r4k_copy_page_xxx()??

Regards,
Rani

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On Wed, Apr 10, 2002 at 04:14:08AM +0200, Rani Assaf wrote:
> Hi,
>=20
> I was cleaning  duplicate code between my port of  IDT RC32355 and the
> current tree. I want to use r4k_clear_page_d16() but the function uses
> store double (sd) which is not available on this processor.
>=20
> What's the reason for having r4k_clear_page_xxx() use store double and
> not r4k_copy_page_xxx()??

Just from my guess - r4k_copy_page will pollute the d-cache with the
empty page you are reading. You have twice as much instruction (load +
store) which effectively will give you half the performance.

If "sd" is not available you might want to implement your clear_page
with sw zero, x(a0) like the sd version.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
Nine nineth on september the 9th              Welcome to the new billenium

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From owner-linux-mips@oss.sgi.com Wed Apr 10 06:31:38 2002
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Date: Wed, 10 Apr 2002 15:31:07 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Jun Sun <jsun@mvista.com>
cc: Ralf Baechle <ralf@uni-koblenz.de>, linux-mips@fnet.fr,
   linux-mips@oss.sgi.com
Subject: Re: [patch] linux: New style IRQs for DECstation
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On Tue, 9 Apr 2002, Jun Sun wrote:

> How about "there will be likely no such CPUs/systems in the future"?

 Does it mean code needs to be dirty?  There is no performance hit for new
CPUs and the code bloat is minimal and even that is discarded after boot.

> Your patch will force every new CPU to add FPUEX option to the cpu_option, 
> where apparently no place really need to use it.

 Well, I agree to some extent here.  I may negate the flag, so it's not
needed for most CPUs.

> Leaving FPU exception enabled for a CPU that does not generate FPU exception 
> is acceptable. (because it does *not* generate FPU exceptions).  And hooking 

 You never know.  You may get one due to a hardware fault.  It's better to
trap it and panic then, than to try to pretend nothing special happened.

> up/dispatching the FPU exception interrupt is system-specific already anyway.

 But pretty generic -- you just need to grab the right IRQ line.  See the
top of decstation_handle_int in arch/mips/dec/int-handler.S -- nothing
system-specific until after the FPU path branch.  You may cut and paste it
for any other system.

> It, however, makes sense to provide a common wrapper code for fpu interrupt to 
> jump to fpu exception handling code.

 No additional code is actually generated -- only a label for a second
entry point is added.

> Over-abstraction can make the picture cloudy rather than clear.  My 2 cents.

 I appreciate your point of view.  You haven't convinced me, though. 
Apart from the negation of MIPS_CPU_FPUEX, which sounds reasonable indeed. 

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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	id 5216D125C3; Wed, 10 Apr 2002 12:50:21 -0700 (PDT)
Date: Wed, 10 Apr 2002 12:50:20 -0700
From: "H . J . Lu" <hjl@lucon.org>
To: linux-gcc@vger.kernel.org, gcc@gcc.gnu.org,
   GNU C Library <libc-alpha@sources.redhat.com>,
   Kenneth Albanowski <kjahds@kjahds.com>, Mat Hostetter <mat@lcs.mit.edu>,
   Andy Dougherty <doughera@lafcol.lafayette.edu>,
   Warner Losh <imp@village.org>, linux-mips@oss.sgi.com,
   Ron Guilmette <rfg@monkeys.com>,
   "Polstra; John" <linux-binutils-in@polstra.com>,
   "Hazelwood; Galen" <galenh@micron.net>,
   Ralf Baechle <ralf@informatik.uni-koblenz.de>,
   Linas Vepstas <linas@linas.org>, Feher Janos <aries@hal2000.terra.vein.hu>,
   Leonard Zubkoff <lnz@dandelion.com>, "Steven J. Hill" <sjhill@cotw.com>
Subject: The Linux binutils 2.12.90.4 is released.
Message-ID: <20020410125020.A10642@lucon.org>
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This is the beta release of binutils 2.12.90.0.4 for Linux, which is
based on binutils 2002 0408 in CVS on sourecs.redhat.com plus various
changes. It is purely for Linux.

The Linux/mips support is added. You have to use

# rpm --target=[mips|mipsel] -ta binutils-xx.xx.xx.xx.xx.tar.gz

to build it. Or you can read mips/README in the source tree to apply
the mips patches and build it by hand.

FYI, the binutils man pages now are generated from the texinfo files
during the build. As the result, those man pages may be changed for
each build even if you only have done

# ..../configure ...
# make

That means you may have many failures on the man pages when you apply
the binutils diffs next time. Those failures can be safely ignored.
You should remove all those man pages from your source tree by

# find -name *.1 | xargs rm -f
# find -name *.1.rej | xargs rm -f
# find -name *.man | xargs rm -f
# find -name *.man.rej | xargs rm -f

I am planning to make the public release soon. Please test it as much
as you can.

Please report any bugs related to binutils 2.12.90.0.4 to hjl@lucon.org.

For arm-linux targets, there are some important differences in behaviour 
between these tools and binutils 2.9.1.0.x.  The linker emulation name has 
changed from elf32arm{26} to armelf_linux{26}.  Also, the "-p" flag must be 
passed with the linker when working with object files (or static libraries) 
created using older versions of the assembler.  If this flag is omitted the 
linker will silently generate bad output when given old input files.

To get the correct behaviour from gcc, amend the *link section of your specs 
file as follows:

*link:
%{h*} %{version:-v}    %{b} %{Wl,*:%*}    %{static:-Bstatic}    %{shared:-shared}    %{symbolic:-Bsymbolic}    %{rdynamic:-export-dynamic}    %{!dynamic-linker: -dynamic-linker /lib/ld-linux.so.2}    -X    %{mbig-endian:-EB} %{mapcs-26:-m armelf_linux26} %{!mapcs-26:-m armelf_linux} -p


Changes from binutils 2.12.90.0.3:

1. Update from binutils 2002 0408.
2. Bug fixes for ELF/sparc.
3. Bug fixes for ELF/CRIS.

Changes from binutils 2.12.90.0.1:

1. Update from binutils 2002 0323.
2. Fix linking a.out relocatable files with ELF.
3. Fix a PPC altivec assembler bug.

Changes from binutils 2.11.93.0.2:

1. Update from binutils 2002 0307.
2. Add the .preinit_array/.init_array/.fini_array support.
3. Fix eh_frame.
4. Turn on combreloc by default.
5. Enable gprof for Linux/mips.

Changes from binutils 2.11.92.0.12.3:

1. Update from binutils 2002 0207.
2. Fix a weak symbol alpha linker bug for glibc.
3. More support for gcc 3.1.

Changes from binutils 2.11.92.0.12:

1. Fix a regression in 2.11.92.0.12 when linking with none-ELF object
files.

Changes from binutils 2.11.92.0.10:

1. Update from binutils 2001 1121.
2. Fix a linker symbol version bug for common symbols.
3. Update handling relocations against the discarded sections. You may
need to apply the kernel patch enclosed here to your kernel source. If
you still see things like

drivers/char/char.o(.data+0x46b4): undefined reference to `local symbols in discarded section .text.exit'

in the final kernel link, that means you have compiled a driver into
the kernel which has a reference to the symbol in a discarded section.
Kernel 2.4.17 or above should work fine.

4. Support "-march=xxx -mipsN" for mips gas if they are compatible.

Changes from binutils 2.11.92.0.7:

1. Update from binutils 2001 1021.
2. Fix the ELF/PPC linker.
3. Fix the ELF/cris linker.
4. Fix ELF strip.

Changes from binutils 2.11.92.0.5:

1. Update from binutils 2001 1016.
2. Fix all breakages introduced in 2.11.92.0.12.

Changes from binutils 2.11.90.0.31:

1. Update from binutils 2001 1005.
2. Support gcc 3.1 for ia64.
3. Support prelink for ELF/PPC.
4. Fix an ELF/x86 linker bug for Oracle.
5. Fix a weak symbol bug.
6. Support locale.

Changes from binutils 2.11.90.0.29:

1. Update from binutils 2001 0830.
2. Fix a mips linker bug.

Changes from binutils 2.11.90.0.27:

1. Update from binutils 2001 0827.
2. Fix an alpha assembler bug.
3. Fix an ia64 linker bug.
4. Fix a mips linker bug.
5. Support `-z combreloc|nocombreloc' in linker.

Changes from binutils 2.11.90.0.25:

1. Update from binutils 2001 0810.
2. Fix an x86 linker bug.

Changes from binutils 2.11.90.0.24:

1. Update from binutils 2001 0726.
2. Fix an x86 assembler bug.
3. "make check" in the windres test in binutils may call uudecode. We
are working on it.
4. "make check" fails the windres test in binutils if the i386/pe
is enabled in bfd. Fixed in the next release.
5. "make check" has 2 failures in the ld-selective test in ld on
Linux/alpha. They should be marked xfail. Fixed in the next release.

Changes from binutils 2.11.90.0.23:

1. Update from binutils 2001 0714.
2. Fix Sparc/ElF for Linux/sparc.
3. Fix Alpha/ELF for gcc 3.0.

Changes from binutils 2.11.90.0.19:

1. Update from binutils 2001 0706.
2. Fix objcopy/strip broken by accident.
3. Avoid COPY relocs on ia32.
4. Fix the ia64 assembler.
5. This release may not work on Linux/sparc due to the unaligned
relocation changes, which are not handled by all versions of glibc.
The current glibc in CVS on sourceware should be ok. The last known
working binutils for Linux/sparc is 2.11.90.0.8. We are working on it.

Changes from binutils 2.11.90.0.15:

1. Update from binutils 2001 0620.
2. Fix a static linking the PIC object files on ia32.
3. Add the verion script support for --export-dynamic. It can be used
to selectively export dynamic symbols from the executables.

Changes from binutils 2.11.90.0.8:

1. Update from binutils 2001 0610.
2. Fix a gas bug for gcc 3.0.

Changes from binutils 2.11.90.0.7:

1. Update from binutils 2001 0512.
2. Fix some P/III SSE 2 assembler bugs.
3. Fix DT_NEEDED and symbol version bugs.
4. Support hidden versioned symbols in DSOs.

Changes from binutils 2.11.90.0.6:

1. Update from binutils 2001 0427.
2. Fix the -Bsymbolic bug introduced in binutils 2.11.90.0.5.

Changes from binutils 2.11.90.0.5:

1. Update from binutils 2001 0425.
2. Update "ld --multilib-dir PATH".

Changes from binutils 2.11.90.0.4:

1. Update from binutils 2001 0414.
2. Fix an ia64 assembler bug.
3. Change Linux/MIPS to use the SVR4 MIPS ABI instead of the IRIX ABI.
since there are no supports for the IRIX ABI in glibc. The current
Linux/MIPS targets are elf64-tradlittlemips for little endian MIPS
instead of elf32-littlemips and elf64-tradbigmips for big endian MIPS
instead of elf32-bigmips. Glibc, gcc and kernel may have to be modified
for this change. 

Changes from binutils 2.11.90.0.1:

1. Update from binutils 2001 0401.
2. Fix a gas bug for the gcc from the CVS main trunk. It involves some
changes in gas. I compiled kernel 2.2.18, gcc and glibc under
Linux/ia32. The resulting binaries work fine. 
3. Fix the linker core dump on unsupported ELF binaries.

Changes from binutils 2.10.91.0.4:

1. Update from binutils 2001 0309.

Changes from binutils 2.10.91.0.2:

1. Update from binutils 2001 0223.
2. More ia64 bug fixes.

Changes from binutils 2.10.1.0.7:

1. Update from binutils 2001 0215.
2. More ia64 bug fixes. Support EFI and "ld -relax" on ia64.
3. Fix a weak definition, -Bsymbolic, non-PIC bug for ia32.

Changes from binutils 2.10.1.0.4:

1. Update from binutils 2001 0206.
2. Enable the IA64 support.
3. Now you need to use

# ld --oformat TARGET

instead of

# ld -oformat TARGET

The Linux kernel build may be affected. BTW

# ld --oformat TARGET

should work with all previous releases of binutils.

Changes from binutils 2.10.1.0.2:

1. Update from binutils 2000 1221.

Changes from binutils 2.10.0.33:

1. Update from binutils 2000 1119.
2. It has some symbol versioning related updates.

Changes from binutils 2.10.0.32:

1. Update from binutils 2000 1018.
2. A proper ELF/PPC visibility fix.
3. m68k-a.out is supposed to be fixed.

Changes from binutils 2.10.0.31:

1. Update from binutils 2000 1014.
2. An ELF/PPC weak symbol bug fix.
3. A new linkonce section name approach.
4. m68k-a.out is still broken. To be fixed.

Changes from binutils 2.10.0.29:

1. Update from binutils 2000 1011.
2. Back out the linkonce section name change so that C++ will work.
A different approach is being worked on.
3. m68k-a.out is known to be broken. To be fixed.

Changes from binutils 2.10.0.26:

1. Update from binutils 2000 1008.

Changes from binutils 2.10.0.24:

1. Update from binutils 2000 0907.

Changes from binutils 2.10.0.18:

1. Update from binutils 2000 0823. Fix DT_RPATH/DT_RUNPATH handling.
Fix the ELF/ia32 DSO not compiled with PIC.
2. Try to fix the ELF visibility bug on PPC with glibc 2.2.

Changes from binutils 2.10.0.12:

1. Update from binutils 2000 0720.
2. Fix the DT_NEEDED link bug.
3. Add the new DT_XXXX dynamic tags. Glibc 2.2 will use them at least
on libpthread.so.

Changes from binutils 2.10.0.9:

1. Update from binutils 2000 0701. Fix the parallel build in ld when PE
is enabled.

Changes from binutils 2.9.5.0.46:

1. Update from binutils 2000 0617. The demangler support for the new
g++ ABI. Minor fix for the ELF visibility. Fix linking non-ELF
relocatable object files under ELF with symbol versioning.
2. Support for linking PE relocatable object files under ia32/ELF.

Changes from binutils 2.9.5.0.42:

1. Update from binutils 2000 0604. The ELF visibility attribuite should
work correctly now.
2. The ia32 assembler has changed the way it assembles the "jmp"
instructions to the global symbols. The old assembler will optimize the
jump to the global symbol defined in the same source file so that no
relocation will be used. The new assembler will use relocation for
global jumps. It will mainly affect PIC asm code. The segment like

	.globl  __setjmp
__setjmp:
	...
	jmp __sigsetjmp
	...
	.globl __sigsetjmp
__sigsetjmp:

is no longer PIC safe since "jmp __sigsetjmp" jumps to a global symbol
and relocation will be used. Instead, it can be changed to

	.globl  __setjmp
__setjmp:
	...
	jmp sigsetjmp
	...
	.globl __sigsetjmp
__sigsetjmp:
sigsetjmp:

so that "jmp sigsetjmp" jumps to a local symbol and the new assembler
will optimize out the relocation.

Changes from binutils 2.9.5.0.41:

1. Update from binutils 2000 0512.
2. Add testsuite for ELF visibility.

Changes from binutils 2.9.5.0.37:

1. Update from binutils 2000 0502.
2. Support STV_HIDDEN and STV_INTERNAL.

Changes from binutils 2.9.5.0.35:

1. Update from binutils 2000 0418.
2. Fix an ld demangle style option bug.

Changes from binutils 2.9.5.0.34:

1. Update from binutils 2000 0412. Fix a relocation bug which affects
the Linux kernel compilation.
2. An ELF/PPC linker script update.

Changes from binutils 2.9.5.0.33:

1. Update from binutils 2000 0404. Fix the bug report bug.

Changes from binutils 2.9.5.0.32:

1. Update from binutils 2000 0403. Fix the 16bit ia32 assembler bug.

Changes from binutils 2.9.5.0.31:

1. Update from binutils 2000 0331. Fix the Linux/ARM assembler bug.
2. Fix a Debian assembler security bug.

Changes from binutils 2.9.5.0.29:

1. Update from binutils 2000 0319.
2. An ELF/alpha bug is fixed.

Changes from binutils 2.9.5.0.27:

1. Update from binutils 2000 0301.
2. A demangler bug is fixed.
3. A better fix for undefined symbols with -Bsymbolic when building
shared library.

Changes from binutils 2.9.5.0.24:

1. Update from binutils 2000 0204.
2. Added -taso to linker on alpha.
3. Fixed a -shared -Bsymbolic bug when PIC is not used.

Changes from binutils 2.9.5.0.22:

1. Update from binutils 2000 0113.
2. A symbol version bug is fixed.
3. A -Bsymbolic bug is fixed.

Changes from binutils 2.9.5.0.21:

1. Update from binutils 1999 1202.
2. Remove a MIPS/ELF change.
3. Enable SOM for HPPA.

Changes from binutils 2.9.5.0.19:

1. Update from binutils 1999 1122. An ia32 gas bug is fixed.

Changes from binutils 2.9.5.0.16:

1. Update from binutils 1999 1104.
2. i370 is changed to use EM_S370 and ELFOSABI_LINUX. Update readelf.
3. Fix Compaq's demangler support.

Changes from binutils 2.9.5.0.14:

1. Update from binutils 1999 1012. A gas bug which affects Linux 2.3.21
is fixed.
2. i370 update.
3. The new demangler code. You should use "--style=xxx" to select the
demnangle style instead of "--lang=xxx".

Changes from binutils 2.9.5.0.13:

1. Update from binutils 1999 0925.
2. Fix a -s and linker script bug.

Changes from binutils 2.9.5.0.12:

1. Update from binutils 1999 0922.
2. i370 update.

Changes from binutils 2.9.5.0.11:

1. Update from binutils 1999 0910. It fixed a PIC linker bug on ix86
   and sparc introduced in the last release.
2. i370 update.

Changes from binutils 2.9.5.0.10:

1. Update from binutils 1999 0906. It fixed a PIC linker bug on ix86
   and sparc.
2. Remove elf/hppa since it is WIP.

Changes from binutils 2.9.5.0.8:

1. Update from binutils 1999 0831. It allows spaces around '(' and ')'
   in x86 FP register names.

Changes from binutils 2.9.5.0.7:

1. Update from binutils 1999 0821.
2. Some MIPS changes.

Changes from binutils 2.9.5.0.6:

1. Update from binutils 1999 0813.
2. i370 update.

Changes from binutils 2.9.5.0.5:

1. Update from binutils 1999 0809. An ELF/Sparc ld bug is fixed.

Changes from binutils 2.9.5.0.4:

1. Update from binutils 1999 0806. A Solaris/Sparc gas bug is fixed.
2. Remove mips gas patches from binutils 2.9.1.0.25.

Changes from binutils 2.9.5.0.3:

1. Update from binutils 1999 0801.
2. Support for real mode x86 gcc.

Changes from binutils 2.9.4.0.8:

1. Update from binutils 1999 0719. A libc 5 related bug fix.
2. Fix a typo in mips gas.

Changes from binutils 2.9.4.0.7:

1. Update from binutils 1999 0710. A weak symbol bug

http://egcs.cygnus.com/ml/egcs-bugs/1999-07/msg00129.html

is fixed.

Changes from binutils 2.9.4.0.6:

1. Update from binutils 1999 0626.

Changes from binutils 2.9.4.0.5:

1. Update from binutils 1999 0620.
2. Remove my fwait fix and use the one in cvs.
3. Use "--only-section=section" instead of "--extract-section=section".
   for objcopy.

Changes from binutils 2.9.4.0.4:

1. Update from binutils 1999 0612.
2. Remove various temporary fixes of mine since those bugs are fixed
   now.

Changes from binutils 2.9.4.0.3:

1. Update from binutils 1999 0611.
2. Remove my ELF/Alpha bfd changes.
3. Use the local symbol copy fix in binutils 1999 0611.

Changes from binutils 2.9.4.0.2:

1. Update from binutils 1999 0607.
2. Remove my Sparc hacks.
3. Fix local symbol copy.

Changes from binutils 2.9.4.0.1:

1. Update from binutils 1999 0606.
2. Restore relocation overflow checking in binutils 2.9.1.0.25 so that
   Linux kernel can build.
3. Fix i370 for the new gas.

Changes from binutils 1999 0605:

1. Fix a -Bsymbolic bug for Linux/alpha.
2. Add ELF/i370.
3. Fix 8/16-bit relocations for i386.
4. Add --redefine-sym=old_form=new_form to objcopy.
5. Add "-j section" for objcopy.
6. Fix i386 disassembler for fwait.
7. Fix a Sparc asm bug.
8. Add Ada demangle support.
9. Fix MIPS/ELF bugs.
10. Add some vxworks suppport.
11. Fix a.out assembler.

The file list:

1. binutils-2.12.90.0.4.tar.gz. Source code.
2. binutils-2.12.90.0.3-2.12.90.0.4.diff.gz. Patch against the
   previous beta source code.
3. binutils-2.12.90.0.4-1.i386.rpm. IA-32 binary RPM for RedHat 7.2.

There is no separate source rpm. You can do

# rpm -ta binutils-2.12.90.0.4.tar.gz

to create both binary and source rpms.

The primary sites for the beta Linux binutils are:

1. http://ftp.kernel.org/pub/linux/devel/binutils/

Thanks.


H.J. Lu
hjl@lucon.org
04/10/2002

From owner-linux-mips@oss.sgi.com Wed Apr 10 18:41:37 2002
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From owner-linux-mips@oss.sgi.com Thu Apr 11 22:03:38 2002
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From: Ralf Baechle <ralf@oss.sgi.com>
To: Rani Assaf <rani@paname.org>
Cc: linux-mips@oss.sgi.com
Subject: Re: Question about r4k_clear_page_xxx()
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On Wed, Apr 10, 2002 at 04:14:08AM +0200, Rani Assaf wrote:

> I was cleaning  duplicate code between my port of  IDT RC32355 and the
> current tree. I want to use r4k_clear_page_d16() but the function uses
> store double (sd) which is not available on this processor.
> 
> What's the reason for having r4k_clear_page_xxx() use store double and
> not r4k_copy_page_xxx()??

The 32-bit kernel doesn't save or restore the upper 32-bits of general
purpose registers.  Therefore 64-bit stores can only be used with the
$zero register.

  Ralf

From owner-linux-mips@oss.sgi.com Thu Apr 11 23:54:51 2002
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Hi, All:

I can't access the archive of this mailing list.  The server reponsed 
following message to me.  Will someone fix it?

Forbidden
You don't have permission to access /mips/archive/ on this server.



From owner-linux-mips@oss.sgi.com Fri Apr 12 00:29:05 2002
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Hi, everybody:
I'm working on porting Linux to a MIPS based processor whose IP is from 
Lexra's LX4189 processor.

I started my work from the linux MIPS port of oss.sgi.com.  Right now 
the kernel can boot and run some user applications well.

But I met a problem that once a process raises any kind of signal, 
kernel will send a SIGILL signal to the process which let the process stop.

I traced the kernel source and found SIGILL is sent by the exception 
handler, do_ri().

The problem is very weird because when I change to another crosscompiler 
or insert some asserting code to functions in signal.c.  The kernel 
become unbootable.  I hope someone can give me directions to solve this 
bug or tell me who already done Linux on Lexra?


kernel version:2.4.17.
toolchain: GCC 3.1 from ftp.cotw.com.
use new IRQ and new timer interface.




From owner-linux-mips@oss.sgi.com Fri Apr 12 04:41:02 2002
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----- Original Message -----
From: "Tim Wu" <chtimwu@libra.seed.net.tw>
To: "linux-mips" <linux-mips@oss.sgi.com>
Sent: Friday, April 12, 2002 3:29 AM
Subject: LEXRA MIPS


> I traced the kernel source and found SIGILL is sent by the exception
> handler, do_ri().

Can you tell what/where the reserved (illegal) instruction is that causes
the trap?

Regards,
Brad


From owner-linux-mips@oss.sgi.com Fri Apr 12 09:42:47 2002
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Date: Fri, 12 Apr 2002 12:41:28 -0500
From: Scott A McConnell <samcconn@cotw.com>
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For my vr5432 based board (2.4.5) I can strip and run executables.

If I strip a module, insmod dies in obj_load() with Floating point
exception.

Has anyone else seen this?

-- 
Scott A. McConnell

From owner-linux-mips@oss.sgi.com Fri Apr 12 09:56:38 2002
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From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Scott A McConnell <samcconn@cotw.com>
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Subject: Re: Can modules be stripped?
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On Fri, 12 Apr 2002, Scott A McConnell wrote:

> If I strip a module, insmod dies in obj_load() with Floating point
> exception.

 You can't strip modules as they are relocatables -- global symbols and
relocations have to stay intact.  You may try `strip -d' if you want to
remove debugging symbols.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Fri Apr 12 09:56:24 2002
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Date: Fri, 12 Apr 2002 17:56:45 +0100
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Scott A McConnell wrote:
> 
> For my vr5432 based board (2.4.5) I can strip and run executables.
> 
> If I strip a module, insmod dies in obj_load() with Floating point
> exception.
> 
> Has anyone else seen this?

Yep,

Be careful what you strip.  I found the safest thing was to use 'strip
-g'
-- 
Regards, Stuart Hughes

From owner-linux-mips@oss.sgi.com Fri Apr 12 10:48:46 2002
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Subject: Re: Can modules be stripped?
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----- Original Message -----
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: "Scott A McConnell" <samcconn@cotw.com>
Cc: "MIPS/Linux List (SGI)" <linux-mips@oss.sgi.com>
Sent: Friday, April 12, 2002 12:57 PM
Subject: Re: Can modules be stripped?


> On Fri, 12 Apr 2002, Scott A McConnell wrote:
>
> > If I strip a module, insmod dies in obj_load() with Floating point
> > exception.
>
>  You can't strip modules as they are relocatables -- global symbols and
> relocations have to stay intact.

OK, you can't strip kernel modules (news to me, then again how often do I
use modules?), but it can't be because they "are relocatables".  I routinely
strip libraries without problem, and those are relocatables too.

So what's the real reason?

Regards,
Brad


From owner-linux-mips@oss.sgi.com Fri Apr 12 11:04:54 2002
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Date: Fri, 12 Apr 2002 20:05:43 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: "Bradley D. LaRonde" <brad@ltc.com>
cc: "MIPS/Linux List (SGI)" <linux-mips@oss.sgi.com>
Subject: Re: Can modules be stripped?
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On Fri, 12 Apr 2002, Bradley D. LaRonde wrote:

> OK, you can't strip kernel modules (news to me, then again how often do I
> use modules?), but it can't be because they "are relocatables".  I routinely
> strip libraries without problem, and those are relocatables too.

 What kind of libraries?  Shared libraries are shared objects and not
relocatables.  Static libraries ("ar" archives), OTOH, are sets of
relocatables as is e.g. /usr/lib/crt1.o and any assembler output.  The
rule is a relocatable is any object that has unresolved static
relocations, i.e. has not undergone final linking.  If unsure check with
file(1). 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Fri Apr 12 11:43:28 2002
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From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: "Bradley D. LaRonde" <brad@ltc.com>
cc: "MIPS/Linux List (SGI)" <linux-mips@oss.sgi.com>
Subject: Re: Can modules be stripped?
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On Fri, 12 Apr 2002, Bradley D. LaRonde wrote:

> Which brings up an interesting question - why doesn't the kernel use .so
> files for modules?

 There is no need to bring all the dynamic stuff into the kernel. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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Subject: Re: Can modules be stripped?
Date: Fri, 12 Apr 2002 14:35:13 -0400
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----- Original Message -----
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: "Bradley D. LaRonde" <brad@ltc.com>
Cc: "MIPS/Linux List (SGI)" <linux-mips@oss.sgi.com>
Sent: Friday, April 12, 2002 2:05 PM
Subject: Re: Can modules be stripped?


> On Fri, 12 Apr 2002, Bradley D. LaRonde wrote:
>
> > OK, you can't strip kernel modules (news to me, then again how often do
I
> > use modules?), but it can't be because they "are relocatables".  I
routinely
> > strip libraries without problem, and those are relocatables too.
>
>  What kind of libraries?  Shared libraries are shared objects and not
> relocatables.

Oh, oops. :-P  Now I see what you mean.  I confused shared object
w/relocatable.  My bad.

Did I know that kernel modules were "object files" i.e. relocatables.  Yes.
But I've always referred to them as object files (.o), not relocatables,
hence the confusion.

Which brings up an interesting question - why doesn't the kernel use .so
files for modules?

Regards,
Brad


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Date: Fri, 12 Apr 2002 20:27:46 -0400
From: Daniel Jacobowitz <dan@debian.org>
To: "Bradley D. LaRonde" <brad@ltc.com>
Cc: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>,
   "MIPS/Linux List (SGI)" <linux-mips@oss.sgi.com>
Subject: Re: Can modules be stripped?
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On Fri, Apr 12, 2002 at 02:35:13PM -0400, Bradley D. LaRonde wrote:
> ----- Original Message -----
> From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
> To: "Bradley D. LaRonde" <brad@ltc.com>
> Cc: "MIPS/Linux List (SGI)" <linux-mips@oss.sgi.com>
> Sent: Friday, April 12, 2002 2:05 PM
> Subject: Re: Can modules be stripped?
> 
> 
> > On Fri, 12 Apr 2002, Bradley D. LaRonde wrote:
> >
> > > OK, you can't strip kernel modules (news to me, then again how often do
> I
> > > use modules?), but it can't be because they "are relocatables".  I
> routinely
> > > strip libraries without problem, and those are relocatables too.
> >
> >  What kind of libraries?  Shared libraries are shared objects and not
> > relocatables.
> 
> Oh, oops. :-P  Now I see what you mean.  I confused shared object
> w/relocatable.  My bad.
> 
> Did I know that kernel modules were "object files" i.e. relocatables.  Yes.
> But I've always referred to them as object files (.o), not relocatables,
> hence the confusion.
> 
> Which brings up an interesting question - why doesn't the kernel use .so
> files for modules?

If you're really curious, compare the gunk in insmod (quite a bit) with
the gunk in ld.so (unspeakable).  Shared libraries are a great deal
more complicated than modules need to be.

-- 
Daniel Jacobowitz                           Carnegie Mellon University
MontaVista Software                         Debian GNU/Linux Developer

From owner-linux-mips@oss.sgi.com Fri Apr 12 17:39:35 2002
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From: Ian Chilton <mailinglist@ichilton.co.uk>
To: Stuart Hughes <stuarth@zentropix.com>
Cc: Scott A McConnell <samcconn@cotw.com>,
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Subject: Re: Can modules be stripped?
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Hello,

> Be careful what you strip.  I found the safest thing was to use 'strip
> -g'

I always use strip --strip-debug


Bye for Now,

Ian


-----------------------------
 Ian Chilton
 E-Mail: ian@ichilton.co.uk
-----------------------------


From owner-linux-mips@oss.sgi.com Fri Apr 12 18:14:26 2002
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From: Keith Owens <kaos@sgi.com>
To: "MIPS/Linux List (SGI)" <linux-mips@oss.sgi.com>
Subject: Re: Can modules be stripped? 
In-reply-to: Your message of "Fri, 12 Apr 2002 12:41:28 EST."
             <3CB71C48.B768A40D@cotw.com> 
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On Fri, 12 Apr 2002 12:41:28 -0500, 
Scott A McConnell <samcconn@cotw.com> wrote:
>For my vr5432 based board (2.4.5) I can strip and run executables.
>
>If I strip a module, insmod dies in obj_load() with Floating point
>exception.

The rules for stripping a module are "unusual".  Some symbols have to
be kept even if they are static, because even static symbols can be
exported.  The combination of strip -g to remove all debugging data
plus the script below is safe.  Run as 'strip_module $(modprobe -l)'.

Also note that insmod supports compressed modules if you configure
modutils with --enable-zlib.  I do not know if busybox supports this
feature of insmod.

strip_module.

#!/bin/sh
#
#	Given a list of objects, strip all static symbols except those
#	required by insmod.
#
#	Copyright Keith Owens <kaos@ocs.com.au>.  GPL.
#	Sat Feb  1 12:52:17 EST 1997
#	
#	Mainly intended for reducing the size of modules to save space
#	on emergency and install disks.  Be aware that removing the
#	static symbols reduces the amount of diagnostic information
#	available for oops.  Not recommended for normal module usage.
#
#	This code requires the modules use MODULE_PARM and EXPORT_.
#	Do not strip modules that have not been converted to use
#	MODULE_PARM or are using the old method of exporting symbols.
#	In particular do not use on modules prior to 2.1.20 (approx).
#
#	The objects are stripped in /tmp, only if the strip works is
#	the original overwritten.  If the command line to strip the
#	symbols becomes too long, the strip is done in multiple passes.
#	Running strip_module twice on the same object is safe (and a
#	waste of time).
#

cat > /tmp/$$.awk <<\EOF
BEGIN	{
	strip = "/usr/bin/objcopy";
	nm = "/usr/bin/nm";
	cp = "/bin/cp";
	mv = "/bin/mv";
	rm = "/bin/rm";
	tmp = "/tmp";
	command_size = 400;	# arbitrary but safe

	getline < "/proc/self/stat";
	pid = $1;
	tmpcopy = tmp "/" pid ".object";
	nmout = tmp "/" pid ".nmout";

	for (i = 1; i < ARGC; ++i)
		strip_module(ARGV[i]);

	do_command(rm " -f " tmpcopy " " nmout);

	exit(0);
}

function strip_module(object,
	keep_symbol, to_strip, symbol, command, changed) {
	do_command(cp " -a " object " " tmpcopy);
	do_command(nm " " tmpcopy " > " nmout);
	# delete array_name sometimes breaks, internal error, play safe
	for (symbol in keep_symbol)
		delete keep_symbol[symbol];
	for (symbol in to_strip)
		delete to_strip[symbol];
	new_module_format = 0;
	while ((getline < nmout) > 0) {
		$0 = substr($0, 10);
		# b static variable, uninitialised
		# d static variable, initialised
		# r static array, initialised
		# t static label/procedures
		if ($1 ~ /[bdrt]/)
			to_strip[$2] = "";
		else if ($1 != "?")
			keep_symbol[$2] = "";
		else if ($0 ~ /\? __ksymtab_/)
			keep_symbol[substr($2, 11)] = "";
		else if ($0 ~ /\? __module_parm_/)
			keep_symbol[substr($2, 15)] = "";
		if ($0 ~ /\? __module/)
			new_module_format = 1;
	}
	close(nmout);
	command = "";
	changed = 0;
	if (new_module_format) {
		for (symbol in to_strip) {
			if (!(symbol in keep_symbol)) {
				changed = 1;
				if (length(command) > command_size) {
					do_command(strip command " " tmpcopy);
					command = "";
				}
				command = command " --strip-symbol=" symbol;
			}
		}
	}
	if (command != "") {
		changed = 1;
		do_command(strip command " " tmpcopy);
	}
	if (changed)
		do_command(mv " " tmpcopy " " object);
}

function do_command(command) {
	if ((ret = system(command)) != 0)
		giveup("command \"" command "\" failed " ret, ret);
}

function giveup(message, ret) {
	print "strip_module: " message > "/dev/stderr";
	exit(ret);
}
EOF

awk -f /tmp/$$.awk "$@"
ret=$?
rm -f /tmp/$$.awk
exit $ret


From owner-linux-mips@oss.sgi.com Sat Apr 13 01:02:35 2002
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Subject: Re: LEXRA MIPS
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I insert a show_registers() into the begining of do_ri().
It seems that CPU runs into data section.

$0 : 00000000 1000fc00 00000014 00000000 00000001 00000000 00000000 00000000
$8 : 0000fc00 7fff7a78 00000000 00000002 00000000 00000000 00000000 00000002
$16: 00000004 7fff7e10 7fff7e18 00000000 100604b0 00000600 7fff7e28 00000010
$24: 810d6080 00000000                   1005e870 7fff7a58 7fff7db0 7fff7a68
Hi : 00000000
Lo : 00000000
epc  : 7fff7aa8    Not tainted
Status: 0000fc0c
Cause : 10000028
Process ping (pid: 24, stackpage=81ff2000)
Stack: 386d4381 31323100 00000000 00000000 24021000 00000000 00000000 0000fc0c
        2ab39a1c 00000000 00000000 00000000 2ab9f550 00000000 00000200 00000000
        00000000 00000000 00000003 00000000 7fff7d08 00000000 000000c0 00000000
        00000000 00000000 0000fc00 00000000 81ff0210 00000000 00000000 00000000
        00000003 00000000 00000000 00000000 00000000 00000000 00000000 00000000
        00000002 ...
Call Trace:
Code: 00000000  00000003  00000000 <7fff7d08> 00000000  000000c0  00000000 
00000000  00000000



Bradley D. LaRonde wrote:

> ----- Original Message -----
> From: "Tim Wu" <chtimwu@libra.seed.net.tw>
> To: "linux-mips" <linux-mips@oss.sgi.com>
> Sent: Friday, April 12, 2002 3:29 AM
> Subject: LEXRA MIPS
> 
> 
> 
>>I traced the kernel source and found SIGILL is sent by the exception
>>handler, do_ri().
>>
> 
> Can you tell what/where the reserved (illegal) instruction is that causes
> the trap?
> 
> Regards,
> Brad
> 
> 
> 




From owner-linux-mips@oss.sgi.com Sat Apr 13 07:44:09 2002
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From: "Bradley D. LaRonde" <brad@ltc.com>
To: <chtimwu@libra.seed.net.tw>
Cc: "linux-mips" <linux-mips@oss.sgi.com>
References: <3CB68CC8.1050207@libra.seed.net.tw> <005901c1e217$058f7f20$4c00a8c0@prefect> <3CB7E629.9060105@libra.seed.net.tw>
Subject: Re: LEXRA MIPS
Date: Sat, 13 Apr 2002 10:44:47 -0400
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You say this only happens when a process raises a signal.

Maybe the signal trampoline is getting messed up.

Do you see the same behaviour with and without a signal handler installed
for the raised signal?

Regards,
Brad

----- Original Message -----
From: "Tim Wu" <chtimwu@libra.seed.net.tw>
To: "Bradley D. LaRonde" <brad@ltc.com>
Cc: "linux-mips" <linux-mips@oss.sgi.com>
Sent: Saturday, April 13, 2002 4:02 AM
Subject: Re: LEXRA MIPS


> I insert a show_registers() into the begining of do_ri().
> It seems that CPU runs into data section.
>
> $0 : 00000000 1000fc00 00000014 00000000 00000001 00000000 00000000
00000000
> $8 : 0000fc00 7fff7a78 00000000 00000002 00000000 00000000 00000000
00000002
> $16: 00000004 7fff7e10 7fff7e18 00000000 100604b0 00000600 7fff7e28
00000010
> $24: 810d6080 00000000                   1005e870 7fff7a58 7fff7db0
7fff7a68
> Hi : 00000000
> Lo : 00000000
> epc  : 7fff7aa8    Not tainted
> Status: 0000fc0c
> Cause : 10000028
> Process ping (pid: 24, stackpage=81ff2000)
> Stack: 386d4381 31323100 00000000 00000000 24021000 00000000 00000000
0000fc0c
>         2ab39a1c 00000000 00000000 00000000 2ab9f550 00000000 00000200
00000000
>         00000000 00000000 00000003 00000000 7fff7d08 00000000 000000c0
00000000
>         00000000 00000000 0000fc00 00000000 81ff0210 00000000 00000000
00000000
>         00000003 00000000 00000000 00000000 00000000 00000000 00000000
00000000
>         00000002 ...
> Call Trace:
> Code: 00000000  00000003  00000000 <7fff7d08> 00000000  000000c0  00000000
> 00000000  00000000
>
>
>
> Bradley D. LaRonde wrote:
>
> > ----- Original Message -----
> > From: "Tim Wu" <chtimwu@libra.seed.net.tw>
> > To: "linux-mips" <linux-mips@oss.sgi.com>
> > Sent: Friday, April 12, 2002 3:29 AM
> > Subject: LEXRA MIPS
> >
> >
> >
> >>I traced the kernel source and found SIGILL is sent by the exception
> >>handler, do_ri().
> >>
> >
> > Can you tell what/where the reserved (illegal) instruction is that
causes
> > the trap?
> >
> > Regards,
> > Brad
> >
> >
> >
>
>
>


From owner-linux-mips@oss.sgi.com Sat Apr 13 16:02:21 2002
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Date: Sat, 13 Apr 2002 21:28:11 +0200
From: Guido Guenther <agx@sigxcpu.org>
To: linux-mips@oss.sgi.com
Subject: head.S and init_task.c vs addinitrd
Message-ID: <20020413192811.GA25750@bogon.ms20.nix>
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Hi,
short:=20
The attached patch modifies head.S/init_task.c to restore the old habit
of merging all sections(besides .reginfo) into one segment which lets
elf2ecoff/addinitrd work again.

long:
some of the recent head.S/init_task.c changes break addinitrd. In 2.4.16
we had two segments which allowed elf2ecoff to put everything (besides
bss) into one text section (dropping REGINFO) in the ecoff image leaving
the data section emtpy. Addinitrd then later merged the initial ramdisk
into that empty data section.

ELF kernel:
Program Headers:
  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
  REGINFO        0x1c2ae0 0x881c3ae0 0x881c3ae0 0x00018 0x00018 R   0x4
  LOAD           0x001000 0x88002000 0x88002000 0x1e8000 0x1ff560 RWE 0x1000

 Section to Segment mapping:
  Segment Sections...
   00     .reginfo=20
   01     .text .fixup .kstrtab __ex_table __ksymtab .text.init .data.init =
.setup.init .initcall.init .data.cacheline_aligned .reginfo .data .bss

ECOFF kernel:
Sections:
Idx Name          Size      VMA               LMA               File off  A=
lgn
  0 .text         001e8000  0000000088002000  0000000088002000  000000d0  2=
**4
                  CONTENTS, ALLOC, LOAD, CODE
  1 .data         00000000  00000000881ea000  00000000881ea000  001e80d0  2=
**4
                  CONTENTS, ALLOC, LOAD, DATA
  2 .bss          00017560  00000000881ea000  00000000881ea000  001e80d0  2=
**4
                  CONTENTS, ALLOC, NEVER_LOAD

Now as of 2.4.17+ we have three segments described in the program
header:

Program Headers:
  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
  REGINFO        0x1c4ae0 0x881c5ae0 0x881c5ae0 0x00018 0x00018 R   0x4
  LOAD           0x001000 0x88002000 0x88002000 0x1ab140 0x1ab140 R E 0x1000
  LOAD           0x1ad000 0x881ae000 0x881ae000 0x43000 0x5a560 RWE 0x1000

 Section to Segment mapping:
  Segment Sections...
   00     .reginfo=20
   01     .text .fixup .kstrtab __ex_table __ksymtab=20
   02     .data.init_task .text.init .data.init .setup.init .initcall.init =
.data.cacheline_aligned .reginfo .data .bss

so there's no emtpy section left in the ecoff image for the initial
ramdisk. What was the reasoning for the above change? And why exactly
does this change cause a splitting into data and text segment where as
of 2.4.16 there was only a "data" segment?
Regards,
 -- Guido

--T4sUOijqQbZv57TR
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diff --exclude=3D*.orig --exclude=3D.* -Naur ../../kernel-source-2.4.17/arc=
h/mips/kernel/head.S arch/mips/kernel/head.S
--- ../../kernel-source-2.4.17/arch/mips/kernel/head.S	Thu Mar  7 22:49:57 =
2002
+++ arch/mips/kernel/head.S	Sat Apr 13 14:09:31 2002
@@ -178,10 +178,15 @@
 	.type	\name, @object
 	.endm
=20
-	.data
-	.align	12
+	.text
=20
 	page	swapper_pg_dir, PGD_ORDER
 	page	empty_bad_page, 0
 	page	empty_bad_page_table, 0
 	page	invalid_pte_table, 0
+
+/*
+ * Align to 8kb boundary for init_task_union which follows in the
+ * .text segment.
+ */
+	.align	13
diff --exclude=3D*.orig --exclude=3D.* -Naur ../../kernel-source-2.4.17/arc=
h/mips/kernel/init_task.c arch/mips/kernel/init_task.c
--- ../../kernel-source-2.4.17/arch/mips/kernel/init_task.c	Thu Mar  7 22:4=
9:57 2002
+++ arch/mips/kernel/init_task.c	Sat Apr 13 14:09:31 2002
@@ -20,5 +20,5 @@
  * The things we do for performance..
  */
 union task_union init_task_union
-	__attribute__((__section__(".data.init_task"))) =3D
+	__attribute__((__section__(".text"))) =3D
 		{ INIT_TASK(init_task_union.task) };

--T4sUOijqQbZv57TR--

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From owner-linux-mips@oss.sgi.com Sun Apr 14 08:06:01 2002
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Date: Sun, 14 Apr 2002 17:04:56 +0200
From: Guido Guenther <agx@sigxcpu.org>
To: linux-mips@oss.sgi.com
Cc: ralf@gnu.org
Subject: [patch]: minor addinitrd.c cleanup
Message-ID: <20020414150456.GA11128@bogon.ms20.nix>
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Hi,
patch makes sure we:
 - don't overwrite an existing .data section in the ecoff
 - opens the original kernel image read only
applies to 2.4 as well as 2.5.
 -- Guido

--82I3+IH0IqGh5yIs
Content-Type: text/plain; charset=us-ascii
Content-Disposition: attachment; filename="addinitrd-2002-04-14.diff"

Index: arch/mips/boot/addinitrd.c
===================================================================
RCS file: /cvs/linux/arch/mips/boot/addinitrd.c,v
retrieving revision 1.1.6.1
diff -u -u -r1.1.6.1 addinitrd.c
--- arch/mips/boot/addinitrd.c	2001/12/13 21:22:23	1.1.6.1
+++ arch/mips/boot/addinitrd.c	2002/04/14 14:59:50
@@ -2,6 +2,8 @@
  * addinitrd - program to add a initrd image to an ecoff kernel
  *
  * (C) 1999 Thomas Bogendoerfer
+ *     2002 Guido Guenther <agx@sigxcpu.org>
+ *
  */
 
 #include <sys/types.h>
@@ -54,7 +56,7 @@
 		exit (1);
 	}
 
-	if ((fd_vmlinux = open (argv[1],O_RDWR)) < 0)
+	if ((fd_vmlinux = open (argv[1],O_RDONLY)) < 0)
 		 die ("open vmlinux");
 	if (read (fd_vmlinux, &efile, sizeof efile) != sizeof efile)
 		die ("read file header");
@@ -65,7 +67,10 @@
 	/*
 	 * check whether the file is good for us
 	 */
-	/* TBD */
+	if( eaout.dsize || esecs[1].s_size ) {
+		fprintf(2,".data section not empty. Giving up!\n");
+		exit(1);
+	}
 
 	/*
 	 * check, if we have to swab words

--82I3+IH0IqGh5yIs--

From owner-linux-mips@oss.sgi.com Mon Apr 15 05:48:11 2002
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Date: Mon, 15 Apr 2002 14:49:11 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Guido Guenther <agx@sigxcpu.org>
cc: linux-mips@oss.sgi.com
Subject: Re: head.S and init_task.c vs addinitrd
In-Reply-To: <20020413192811.GA25750@bogon.ms20.nix>
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On Sat, 13 Apr 2002, Guido Guenther wrote:

> some of the recent head.S/init_task.c changes break addinitrd. In 2.4.16
> we had two segments which allowed elf2ecoff to put everything (besides
> bss) into one text section (dropping REGINFO) in the ecoff image leaving
> the data section emtpy. Addinitrd then later merged the initial ramdisk
> into that empty data section.

 Hmm, isn't that broken?  I believe an initial RAM disk should be added to
an ELF image, before converting it to ECOFF.  Not everyone uses ECOFF and
ELF is the "canonical" executable format for Linux.  Everything else is a
derivative.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Apr 15 06:42:31 2002
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From: Guido Guenther <agx@sigxcpu.org>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc: linux-mips@oss.sgi.com
Subject: Re: head.S and init_task.c vs addinitrd
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In-Reply-To: <Pine.GSO.3.96.1020415144452.19735I-100000@delta.ds2.pg.gda.pl>; from macro@ds2.pg.gda.pl on Mon, Apr 15, 2002 at 02:49:11PM +0200
Sender: owner-linux-mips@oss.sgi.com
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On Mon, Apr 15, 2002 at 02:49:11PM +0200, Maciej W. Rozycki wrote:
> On Sat, 13 Apr 2002, Guido Guenther wrote:
> 
> > some of the recent head.S/init_task.c changes break addinitrd. In 2.4.16
> > we had two segments which allowed elf2ecoff to put everything (besides
> > bss) into one text section (dropping REGINFO) in the ecoff image leaving
> > the data section emtpy. Addinitrd then later merged the initial ramdisk
> > into that empty data section.
> 
>  Hmm, isn't that broken?  I believe an initial RAM disk should be added to
> an ELF image, before converting it to ECOFF.  Not everyone uses ECOFF and
> ELF is the "canonical" executable format for Linux.  Everything else is a
> derivative.
But we currently don't support relinking the ELF kernel to add a ramdisk,
do we [1]? Elf2ecoff/addinitrd is the only way I know of to achieve this
and I still don't understand why the recent init_task.c/head.S changes
where necessary which broke this.
 -- Guido

[1] I know that one can link a ramdisk into the ELF image but this
ramdisk hat to be available at kernel compile time which is not an option in
many situations(e.g. Debian "boot-floppies").

From owner-linux-mips@oss.sgi.com Mon Apr 15 06:52:58 2002
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Date: Mon, 15 Apr 2002 15:53:25 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Reply-To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Ralf Baechle <ralf@uni-koblenz.de>, Jun Sun <jsun@mvista.com>
cc: linux-mips@fnet.fr, linux-mips@oss.sgi.com
Subject: [patch] linux 2.4: FPU exception updates
Message-ID: <Pine.GSO.3.96.1020415154230.19735J-100000@delta.ds2.pg.gda.pl>
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Hello,

 Here are updates to negate the FPU exception presence flag.  Tested on an
R3400 and an R4400SC.  FPU-less configurations not tested but they should
work as the changes are straightforward.  Ralf, please apply. 

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

patch-mips-2.4.18-20020412-irq-49
diff -up --recursive --new-file linux-mips-2.4.18-20020412.macro/arch/mips/dec/setup.c linux-mips-2.4.18-20020412/arch/mips/dec/setup.c
--- linux-mips-2.4.18-20020412.macro/arch/mips/dec/setup.c	2002-04-10 02:58:33.000000000 +0000
+++ linux-mips-2.4.18-20020412/arch/mips/dec/setup.c	2002-04-13 01:42:32.000000000 +0000
@@ -733,7 +733,7 @@ void __init init_IRQ(void)
 	set_except_vector(0, decstation_handle_int);
 
 	/* Free the FPU interrupt if the exception is present. */
-	if (mips_cpu.options & MIPS_CPU_FPUEX) {
+	if (!(mips_cpu.options & MIPS_CPU_NOFPUEX)) {
 		cpu_fpu_mask = 0;
 		dec_interrupt[DEC_IRQ_FPU] = -1;
 	}
diff -up --recursive --new-file linux-mips-2.4.18-20020412.macro/arch/mips/kernel/setup.c linux-mips-2.4.18-20020412/arch/mips/kernel/setup.c
--- linux-mips-2.4.18-20020412.macro/arch/mips/kernel/setup.c	2002-04-10 02:58:36.000000000 +0000
+++ linux-mips-2.4.18-20020412/arch/mips/kernel/setup.c	2002-04-13 01:47:38.000000000 +0000
@@ -234,7 +234,7 @@ static inline void cpu_probe(void)
 		case PRID_IMP_R2000:
 			mips_cpu.cputype = CPU_R2000;
 			mips_cpu.isa_level = MIPS_CPU_ISA_I;
-			mips_cpu.options = MIPS_CPU_TLB;
+			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX;
 			if (cpu_has_fpu())
 				mips_cpu.options |= MIPS_CPU_FPU;
 			mips_cpu.tlbsize = 64;
@@ -248,7 +248,7 @@ static inline void cpu_probe(void)
 			else
 				mips_cpu.cputype = CPU_R3000;
 			mips_cpu.isa_level = MIPS_CPU_ISA_I;
-			mips_cpu.options = MIPS_CPU_TLB;
+			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX;
 			if (cpu_has_fpu())
 				mips_cpu.options |= MIPS_CPU_FPU;
 			mips_cpu.tlbsize = 64;
@@ -261,7 +261,7 @@ static inline void cpu_probe(void)
 			mips_cpu.isa_level = MIPS_CPU_ISA_III;
 			mips_cpu.options = R4K_OPTS | MIPS_CPU_FPU |
 			                   MIPS_CPU_32FPR | MIPS_CPU_WATCH |
-			                   MIPS_CPU_VCE | MIPS_CPU_FPUEX;
+			                   MIPS_CPU_VCE;
 			mips_cpu.tlbsize = 48;
 			break;
                 case PRID_IMP_VR41XX:
@@ -274,14 +274,13 @@ static inline void cpu_probe(void)
 			mips_cpu.cputype = CPU_R4300;
 			mips_cpu.isa_level = MIPS_CPU_ISA_III;
 			mips_cpu.options = R4K_OPTS | MIPS_CPU_FPU |
-					   MIPS_CPU_32FPR | MIPS_CPU_FPUEX;
+					   MIPS_CPU_32FPR;
 			mips_cpu.tlbsize = 32;
 			break;
 		case PRID_IMP_R4600:
 			mips_cpu.cputype = CPU_R4600;
 			mips_cpu.isa_level = MIPS_CPU_ISA_III;
-			mips_cpu.options = R4K_OPTS | MIPS_CPU_FPU |
-					   MIPS_CPU_FPUEX;
+			mips_cpu.options = R4K_OPTS | MIPS_CPU_FPU;
 			mips_cpu.tlbsize = 48;
 			break;
 		#if 0
@@ -294,8 +293,7 @@ static inline void cpu_probe(void)
 			 */
 	 		mips_cpu.cputype = CPU_R4650;
 		 	mips_cpu.isa_level = MIPS_CPU_ISA_III;
-			mips_cpu.options = R4K_OPTS | MIPS_CPU_FPU |
-					   MIPS_CPU_FPUEX;
+			mips_cpu.options = R4K_OPTS | MIPS_CPU_FPU;
 		        mips_cpu.tlbsize = 48;
 			break;
 		#endif
@@ -329,14 +327,14 @@ static inline void cpu_probe(void)
 			mips_cpu.cputype = CPU_R4700;
 			mips_cpu.isa_level = MIPS_CPU_ISA_III;
 			mips_cpu.options = R4K_OPTS | MIPS_CPU_FPU |
-			                   MIPS_CPU_32FPR | MIPS_CPU_FPUEX;
+			                   MIPS_CPU_32FPR;
 			mips_cpu.tlbsize = 48;
 			break;
 		case PRID_IMP_TX49:
 			mips_cpu.cputype = CPU_TX49XX;
 			mips_cpu.isa_level = MIPS_CPU_ISA_III;
 			mips_cpu.options = R4K_OPTS | MIPS_CPU_FPU |
-			                   MIPS_CPU_32FPR | MIPS_CPU_FPUEX;
+			                   MIPS_CPU_32FPR;
 			mips_cpu.tlbsize = 48;
 			mips_cpu.icache.ways = 4;
 			mips_cpu.dcache.ways = 4;
@@ -345,31 +343,28 @@ static inline void cpu_probe(void)
 			mips_cpu.cputype = CPU_R5000;
 			mips_cpu.isa_level = MIPS_CPU_ISA_IV; 
 			mips_cpu.options = R4K_OPTS | MIPS_CPU_FPU |
-			                   MIPS_CPU_32FPR | MIPS_CPU_FPUEX;
+			                   MIPS_CPU_32FPR;
 			mips_cpu.tlbsize = 48;
 			break;
 		case PRID_IMP_R5432:
 			mips_cpu.cputype = CPU_R5432;
 			mips_cpu.isa_level = MIPS_CPU_ISA_IV; 
 			mips_cpu.options = R4K_OPTS | MIPS_CPU_FPU |
-			                   MIPS_CPU_32FPR | MIPS_CPU_WATCH |
-					   MIPS_CPU_FPUEX;
+			                   MIPS_CPU_32FPR | MIPS_CPU_WATCH;
 			mips_cpu.tlbsize = 48;
 			break;
 		case PRID_IMP_R5500:
 			mips_cpu.cputype = CPU_R5500;
 			mips_cpu.isa_level = MIPS_CPU_ISA_IV; 
 			mips_cpu.options = R4K_OPTS | MIPS_CPU_FPU |
-			                   MIPS_CPU_32FPR | MIPS_CPU_WATCH |
-					   MIPS_CPU_FPUEX;
+			                   MIPS_CPU_32FPR | MIPS_CPU_WATCH;
 			mips_cpu.tlbsize = 48;
 			break;
 		case PRID_IMP_NEVADA:
 			mips_cpu.cputype = CPU_NEVADA;
 			mips_cpu.isa_level = MIPS_CPU_ISA_IV; 
 			mips_cpu.options = R4K_OPTS | MIPS_CPU_FPU |
-			                   MIPS_CPU_32FPR | MIPS_CPU_DIVEC |
-					   MIPS_CPU_FPUEX;
+			                   MIPS_CPU_32FPR | MIPS_CPU_DIVEC;
 			mips_cpu.tlbsize = 48;
 			mips_cpu.icache.ways = 2;
 			mips_cpu.dcache.ways = 2;
@@ -377,22 +372,20 @@ static inline void cpu_probe(void)
 		case PRID_IMP_R6000:
 			mips_cpu.cputype = CPU_R6000;
 			mips_cpu.isa_level = MIPS_CPU_ISA_II;
-			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_FPU |
-					   MIPS_CPU_FPUEX;
+			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_FPU;
 			mips_cpu.tlbsize = 32;
 			break;
 		case PRID_IMP_R6000A:
 			mips_cpu.cputype = CPU_R6000A;
 			mips_cpu.isa_level = MIPS_CPU_ISA_II;
-			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_FPU |
-					   MIPS_CPU_FPUEX;
+			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_FPU;
 			mips_cpu.tlbsize = 32;
 			break;
 		case PRID_IMP_RM7000:
 			mips_cpu.cputype = CPU_RM7000;
 			mips_cpu.isa_level = MIPS_CPU_ISA_IV;
 			mips_cpu.options = R4K_OPTS | MIPS_CPU_FPU |
-			                   MIPS_CPU_32FPR | MIPS_CPU_FPUEX;
+			                   MIPS_CPU_32FPR;
 			/*
 			 * Undocumented RM7000:  Bit 29 in the info register of
 			 * the RM7000 v2.0 indicates if the TLB has 48 or 64
@@ -407,8 +400,7 @@ static inline void cpu_probe(void)
 			mips_cpu.cputype = CPU_R8000;
 			mips_cpu.isa_level = MIPS_CPU_ISA_IV;
 			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
-				           MIPS_CPU_FPU | MIPS_CPU_32FPR |
-					   MIPS_CPU_FPUEX;
+				           MIPS_CPU_FPU | MIPS_CPU_32FPR;
 			mips_cpu.tlbsize = 384;      /* has wierd TLB: 3-way x 128 */
 			break;
 		case PRID_IMP_R10000:
@@ -416,8 +408,7 @@ static inline void cpu_probe(void)
 			mips_cpu.isa_level = MIPS_CPU_ISA_IV;
 			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_4KEX | 
 				           MIPS_CPU_FPU | MIPS_CPU_32FPR | 
-				           MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
-					   MIPS_CPU_FPUEX;
+				           MIPS_CPU_COUNTER | MIPS_CPU_WATCH;
 			mips_cpu.tlbsize = 64;
 			break;
 		default:
@@ -452,8 +443,7 @@ cpu_4kc:
 			if (config1 & (1 << 2))
 				mips_cpu.options |= MIPS_CPU_MIPS16;
 			if (config1 & 1)
-				mips_cpu.options |= MIPS_CPU_FPU |
-						    MIPS_CPU_FPUEX;
+				mips_cpu.options |= MIPS_CPU_FPU;
 			mips_cpu.scache.flags = MIPS_CACHE_NOT_PRESENT;
 			break;
 		case PRID_IMP_5KC:
@@ -470,8 +460,7 @@ cpu_4kc:
 			if (config1 & (1 << 2))
 				mips_cpu.options |= MIPS_CPU_MIPS16;
 			if (config1 & 1)
-				mips_cpu.options |= MIPS_CPU_FPU |
-						    MIPS_CPU_FPUEX;
+				mips_cpu.options |= MIPS_CPU_FPU;
 			mips_cpu.scache.flags = MIPS_CACHE_NOT_PRESENT;
 			break;
 		default:
@@ -497,8 +486,7 @@ cpu_4kc:
 			if (config1 & (1 << 2))
 				mips_cpu.options |= MIPS_CPU_MIPS16;
 			if (config1 & 1)
-				mips_cpu.options |= MIPS_CPU_FPU |
-						    MIPS_CPU_FPUEX;
+				mips_cpu.options |= MIPS_CPU_FPU;
 			mips_cpu.scache.flags = MIPS_CACHE_NOT_PRESENT;
 			break;
 		default:
@@ -517,8 +505,7 @@ cpu_4kc:
 			                   MIPS_CPU_MCHECK;
 #ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
 			/* FPU in pass1 is known to have issues. */
-			mips_cpu.options |= MIPS_CPU_FPU |
-					    MIPS_CPU_FPUEX;
+			mips_cpu.options |= MIPS_CPU_FPU;
 #endif
 			break;
 		default:
diff -up --recursive --new-file linux-mips-2.4.18-20020412.macro/arch/mips/kernel/traps.c linux-mips-2.4.18-20020412/arch/mips/kernel/traps.c
--- linux-mips-2.4.18-20020412.macro/arch/mips/kernel/traps.c	2002-04-10 02:58:40.000000000 +0000
+++ linux-mips-2.4.18-20020412/arch/mips/kernel/traps.c	2002-04-13 02:01:40.000000000 +0000
@@ -916,7 +916,8 @@ void __init trap_init(void)
 	set_except_vector(12, handle_ov);
 	set_except_vector(13, handle_tr);
 
-	if (mips_cpu.options & MIPS_CPU_FPUEX)
+	if ((mips_cpu.options & MIPS_CPU_FPU) &&
+	    !(mips_cpu.options & MIPS_CPU_NOFPUEX))
 		set_except_vector(15, handle_fpe);
 	if (mips_cpu.options & MIPS_CPU_MCHECK)
 		set_except_vector(24, handle_mcheck);
diff -up --recursive --new-file linux-mips-2.4.18-20020412.macro/include/asm-mips/cpu.h linux-mips-2.4.18-20020412/include/asm-mips/cpu.h
--- linux-mips-2.4.18-20020412.macro/include/asm-mips/cpu.h	2002-04-10 02:59:00.000000000 +0000
+++ linux-mips-2.4.18-20020412/include/asm-mips/cpu.h	2002-04-13 01:51:39.000000000 +0000
@@ -159,6 +159,6 @@ enum cputype {
 #define MIPS_CPU_CACHE_CDEX	0x00000800 /* Create_Dirty_Exclusive CACHE op */
 #define MIPS_CPU_MCHECK		0x00001000 /* Machine check exception */
 #define MIPS_CPU_EJTAG		0x00002000 /* EJTAG exception */
-#define MIPS_CPU_FPUEX		0x00004000 /* FPU exception */
+#define MIPS_CPU_NOFPUEX	0x00004000 /* no FPU exception */
 
 #endif /* _ASM_CPU_H */


From owner-linux-mips@oss.sgi.com Mon Apr 15 07:08:38 2002
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	Mon, 15 Apr 2002 16:09:41 +0200 (MET DST)
Date: Mon, 15 Apr 2002 16:09:41 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Guido Guenther <agx@sigxcpu.org>
cc: linux-mips@oss.sgi.com
Subject: Re: head.S and init_task.c vs addinitrd
In-Reply-To: <20020415154314.A18602@gandalf.physik.uni-konstanz.de>
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On Mon, 15 Apr 2002, Guido Guenther wrote:

> >  Hmm, isn't that broken?  I believe an initial RAM disk should be added to
> > an ELF image, before converting it to ECOFF.  Not everyone uses ECOFF and
> > ELF is the "canonical" executable format for Linux.  Everything else is a
> > derivative.
> But we currently don't support relinking the ELF kernel to add a ramdisk,

 I don't know.  We are going to have to if the BOOTP/NFS-root code gets
removed, which will supposedly happen quite soon.

> do we [1]? Elf2ecoff/addinitrd is the only way I know of to achieve this
> and I still don't understand why the recent init_task.c/head.S changes
> where necessary which broke this.

 Maybe because that's an ugly hack (as I can see from your description).

> [1] I know that one can link a ramdisk into the ELF image but this
> ramdisk hat to be available at kernel compile time which is not an option in
> many situations(e.g. Debian "boot-floppies").

 It depends on how a kernel gets built.  If we add "-r" to the current
final link we'll get "vmlinux.o" that is a complete, self-contained
kernel, that may be linked against a RAM-disk (or just relinked alone) 
without a problem.  That's actually a generic solution and certainly
something like this will likely have to get implemented as soon as a
RAM-disk gets mandatory for block-device-less ;-) configurations. 

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Apr 15 07:20:08 2002
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Date: Mon, 15 Apr 2002 16:21:10 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Keith Owens <kaos@sgi.com>
cc: "MIPS/Linux List (SGI)" <linux-mips@oss.sgi.com>
Subject: Re: Can modules be stripped? 
In-Reply-To: <22260.1018660471@ocs3.intra.ocs.com.au>
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On Sat, 13 Apr 2002, Keith Owens wrote:

> The rules for stripping a module are "unusual".  Some symbols have to
> be kept even if they are static, because even static symbols can be
> exported.  The combination of strip -g to remove all debugging data

 Hmm, that looks weird to me.  If exporting static symbols is permitted,
shouldn't the symbols be marked global by EXPORT_SYMBOL() then? 

 The following code seems to mark a static symbol global just fine:

static int test = 0; asm(".global test");

so there should be no problem with doing the same in EXPORT_SYMBOL().

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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From: Keith Owens <kaos@sgi.com>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc: "MIPS/Linux List (SGI)" <linux-mips@oss.sgi.com>
Subject: Re: Can modules be stripped? 
In-reply-to: Your message of "Mon, 15 Apr 2002 16:21:10 +0200."
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On Mon, 15 Apr 2002 16:21:10 +0200 (MET DST), 
"Maciej W. Rozycki" <macro@ds2.pg.gda.pl> wrote:
>On Sat, 13 Apr 2002, Keith Owens wrote:
>
>> The rules for stripping a module are "unusual".  Some symbols have to
>> be kept even if they are static, because even static symbols can be
>> exported.  The combination of strip -g to remove all debugging data
>
> Hmm, that looks weird to me.  If exporting static symbols is permitted,
>shouldn't the symbols be marked global by EXPORT_SYMBOL() then? 

Exporting static symbols has always been allowed.  Exported symbols are
the module equivalent of lazy binding, which is logically no different
from passing the address of a static symbol via a structure to a
registration function.  In either case the static symbol can be
accessed from outside the object, without being marked as global.


From owner-linux-mips@oss.sgi.com Mon Apr 15 08:31:56 2002
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Date: Mon, 15 Apr 2002 17:32:54 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Keith Owens <kaos@sgi.com>
cc: "MIPS/Linux List (SGI)" <linux-mips@oss.sgi.com>
Subject: Re: Can modules be stripped? 
In-Reply-To: <7082.1018882200@ocs3.intra.ocs.com.au>
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On Tue, 16 Apr 2002, Keith Owens wrote:

> Exporting static symbols has always been allowed.  Exported symbols are
> the module equivalent of lazy binding, which is logically no different
> from passing the address of a static symbol via a structure to a
> registration function.  In either case the static symbol can be
> accessed from outside the object, without being marked as global.

 Well, if you make a symbol available to other modules it becomes global
implicitly as they may refer to it by its name (by means of relocations)
and not an address known from elsewhere.  So keeping the symbol marked
local in the module's symbol table is against a run-time linker's usual
behaviour.  One may expect to perform `ld -rx' on a module and have it
still work as it's what happens for every other relocatable. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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From: Guido Guenther <agx@sigxcpu.org>
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Cc: linux-mips@oss.sgi.com
Subject: Re: head.S and init_task.c vs addinitrd
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In-Reply-To: <Pine.GSO.3.96.1020415155842.19735L-100000@delta.ds2.pg.gda.pl>; from macro@ds2.pg.gda.pl on Mon, Apr 15, 2002 at 04:09:41PM +0200
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On Mon, Apr 15, 2002 at 04:09:41PM +0200, Maciej W. Rozycki wrote:
> On Mon, 15 Apr 2002, Guido Guenther wrote:
> 
> > >  Hmm, isn't that broken?  I believe an initial RAM disk should be added to
> > > an ELF image, before converting it to ECOFF.  Not everyone uses ECOFF and
> > > ELF is the "canonical" executable format for Linux.  Everything else is a
> > > derivative.
> > But we currently don't support relinking the ELF kernel to add a ramdisk,
> 
>  I don't know.  We are going to have to if the BOOTP/NFS-root code gets
> removed, which will supposedly happen quite soon.
> 
> > do we [1]? Elf2ecoff/addinitrd is the only way I know of to achieve this
> > and I still don't understand why the recent init_task.c/head.S changes
> > where necessary which broke this.
> 
>  Maybe because that's an ugly hack (as I can see from your description).
Are you telling me the only reason for the changes in init_task.c/head.S
were made to break the elf2ecoff/addinitrd "hack"? Where exactly was
there a hack in head.S/init_task.c. Please point me to the line of code
since I don't understand enough about the kernel to see it.

> 
> > [1] I know that one can link a ramdisk into the ELF image but this
> > ramdisk hat to be available at kernel compile time which is not an option in
> > many situations(e.g. Debian "boot-floppies").
> 
>  It depends on how a kernel gets built.  If we add "-r" to the current
> final link we'll get "vmlinux.o" that is a complete, self-contained
> kernel, that may be linked against a RAM-disk (or just relinked alone) 
> without a problem.  That's actually a generic solution and certainly
> something like this will likely have to get implemented as soon as a
> RAM-disk gets mandatory for block-device-less ;-) configurations. 
That's 2.5 stuff. We should not break expected behavior in 2.4.
 -- Guido

From owner-linux-mips@oss.sgi.com Mon Apr 15 11:12:41 2002
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Date: Mon, 15 Apr 2002 20:13:42 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Guido Guenther <agx@sigxcpu.org>
cc: linux-mips@oss.sgi.com
Subject: Re: head.S and init_task.c vs addinitrd
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On Mon, 15 Apr 2002, Guido Guenther wrote:

> Are you telling me the only reason for the changes in init_task.c/head.S
> were made to break the elf2ecoff/addinitrd "hack"? Where exactly was
> there a hack in head.S/init_task.c. Please point me to the line of code
> since I don't understand enough about the kernel to see it.

 I meant it stopped working because it is an ugly hack.  It is too fragile
to work in all cases. 

> That's 2.5 stuff. We should not break expected behavior in 2.4.

 Agreed.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Apr 15 11:41:12 2002
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Date: Mon, 15 Apr 2002 11:38:44 -0700
From: William Jhun <wjhun@ayrnetworks.com>
To: linux-mips@oss.sgi.com
Subject: rm7k flush_icache_line() in rm7k_dma_cache_*
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Hello,

We've been experiencing some problems with our RM7k cache code which is
based on the sgi mm/rm7k.c from around kernel version 2.4.2. While
trying to track this down, we noticed that someone added a call to
flush_icache_line() in the rm7k_dma_cache_*() routines (now
mm/c-rm7k.c). What is the reason for this? It is our understanding that
the instruction cache does not write back, and so stale cache lines in
the icache which are later used for data/dma would seem innocuous. Is
this not true? We could not find a CVS log entry to explain this,
either. Did anyone experience problems without these calls to
flush_icache_line()?

Thanks,
Will

From owner-linux-mips@oss.sgi.com Mon Apr 15 12:08:19 2002
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Date: Mon, 15 Apr 2002 14:08:55 -0500
Subject: Linux for MIPS on SGI Indigo2
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I am looking for detailed instructions on installing a linux 
distribution onto an SGI Indigo2 4400.  Thank you. --Chris


From owner-linux-mips@oss.sgi.com Mon Apr 15 12:22:01 2002
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Date: Mon, 15 Apr 2002 21:22:47 +0200
From: Guido Guenther <agx@sigxcpu.org>
To: Chris Wright <chris_wright@mac.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: Linux for MIPS on SGI Indigo2
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On Mon, Apr 15, 2002 at 02:08:55PM -0500, Chris Wright wrote:
> I am looking for detailed instructions on installing a linux 
> distribution onto an SGI Indigo2 4400.  Thank you. --Chris
The graphics boards in the I2 are still all unsupported. You will have
to do a serial console install, see:
 http://www.linux-debian.de/howto/debian-mips-woody-install.html
and
 http://oss.sgi.com/mips/i2-howto.html
for details.
 -- Guido

From owner-linux-mips@oss.sgi.com Mon Apr 15 14:53:57 2002
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Date: Mon, 15 Apr 2002 16:52:39 -0500
From: Lanny DeVaney <ldevaney@redhat.com>
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I've used the NEW_TIME_C method to implement support for the Dallas 1501 
RTC in my MIPS port .  I now successfully read the hw clock, and the 
date program works, and I can change the time.

However, the hwclock program tells me that it can't access the Hardware 
Clock and tells me that /dev/rtc doesn't exist (although it actually 
does) when running hwclock --debug.  Also, I see an oddity that may be 
related - ping reports zero (as in 0 msec) round trip times always.  I 
configured CONFIG_RTC into the kernel, and checked the major, minor of 
/dev/rtc on my embedded ramdisk.  Also, I don't see /proc/driver/rtc.  

Is this normal behavior with NEW_TIME_C  configurations?  I've checked 
my rtc_get_time and rtc_set_time, ..., like I said, the 'date' program 
works, reading and writing to the clock.

Thanks,
Lanny DeVaney




From owner-linux-mips@oss.sgi.com Mon Apr 15 15:15:28 2002
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$B"#A49q$N?M:`%P%s%/$XE>?&$N(B
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From owner-linux-mips@oss.sgi.com Mon Apr 15 17:29:49 2002
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	Mon, 15 Apr 2002 17:18:08 -0700
Date: Mon, 15 Apr 2002 17:18:07 -0700
From: Jun Sun <jsun@mvista.com>
To: Lanny DeVaney <ldevaney@redhat.com>
Subject: Re: RTC question
Message-ID: <20020415171807.A16300@mvista.com>
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Ralf has not checked in the higher-level RTC driver yet.  You can either
build a kernel from the linux-mips project on sourceforge.net, where the driver
is included, or try to apply the outdated patch from

http://linux.junsun.net/patches/oss.sgi.com/submitted/011110.mips-rtc.011110.1900.patch

It was created on Nov 11, 2001.

Jun

On Mon, Apr 15, 2002 at 04:52:39PM -0500, Lanny DeVaney wrote:
> I've used the NEW_TIME_C method to implement support for the Dallas 1501 
> RTC in my MIPS port .  I now successfully read the hw clock, and the 
> date program works, and I can change the time.
> 
> However, the hwclock program tells me that it can't access the Hardware 
> Clock and tells me that /dev/rtc doesn't exist (although it actually 
> does) when running hwclock --debug.  Also, I see an oddity that may be 
> related - ping reports zero (as in 0 msec) round trip times always.  I 
> configured CONFIG_RTC into the kernel, and checked the major, minor of 
> /dev/rtc on my embedded ramdisk.  Also, I don't see /proc/driver/rtc.  
> 
> Is this normal behavior with NEW_TIME_C  configurations?  I've checked 
> my rtc_get_time and rtc_set_time, ..., like I said, the 'date' program 
> works, reading and writing to the clock.
> 
> Thanks,
> Lanny DeVaney
> 
> 
> 

From owner-linux-mips@oss.sgi.com Tue Apr 16 00:40:47 2002
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Date: Tue, 16 Apr 2002 00:41:36 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: William Jhun <wjhun@ayrnetworks.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: rm7k flush_icache_line() in rm7k_dma_cache_*
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On Mon, Apr 15, 2002 at 11:38:44AM -0700, William Jhun wrote:

> We've been experiencing some problems with our RM7k cache code which is
> based on the sgi mm/rm7k.c from around kernel version 2.4.2. While
> trying to track this down, we noticed that someone added a call to
> flush_icache_line() in the rm7k_dma_cache_*() routines (now
> mm/c-rm7k.c). What is the reason for this? It is our understanding that
> the instruction cache does not write back, and so stale cache lines in
> the icache which are later used for data/dma would seem innocuous. Is
> this not true? We could not find a CVS log entry to explain this,
> either. Did anyone experience problems without these calls to
> flush_icache_line()?

All the DMA cache flushes are only supposed to be used from within the
PCI DMA API that is they don't have to deal with instruction caches ever.
As such these flushes are bogus and I'll remove them.

  Ralf

From owner-linux-mips@oss.sgi.com Tue Apr 16 02:14:00 2002
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Date: Tue, 16 Apr 2002 11:14:49 +0200
From: Guido Guenther <agx@sigxcpu.org>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc: linux-mips@oss.sgi.com
Subject: Re: head.S and init_task.c vs addinitrd
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On Mon, Apr 15, 2002 at 08:13:42PM +0200, Maciej W. Rozycki wrote:
> On Mon, 15 Apr 2002, Guido Guenther wrote:
>
> > Are you telling me the only reason for the changes in
> > init_task.c/head.S
> > were made to break the elf2ecoff/addinitrd "hack"? Where exactly was
> > there a hack in head.S/init_task.c. Please point me to the line of
> > code
> > since I don't understand enough about the kernel to see it.
>
>  I meant it stopped working because it is an ugly hack.  It is too
>  fragile
> to work in all cases.
I admit it's fragile but I'm still puzzled why the changes broke it and
if we can revert those changes on the linux_2_4 branch.
 -- Guido

From owner-linux-mips@oss.sgi.com Tue Apr 16 13:23:20 2002
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Date: Tue, 16 Apr 2002 15:25:41 -0500
From: Louis Hamilton <hamilton@redhat.com>
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Subject: Patch SR71K support - questions
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Hello,

First a little background for the problem I'm looking at:
I picked up an SR71000 support patch (from Jason Gunthorpe <jgg@debian.org>
sent to this list) and have applied it to our 2.4 MIPS kernel tree. 
 This is a Sandcraft
EV-SR71000-500 cpu module running on a Galileo EV-64240-BP base board in big
endian mode.

What happens is the kernel comes up to the point in init where /sbin/init is
execve'd and hangs (or waits) forever.  Since our QED RM7000 module 
(which we
also ported) is able to bootup all the way we don't suspect file system 
problems.

This board has the PMON Galileo Technology monitor ver. 1.4 in 8-bit 
flash which
does some SR71K cache init by doing a secondary/tertiary flash 
initialize operation
as outlined in the SR71K Cpu Spec in section 7.5.18.

At the load_mmu stage of bring-up I noticed I cannot call the 
"clear_enable_caches"
routine without suffering an exeception.  This is in 
arch/mips/mm/c-sr71000.c, routine
ld_mmu_sr71000 where the call is made to clear_enable_caches as a KSEG1 
address.
I noticed the config register K0 is already set (before load_mmu) to 0x3 
(Cached, Write-back)
and that L2, L3 are enabled, no doubt due to some init done by the PMON 
monitor.
Temporarily commenting out the call to clear_enable_caches step, the 
kernel gets past
the exception problem and progresses to the point where execve seems to 
hang.

So my questions are:
Is this the latest SR71K support patch?  (I can't get access in my 
browser to
http://oss.sgi.com/mips/archive to see prior postings on this...)
Is anyone else using this patch?
If so, is it working ok and what hardware flavor(s) are you using?
What SR71K cpu init is your bootloader or monitor doing before your 
kernel runs?
Any ideas why the tag init loop and secondary/tertiary flash invalidate 
step in
clear_enable_caches crashes the boot-up?

Tia, Louis

Louis Hamilton
Red Hat, Inc.
hamilton@redhat.com





From owner-linux-mips@oss.sgi.com Tue Apr 16 17:18:31 2002
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On Tue, 16 Apr 2002, Louis Hamilton wrote:

> What happens is the kernel comes up to the point in init where /sbin/init is
> execve'd and hangs (or waits) forever.  Since our QED RM7000 module 
> (which we also ported) is able to bootup all the way we don't suspect 
> file system problems.

You may want to try disabling support for WAIT, if the errata fix is not
properly engaging for some reason you might hang in init.

> At the load_mmu stage of bring-up I noticed I cannot call the 
> "clear_enable_caches" routine without suffering an exeception.  This is in 
> arch/mips/mm/c-sr71000.c, routine
> ld_mmu_sr71000 where the call is made to clear_enable_caches as a KSEG1 
> address.

That's a bit odd, Linux type exceptions are generally not active when
cache init is done - so the exception must come from pmon?

My stuff was tested without a monitor program like pmon, Linux is the
first thing the processor executed when it came out of reset. The only
init done (in prom_init) is to set the tcache size and enable the tcache
bits.

> I noticed the config register K0 is already set (before load_mmu) to 0x3 
> (Cached, Write-back)
> and that L2, L3 are enabled, no doubt due to some init done by the PMON 
> monitor.

You definately do not want to try to cache init if the caches are turned
on, it will blow away any pending writebacks. This is true on the RM7K
code too, so I'm not sure what the proper solution should be.

This may be why you see it crash when it runs, the stack/etc could be
trashed if kseg0 caching is enabled when cec is called.

Presumably your pmon has been hacked to support SR71K - if it it
touching the caches it is really not safe to use stuff made for RM7K on
the SR71K.

I have tested this on the SR71010A-600 chips, with and without tcache.

> Is this the latest SR71K support patch?  (I can't get access in my 
> browser to
> http://oss.sgi.com/mips/archive to see prior postings on this...)

It is the latest I have posted, internally I have a version that is
against a newer 2.4 kernel, has a bug fix for the cec routine and has the
right name for the chip (woops).

I don't have time to make a proper diff right now, but I have attached
the mm/c-sr71000.c file (note the name change) I don't think the rest of
the patch has really been changed.

Jason


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--1444446418-1735939474-1019002712=:18447--

From owner-linux-mips@oss.sgi.com Wed Apr 17 03:02:22 2002
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From: Andre.Messerschmidt@infineon.com
To: linux-mips@oss.sgi.com
Subject: Wait queue problem
Date: Wed, 17 Apr 2002 12:03:19 +0200
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Hi,

Does anybody else have problems using wait queues in a 2.4.5 MIPS kernel?
When I try to wake up a process from an interrupt it won't start to execute.
It always waits for the timeout before resuming work. 
In principal my code look like this:

wait_queue_head_t wq;

foo() {
init_waitqueue_head(&wq);
interruptible_sleep_on_timeout(&wq,10*HZ);
}

foo_int() {
wake_up_interuptible(&wq);
}

Am I missing something? 

best regards
--
Andre Messerschmidt

Application Engineer
Infineon Technologies AG


From owner-linux-mips@oss.sgi.com Wed Apr 17 03:18:21 2002
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Date: Wed, 17 Apr 2002 12:19:18 +0200
From: Jens Taprogge <taprogge@idg.rwth-aachen.de>
To: Linux MIPS Mailing List <linux-mips@oss.sgi.com>
Subject: vino v4l driver
Message-ID: <20020417101917.GA6694@al.romantica.wg>
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I am trying to get the Indycam working on an Indy R4000SC.

Is someone working on a driver or does someone have an unmaintained 
(half)working driver?

Sorry if this is a FAQ, but I cannot access the mailing list archive.

Regards
Jens


-- 
Jens Taprogge
mailto:taprogge@idg.rwth-aachen.de
Finger taprogge@www.idg.rwth-aachen.de for PGP key.

From owner-linux-mips@oss.sgi.com Wed Apr 17 06:31:14 2002
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	id B40968D35; Wed, 17 Apr 2002 15:32:01 +0200 (CEST)
Date: Wed, 17 Apr 2002 15:32:01 +0200
From: Guido Guenther <agx@sigxcpu.org>
To: Gary.A.Grant@gsk.com
Cc: linux-mips@oss.sgi.com
Subject: Re: Indy --> Linux?
Message-ID: <20020417153201.C31398@gandalf.physik.uni-konstanz.de>
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In-Reply-To: <OFE00701E7.4960DCD3-ON80256B9E.0045F5F8@ha.uk.sbphrd.com>; from Gary.A.Grant@gsk.com on Wed, Apr 17, 2002 at 02:12:57PM +0100
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Hi Gary,
On Wed, Apr 17, 2002 at 02:12:57PM +0100, Gary.A.Grant@gsk.com wrote:
> OK, no problem!
> 
> Hello Guido 
> Here is a hinv and gxfinfo of my Indy......can it be made to run Linux?? 
[..snip..] 
Linux should run fine on your Indy including audio and XFree86.
There are several distributions available like a Red Hat miniport
available at 
 ftp://oss.sgi.com/pub/linux/mips
and Debian available at:
 ftp.debian.org:/debian/dists/woody/main/disks-mips/current
The later one might be slightly easier to set up since it comes with a
netbooted installer. For more information see
 http://www.debian.org/ports/mips
and
 http://www.linux-debian.de/howto/debian-mips-woody-install.html
Regards,
 -- Guido

From owner-linux-mips@oss.sgi.com Wed Apr 17 15:21:04 2002
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From: "Mark Huang" <mhuang@broadcom.com>
To: "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>
Subject: DBE table ordering
Date: Wed, 17 Apr 2002 15:21:56 -0700
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search_one_table() in arch/mips/kernel/traps.c does a binary search for the
erring instruction address in the DBE table. What guarantee is there that
the table is in order by instruction address? It looks like the code hasn't
changed in a long time and it has worked for me since at least 2.4.3.
However, a top of tree (2.5.1) kernel crashes on me as soon as a get_dbe()
fails, because the table is out of order at link time---possibly run time if
there's some code that I missed that is reordering the table at __init. Any
ideas?

Thanks in advance,

--Mark


From owner-linux-mips@oss.sgi.com Wed Apr 17 17:45:23 2002
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Date: Wed, 17 Apr 2002 17:30:17 -0700
From: Jun Sun <jsun@mvista.com>
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Subject: ieee754_csr and smp (again)
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OK, ieee754_csr is a global variable and it screws up fpu emulation code under 
smp.

I have a patch that makes the problem go away.  It basically transform this 
variable into an array of global variables.  Each cpu only uses one of the 
elements.  See the attachment.

That patch works, but I think there might be a better fix.  Looking through 
the code, I am rather confused by the usage of this variable.  Hopefully 
someone with more better knowledge can help me out here.

. should ieee754_csr be a per-thread variable?  If yes, we should just use the 
current->thread->xxx instead of this global variable.

. what is ieee754_csr for anyway?

. Some of the fields in ieee754_csr (such as nod, rm, cx) gets set in 
fpu_emulator_cop1Handler().  But what about others?

. I can't find anywhere we write iee754_csr back to the current->thread 
structure.  Do I miss anything?

Thanks.

Jun

--------------010108030005080606060305
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Copy from the patch checked into our EAP.  This
is still a little hackish.  Hopefully we can settle it better later.
A per-cpu page would be nice so that we don't have declare arrays.

BTW, ralf thinks ieee754_csr should belong to per thread fpu structure.
I check it in now anyway so that we have some reliable for running.

Jun

diff -Nru smp/arch/mips/kernel/traps.c.orig smp/arch/mips/kernel/traps.c
--- smp/arch/mips/kernel/traps.c.orig	Wed Feb 13 16:23:12 2002
+++ smp/arch/mips/kernel/traps.c	Thu Apr 11 15:46:11 2002
@@ -678,14 +678,11 @@
 	return;
 
 fp_emul:
-	if (last_task_used_math != current) {
-		if (!current->used_math) {
-			fpu_emulator_init_fpu();
-			current->used_math = 1;
-		}
+	if (!current->used_math) {
+		fpu_emulator_init_fpu();
+		current->used_math = 1;
 	}
 	sig = fpu_emulator_cop1Handler(regs);
-	last_task_used_math = current;
 	if (sig)
 		force_sig(sig, current);
 	return;
diff -Nru smp/arch/mips/math-emu/ieee754.h.orig smp/arch/mips/math-emu/ieee754.h
--- smp/arch/mips/math-emu/ieee754.h.orig	Tue Jan 22 17:11:40 2002
+++ smp/arch/mips/math-emu/ieee754.h	Thu Apr 11 15:46:11 2002
@@ -323,7 +323,7 @@
 
 /* the control status register 
 */
-struct ieee754_csr {
+struct ieee754_csr_struct {
 	unsigned pad:13;
 	unsigned nod:1;		/* set 1 for no denormalised numbers */
 	unsigned cx:5;		/* exceptions this operation */
@@ -331,7 +331,13 @@
 	unsigned sx:5;		/* exceptions total */
 	unsigned rm:2;		/* current rounding mode */
 };
-extern struct ieee754_csr ieee754_csr;
+
+#include <linux/sched.h>
+#include <linux/threads.h>
+#include <linux/smp.h>
+#include <asm/current.h>
+extern struct ieee754_csr_struct ieee754_csr_array[NR_CPUS];
+#define	ieee754_csr ieee754_csr_array[smp_processor_id()]
 
 static __inline unsigned ieee754_getrm(void)
 {
diff -Nru smp/arch/mips/math-emu/ieee754.c.orig smp/arch/mips/math-emu/ieee754.c
--- smp/arch/mips/math-emu/ieee754.c.orig	Tue Jan 15 13:25:24 2002
+++ smp/arch/mips/math-emu/ieee754.c	Thu Apr 11 15:46:11 2002
@@ -52,7 +52,7 @@
 
 /* the control status register 
 */
-struct ieee754_csr ieee754_csr;
+struct ieee754_csr_struct ieee754_csr_array[NR_CPUS];
 
 /* special constants
 */
diff -Nru smp/arch/mips/math-emu/cp1emu.c.orig smp/arch/mips/math-emu/cp1emu.c
--- smp/arch/mips/math-emu/cp1emu.c.orig	Tue Jan 15 13:25:24 2002
+++ smp/arch/mips/math-emu/cp1emu.c	Thu Apr 11 15:46:12 2002
@@ -945,7 +945,7 @@
 static ieee754##p fpemu_##p##_##name (ieee754##p r, ieee754##p s, \
     ieee754##p t) \
 { \
-    struct ieee754_csr ieee754_csr_save; \
+    struct ieee754_csr_struct ieee754_csr_save; \
     s = f1 (s, t); \
     ieee754_csr_save = ieee754_csr; \
     s = f2 (s, r); \
diff -Nru smp/arch/mips/math-emu/dp_sqrt.c.orig smp/arch/mips/math-emu/dp_sqrt.c
--- smp/arch/mips/math-emu/dp_sqrt.c.orig	Tue Jan 15 13:25:24 2002
+++ smp/arch/mips/math-emu/dp_sqrt.c	Thu Apr 11 15:46:12 2002
@@ -37,7 +37,7 @@
 
 ieee754dp ieee754dp_sqrt(ieee754dp x)
 {
-	struct ieee754_csr oldcsr;
+	struct ieee754_csr_struct oldcsr;
 	ieee754dp y, z, t;
 	unsigned scalx, yh;
 	COMPXDP;

--------------010108030005080606060305--


From owner-linux-mips@oss.sgi.com Wed Apr 17 18:09:43 2002
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From: Daniel Robert Franklin <daniel@ieee.uow.edu.au>
Subject: Linux on the Origin 2000
To: linux-mips@oss.sgi.com
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Hi,

My research centre has been donated a beautiful SGI Origin 2000 server (512
MB RAM, 2x180 MHz R10000 CPU) machine... we got IRIX up on it, but I'm quite
keen to try running Linux on it as well. I note in the linux-mips HOWTO
there is a mention that as of last year the kernel boots, and code to
support this machine is now in CVS, but it all sounds rather experimental.

Can anyone tell me what the status of Origin 2000 support is, and is it
worth trying to install? I'd be quite keen to help in testing Linux on this
machine (if I can get Debian up and running on it I will be very very happy
indeed :)

Thanks,

- Daniel

-- 
******************************************************************************
*      Daniel Franklin - Postgraduate student in Electrical Engineering
*      University of Wollongong, NSW, Australia  *  d.franklin@ieee.org
******************************************************************************

From owner-linux-mips@oss.sgi.com Wed Apr 17 20:54:53 2002
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From: Keith Owens <kaos@ocs.com.au>
To: "Mark Huang" <mhuang@broadcom.com>
Cc: "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>
Subject: Re: DBE table ordering 
In-reply-to: Your message of "Wed, 17 Apr 2002 15:21:56 MST."
             <E1EBEF4633DBD3118AD1009027E2FFA0023FB64D@mail.sv.broadcom.com> 
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On Wed, 17 Apr 2002 15:21:56 -0700, 
"Mark Huang" <mhuang@broadcom.com> wrote:
>search_one_table() in arch/mips/kernel/traps.c does a binary search for the
>erring instruction address in the DBE table. What guarantee is there that
>the table is in order by instruction address? It looks like the code hasn't
>changed in a long time and it has worked for me since at least 2.4.3.
>However, a top of tree (2.5.1) kernel crashes on me as soon as a get_dbe()
>fails, because the table is out of order at link time---possibly run time if
>there's some code that I missed that is reordering the table at __init. Any
>ideas?

The kernel relies on several tables being correctly ordered by the
linker, including the initialization vectors, so it is a fair bet that
the linker is correctly appended these tables as the kernel is built.
What is more likely is that one of the exception table entries was
created out of order.  Please send the following output to me, not the
list.

objdump -h vmlinux
objdump -s -j __ex_table vmlinux
nm -a vmlinux


From owner-linux-mips@oss.sgi.com Wed Apr 17 21:07:54 2002
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Date: Wed, 17 Apr 2002 21:08:43 -0700
From: "H . J . Lu" <hjl@lucon.org>
To: linux-mips@oss.sgi.com
Subject: Update of RedHat 7.1/mips
Message-ID: <20020417210843.A10182@lucon.org>
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FYI, I updated a few packages in RedHat 7.1/mips. It has new gcc,
glibc, binutils and gdb.

H.J.
---
My mini-port of RedHat 7.1 is at

ftp://oss.sgi.com/pub/linux/mips/redhat/7.1/

you should be able to put a small RedHat 7.1 on the mips/mipsel box and
compile the rest of RedHat 7.1 yourselves.

Here are something you should know:

1. The cross compiler hosted on RedHat 7.[12]/x86 is provided as a
toolchain rpm. The binary rpms for the mips and mipsel cross compilers
are included. This toolchain is a combination of gcc, binutils, gdb and
glibc. It is packaged for the cross compiling. It allows you to cross
compile to RedHat 7.1/mips from a RedHat 7.[12]/x86 host.
2. You have to find a way to put those rpms on your machine. I use
network boot and NFS root to do it.
3. install.tar.bz2 has some scripts to prepare NFS root and install
RedHat 7.1 on a hard drive.
4. baseline.tar.bz2 contains the cross build tree.
5. Since everything is cross compiled from x86, which is little endian,
many data files for mips, which is big endian, are either missing or
wrong. To get those data files for mips, you have to rebuild/install
the folowing rpms:

cracklib
glibc

natively on Linux/mips.

Thanks.


H.J.

From owner-linux-mips@oss.sgi.com Wed Apr 17 23:38:26 2002
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Subject: Re: DBE table ordering
From: "Mark Huang" <mhuang@broadcom.com>
To: "Keith Owens" <kaos@ocs.com.au>
cc: "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>
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>From the objdump output, it looks like the exception table is in order
at link time, but the DBE table is definitely out of order. What seems
to be throwing it off is the dummy call to get_dbe() in traps.c. After
sprinkling a few more calls to get_dbe() around the kernel and seeing
what happens during link, it looks like any call to get_dbe() inside an
__init section (or probably any explicitly located section) will throw
off the ordering of the table. 

I'd say just change the binary search to a linear one, or reorder the
table at __init time if O(log n) is that important. If there were 600
entries in the table, sure, but I don't really see the benefit of the
additional code to deal with only a handful, as in most cases.

> The kernel relies on several tables being correctly ordered by the
> linker, including the initialization vectors, so it is a fair bet that
> the linker is correctly appended these tables as the kernel is built.
> What is more likely is that one of the exception table entries was
> created out of order.  Please send the following output to me, not the
> list.
> 
> objdump -h vmlinux
> objdump -s -j __ex_table vmlinux
> nm -a vmlinux
> 


--=-gT+ogKjHt2stTVo7XKsc
Content-Disposition: attachment; 
 filename=traps.c.diff
Content-Transfer-Encoding: quoted-printable
Content-Type: text/x-diff; 
 charset=iso-8859-1

Index: arch/mips/kernel/traps.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvs/linux/arch/mips/kernel/traps.c,v
retrieving revision 1.107
diff -u -r1.107 traps.c
--- arch/mips/kernel/traps.c	2002/02/26 23:29:05	1.107
+++ arch/mips/kernel/traps.c	2002/04/18 06:36:06
@@ -360,17 +360,12 @@
 		 unsigned long value)
 {
 	const struct exception_table_entry *mid;
-	long diff;
=20
-	while (first < last) {
-		mid =3D (last - first) / 2 + first;
-		diff =3D mid->insn - value;
-		if (diff < 0)
-			first =3D mid + 1;
-		else
-			last =3D mid;
+	for (mid =3D first; mid <=3D last; mid++) {
+		if (mid->insn =3D=3D value)
+			return mid->nextinsn;
 	}
-	return (first =3D=3D last && first->insn =3D=3D value) ? first->nextinsn =
: 0;
+	return 0;
 }
=20
 extern spinlock_t modlist_lock;

--=-gT+ogKjHt2stTVo7XKsc--


From owner-linux-mips@oss.sgi.com Wed Apr 17 23:50:55 2002
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From: Keith Owens <kaos@ocs.com.au>
To: "Mark Huang" <mhuang@broadcom.com>
Cc: "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>
Subject: Re: DBE table ordering 
In-reply-to: Your message of "17 Apr 2002 23:39:16 MST."
             <1019111956.2095.66.camel@mathom> 
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On 17 Apr 2002 23:39:16 -0700, 
"Mark Huang" <mhuang@broadcom.com> wrote:
>From the objdump output, it looks like the exception table is in order
>at link time, but the DBE table is definitely out of order. What seems
>to be throwing it off is the dummy call to get_dbe() in traps.c. After
>sprinkling a few more calls to get_dbe() around the kernel and seeing
>what happens during link, it looks like any call to get_dbe() inside an
>__init section (or probably any explicitly located section) will throw
>off the ordering of the table. 

That is what I expected.  Various tables are built up from special
sections in each object.  The linker is correctly appending those
sections to the final table in vmlinux.  The use of multiple text
sections (init, exit, the rest) means that entries in a table for each
object are not necessarily in order, breaking the assumption that the
overall table is in order.

This is a more general problem than mips dbe, other kernel tables and
other architectures will have the same problem.  I will do a general
patch against 2.5.8 to sort these tables at init time, and backport the
general fix to 2.4.19 later.  In the meantime your patch will bypass
the problem for mips dbe.


From owner-linux-mips@oss.sgi.com Thu Apr 18 00:42:23 2002
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Date: Thu, 18 Apr 2002 09:43:30 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Ralf Baechle <ralf@uni-koblenz.de>, linux-mips@fnet.fr,
   linux-mips@oss.sgi.com
Subject: [patch] linux: Export the DECstation's "system slot" address
Message-ID: <Pine.GSO.3.96.1020418093916.20187B-100000@delta.ds2.pg.gda.pl>
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Hello,

 Here is a trivial patch to export the base address of the "system slot" 
of TURBOchannel systems.  Needed if the declance driver is to be
modularized. 

 Ralf, please apply.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

diff -up --recursive --new-file linux-mips-2.4.18-20020412.macro/drivers/tc/tc.c linux-mips-2.4.18-20020412/drivers/tc/tc.c
--- linux-mips-2.4.18-20020412.macro/drivers/tc/tc.c	2002-04-10 02:58:49.000000000 +0000
+++ linux-mips-2.4.18-20020412/drivers/tc/tc.c	2002-04-17 00:53:43.000000000 +0000
@@ -247,4 +247,4 @@ EXPORT_SYMBOL(release_tc_card);
 EXPORT_SYMBOL(get_tc_base_addr);
 EXPORT_SYMBOL(get_tc_irq_nr);
 EXPORT_SYMBOL(get_tc_speed);
-
+EXPORT_SYMBOL(system_base);


From owner-linux-mips@oss.sgi.com Thu Apr 18 01:01:21 2002
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Date: Thu, 18 Apr 2002 10:02:34 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Reply-To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Ralf Baechle <ralf@uni-koblenz.de>, Dave Airlie <airlied@csn.ul.ie>,
   linux-mips@fnet.fr, linux-mips@oss.sgi.com
Subject: [patch] linux: declance: add module support, miscellanea
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Hello,

 I've made several updates to the declance driver:

1. Module support.  Tested for an I/O ASIC setup (/240).  Changes seem to
work well both as a module and when built-in.

2. Multiple interface support.  While it should work in principle, its
operation is impossible until PMAD-xx support is fixed.

3. Various fixes and clean-ups, including preparations to merge PMAD-xx
changes by Dave.

 Due to a considerable size of the patch I'm not including it here.  It's
available at:
'ftp://ftp.ds2.pg.gda.pl/pub/macro/linux/patch-mips-2.4.18-20020412-declance-11.gz'. 
For module support the "system_base" patch is required.  It was sent to
the list and is also available at the above address.

 I'd be pleased to hear from 2100/3100 users if the driver works fine for
them. 

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Thu Apr 18 02:38:45 2002
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Message-ID: <3CBE93CA.EB27DB1A@niisi.msk.ru>
Date: Thu, 18 Apr 2002 13:37:14 +0400
From: "Gleb O. Raiko" <raiko@niisi.msk.ru>
Organization: NIISI RAN
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To: Keith Owens <kaos@ocs.com.au>
CC: "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>
Subject: Re: DBE table ordering
References: <314.1019112700@ocs3.intra.ocs.com.au>
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Keith,

Keith Owens wrote:
> 
> This is a more general problem than mips dbe, other kernel tables and
> other architectures will have the same problem.  I will do a general
> patch against 2.5.8 to sort these tables at init time, and backport the
> general fix to 2.4.19 later.  In the meantime your patch will bypass
> the problem for mips dbe.

Consider it as a feature. It was known from the time Ralf designed it. 

If you really hate this behaviour and want to change it, I guess just
linear serach is OK. Or just introduce set of get/put_dbe{b,w,l}
routines instead of macros and expect just one fault address (well, 6
addresses, if you care). I think, it's better than rearranging the table
on startup (your proposal) and searching in several dbe tables (was
introduced last year).

Another table (in fact, I know only the unaligned access table in
arch/mips*/unaligned.c) is immune, because call from an __init routine
from user space is somewhat tricky and, anyway, isn't allowed.

If you know other tables, I think it's better to find a solution on
individual basis. No needs for a common solution here. 

Regards,
Gleb.

From owner-linux-mips@oss.sgi.com Thu Apr 18 02:48:45 2002
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From: Keith Owens <kaos@ocs.com.au>
To: "Gleb O. Raiko" <raiko@niisi.msk.ru>
Cc: "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>
Subject: Re: DBE table ordering 
In-reply-to: Your message of "Thu, 18 Apr 2002 13:37:14 +0400."
             <3CBE93CA.EB27DB1A@niisi.msk.ru> 
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On Thu, 18 Apr 2002 13:37:14 +0400, 
"Gleb O. Raiko" <raiko@niisi.msk.ru> wrote:
>If you really hate this behaviour and want to change it, I guess just
>linear serach is OK.

Performance matters for these tables.  It is worth doing one sort at
boot time to let the kernel run faster all the time.  For some tables
(ia64 unwind) the API mandates that the table be in ascending order.

I just sent a general sort routine to l-k for comments before I do the
rest of the work.


From owner-linux-mips@oss.sgi.com Thu Apr 18 02:48:56 2002
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Message-ID: <3CBE96CD.43620756@niisi.msk.ru>
Date: Thu, 18 Apr 2002 13:50:05 +0400
From: "Gleb O. Raiko" <raiko@niisi.msk.ru>
Organization: NIISI RAN
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To: "H . J . Lu" <hjl@lucon.org>
CC: linux-mips@oss.sgi.com
Subject: Re: Update of RedHat 7.1/mips
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Hi,

"H . J . Lu" wrote:
> 
> FYI, I updated a few packages in RedHat 7.1/mips. It has new gcc,
> glibc, binutils and gdb.

Will your glibc work on r3k (w/o ll, sc, double word instructions)? Or
you just don't care about 3rd class processors? 

Do you compile your distribution with -mips2 or there is a chance it
will work on r3k?
 
Regards,
Gleb.

From owner-linux-mips@oss.sgi.com Thu Apr 18 05:08:35 2002
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Date: Thu, 18 Apr 2002 16:03:40 +0400
From: "Gleb O. Raiko" <raiko@niisi.msk.ru>
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To: Keith Owens <kaos@ocs.com.au>
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Keith Owens wrote:
> 
> On Thu, 18 Apr 2002 13:37:14 +0400,
> "Gleb O. Raiko" <raiko@niisi.msk.ru> wrote:
> >If you really hate this behaviour and want to change it, I guess just
> >linear serach is OK.
> 
> Performance matters for these tables.  It is worth doing one sort at
> boot time to let the kernel run faster all the time.  For some tables
> (ia64 unwind) the API mandates that the table be in ascending order.
> 

No, performance doesn't matter here. First, we are speaking about DBE
exception which slowdowns performance. Second, get/put_dbe are used for
peripherial accesses which are slow anyway. Third, do you really want to
speed up probe routines where those macros are used? I guess, not.

Then, how many addresses you have in your dbe_table, 1000 or 6 ? I guess
the latter. In the worst case, linear search requires 12 comparisons,
while binary search takes 6. 6 extra comparisons is nothing in the dbe
handler. If you have more than 6 addresses in the table, just replace
macros by routines and get exactly 6. And 6 comparisons, btw, there is
no need for loop, just 6 if-statements.

I dont't know about other tables and other arches. Perhaps, they need
sorting of some tables. But, definetely, sorting isn't required for mips
dbe/unaligned access tables.

Regards,
Gleb.

From owner-linux-mips@oss.sgi.com Thu Apr 18 06:04:33 2002
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Date: Thu, 18 Apr 2002 09:05:39 -0400
Subject: FYI: release of snow toolchain builder 1.4
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I finally got around to writing a built-from-bare-sources toolchain for 
snow.  snow's an alternate ABI for small MIPS systems which uses 
statically linked dynamically loaded shared libraries in -fno-pic 
-mno-abicalls mode.  It has massive performance advantages on the Agenda 
VR3's Vr4181.

New in this release is jumptable support; when used properly, it should 
allow careful library maintainers to provide forward binary 
compatibility against shared libraries.

Snow could be the basis for MIPS16 work, since -fpic MIPS16 looks 
difficult.  However, the compiler I currently use, Debian gcc 2.95.4, is 
completely broken for -mips16.  (I'd say "can't compile dhrystone" is a 
good metric.  :-)  If anybody sends me a known-good MIPS16 platform, I'd 
be delighted to make snow work on it.  (At this point, getting MIPS16 
working under Linux is a matter of personal honor to me.)

For background information on snow, see 
http://www.desertscenes.net/agenda/snow/ , although it's slightly out of 
date.  The vrp stuff mentioned below is documented at 
http://www.desertscenes.net/index.cgi/Agenda_20Romdisk_20Building_20Instructions 
but is unlikely to be useful for other platforms as-is.

Here's the announcement I made on the agenda-snow mailing list:

snow-build-1.4 is available at http://place.org/~nop/snow-
build-1.4.tar.gz .  It builds a complete snow toolchain from sources, 
using the new jumptable snow implementation, which may allow for 
forwards binary compatibility of libraries.  Also, it can build XFree86 
4.2.0 for the Agenda from sources, including shared library-linked 
executables of many xc apps.

Note that it is not compatible with the Agenda 1.2.0 toolchain, and it 
is likely that there will be a period of thrashing out library export 
lists that will break apps linked with it; however, this should improve 
future compatibility.

Included in this release is an experimental interface to Brian Webb's 
snow distribution and build tools.  It will build a working (if somewhat 
minimal) romdisk.  Some changes to other source packages will be 
required; Debian gcc-2.95.4 has a different set of quirks from the gcc 
snapshot used previously, and ideally applications should switch from 
CC='mipsel-linux-gcc -B/opt/snow-gcc/lib/snow/' to 
CC='mipsel-linux-snow-gcc' to get rid of fixed paths in the build 
process.  (Of course VRP sources that use ${VRP_COMPILER_CC} get this 
for free.)

Documentation remains minimal, but hopefully not much is required to at 
least watch the pretty build scroll by.

Necessary sources are again mirrored at http://vhl-
tools.sf.net/snow-src/ .

Gloating summary: after downloading the required source tarballs, you 
edit a config file to tell it where to build.  Then, you type "make" in 
builder/ and "make" in vrp-build/, and around 45 minutes later out pops 
a romdisk!

Let me know if it doesn't build on your box.  The only two odd tools 
you'll need are for the vrp-build section.  ash wants byacc.  I want 
fakeroot, http://packages.debian.org/testing/utils/fakeroot.html , 
because I don't believe in building software as root.  If you're daring, 
you can run the vrp-build section as root and nuke the calls to fakeroot.

Jay


From owner-linux-mips@oss.sgi.com Thu Apr 18 06:25:34 2002
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Date: Thu, 18 Apr 2002 08:25:53 -0500
From: "Steven J. Hill" <sjhill@cotw.com>
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Greetings.

I'm still "really close" to getting the MIPS uClibc dynamic linker working. I
finally took some time to collect register dumps and values to see if someone
can see something that I'm not.

I took the resolver assembly code for MIPS verbatim from GLIBC and
massaged it a bit for the uClibc framework. The file looks like this:

----------------------------------------------------------------------------
    .text
    .align  2
    .globl  _dl_linux_resolve
    .type   _dl_linux_resolve,@function
    .ent    _dl_linux_resolve
    _dl_linux_resolve:
        .frame  $29, 40, $31
        .set noreorder
        move    $3, $28         # Save GP
        addu    $25, 8          # t9 ($25) now points at .cpload instruction
        .cpload $25             # Compute GP
        .set reorder
        move    $2, $31         # Save slot call pc
        subu    $29, 40         # Save arguments and sp value in stack
        .cprestore 32
        sw      $15, 36($29)
        sw      $4, 16($29)
        sw      $5, 20($29)
        sw      $6, 24($29)
        sw      $7, 28($29)
        move    $4, $24
        move    $5, $15
        move    $6, $3
        move    $7, $2
        jal     _dl_linux_resolver
        lw      $31, 36($29)
        lw      $4, 16($29)
        lw      $5, 20($29)
        lw      $6, 24($29)
        lw      $7, 28($29)
        addu    $29, 40
        move    $25, $2
        jr      $25
    .size _dl_linux_resolve,.-_dl_linux_resolve
    .end _dl_linux_resolve
----------------------------------------------------------------------------

The function, _dl_linux_resolver, looks like this:

----------------------------------------------------------------------------
    void _dl_linux_resolver(void)
    {
        unsigned long foo;

        __asm__("\tmove %0, $7\t\n":"=r"(foo));
        SEND_ADDRESS_STDERR(foo,1);
        __asm__("\tmove %0, $15\t\n":"=r"(foo));
        SEND_ADDRESS_STDERR(foo,1);
        __asm__("\tmove %0, $24\t\n":"=r"(foo));
        SEND_ADDRESS_STDERR(foo,1);
        __asm__("\tmove %0, $25\t\n":"=r"(foo));
        SEND_ADDRESS_STDERR(foo,1);
        __asm__("\tmove %0, $28\t\n":"=r"(foo));
        SEND_ADDRESS_STDERR(foo,1);
        __asm__("\tmove %0, $29\t\n":"=r"(foo));
        SEND_ADDRESS_STDERR(foo,1);
        __asm__("\tmove %0, $31\t\n":"=r"(foo));
        SEND_ADDRESS_STDERR(foo,1);
        __asm__("\tlw %0, 0($25)\t\n":"=r"(foo));
        SEND_ADDRESS_STDERR(foo,1);
        __asm__("\tlw %0, 0($29)\t\n":"=r"(foo));
        SEND_ADDRESS_STDERR(foo,1);
    
        while(1);
    }
----------------------------------------------------------------------------

The output looks like this:

    ELF header=0x2aaa8000
    First Dynamic section entry=0x2aaa80cc
    About to do library loader relocations.
    Done relocating library loader, so we can now
            use globals and make function calls!
    GOT found at 0x2aaaf000
    Lib Loader: (0x2aaa8000) /usr/mipsel-linux-uclibc/lib/ld-uClibc.so.0
    searching for library: 'libc.so.0'
    searching in ldso dir: /usr/mipsel-linux-uclibc/lib
    Loading:    (0x2aaef000) /usr/mipsel-linux-uclibc/lib/libc.so.0
    Beginning relocation fixups
    Beginning copy fixups
    Calling init/fini for shared libraries
    Calling application main()
    0x0         <--  $7
    0x7         <--  $15
    0x0         <--  $24
    0x7fff7a30  <--  $25
    0x4d954     <--  $28
    0x7fff7a28  <--  $29
    0x2aaa8a6c  <--  $31
    0xa         <--  0($25)
    0x4d954     <--  0($29)

According to 'readelf' and a 'objdump -d':

                   GOT = 0x000463d0
     _dl_linux_resolve = 0x00000990
    _dl_linux_resolver = 0x00000a6c

Ignore for the minute that we are passing four arguments when in fact
we won't even use them. Now let us look at the values in the different
registers:

     $7 - according the assembly code above, it should contain the old value
          of $31, but instead it's zero...that doesn't seem right

-- 
    $15 - according to the comments in the 'dl-machine.h' file from GLIBC,
          this value should be the return address to the caller of the
          function, but it's value is 7, that doesn't seem right either

    $24 - accrding to the comments in the 'dl-machine.h' file from GLIBC,
          this value should be the index for this function symbol in .dynsym,
          which probably isn't right

    $25 - this should be the address of the function called, but the value
          gets overwritten right after the function prologue as you can see,
          and it's value is 0xa for whatever reason

               00000a6c <_dl_linux_resolver>:
                    a6c:       3c1c0005        lui     gp,0x5
                    a70:       279cd954        addiu   gp,gp,-9900
                    a74:       0399e021        addu    gp,gp,t9
                    a78:       27bdff18        addiu   sp,sp,-232
                    a7c:       afbc0000        sw      gp,0(sp)
                    a80:       27b90008        addiu   t9,sp,8
                    a84:       afbc00e0        sw      gp,224(sp)

    $28 - this should be pointing to the GOT, let's see if that's right. Using 
          the disassembly above the first two instructions give us
          gp = 0x0005000 - 0x000026ac which is 0x0004d954 and that matches
          the value printed above. I'm going to ignore the third assembly
          instruction, so:

             0x00007ff0 - (0x0004d954 - 0x000463d0) = 0x00000a6c

          which is indeed the address of '_dl_linux_resolver', but that means
          that t9/$25 was zero when we entered the function which should
          not be

    $29 - this is the stack pointer and if we dereference that we get the
          value of the $28 register, is that correct?

    $31 - this is the return address and that return address turns out to
          be '_dl_linux_resolver' which should be '_dl_linux_resolve' I
          thought even though after we fix up the GOT entry, we will jump
          to that location

So, what is the problem you say? If I attempt to make a function call or
access a global variable outside of the '_dl_linux_resolver' like calling
'dl_dprintf' or attempt an instruction like:

    __asm__("\tla %0, _dl_linux_resolve\t\n":"r="(foo));

the linker SEFAULTs which means that the GP value is incorrect, even though
it appears to be correct from the above? Any insight on what is going on?
Or perhaps I don't have a complete understanding of PIC code yet. Clearly,
the resolver stub is being called and the resolver function is being
entered. I am unable to see how the stack and registers could be getting
trashed. I have also placed the dynamic linker ELF binary on my FTP site
along with this post at (ftp://ftp.cotw.com/MIPS/uclibc). Insight
appreciated. Thanks.

-Steve

 Steven J. Hill - Embedded SW Engineer

From owner-linux-mips@oss.sgi.com Thu Apr 18 09:31:14 2002
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From: "H . J . Lu" <hjl@lucon.org>
To: "Gleb O. Raiko" <raiko@niisi.msk.ru>
Cc: linux-mips@oss.sgi.com
Subject: Re: Update of RedHat 7.1/mips
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On Thu, Apr 18, 2002 at 01:50:05PM +0400, Gleb O. Raiko wrote:
> Hi,
> 
> "H . J . Lu" wrote:
> > 
> > FYI, I updated a few packages in RedHat 7.1/mips. It has new gcc,
> > glibc, binutils and gdb.
> 
> Will your glibc work on r3k (w/o ll, sc, double word instructions)? Or
> you just don't care about 3rd class processors? 
> 

I didn't compile anything with -mipsN. But I don't have a r3k to test.


H.J.

From owner-linux-mips@oss.sgi.com Thu Apr 18 09:48:26 2002
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"H . J . Lu" wrote:
> 
> On Thu, Apr 18, 2002 at 01:50:05PM +0400, Gleb O. Raiko wrote:
> > Hi,
> >
> > "H . J . Lu" wrote:
> > >
> > > FYI, I updated a few packages in RedHat 7.1/mips. It has new gcc,
> > > glibc, binutils and gdb.
> >
> > Will your glibc work on r3k (w/o ll, sc, double word instructions)? Or
> > you just don't care about 3rd class processors?
> >
> 
> I didn't compile anything with -mipsN. But I don't have a r3k to test.

OK. I will test myself.

Regards,
Gleb.

From owner-linux-mips@oss.sgi.com Thu Apr 18 10:08:48 2002
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"H . J . Lu" <hjl@lucon.org> writes:

> FYI, I updated a few packages in RedHat 7.1/mips. It has new gcc,
> glibc, binutils and gdb.

Is there a quick summary of those changes?  Aside from binutils, which you
already describe, of course---and thank you for that.

Jay


From owner-linux-mips@oss.sgi.com Thu Apr 18 10:59:22 2002
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From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: "Gleb O. Raiko" <raiko@niisi.msk.ru>
cc: Keith Owens <kaos@ocs.com.au>,
   "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>
Subject: Re: DBE table ordering
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On Thu, 18 Apr 2002, Gleb O. Raiko wrote:

> I dont't know about other tables and other arches. Perhaps, they need
> sorting of some tables. But, definetely, sorting isn't required for mips
> dbe/unaligned access tables.

 Still it can be done for consistency.  It won't hurt, will it?

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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From: "H . J . Lu" <hjl@lucon.org>
To: Jay Carlson <nop@nop.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: Update of RedHat 7.1/mips
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On Thu, Apr 18, 2002 at 01:12:22PM -0400, Jay Carlson wrote:
> "H . J . Lu" <hjl@lucon.org> writes:
> 
> > FYI, I updated a few packages in RedHat 7.1/mips. It has new gcc,
> > glibc, binutils and gdb.
> 
> Is there a quick summary of those changes?  Aside from binutils, which you
> already describe, of course---and thank you for that.
> 

I merged all the recent RedHat 7.1 updates. I also took sh-utils from
RedHat 7.2 to fix the date bug. Here is the list.


H.J.
----
-rw-r--r--    1 hjl      hjl        175660 Apr  8 19:14 zlib-1.1.3-25.7.1.src.rpm
-rw-r--r--    1 hjl      hjl        953640 Apr  8 19:17 pam-0.75-18.7.1.src.rpm
-rw-r--r--    1 hjl      hjl       1454824 Apr  8 19:22 ncurses-5.2-8.2.src.rpm
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From owner-linux-mips@oss.sgi.com Thu Apr 18 18:15:52 2002
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Date: Thu, 18 Apr 2002 18:16:53 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Andre.Messerschmidt@infineon.com
Cc: linux-mips@oss.sgi.com
Subject: Re: Wait queue problem
Message-ID: <20020418181652.A25562@dea.linux-mips.net>
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In-Reply-To: <86048F07C015D311864100902760F1DD01B5E8DD@dlfw003a.dus.infineon.com>; from Andre.Messerschmidt@infineon.com on Wed, Apr 17, 2002 at 12:03:19PM +0200
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On Wed, Apr 17, 2002 at 12:03:19PM +0200, Andre.Messerschmidt@infineon.com wrote:

> Does anybody else have problems using wait queues in a 2.4.5 MIPS kernel?
> When I try to wake up a process from an interrupt it won't start to execute.
> It always waits for the timeout before resuming work. 
> In principal my code look like this:
> 
> wait_queue_head_t wq;
> 
> foo() {
> init_waitqueue_head(&wq);
> interruptible_sleep_on_timeout(&wq,10*HZ);
> }
> 
> foo_int() {
> wake_up_interuptible(&wq);
> }
> 
> Am I missing something? 

A bad race condition in that code.  If foo_int is called before your process
had a chance to get to sleep it'll never be woken before the timeout.

  Ralf

From owner-linux-mips@oss.sgi.com Thu Apr 18 18:17:47 2002
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Date: Thu, 18 Apr 2002 18:18:48 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Daniel Robert Franklin <daniel@ieee.uow.edu.au>
Cc: linux-mips@oss.sgi.com
Subject: Re: Linux on the Origin 2000
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On Thu, Apr 18, 2002 at 11:00:22AM +1000, Daniel Robert Franklin wrote:

> My research centre has been donated a beautiful SGI Origin 2000 server (512
> MB RAM, 2x180 MHz R10000 CPU) machine... we got IRIX up on it, but I'm quite
> keen to try running Linux on it as well. I note in the linux-mips HOWTO
> there is a mention that as of last year the kernel boots, and code to
> support this machine is now in CVS, but it all sounds rather experimental.
> 
> Can anyone tell me what the status of Origin 2000 support is, and is it
> worth trying to install? I'd be quite keen to help in testing Linux on this
> machine (if I can get Debian up and running on it I will be very very happy
> indeed :)

Lacking access to a machine the code may have suffered some bitrot but
basically it's supposed to work though not as fullfeatured as the 32-bit
kernel.  We had it running on MP systems of 2-128 processors.

  Ralf

From owner-linux-mips@oss.sgi.com Thu Apr 18 19:00:39 2002
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Date: Thu, 18 Apr 2002 19:01:33 -0700 (PDT)
From: Richard Hodges <rh@matriplex.com>
To: Ralf Baechle <ralf@oss.sgi.com>
cc: Andre.Messerschmidt@infineon.com, linux-mips@oss.sgi.com
Subject: Re: Wait queue problem
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> On Wed, Apr 17, 2002 at 12:03:19PM +0200, Andre.Messerschmidt@infineon.com wrote:
> 
> > Does anybody else have problems using wait queues in a 2.4.5 MIPS kernel?
> > When I try to wake up a process from an interrupt it won't start to execute.
> > It always waits for the timeout before resuming work. 
> > In principal my code look like this:
> > 
> > wait_queue_head_t wq;
> > 
> > foo() {
> > init_waitqueue_head(&wq);
> > interruptible_sleep_on_timeout(&wq,10*HZ);
> > }
> > 
> > foo_int() {
> > wake_up_interuptible(&wq);
> > }
> > 
> > Am I missing something? 

On Thu, 18 Apr 2002, Ralf Baechle wrote:
 
> A bad race condition in that code.  If foo_int is called before your process
> had a chance to get to sleep it'll never be woken before the timeout.

That reminds me :-)  

I have looked around for a version of wait_event_interruptible() that
has a timeout (starting my search in sched.h of course).  Before I get
around to writing my own, does anyone have one already?

Thanks,

-Richard


From owner-linux-mips@oss.sgi.com Fri Apr 19 01:28:42 2002
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Date: Fri, 19 Apr 2002 12:28:08 +0400
From: "Gleb O. Raiko" <raiko@niisi.msk.ru>
Organization: NIISI RAN
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To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
CC: Keith Owens <kaos@ocs.com.au>,
   "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>
Subject: Re: DBE table ordering
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Maciej,

"Maciej W. Rozycki" wrote:
> 
> On Thu, 18 Apr 2002, Gleb O. Raiko wrote:
> 
> > I dont't know about other tables and other arches. Perhaps, they need
> > sorting of some tables. But, definetely, sorting isn't required for mips
> > dbe/unaligned access tables.
> 
>  Still it can be done for consistency.  It won't hurt, will it?
> 

Sure, it won't hurt performance. Just looks stupid in this place.

Even if we'll add something like dbe_memcpy, which will require a lot of
addresses in the table in order ot get adequate performance, it'll be
still stupid. And answer your next question, dbe_memcpy is needed for
accesses to busses like VME where Bus{Abort,Error,Fail} are quite legal
and traditionally all of them are traslated to DBE.

Regards,
Gleb.

From owner-linux-mips@oss.sgi.com Fri Apr 19 05:18:31 2002
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Date: Fri, 19 Apr 2002 14:19:25 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: "Gleb O. Raiko" <raiko@niisi.msk.ru>
cc: Keith Owens <kaos@ocs.com.au>,
   "'linux-mips@oss.sgi.com'" <linux-mips@oss.sgi.com>
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On Fri, 19 Apr 2002, Gleb O. Raiko wrote:

> Sure, it won't hurt performance. Just looks stupid in this place.

 If it's done uniformly across all such tables it isn't stupid any longer. 
The reason is some independent code may depend on the consistency now or
in the future and creating unnecessary exceptions to rules makes
maintenance complicated and prone to hard to detect errors.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Fri Apr 19 08:06:31 2002
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Date: Fri, 19 Apr 2002 17:07:16 +0200
From: Johannes Stezenbach <js@convergence.de>
To: Jay Carlson <nop@nop.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: FYI: release of snow toolchain builder 1.4
Message-ID: <20020419150716.GA6686@convergence.de>
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	Jay Carlson <nop@nop.com>, linux-mips@oss.sgi.com
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On Thu, Apr 18, 2002 at 09:05:39AM -0400, Jay Carlson wrote:
> Snow could be the basis for MIPS16 work, since -fpic MIPS16 looks 
> difficult.  However, the compiler I currently use, Debian gcc 2.95.4, is 
> completely broken for -mips16.  (I'd say "can't compile dhrystone" is a 
> good metric.  :-)  If anybody sends me a known-good MIPS16 platform, I'd 
> be delighted to make snow work on it.  (At this point, getting MIPS16 
> working under Linux is a matter of personal honor to me.)

I've just asked on the gcc mailing list, and someone at
Redhat is currently working on mips16 support on the
CVS trunk, i.e. it won't be in gcc-3.1. If it receives
sufficient testing, gcc-3.2 might work for mips16 stuff.
GNU-Pro from Redhat and the Algorithmics toolchain should
work, too.


Regards,
Johannes


From owner-linux-mips@oss.sgi.com Fri Apr 19 09:14:20 2002
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From: Hartvig Ekner <hartvige@mips.com>
Message-Id: <200204191613.g3JGDpG02449@coplin09.mips.com>
Subject: Re: FYI: release of snow toolchain builder 1.4
To: js@convergence.de (Johannes Stezenbach)
Date: Fri, 19 Apr 2002 18:13:51 +0200 (CEST)
Cc: nop@nop.com (Jay Carlson), linux-mips@oss.sgi.com
In-Reply-To: <20020419150716.GA6686@convergence.de> from "Johannes Stezenbach" at Apr 19, 2002 05:07:16 PM
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We're doing a test-project with Algorithmics, implementing MIPS16 and
MIPS16e PIC support in SDE. I'll post results on the list when we have some.

/Hartvig


Johannes Stezenbach writes:
> 
> On Thu, Apr 18, 2002 at 09:05:39AM -0400, Jay Carlson wrote:
> > Snow could be the basis for MIPS16 work, since -fpic MIPS16 looks 
> > difficult.  However, the compiler I currently use, Debian gcc 2.95.4, is 
> > completely broken for -mips16.  (I'd say "can't compile dhrystone" is a 
> > good metric.  :-)  If anybody sends me a known-good MIPS16 platform, I'd 
> > be delighted to make snow work on it.  (At this point, getting MIPS16 
> > working under Linux is a matter of personal honor to me.)
> 
> I've just asked on the gcc mailing list, and someone at
> Redhat is currently working on mips16 support on the
> CVS trunk, i.e. it won't be in gcc-3.1. If it receives
> sufficient testing, gcc-3.2 might work for mips16 stuff.
> GNU-Pro from Redhat and the Algorithmics toolchain should
> work, too.
> 
> 
> Regards,
> Johannes


-- 
 _    _   _____  ____     Hartvig Ekner        Mailto:hartvige@mips.com
 |\  /| | |____)(____                          Direct: +45 4486 5503
 | \/ | | |     _____)    MIPS Denmark         Switch: +45 4486 5555
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From owner-linux-mips@oss.sgi.com Fri Apr 19 10:05:00 2002
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Date: Fri, 19 Apr 2002 10:06:05 -0700 (PDT)
From: Wayne Gowcher <wgowcher@yahoo.com>
Subject: Equivalent of ioperm / iopl in linux mips ?
To: Linux-MIPS <linux-mips@oss.sgi.com>
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Hi,

I would like to access Io ports from a user land
application. I found a MINI HOWTO giving an exmaple
using ioperm / iopl and then outb, inb. Searching the
mips source code I see that sys_ioperm returns
"ENOSYS" function not implemented.

Does anyone know how to implement ioperm / iopl type
functionality on a mips system. Any example code would
be appreciated.

Wayne.

__________________________________________________
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From owner-linux-mips@oss.sgi.com Sat Apr 20 02:03:19 2002
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Date: Sat, 20 Apr 2002 11:03:26 +0200 (MEST)
From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Wayne Gowcher <wgowcher@yahoo.com>
cc: Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: Equivalent of ioperm / iopl in linux mips ?
In-Reply-To: <20020419170605.41020.qmail@web11906.mail.yahoo.com>
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On Fri, 19 Apr 2002, Wayne Gowcher wrote:
> I would like to access Io ports from a user land
> application. I found a MINI HOWTO giving an exmaple
> using ioperm / iopl and then outb, inb. Searching the
> mips source code I see that sys_ioperm returns
> "ENOSYS" function not implemented.
> 
> Does anyone know how to implement ioperm / iopl type
> functionality on a mips system. Any example code would
> be appreciated.

Like on most architectures that use memory mapped I/O: mmap() the relevant
portion of /dev/mem and read/write to/from the mapped area.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


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From: "Dani Eichhorn" <dani.eichhorn@squix.ch>
To: <linux-mips@oss.sgi.com>
Subject: Challenge S crashes configuring the base system
Date: Fri, 19 Apr 2002 19:57:48 +0200
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Hi!

I really hope anyone can help me out of this.
I've got a SGI Challenge S 180 MHz. First I did set up NetBsd on it and it
worked fine, but because the lack of software I decided to install Linux.
The installation process didn't cause any troubles, but during the first
boot (and every boot afterwards) the Challenge restarts/crashes during
configuring the base system. This is the output of the boot sequence:

2027520+0+95120 entry: 0x8800246c
ARCH: SGI-IP22
PROMLIB: ARC firmware Version 1 Revision 10
CPU: MIPS-R5000 FPU<MIPS-R5000FPC> ICACHE DCACHE SCACHE
CPU revision is: 00002310
FPU revision is: 00002310
Primary instruction cache 32kb, linesize 32 bytes.
Primary data cache 32kb, linesize 32 bytes.
TLB has 48 entries.
Linux version 2.4.16 (root@nocontrol) (gcc version 2.95.4 20011006 (Debian
prere
lease)) #1 Sun Dec 16 16:38:44 CET 2001
MC: SGI memory controller Revision 3
R4600/R5000 SCACHE size 512K, linesize 32 bytes.
Determined physical RAM map:
 memory: 00001000 @ 00000000 (reserved)
 memory: 00001000 @ 00001000 (reserved)
 memory: 00207000 @ 08002000 (reserved)
 memory: 00537000 @ 08209000 (usable)
 memory: 000c0000 @ 08740000 (ROM data)
 memory: 07800000 @ 08800000 (usable)
On node 0 totalpages: 65536
zone(0): 65536 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/sda1
Calibrating system timer... 900000 [180.00 MHz CPU]
zs0: console input
Console: ttyS0 (Zilog8530), 9600 baud
Calibrating delay loop... 179.81 BogoMIPS
Memory: 124104k/128220k available (1732k kernel code, 4116k reserved, 157k
data,
 84k init)
Dentry-cache hash table entries: 32768 (order: 6, 262144 bytes)
Inode-cache hash table entries: 16384 (order: 5, 131072 bytes)
Mount-cache hash table entries: 4096 (order: 3, 32768 bytes)
Buffer-cache hash table entries: 16384 (order: 4, 65536 bytes)
Page-cache hash table entries: 65536 (order: 6, 262144 bytes)
Checking for 'wait' instruction...  available.
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Initializing RT netlink socket
Starting kswapd
VFS: Diskquotas version dquot_6.4.0 initialized
Journalled Block Device driver loaded
initialize_kbd: Keyboard reset failed, no ACK
pty: 256 Unix98 ptys configured
keyboard: Timeout - AT keyboard not present?(ed)
keyboard: Timeout - AT keyboard not present?(f4)
DS1286 Real Time Clock Driver v1.0
streamable misc devices registered (keyb:150, gfx:148)
block: 128 slots per queue, batch=32
RAMDISK driver initialized: 16 RAM disks of 8192K size 1024 blocksize
sgiseeq.c: David S. Miller (dm@engr.sgi.com)
eth0: SGI Seeq8003 08:00:69:0a:1f:8b
loop: loaded (max 8 devices)
SCSI subsystem driver Revision: 1.00
wd33c93-0: chip=WD33c93B/13 no_sync=0xff no_dma=0 debug_flags=0x00
           setup_args=,,,,,,,,,
           Version 1.25 - 09/Jul/1997, Compiled Dec 16 2001 at 16:56:27
scsi0 : SGI WD93
 sending SDTR 0103013f0csync_xfer=2c  Vendor: SEAGATE   Model: ST15150N
 Rev: 0020
  Type:   Direct-Access                      ANSI SCSI revision: 02
Attached scsi disk sda at scsi0, channel 0, id 2, lun 0
SCSI device sda: 8388315 512-byte hdwr sectors (4295 MB)
Partition check:
 sda: sda1 sda2 sda3 sda4
SGI Zilog8530 serial driver version 1.00
tty00 at 0xbfbd9830 (irq = 29) is a Zilog8530
tty01 at 0xbfbd9838 (irq = 29) is a Zilog8530
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP, IGMP
IP: routing cache hash table of 2048 buckets, 16Kbytes
TCP: Hash tables configured (established 16384 bind 16384)
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
EXT3-fs: INFO: recovery required on readonly filesystem.
EXT3-fs: write access will be enabled during recovery.
kjournald starting.  Commit interval 5 seconds
EXT3-fs: recovery complete.
EXT3-fs: mounted filesystem with ordered data mode.
VFS: Mounted root (ext3 filesystem) readonly.
Freeing prom memory: 768kb freed
Freeing unused kernel memory: 84k freed
INIT: version 2.84 booting
Activating swap.
Adding Swap: 66280k swap-space (priority -1)
Checking root file system...
fsck 1.27 (8-Mar-2002)
/dev/sda1: clean, 7735/502944 files, 46723/1004970 blocks
EXT3 FS 2.4-0.9.15, 06 Nov 2001 on sd(8,1), internal journal
System time was Fri Apr 19 17:40:52 UTC 2002.
Setting the System Clock using the Hardware Clock as reference...
System Clock set. System local time is now Fri Apr 19 17:40:55 UTC 2002.
Calculating module dependencies... done.
Loading modules: sg
Checking all file systems...
fsck 1.27 (8-Mar-2002)
Setting kernel variables.
Mounting local filesystems...
nothing was mounted
Running 0dns-down to make sure resolv.conf is ok...done.
Cleaning: /etc/network/ifstate.
Setting up IP spoofing protection: rp_filter.
Configuring network interfaces: done.

Setting the System Clock using the Hardware Clock as reference...
System Clock set. Local time: Fri Apr 19 17:41:05 UTC 2002

Cleaning: /tmp /var/lock /var/run.
Initializing random number generator... done.
Recovering nvi editor sessions... done.
INIT: Entering runlevel: 2
Starting system log daemon: syslogd.
Starting kernel log daemon: klogd.
Starting internet superserver: inetd.
Starting deferred execution scheduler: atd.
Starting periodic command scheduler: cron.
Configuring the base system...


Can you help me? What exactly is happening at this last boot point? You can
hear the disk working for a few seconds after the last point appears, but
then the serial console clears and a new boot sequence is started.

Thank you
Dani Eichhorn
---
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From owner-linux-mips@oss.sgi.com Sun Apr 21 04:10:43 2002
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From: Guido Guenther <agx@sigxcpu.org>
To: Dani Eichhorn <dani.eichhorn@squix.ch>
Cc: linux-mips@oss.sgi.com
Subject: Re: Challenge S crashes configuring the base system
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In-Reply-To: <OBEHJEMLCCGNNEAACCLCAEAICCAA.dani.eichhorn@squix.ch>; from dani.eichhorn@squix.ch on Fri, Apr 19, 2002 at 07:57:48PM +0200
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On Fri, Apr 19, 2002 at 07:57:48PM +0200, Dani Eichhorn wrote:
> Hi!
> 
> I really hope anyone can help me out of this.
> I've got a SGI Challenge S 180 MHz. First I did set up NetBsd on it and it
> worked fine, but because the lack of software I decided to install Linux.
> The installation process didn't cause any troubles, but during the first
> boot (and every boot afterwards) the Challenge restarts/crashes during
> configuring the base system. This is the output of the boot sequence:
> 
> 2027520+0+95120 entry: 0x8800246c
> ARCH: SGI-IP22
> PROMLIB: ARC firmware Version 1 Revision 10
> CPU: MIPS-R5000 FPU<MIPS-R5000FPC> ICACHE DCACHE SCACHE
> CPU revision is: 00002310
> FPU revision is: 00002310
> Primary instruction cache 32kb, linesize 32 bytes.
> Primary data cache 32kb, linesize 32 bytes.
> TLB has 48 entries.
> Linux version 2.4.16 (root@nocontrol) (gcc version 2.95.4 20011006 (Debian
> prere
> lease)) #1 Sun Dec 16 16:38:44 CET 2001
> MC: SGI memory controller Revision 3
> R4600/R5000 SCACHE size 512K, linesize 32 bytes.
> Determined physical RAM map:
>  memory: 00001000 @ 00000000 (reserved)
>  memory: 00001000 @ 00001000 (reserved)
>  memory: 00207000 @ 08002000 (reserved)
>  memory: 00537000 @ 08209000 (usable)
>  memory: 000c0000 @ 08740000 (ROM data)
>  memory: 07800000 @ 08800000 (usable)
> On node 0 totalpages: 65536
> zone(0): 65536 pages.
> zone(1): 0 pages.
> zone(2): 0 pages.
> Kernel command line: root=/dev/sda1
> Calibrating system timer... 900000 [180.00 MHz CPU]
> zs0: console input
> Console: ttyS0 (Zilog8530), 9600 baud
> Calibrating delay loop... 179.81 BogoMIPS
> Memory: 124104k/128220k available (1732k kernel code, 4116k reserved, 157k
> data,
>  84k init)
> Dentry-cache hash table entries: 32768 (order: 6, 262144 bytes)
> Inode-cache hash table entries: 16384 (order: 5, 131072 bytes)
> Mount-cache hash table entries: 4096 (order: 3, 32768 bytes)
> Buffer-cache hash table entries: 16384 (order: 4, 65536 bytes)
> Page-cache hash table entries: 65536 (order: 6, 262144 bytes)
> Checking for 'wait' instruction...  available.
> POSIX conformance testing by UNIFIX
> Linux NET4.0 for Linux 2.4
> Based upon Swansea University Computer Society NET3.039
> Initializing RT netlink socket
> Starting kswapd
> VFS: Diskquotas version dquot_6.4.0 initialized
> Journalled Block Device driver loaded
> initialize_kbd: Keyboard reset failed, no ACK
> pty: 256 Unix98 ptys configured
> keyboard: Timeout - AT keyboard not present?(ed)
> keyboard: Timeout - AT keyboard not present?(f4)
> DS1286 Real Time Clock Driver v1.0
> streamable misc devices registered (keyb:150, gfx:148)
> block: 128 slots per queue, batch=32
> RAMDISK driver initialized: 16 RAM disks of 8192K size 1024 blocksize
> sgiseeq.c: David S. Miller (dm@engr.sgi.com)
> eth0: SGI Seeq8003 08:00:69:0a:1f:8b
> loop: loaded (max 8 devices)
> SCSI subsystem driver Revision: 1.00
> wd33c93-0: chip=WD33c93B/13 no_sync=0xff no_dma=0 debug_flags=0x00
>            setup_args=,,,,,,,,,
>            Version 1.25 - 09/Jul/1997, Compiled Dec 16 2001 at 16:56:27
> scsi0 : SGI WD93
>  sending SDTR 0103013f0csync_xfer=2c  Vendor: SEAGATE   Model: ST15150N
>  Rev: 0020
>   Type:   Direct-Access                      ANSI SCSI revision: 02
> Attached scsi disk sda at scsi0, channel 0, id 2, lun 0
> SCSI device sda: 8388315 512-byte hdwr sectors (4295 MB)
> Partition check:
>  sda: sda1 sda2 sda3 sda4
> SGI Zilog8530 serial driver version 1.00
> tty00 at 0xbfbd9830 (irq = 29) is a Zilog8530
> tty01 at 0xbfbd9838 (irq = 29) is a Zilog8530
> NET4: Linux TCP/IP 1.0 for NET4.0
> IP Protocols: ICMP, UDP, TCP, IGMP
> IP: routing cache hash table of 2048 buckets, 16Kbytes
> TCP: Hash tables configured (established 16384 bind 16384)
> NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
> EXT3-fs: INFO: recovery required on readonly filesystem.
> EXT3-fs: write access will be enabled during recovery.
> kjournald starting.  Commit interval 5 seconds
> EXT3-fs: recovery complete.
> EXT3-fs: mounted filesystem with ordered data mode.
> VFS: Mounted root (ext3 filesystem) readonly.
> Freeing prom memory: 768kb freed
> Freeing unused kernel memory: 84k freed
> INIT: version 2.84 booting
> Activating swap.
> Adding Swap: 66280k swap-space (priority -1)
> Checking root file system...
> fsck 1.27 (8-Mar-2002)
> /dev/sda1: clean, 7735/502944 files, 46723/1004970 blocks
> EXT3 FS 2.4-0.9.15, 06 Nov 2001 on sd(8,1), internal journal
> System time was Fri Apr 19 17:40:52 UTC 2002.
> Setting the System Clock using the Hardware Clock as reference...
> System Clock set. System local time is now Fri Apr 19 17:40:55 UTC 2002.
> Calculating module dependencies... done.
> Loading modules: sg
> Checking all file systems...
> fsck 1.27 (8-Mar-2002)
> Setting kernel variables.
> Mounting local filesystems...
> nothing was mounted
> Running 0dns-down to make sure resolv.conf is ok...done.
> Cleaning: /etc/network/ifstate.
> Setting up IP spoofing protection: rp_filter.
> Configuring network interfaces: done.
> 
> Setting the System Clock using the Hardware Clock as reference...
> System Clock set. Local time: Fri Apr 19 17:41:05 UTC 2002
> 
> Cleaning: /tmp /var/lock /var/run.
> Initializing random number generator... done.
> Recovering nvi editor sessions... done.
> INIT: Entering runlevel: 2
> Starting system log daemon: syslogd.
> Starting kernel log daemon: klogd.
> Starting internet superserver: inetd.
> Starting deferred execution scheduler: atd.
> Starting periodic command scheduler: cron.
> Configuring the base system...
It doesn't really "crash". The porblem is that the installer doesn't
correctly detect the serial console and therefore displays everything on
tty1 not ttyS0. Boot with /bin/bash as init (use "boot init=/bin/bash"
in the PROM) and edit /etc/inittab. Look for lines containing "base-config".
Are you using recent boot-floppies(3.0.22)? If so, please file a
bugreport.
 -- Guido

From owner-linux-mips@oss.sgi.com Mon Apr 22 04:34:43 2002
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To: Geert Uytterhoeven <geert@linux-m68k.org>
cc: Wayne Gowcher <wgowcher@yahoo.com>, Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: Equivalent of ioperm / iopl in linux mips ?
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On Sat, 20 Apr 2002, Geert Uytterhoeven wrote:

> > Does anyone know how to implement ioperm / iopl type
> > functionality on a mips system. Any example code would
> > be appreciated.
> 
> Like on most architectures that use memory mapped I/O: mmap() the relevant
> portion of /dev/mem and read/write to/from the mapped area.

 Hmm, I admit I haven't looked at this matter, but aren't
in/out/ioperm/iopl implemented as library functions in glibc like for
other architectures doing MMIO?  E.g. Alpha does this an it makes porting
programs like XFree86 and SVGATextMode much more straightforward and less
processor-specific.  That makes sense as they are not processor specific
but rather bus-specific.  If we don't do that, we should.  For platforms
without an (E)ISA or a PCI bus ioperm/iopl would simply return an error.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Apr 22 07:47:20 2002
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Subject: Problems with H.J's latest RPM 4.0.4 binary packages
To: linux-mips@oss.sgi.com (user alias)
Date: Mon, 22 Apr 2002 16:46:45 +0200 (MET DST)
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I have started to update our 7.1 RH/MIPS installation images with all the
latest packages from H.J's collection.

The latest RPM package gives an up-front error no matter what one does, but
the command seems to work:

[hartvige@copmalt13 /bin]$ rpm --version
error: Macro %__id_u has empty body
RPM version 4.0.4
[hartvige@copmalt13 /bin]$

Before I start digging any deeper, has anybody else seen this and found the
explanation?

(Note that I have not yet finished compiling the glibc RPM natively as
required - this is currently ongoing).

/Hartvig

-- 
 _    _   _____  ____     Hartvig Ekner        Mailto:hartvige@mips.com
 |\  /| | |____)(____                          Direct: +45 4486 5503
 | \/ | | |     _____)    MIPS Denmark         Switch: +45 4486 5555
T E C H N O L O G I E S   http://www.mips.com  Fax...: +45 4486 5556

From owner-linux-mips@oss.sgi.com Mon Apr 22 07:55:35 2002
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Date: Mon, 22 Apr 2002 16:55:07 +0200 (MEST)
From: Geert Uytterhoeven <geert@linux-m68k.org>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
cc: Wayne Gowcher <wgowcher@yahoo.com>, Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: Equivalent of ioperm / iopl in linux mips ?
In-Reply-To: <Pine.GSO.3.96.1020422132125.7706C-100000@delta.ds2.pg.gda.pl>
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On Mon, 22 Apr 2002, Maciej W. Rozycki wrote:
> On Sat, 20 Apr 2002, Geert Uytterhoeven wrote:
> > > Does anyone know how to implement ioperm / iopl type
> > > functionality on a mips system. Any example code would
> > > be appreciated.
> > 
> > Like on most architectures that use memory mapped I/O: mmap() the relevant
> > portion of /dev/mem and read/write to/from the mapped area.
> 
>  Hmm, I admit I haven't looked at this matter, but aren't
> in/out/ioperm/iopl implemented as library functions in glibc like for
> other architectures doing MMIO?  E.g. Alpha does this an it makes porting

Perhaps. Note that you still need some /proc magic to find out the correct
address to map. Or you can use /dev/ports.

> programs like XFree86 and SVGATextMode much more straightforward and less
> processor-specific.  That makes sense as they are not processor specific
> but rather bus-specific.  If we don't do that, we should.  For platforms
> without an (E)ISA or a PCI bus ioperm/iopl would simply return an error.

Yes indeed.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From owner-linux-mips@oss.sgi.com Mon Apr 22 08:29:24 2002
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Date: Mon, 22 Apr 2002 17:30:08 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Geert Uytterhoeven <geert@linux-m68k.org>
cc: Wayne Gowcher <wgowcher@yahoo.com>, Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: Equivalent of ioperm / iopl in linux mips ?
In-Reply-To: <Pine.GSO.4.21.0204221654140.17279-100000@vervain.sonytel.be>
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On Mon, 22 Apr 2002, Geert Uytterhoeven wrote:

> >  Hmm, I admit I haven't looked at this matter, but aren't
> > in/out/ioperm/iopl implemented as library functions in glibc like for
> > other architectures doing MMIO?  E.g. Alpha does this an it makes porting
> 
> Perhaps. Note that you still need some /proc magic to find out the correct
> address to map. Or you can use /dev/ports.

 Well, for Alpha ioperm/iopl functions check the system type in
/proc/cpuinfo (we seem to have enough information there as well) and
failing this they check a result of readlink of /etc/alpha_systype.  Then
an appropriate region of /dev/mem is mmapped with per-page permissions set
up as requested if ioperm is used (with a worse granularity, though) and
subsequent in/out function invocations access the area as appropriate. 
See sysdeps/unix/sysv/linux/alpha/ioperm.c in glibc for details -- it's a
pretty clever solution with good performance and only a few trade-offs.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Apr 22 08:34:04 2002
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Date: Mon, 22 Apr 2002 17:33:30 +0200 (MEST)
From: Geert Uytterhoeven <geert@linux-m68k.org>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
cc: Wayne Gowcher <wgowcher@yahoo.com>, Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: Equivalent of ioperm / iopl in linux mips ?
In-Reply-To: <Pine.GSO.3.96.1020422170125.7706H-100000@delta.ds2.pg.gda.pl>
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On Mon, 22 Apr 2002, Maciej W. Rozycki wrote:
> On Mon, 22 Apr 2002, Geert Uytterhoeven wrote:
> > >  Hmm, I admit I haven't looked at this matter, but aren't
> > > in/out/ioperm/iopl implemented as library functions in glibc like for
> > > other architectures doing MMIO?  E.g. Alpha does this an it makes porting
> > 
> > Perhaps. Note that you still need some /proc magic to find out the correct
> > address to map. Or you can use /dev/ports.
> 
>  Well, for Alpha ioperm/iopl functions check the system type in
> /proc/cpuinfo (we seem to have enough information there as well) and
> failing this they check a result of readlink of /etc/alpha_systype.  Then
> an appropriate region of /dev/mem is mmapped with per-page permissions set
> up as requested if ioperm is used (with a worse granularity, though) and
> subsequent in/out function invocations access the area as appropriate. 
> See sysdeps/unix/sysv/linux/alpha/ioperm.c in glibc for details -- it's a
> pretty clever solution with good performance and only a few trade-offs.

I think PPC has syscalls to find the I/O bases, too.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From owner-linux-mips@oss.sgi.com Mon Apr 22 09:40:15 2002
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Date: Mon, 22 Apr 2002 09:40:37 -0700
From: "H . J . Lu" <hjl@lucon.org>
To: Hartvig Ekner <hartvige@mips.com>
Cc: user alias <linux-mips@oss.sgi.com>
Subject: Re: Problems with H.J's latest RPM 4.0.4 binary packages
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On Mon, Apr 22, 2002 at 04:46:45PM +0200, Hartvig Ekner wrote:
> I have started to update our 7.1 RH/MIPS installation images with all the
> latest packages from H.J's collection.
> 
> The latest RPM package gives an up-front error no matter what one does, but
> the command seems to work:
> 
> [hartvige@copmalt13 /bin]$ rpm --version
> error: Macro %__id_u has empty body
> RPM version 4.0.4
> [hartvige@copmalt13 /bin]$
> 

I have no problems with the mipsel rpm binary. Did you compile rpm 4.0.4
yourselves? Please send me

# cd /usr/lib/rpm
# grep __id_u * */*

H.J.

From owner-linux-mips@oss.sgi.com Mon Apr 22 10:41:59 2002
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Date: Mon, 22 Apr 2002 10:42:21 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Hartvig Ekner <hartvige@mips.com>
Cc: user alias <linux-mips@oss.sgi.com>
Subject: Re: Problems with H.J's latest RPM 4.0.4 binary packages
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On Mon, Apr 22, 2002 at 04:46:45PM +0200, Hartvig Ekner wrote:

> [hartvige@copmalt13 /bin]$ rpm --version
> error: Macro %__id_u has empty body
> RPM version 4.0.4
> [hartvige@copmalt13 /bin]$
> 
> Before I start digging any deeper, has anybody else seen this and found the
> explanation?
> 
> (Note that I have not yet finished compiling the glibc RPM natively as
> required - this is currently ongoing).

Rpm has this nasty property of inherting much of it's configuration from
one generation into the next generation.  To get around this you will have
to hack the configuration of your current rpm in /usr/lib/rpm/ rsp.
/etc/rpm and rebuild.  I've seen even more funny things when crossbuilding
rpm.

  Ralf

From owner-linux-mips@oss.sgi.com Mon Apr 22 10:43:50 2002
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Date: Mon, 22 Apr 2002 10:44:17 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>,
   Wayne Gowcher <wgowcher@yahoo.com>, Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: Equivalent of ioperm / iopl in linux mips ?
Message-ID: <20020422104417.B10146@dea.linux-mips.net>
References: <Pine.GSO.4.21.0204221654140.17279-100000@vervain.sonytel.be> <Pine.GSO.3.96.1020422170125.7706H-100000@delta.ds2.pg.gda.pl>
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On Mon, Apr 22, 2002 at 05:30:08PM +0200, Maciej W. Rozycki wrote:

>  Well, for Alpha ioperm/iopl functions check the system type in
> /proc/cpuinfo (we seem to have enough information there as well) and
> failing this they check a result of readlink of /etc/alpha_systype.  Then
> an appropriate region of /dev/mem is mmapped with per-page permissions set
> up as requested if ioperm is used (with a worse granularity, though) and
> subsequent in/out function invocations access the area as appropriate. 
> See sysdeps/unix/sysv/linux/alpha/ioperm.c in glibc for details -- it's a
> pretty clever solution with good performance and only a few trade-offs.

Thanks for volunteering ;)

  Ralf

From owner-linux-mips@oss.sgi.com Mon Apr 22 11:01:10 2002
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From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Ralf Baechle <ralf@oss.sgi.com>
cc: Geert Uytterhoeven <geert@linux-m68k.org>,
   Wayne Gowcher <wgowcher@yahoo.com>, Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: Equivalent of ioperm / iopl in linux mips ?
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On Mon, 22 Apr 2002, Ralf Baechle wrote:

> >  Well, for Alpha ioperm/iopl functions check the system type in
> > /proc/cpuinfo (we seem to have enough information there as well) and
> > failing this they check a result of readlink of /etc/alpha_systype.  Then
> > an appropriate region of /dev/mem is mmapped with per-page permissions set
> > up as requested if ioperm is used (with a worse granularity, though) and
> > subsequent in/out function invocations access the area as appropriate. 
> > See sysdeps/unix/sysv/linux/alpha/ioperm.c in glibc for details -- it's a
> > pretty clever solution with good performance and only a few trade-offs.
> 
> Thanks for volunteering ;)

 Sure, but I have too many tasks on my to-do list now and no ISA/PCI MIPS
system to test code.  So anyone impatient enough, please do not hesitate
coding changes yourself.  Surely if you can afford waiting three years or
so, you probably need not worry as I shall have done it by then.  Also I'd
appreciate if someone sent me a system for testing.  This could actually
save you a year or two of waiting. ;-) 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon Apr 22 11:08:57 2002
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From: "Hui Jia" <hjia@kendin.com>
To: <linux-mips@oss.sgi.com>
Subject: linux for IDT79S334A
Date: Mon, 22 Apr 2002 11:07:43 -0700
Message-ID: <NEBBJJMPKLNOIGBLMBDGGEKLCCAA.hjia@kendin.com>
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Hi,

Can any one tell me where I can find the linux porting to IDT79S334A board.
Thanks.

William Jia


From owner-linux-mips@oss.sgi.com Tue Apr 23 02:47:15 2002
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From: Andre.Messerschmidt@infineon.com
To: ralf@oss.sgi.com
Cc: linux-mips@oss.sgi.com
Subject: AW: Wait queue problem
Date: Tue, 23 Apr 2002 11:47:20 +0200
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> A bad race condition in that code.  If foo_int is called before your
> process
> had a chance to get to sleep it'll never be woken before the timeout.
> 
I think this has been the problem. Thanks.
Is there any possibility to check if there are processes waiting on a queue?

regards
Andre


From owner-linux-mips@oss.sgi.com Tue Apr 23 15:59:13 2002
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Date: Tue, 23 Apr 2002 15:59:25 -0700
From: "H . J . Lu" <hjl@lucon.org>
To: Hartvig Ekner <hartvige@mips.com>, linux-mips@oss.sgi.com
Subject: Updates for RedHat 7.1/mips
Message-ID: <20020423155925.A8846@lucon.org>
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On Mon, Apr 22, 2002 at 08:38:49PM +0200, Hartvig Ekner wrote:
> Hi,
> 
> H . J . Lu writes:
> > 
> > On Mon, Apr 22, 2002 at 06:55:14PM +0200, Hartvig Ekner wrote:
> > > Hi H.J,
> > > 
> > > No, I did not compile myself, but used your binary (except for cracklib,
> > > where I used our natively compiled package instead). But I did replace
> > > ALL new updated packages at once during the upgrade.
> > > 
> > > However, I have also tried to install (-U) rpm*rpm and the popt rpm on a
> > > working system based on your original packages, and voila: the same error
> > > appears. So it does appear to be linked to the rpm RPM package.
> > > 
> > > The grep you asked for returns:
> > 
> > Thanks. I will fix those among other bugs I have been working on.
> 
> Great, thanks. Can you let me know as soon as the RPM problem has been fixed,
> so that I can continue the update of the installation images? BTW, are the
> other bugs you're working on something to wait for in this regard or not?
> 

I updated glibc, python, gcc, gdb, rpm, openssl, binutils and toolchain at

ftp://oss.sgi.com/pub/linux/mips/redhat/7.1/

Let know know if there are any problems.


H.J.

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Date: Tue, 23 Apr 2002 16:07:49 -0700
From: "H . J . Lu" <hjl@lucon.org>
To: linux-gcc@vger.kernel.org, Kenneth Albanowski <kjahds@kjahds.com>,
   Mat Hostetter <mat@lcs.mit.edu>,
   Andy Dougherty <doughera@lafcol.lafayette.edu>,
   Warner Losh <imp@village.org>, linux-mips@oss.sgi.com,
   Ron Guilmette <rfg@monkeys.com>,
   "Polstra; John" <linux-binutils-in@polstra.com>,
   "Hazelwood; Galen" <galenh@micron.net>,
   Ralf Baechle <ralf@informatik.uni-koblenz.de>,
   Linas Vepstas <linas@linas.org>, Feher Janos <aries@hal2000.terra.vein.hu>,
   Leonard Zubkoff <lnz@dandelion.com>, "Steven J. Hill" <sjhill@cotw.com>,
   GNU C Library <libc-alpha@sources.redhat.com>
Subject: The Linux binutils 2.12.90.0.7 is released.
Message-ID: <20020423160749.A9039@lucon.org>
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This is the beta release of binutils 2.12.90.0.7 for Linux, which is
based on binutils 2002 0423 in CVS on sourecs.redhat.com plus various
changes. It is purely for Linux.

The Linux/mips support is added. You have to use

# rpm --target=[mips|mipsel] -ta binutils-xx.xx.xx.xx.xx.tar.gz

to build it. Or you can read mips/README in the source tree to apply
the mips patches and build it by hand.

FYI, the binutils man pages now are generated from the texinfo files
during the build. As the result, those man pages may be changed for
each build even if you only have done

# ..../configure ...
# make

That means you may have many failures on the man pages when you apply
the binutils diffs next time. Those failures can be safely ignored.
You should remove all those man pages from your source tree by

# find -name *.1 | xargs rm -f
# find -name *.1.rej | xargs rm -f
# find -name *.man | xargs rm -f
# find -name *.man.rej | xargs rm -f

I am planning to make the public release soon. Please test it as much
as you can.

Please report any bugs related to binutils 2.12.90.0.7 to hjl@lucon.org.

For arm-linux targets, there are some important differences in behaviour 
between these tools and binutils 2.9.1.0.x.  The linker emulation name has 
changed from elf32arm{26} to armelf_linux{26}.  Also, the "-p" flag must be 
passed with the linker when working with object files (or static libraries) 
created using older versions of the assembler.  If this flag is omitted the 
linker will silently generate bad output when given old input files.

To get the correct behaviour from gcc, amend the *link section of your specs 
file as follows:

*link:
%{h*} %{version:-v}    %{b} %{Wl,*:%*}    %{static:-Bstatic}    %{shared:-shared}    %{symbolic:-Bsymbolic}    %{rdynamic:-export-dynamic}    %{!dynamic-linker: -dynamic-linker /lib/ld-linux.so.2}    -X    %{mbig-endian:-EB} %{mapcs-26:-m armelf_linux26} %{!mapcs-26:-m armelf_linux} -p


Changes from binutils 2.12.90.0.4:

1. Update from binutils 2002 0423.
2. ELF EH frame bug fix.
3. MIPS ELF visibility bug fix.

Changes from binutils 2.12.90.0.3:

1. Update from binutils 2002 0408.
2. Bug fixes for ELF/sparc.
3. Bug fixes for ELF/CRIS.

Changes from binutils 2.12.90.0.1:

1. Update from binutils 2002 0323.
2. Fix linking a.out relocatable files with ELF.
3. Fix a PPC altivec assembler bug.

Changes from binutils 2.11.93.0.2:

1. Update from binutils 2002 0307.
2. Add the .preinit_array/.init_array/.fini_array support.
3. Fix eh_frame.
4. Turn on combreloc by default.
5. Enable gprof for Linux/mips.

Changes from binutils 2.11.92.0.12.3:

1. Update from binutils 2002 0207.
2. Fix a weak symbol alpha linker bug for glibc.
3. More support for gcc 3.1.

Changes from binutils 2.11.92.0.12:

1. Fix a regression in 2.11.92.0.12 when linking with none-ELF object
files.

Changes from binutils 2.11.92.0.10:

1. Update from binutils 2001 1121.
2. Fix a linker symbol version bug for common symbols.
3. Update handling relocations against the discarded sections. You may
need to apply the kernel patch enclosed here to your kernel source. If
you still see things like

drivers/char/char.o(.data+0x46b4): undefined reference to `local symbols in discarded section .text.exit'

in the final kernel link, that means you have compiled a driver into
the kernel which has a reference to the symbol in a discarded section.
Kernel 2.4.17 or above should work fine.

4. Support "-march=xxx -mipsN" for mips gas if they are compatible.

Changes from binutils 2.11.92.0.7:

1. Update from binutils 2001 1021.
2. Fix the ELF/PPC linker.
3. Fix the ELF/cris linker.
4. Fix ELF strip.

Changes from binutils 2.11.92.0.5:

1. Update from binutils 2001 1016.
2. Fix all breakages introduced in 2.11.92.0.12.

Changes from binutils 2.11.90.0.31:

1. Update from binutils 2001 1005.
2. Support gcc 3.1 for ia64.
3. Support prelink for ELF/PPC.
4. Fix an ELF/x86 linker bug for Oracle.
5. Fix a weak symbol bug.
6. Support locale.

Changes from binutils 2.11.90.0.29:

1. Update from binutils 2001 0830.
2. Fix a mips linker bug.

Changes from binutils 2.11.90.0.27:

1. Update from binutils 2001 0827.
2. Fix an alpha assembler bug.
3. Fix an ia64 linker bug.
4. Fix a mips linker bug.
5. Support `-z combreloc|nocombreloc' in linker.

Changes from binutils 2.11.90.0.25:

1. Update from binutils 2001 0810.
2. Fix an x86 linker bug.

Changes from binutils 2.11.90.0.24:

1. Update from binutils 2001 0726.
2. Fix an x86 assembler bug.
3. "make check" in the windres test in binutils may call uudecode. We
are working on it.
4. "make check" fails the windres test in binutils if the i386/pe
is enabled in bfd. Fixed in the next release.
5. "make check" has 2 failures in the ld-selective test in ld on
Linux/alpha. They should be marked xfail. Fixed in the next release.

Changes from binutils 2.11.90.0.23:

1. Update from binutils 2001 0714.
2. Fix Sparc/ElF for Linux/sparc.
3. Fix Alpha/ELF for gcc 3.0.

Changes from binutils 2.11.90.0.19:

1. Update from binutils 2001 0706.
2. Fix objcopy/strip broken by accident.
3. Avoid COPY relocs on ia32.
4. Fix the ia64 assembler.
5. This release may not work on Linux/sparc due to the unaligned
relocation changes, which are not handled by all versions of glibc.
The current glibc in CVS on sourceware should be ok. The last known
working binutils for Linux/sparc is 2.11.90.0.8. We are working on it.

Changes from binutils 2.11.90.0.15:

1. Update from binutils 2001 0620.
2. Fix a static linking the PIC object files on ia32.
3. Add the verion script support for --export-dynamic. It can be used
to selectively export dynamic symbols from the executables.

Changes from binutils 2.11.90.0.8:

1. Update from binutils 2001 0610.
2. Fix a gas bug for gcc 3.0.

Changes from binutils 2.11.90.0.7:

1. Update from binutils 2001 0512.
2. Fix some P/III SSE 2 assembler bugs.
3. Fix DT_NEEDED and symbol version bugs.
4. Support hidden versioned symbols in DSOs.

Changes from binutils 2.11.90.0.6:

1. Update from binutils 2001 0427.
2. Fix the -Bsymbolic bug introduced in binutils 2.11.90.0.5.

Changes from binutils 2.11.90.0.5:

1. Update from binutils 2001 0425.
2. Update "ld --multilib-dir PATH".

Changes from binutils 2.11.90.0.4:

1. Update from binutils 2001 0414.
2. Fix an ia64 assembler bug.
3. Change Linux/MIPS to use the SVR4 MIPS ABI instead of the IRIX ABI.
since there are no supports for the IRIX ABI in glibc. The current
Linux/MIPS targets are elf64-tradlittlemips for little endian MIPS
instead of elf32-littlemips and elf64-tradbigmips for big endian MIPS
instead of elf32-bigmips. Glibc, gcc and kernel may have to be modified
for this change. 

Changes from binutils 2.11.90.0.1:

1. Update from binutils 2001 0401.
2. Fix a gas bug for the gcc from the CVS main trunk. It involves some
changes in gas. I compiled kernel 2.2.18, gcc and glibc under
Linux/ia32. The resulting binaries work fine. 
3. Fix the linker core dump on unsupported ELF binaries.

Changes from binutils 2.10.91.0.4:

1. Update from binutils 2001 0309.

Changes from binutils 2.10.91.0.2:

1. Update from binutils 2001 0223.
2. More ia64 bug fixes.

Changes from binutils 2.10.1.0.7:

1. Update from binutils 2001 0215.
2. More ia64 bug fixes. Support EFI and "ld -relax" on ia64.
3. Fix a weak definition, -Bsymbolic, non-PIC bug for ia32.

Changes from binutils 2.10.1.0.4:

1. Update from binutils 2001 0206.
2. Enable the IA64 support.
3. Now you need to use

# ld --oformat TARGET

instead of

# ld -oformat TARGET

The Linux kernel build may be affected. BTW

# ld --oformat TARGET

should work with all previous releases of binutils.

Changes from binutils 2.10.1.0.2:

1. Update from binutils 2000 1221.

Changes from binutils 2.10.0.33:

1. Update from binutils 2000 1119.
2. It has some symbol versioning related updates.

Changes from binutils 2.10.0.32:

1. Update from binutils 2000 1018.
2. A proper ELF/PPC visibility fix.
3. m68k-a.out is supposed to be fixed.

Changes from binutils 2.10.0.31:

1. Update from binutils 2000 1014.
2. An ELF/PPC weak symbol bug fix.
3. A new linkonce section name approach.
4. m68k-a.out is still broken. To be fixed.

Changes from binutils 2.10.0.29:

1. Update from binutils 2000 1011.
2. Back out the linkonce section name change so that C++ will work.
A different approach is being worked on.
3. m68k-a.out is known to be broken. To be fixed.

Changes from binutils 2.10.0.26:

1. Update from binutils 2000 1008.

Changes from binutils 2.10.0.24:

1. Update from binutils 2000 0907.

Changes from binutils 2.10.0.18:

1. Update from binutils 2000 0823. Fix DT_RPATH/DT_RUNPATH handling.
Fix the ELF/ia32 DSO not compiled with PIC.
2. Try to fix the ELF visibility bug on PPC with glibc 2.2.

Changes from binutils 2.10.0.12:

1. Update from binutils 2000 0720.
2. Fix the DT_NEEDED link bug.
3. Add the new DT_XXXX dynamic tags. Glibc 2.2 will use them at least
on libpthread.so.

Changes from binutils 2.10.0.9:

1. Update from binutils 2000 0701. Fix the parallel build in ld when PE
is enabled.

Changes from binutils 2.9.5.0.46:

1. Update from binutils 2000 0617. The demangler support for the new
g++ ABI. Minor fix for the ELF visibility. Fix linking non-ELF
relocatable object files under ELF with symbol versioning.
2. Support for linking PE relocatable object files under ia32/ELF.

Changes from binutils 2.9.5.0.42:

1. Update from binutils 2000 0604. The ELF visibility attribuite should
work correctly now.
2. The ia32 assembler has changed the way it assembles the "jmp"
instructions to the global symbols. The old assembler will optimize the
jump to the global symbol defined in the same source file so that no
relocation will be used. The new assembler will use relocation for
global jumps. It will mainly affect PIC asm code. The segment like

	.globl  __setjmp
__setjmp:
	...
	jmp __sigsetjmp
	...
	.globl __sigsetjmp
__sigsetjmp:

is no longer PIC safe since "jmp __sigsetjmp" jumps to a global symbol
and relocation will be used. Instead, it can be changed to

	.globl  __setjmp
__setjmp:
	...
	jmp sigsetjmp
	...
	.globl __sigsetjmp
__sigsetjmp:
sigsetjmp:

so that "jmp sigsetjmp" jumps to a local symbol and the new assembler
will optimize out the relocation.

Changes from binutils 2.9.5.0.41:

1. Update from binutils 2000 0512.
2. Add testsuite for ELF visibility.

Changes from binutils 2.9.5.0.37:

1. Update from binutils 2000 0502.
2. Support STV_HIDDEN and STV_INTERNAL.

Changes from binutils 2.9.5.0.35:

1. Update from binutils 2000 0418.
2. Fix an ld demangle style option bug.

Changes from binutils 2.9.5.0.34:

1. Update from binutils 2000 0412. Fix a relocation bug which affects
the Linux kernel compilation.
2. An ELF/PPC linker script update.

Changes from binutils 2.9.5.0.33:

1. Update from binutils 2000 0404. Fix the bug report bug.

Changes from binutils 2.9.5.0.32:

1. Update from binutils 2000 0403. Fix the 16bit ia32 assembler bug.

Changes from binutils 2.9.5.0.31:

1. Update from binutils 2000 0331. Fix the Linux/ARM assembler bug.
2. Fix a Debian assembler security bug.

Changes from binutils 2.9.5.0.29:

1. Update from binutils 2000 0319.
2. An ELF/alpha bug is fixed.

Changes from binutils 2.9.5.0.27:

1. Update from binutils 2000 0301.
2. A demangler bug is fixed.
3. A better fix for undefined symbols with -Bsymbolic when building
shared library.

Changes from binutils 2.9.5.0.24:

1. Update from binutils 2000 0204.
2. Added -taso to linker on alpha.
3. Fixed a -shared -Bsymbolic bug when PIC is not used.

Changes from binutils 2.9.5.0.22:

1. Update from binutils 2000 0113.
2. A symbol version bug is fixed.
3. A -Bsymbolic bug is fixed.

Changes from binutils 2.9.5.0.21:

1. Update from binutils 1999 1202.
2. Remove a MIPS/ELF change.
3. Enable SOM for HPPA.

Changes from binutils 2.9.5.0.19:

1. Update from binutils 1999 1122. An ia32 gas bug is fixed.

Changes from binutils 2.9.5.0.16:

1. Update from binutils 1999 1104.
2. i370 is changed to use EM_S370 and ELFOSABI_LINUX. Update readelf.
3. Fix Compaq's demangler support.

Changes from binutils 2.9.5.0.14:

1. Update from binutils 1999 1012. A gas bug which affects Linux 2.3.21
is fixed.
2. i370 update.
3. The new demangler code. You should use "--style=xxx" to select the
demnangle style instead of "--lang=xxx".

Changes from binutils 2.9.5.0.13:

1. Update from binutils 1999 0925.
2. Fix a -s and linker script bug.

Changes from binutils 2.9.5.0.12:

1. Update from binutils 1999 0922.
2. i370 update.

Changes from binutils 2.9.5.0.11:

1. Update from binutils 1999 0910. It fixed a PIC linker bug on ix86
   and sparc introduced in the last release.
2. i370 update.

Changes from binutils 2.9.5.0.10:

1. Update from binutils 1999 0906. It fixed a PIC linker bug on ix86
   and sparc.
2. Remove elf/hppa since it is WIP.

Changes from binutils 2.9.5.0.8:

1. Update from binutils 1999 0831. It allows spaces around '(' and ')'
   in x86 FP register names.

Changes from binutils 2.9.5.0.7:

1. Update from binutils 1999 0821.
2. Some MIPS changes.

Changes from binutils 2.9.5.0.6:

1. Update from binutils 1999 0813.
2. i370 update.

Changes from binutils 2.9.5.0.5:

1. Update from binutils 1999 0809. An ELF/Sparc ld bug is fixed.

Changes from binutils 2.9.5.0.4:

1. Update from binutils 1999 0806. A Solaris/Sparc gas bug is fixed.
2. Remove mips gas patches from binutils 2.9.1.0.25.

Changes from binutils 2.9.5.0.3:

1. Update from binutils 1999 0801.
2. Support for real mode x86 gcc.

Changes from binutils 2.9.4.0.8:

1. Update from binutils 1999 0719. A libc 5 related bug fix.
2. Fix a typo in mips gas.

Changes from binutils 2.9.4.0.7:

1. Update from binutils 1999 0710. A weak symbol bug

http://egcs.cygnus.com/ml/egcs-bugs/1999-07/msg00129.html

is fixed.

Changes from binutils 2.9.4.0.6:

1. Update from binutils 1999 0626.

Changes from binutils 2.9.4.0.5:

1. Update from binutils 1999 0620.
2. Remove my fwait fix and use the one in cvs.
3. Use "--only-section=section" instead of "--extract-section=section".
   for objcopy.

Changes from binutils 2.9.4.0.4:

1. Update from binutils 1999 0612.
2. Remove various temporary fixes of mine since those bugs are fixed
   now.

Changes from binutils 2.9.4.0.3:

1. Update from binutils 1999 0611.
2. Remove my ELF/Alpha bfd changes.
3. Use the local symbol copy fix in binutils 1999 0611.

Changes from binutils 2.9.4.0.2:

1. Update from binutils 1999 0607.
2. Remove my Sparc hacks.
3. Fix local symbol copy.

Changes from binutils 2.9.4.0.1:

1. Update from binutils 1999 0606.
2. Restore relocation overflow checking in binutils 2.9.1.0.25 so that
   Linux kernel can build.
3. Fix i370 for the new gas.

Changes from binutils 1999 0605:

1. Fix a -Bsymbolic bug for Linux/alpha.
2. Add ELF/i370.
3. Fix 8/16-bit relocations for i386.
4. Add --redefine-sym=old_form=new_form to objcopy.
5. Add "-j section" for objcopy.
6. Fix i386 disassembler for fwait.
7. Fix a Sparc asm bug.
8. Add Ada demangle support.
9. Fix MIPS/ELF bugs.
10. Add some vxworks suppport.
11. Fix a.out assembler.

The file list:

1. binutils-2.12.90.0.7.tar.gz. Source code.
2. binutils-2.12.90.0.4-2.12.90.0.7.diff.gz. Patch against the
   previous beta source code.
3. binutils-2.12.90.0.7-1.i386.rpm. IA-32 binary RPM for RedHat 7.2.

There is no separate source rpm. You can do

# rpm -ta binutils-2.12.90.0.7.tar.gz

to create both binary and source rpms.

The primary sites for the beta Linux binutils are:

1. http://ftp.kernel.org/pub/linux/devel/binutils/

Thanks.


H.J. Lu
hjl@lucon.org
04/23/2002

From owner-linux-mips@oss.sgi.com Tue Apr 23 16:42:01 2002
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From: Rani Assaf <rani@paname.org>
Date: Wed, 24 Apr 2002 01:42:17 +0200
To: linux-mips@oss.sgi.com
Subject: Interrupts, exceptions and modules
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Hi,

I  run into  the following  problem when  loading a  module that  uses
interrupts (net driver):

1) Module loads and request_irq()

2) We take an interrupt before doing anything else in the module.
   Our low level IRQ handler (for the RC32300) disables interrupts
   by clearing the IE bit in CP0_STATUS (code based on the various
   implementations of other boards)

3) in handle_IRQ_event() the module handler is called through:
     action->handler(irq, action->dev_id, regs);

4) The processor does an exception (tlb miss/refill) to get the
   page pointed by action->handler.
   At the end of the tlb exception handler, we have an "eret"
   => interrupts are enabled again (IE bit goes to 1)

5) We take another interrupt (because we didn't get into
   the handler to clear the cause yet), in do_IRQ() we see that
   one is already pending => eret

6) goto 5

I had  to disable  interrupts through  CP0_STATUS IM  bits in  the low
level interrupt handler to handle this.  I looked at the code of other
boards and none seemed to do this.

So did  I miss something? Couldn't  this happen to anyone  who loads a
module  and get  the modules's  intialization code  and the  interrupt
handler go into different pages?

Regards,
Rani

From owner-linux-mips@oss.sgi.com Tue Apr 23 18:12:05 2002
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Date: Wed, 24 Apr 2002 9:11:38 +0800
From: Zhang Fuxin <fxzhang@ict.ac.cn>
To: "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Subject: vga initialization
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hi,
  I find most code is already there in scitech's x86emu-0.8.
in one day it is adapted into linux kernel.

  If anybody is interested,my code can be fetched from
ftp://ftp.gnuchina.org/incoming/mips-vga-init/freebiosvga.tar.gz

For a short description,the READ in the package is paste here:

This is x86/bios emulator adapted for used in 2.4 kernel
to do initialize pc VGA cards.

Port it to pmon/yamon should be easy,if you want an userland
executable,please download the original x86emu-0.8 from SciTech 
Software, Inc.

Usage:
 here is my choice:
  1.add code in new directory arch/mips/freebiosvga/
  2.arch/mips/config.in:
     add config option CONFIG_VGA_POST to proper place
         bool '  Support for VGA POST' CONFIG_VGA_POST

  3.arch/mips/Makefile
     add directory and target objects of freevgabios

     ifdef CONFIG_VGA_POST
     SUBDIRS      += arch/mips/freebiosvga
     LIBS         += arch/mips/freebiosvga/vga.o
     SUBDIRS      += arch/mips/freebiosvga/x86emu
     LIBS         += arch/mips/freebiosvga/x86emu/x86emu.o
     endif

  4.init/main.c:
    add call to vgabios_init (right after pci_init)
    #ifdef CONFIG_VGA_POST
      vgabios_init();
    #endif

  5.select 'VGA text console' or proper framebuffer, you may need to
  slightly modify the code,because many of them is for x86

    for 'VGA text console',the file is drivers/video/vgacon.c,propably
  you need to comment out the check for card's presence in vgacon_startup.
  Because card initialization is later than console_init,so at that time
  pci address 0xa0000-0xc0000 may not response to your requests.


Problems & limits:
  1.currently the code rely on system's pci resource allocator to assign
    a valid address to rom base register(offset 0x30 in pci header).
    I have modified the pci_auto.c to handle rom. Patch is here:

     diff -r1.2 pci_auto.c
     107a108,110
     >       u32 bases[7] = {PCI_BASE_ADDRESS_0,PCI_BASE_ADDRESS_1,PCI_BASE_ADDRESS_2,
     >                         PCI_BASE_ADDRESS_3,PCI_BASE_ADDRESS_4,PCI_BASE_ADDRESS_5,
     >                       PCI_ROM_ADDRESS};
     110c113,116
     <       for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar+=4) {
     ---
     >       for (bar_nr=0; bar_nr<7; bar_nr++) {
     > 
     >               bar = bases[bar_nr];
     > 
     137c143
     <               if (bar_response & PCI_BASE_ADDRESS_SPACE) {
     ---
     >               if (bar_nr != 6 && (bar_response & PCI_BASE_ADDRESS_SPACE)) {
     209d214
     <               bar_nr++;
     349,350d353
     < 
     <                       DBG("Skipping legacy mode IDE controller\n");

   if you don't use pci_auto,then make sure your pmon/yamon do it.

   Of course,you can write an absolute,safe value for your specific platform
   to see it works:)

   If the base address read from your card is invalid,you will get message 
   like:
     "No address assigned to rom" or "No valid bios found"
    
 2. i am assuming ioremap(a_pci_address) will return a valid cpu virtue 
   address for accessing memory located at 'a_pci_address'.
    

 3. Multiple cards are not supported currently,though it may be a piece of
 cake.Complex cards,e.g. those contain bridges,may fail.

 4. cards tested here include: 
   trident 3Dimage9750,S3virge,Riva TNT2

DISCLAIMER:
  It is provided "as is" without express or implied warranty.

  Any problems you can contact fxzhang@ict.ac.cn.

  
Happy hacking and good luck.
			
  

    
    





--
Zhang Fuxin
System Architecture Lab
Institute of Computing Technology
Chinese Academy of Sciences,China
http://www.ict.ac.cn

Regards
            Zhang Fuxin
            fxzhang@ict.ac.cn


From owner-linux-mips@oss.sgi.com Wed Apr 24 03:12:37 2002
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	Wed, 24 Apr 2002 18:12:52 +0800 (CST)
From: "Ku" <iskoo@ms45.hinet.net>
To: "Linux-Mips" <linux-mips@oss.sgi.com>
Subject: Confused about Linux MIPS Boot Flow,
Date: Wed, 24 Apr 2002 18:13:01 +0800
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Hi everybody,

I got the source code about Linux PhilpNino and traced,

BUT, If I use PMON for bootstrape code
The situation I assume,
0. I prepare two compressed images about kernel image and ramdisk image in flash    
1. With boot loader PMON 2.6 source code
   STEP 1: I modify go() function to decompress kernel image from to 0x80000000
   STEP 2: with PMON monitor code, then execute "go -e 0x80000000"
2. then the flow into the kernel_entry point respect to the source code
   "arch\mips\jernel\head.s"
   the kernel_entry segmentation is continued by init_arch to call prom_init ...
   and start_kernel...

-->IS THIS FLOW CORRECT?

=================================
For example to load RAMDISK on Linux PowerPC,
I ever make the "ramdisk.gz"  from flash to a free memory firstly,
after then, using PPCBOOT to transfer the "initrd_start" and "initrd_end" to kernel
So, the kernel image can work well to loading ramdisk and mount root, and go on...

BUT, For Linux PhilpNino on MIPS CPU,
I just find the ramdisk setting. in "arch/mips/philps/nino/in ld.script"
====
OUTPUT_FORMAT("ecoff-littlemips")
OUTPUT_ARCH(mips)
SECTIONS
{
  .initrd :
  {
        *(.data)
  }
}
====
and the Makefile
====
ramdisk.o: ramdisk.gz ld.script
        $(LD) -T ld.script -b binary -o $@ ramdisk
====
then, obj-$(CONFIG_BLK_DEV_INITRD)      += ramdisk.o

I just do not know, How the "obj-y" can tell the kernel the entry adress to load ramdisk...
Can I memcpy ramdisk,gz from flash to memory and pass the initrd_start and initrd_end to KERNEL (using the method as PowerPC's one)?

Because I do not have the demo board for test, I just can trace the possible flow...
thanks all,

--Ku
 
      
   


From owner-linux-mips@oss.sgi.com Wed Apr 24 06:12:19 2002
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Date: Wed, 24 Apr 2002 21:11:20 +0800
From: Zhang Fuxin <fxzhang@ict.ac.cn>
To: Girish Gulawani <girishvg@yahoo.com>
CC: "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Subject: Re: Re: vga initialization
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hi,
  I don't have that card at hand:(. But if you have tried this emulation
code,please give more detailed message:
  1. what you do
  2. output (dmesg,or captured from your serial console).
  3. your platform,esp. whether it has pc legacy hardware support. 
    For example,a PIIX4 or via686a southbridge will give you 
    functionality of the legacy vga support,8254 timer and standard io ports
    (0x41-0x43 timer,0x61->timer 2 enable,0x3c0-0x3cf ->vga ports etc.)


ÔÚ 2002-04-24 20:15:00 you wrote£º
>would you by any chance try this emulation on AOpen's PT80 card? i failed to
>fire up this card. any clues?
>
>
>----- Original Message -----
>From: "Zhang Fuxin" <fxzhang@ict.ac.cn>
>To: <linux-mips@oss.sgi.com>
>Sent: Wednesday, April 24, 2002 10:11 AM
>Subject: vga initialization
>
>
>> hi,
>>   I find most code is already there in scitech's x86emu-0.8.
>> in one day it is adapted into linux kernel.
>>
>>   If anybody is interested,my code can be fetched from
>> ftp://ftp.gnuchina.org/incoming/mips-vga-init/freebiosvga.tar.gz
>>
>> For a short description,the READ in the package is paste here:
>>
>> This is x86/bios emulator adapted for used in 2.4 kernel
>> to do initialize pc VGA cards.
>>
>> Port it to pmon/yamon should be easy,if you want an userland
>> executable,please download the original x86emu-0.8 from SciTech
>> Software, Inc.
>>
>> Usage:
>>  here is my choice:
>>   1.add code in new directory arch/mips/freebiosvga/
>>   2.arch/mips/config.in:
>>      add config option CONFIG_VGA_POST to proper place
>>          bool '  Support for VGA POST' CONFIG_VGA_POST
>>
>>   3.arch/mips/Makefile
>>      add directory and target objects of freevgabios
>>
>>      ifdef CONFIG_VGA_POST
>>      SUBDIRS      += arch/mips/freebiosvga
>>      LIBS         += arch/mips/freebiosvga/vga.o
>>      SUBDIRS      += arch/mips/freebiosvga/x86emu
>>      LIBS         += arch/mips/freebiosvga/x86emu/x86emu.o
>>      endif
>>
>>   4.init/main.c:
>>     add call to vgabios_init (right after pci_init)
>>     #ifdef CONFIG_VGA_POST
>>       vgabios_init();
>>     #endif
>>
>>   5.select 'VGA text console' or proper framebuffer, you may need to
>>   slightly modify the code,because many of them is for x86
>>
>>     for 'VGA text console',the file is drivers/video/vgacon.c,propably
>>   you need to comment out the check for card's presence in vgacon_startup.
>>   Because card initialization is later than console_init,so at that time
>>   pci address 0xa0000-0xc0000 may not response to your requests.
>>
>>
>> Problems & limits:
>>   1.currently the code rely on system's pci resource allocator to assign
>>     a valid address to rom base register(offset 0x30 in pci header).
>>     I have modified the pci_auto.c to handle rom. Patch is here:
>>
>>      diff -r1.2 pci_auto.c
>>      107a108,110
>>      >       u32 bases[7] =
>{PCI_BASE_ADDRESS_0,PCI_BASE_ADDRESS_1,PCI_BASE_ADDRESS_2,
>>      >
>PCI_BASE_ADDRESS_3,PCI_BASE_ADDRESS_4,PCI_BASE_ADDRESS_5,
>>      >                       PCI_ROM_ADDRESS};
>>      110c113,116
>>      <       for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5;
>bar+=4) {
>>      ---
>>      >       for (bar_nr=0; bar_nr<7; bar_nr++) {
>>      >
>>      >               bar = bases[bar_nr];
>>      >
>>      137c143
>>      <               if (bar_response & PCI_BASE_ADDRESS_SPACE) {
>>      ---
>>      >               if (bar_nr != 6 && (bar_response &
>PCI_BASE_ADDRESS_SPACE)) {
>>      209d214
>>      <               bar_nr++;
>>      349,350d353
>>      <
>>      <                       DBG("Skipping legacy mode IDE controller\n");
>>
>>    if you don't use pci_auto,then make sure your pmon/yamon do it.
>>
>>    Of course,you can write an absolute,safe value for your specific
>platform
>>    to see it works:)
>>
>>    If the base address read from your card is invalid,you will get message
>>    like:
>>      "No address assigned to rom" or "No valid bios found"
>>
>>  2. i am assuming ioremap(a_pci_address) will return a valid cpu virtue
>>    address for accessing memory located at 'a_pci_address'.
>>
>>
>>  3. Multiple cards are not supported currently,though it may be a piece of
>>  cake.Complex cards,e.g. those contain bridges,may fail.
>>
>>  4. cards tested here include:
>>    trident 3Dimage9750,S3virge,Riva TNT2
>>
>> DISCLAIMER:
>>   It is provided "as is" without express or implied warranty.
>>
>>   Any problems you can contact fxzhang@ict.ac.cn.
>>
>>
>> Happy hacking and good luck.
>
>
>
>
>_________________________________________________________
>
>Do You Yahoo!?
>
>Get your free @yahoo.com address at http://mail.yahoo.com

Regards
            Zhang Fuxin
            fxzhang@ict.ac.cn



From owner-linux-mips@oss.sgi.com Wed Apr 24 06:35:58 2002
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From: Hartvig Ekner <hartvige@mips.com>
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Subject: Re: Updates for RedHat 7.1/mips
To: hjl@lucon.org (H . J . Lu)
Date: Wed, 24 Apr 2002 15:35:16 +0200 (MET DST)
Cc: linux-mips@oss.sgi.com
In-Reply-To: <20020423155925.A8846@lucon.org> from "H . J . Lu" at Apr 23, 2002 03:59:25 PM
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All the problems I reported are fixed (only tested LE so far). Thanks.

Currently recompiling glibc natively for the installation images.
We'll post a message here when our new installation images are ready.

/Hartvig

H . J . Lu writes:
> 
> On Mon, Apr 22, 2002 at 08:38:49PM +0200, Hartvig Ekner wrote:
> > Hi,
> > 
> > H . J . Lu writes:
> > > 
> > > On Mon, Apr 22, 2002 at 06:55:14PM +0200, Hartvig Ekner wrote:
> > > > Hi H.J,
> > > > 
> > > > No, I did not compile myself, but used your binary (except for cracklib,
> > > > where I used our natively compiled package instead). But I did replace
> > > > ALL new updated packages at once during the upgrade.
> > > > 
> > > > However, I have also tried to install (-U) rpm*rpm and the popt rpm on a
> > > > working system based on your original packages, and voila: the same error
> > > > appears. So it does appear to be linked to the rpm RPM package.
> > > > 
> > > > The grep you asked for returns:
> > > 
> > > Thanks. I will fix those among other bugs I have been working on.
> > 
> > Great, thanks. Can you let me know as soon as the RPM problem has been fixed,
> > so that I can continue the update of the installation images? BTW, are the
> > other bugs you're working on something to wait for in this regard or not?
> > 
> 
> I updated glibc, python, gcc, gdb, rpm, openssl, binutils and toolchain at
> 
> ftp://oss.sgi.com/pub/linux/mips/redhat/7.1/
> 
> Let know know if there are any problems.
> 
> 
> H.J.

From owner-linux-mips@oss.sgi.com Wed Apr 24 08:31:57 2002
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Date: Wed, 24 Apr 2002 09:15:45 -0600
From: Michael Pruznick <michael_pruznick@mvista.com>
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Subject: ps2 keyboard -- no key down events
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I'm working on this mips board with a smsc 90e66 south bridge and
fdc37m812 super io.  I'm using the standard pc_keyb.c driver.  I only
see keyboard interrupts and KBD_STAT_OBF set in response to "key up"
events.  I never see them in response to "key down" events.  Thus, the
shell running on the vga console never gets my input (since it is the
"key down" events that pass the character typed to the shell).

At this point, I'm thinking that the standard driver needs some mods
to work with the super io's ps2 controller.  The smsc doc only covers
programming the plug and play registers and doesn't give any info about
programming the ps2 controller.

I've looked around the web, but haven't found anything useful.

Can anyone point me towards some resources that might help out?

-- 
Michael Pruznick, michael_pruznick@mvista.com, www.mvista.com
MontaVista Software, 1237 East Arques Ave, Sunnyvale, CA 94085

From owner-linux-mips@oss.sgi.com Wed Apr 24 09:57:25 2002
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From: "Bradley D. LaRonde" <brad@ltc.com>
To: <michael_pruznick@mvista.com>, <linux-mips@oss.sgi.com>
References: <3CC6CC21.45E7ABB1@mvista.com>
Subject: Re: ps2 keyboard -- no key down events
Date: Wed, 24 Apr 2002 12:57:09 -0400
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Could it be a level-trigger versus edge-trigger interrupt setting?

Regards,
Brad

----- Original Message ----- 
From: "Michael Pruznick" <michael_pruznick@mvista.com>
To: <linux-mips@oss.sgi.com>
Sent: Wednesday, April 24, 2002 11:15 AM
Subject: ps2 keyboard -- no key down events


> I'm working on this mips board with a smsc 90e66 south bridge and
> fdc37m812 super io.  I'm using the standard pc_keyb.c driver.  I only
> see keyboard interrupts and KBD_STAT_OBF set in response to "key up"
> events.  I never see them in response to "key down" events.  Thus, the
> shell running on the vga console never gets my input (since it is the
> "key down" events that pass the character typed to the shell).
> 
> At this point, I'm thinking that the standard driver needs some mods
> to work with the super io's ps2 controller.  The smsc doc only covers
> programming the plug and play registers and doesn't give any info about
> programming the ps2 controller.
> 
> I've looked around the web, but haven't found anything useful.
> 
> Can anyone point me towards some resources that might help out?
> 
> -- 
> Michael Pruznick, michael_pruznick@mvista.com, www.mvista.com
> MontaVista Software, 1237 East Arques Ave, Sunnyvale, CA 94085
> 


From owner-linux-mips@oss.sgi.com Wed Apr 24 11:05:41 2002
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Date: Wed, 24 Apr 2002 20:06:21 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
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To: Michael Pruznick <michael_pruznick@mvista.com>
cc: linux-mips@oss.sgi.com
Subject: Re: ps2 keyboard -- no key down events
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On Wed, 24 Apr 2002, Michael Pruznick wrote:

> I'm working on this mips board with a smsc 90e66 south bridge and
> fdc37m812 super io.  I'm using the standard pc_keyb.c driver.  I only
> see keyboard interrupts and KBD_STAT_OBF set in response to "key up"
> events.  I never see them in response to "key down" events.  Thus, the
> shell running on the vga console never gets my input (since it is the
> "key down" events that pass the character typed to the shell).
> 
> At this point, I'm thinking that the standard driver needs some mods
> to work with the super io's ps2 controller.  The smsc doc only covers
> programming the plug and play registers and doesn't give any info about
> programming the ps2 controller.

 An 8042-compatible microcontroller (actually the firmware it runs) may
need to be programmed to a PC/AT-compatible mode.  On an i386 it is
typically done by the BIOS.  Try dumping configuration data from your chip
and compare it with what is set up in an i386 system.  You can dump 32
bytes of configuration data with the 0x20 command of the 8042 (5 low-order
bits of a command byte specify an address).  Writing can be performed
using the 0x60 command (the same semantics). 

 Some data is available in the Ralf Brown's interrupt list (look for
"inter60*.zip" files on a SimTel DOS collection's mirror).  I have an old
Intel hardcopy document somewhere that describes to some extent the
IBM-defined locations of the configuration data -- I may try to dig it out
and see if I could help you.  Anyway, you should probably contact the
chip's manufacturer.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Wed Apr 24 13:53:23 2002
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	Wed, 24 Apr 2002 13:53:39 -0700 (PDT)
Date: Wed, 24 Apr 2002 13:53:39 -0700
From: Geoffrey Espin <espin@idiom.com>
To: "H . J . Lu" <hjl@lucon.org>
Cc: linux-mips@oss.sgi.com
Subject: Re: Updates for RedHat 7.1/mips
Message-ID: <20020424135339.A24558@idiom.com>
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On Tue, Apr 23, 2002 at 03:59:25PM -0700, H . J . Lu wrote:
> I updated glibc, python, gcc, gdb, rpm, openssl, binutils and toolchain at
> ftp://oss.sgi.com/pub/linux/mips/redhat/7.1/
> Let know know if there are any problems.

I've been using your old October toolchain-20011020-* quite happily.
So foolishly, I upgraded to this new toolchain*rpm for mipsel on i386.

When building a linux-mips.sourceforge.net -based kernel, if I
include CONFIG_PCI in the configuration, I get:

...
mipsel-linux-ld -G 0 -static -T arch/mips/ld.script.0x80002000 arch/mips/kernel/head.o arch/mips/kernel/init_task.o init/main.o init/version.o \
        --start-group \
        arch/mips/kernel/kernel.o arch/mips/mm/mm.o kernel/kernel.o mm/mm.o fs/fs.o ipc/ipc.o arch/mips/math-emu/fpu_emulator.o arch/mips/ramdisk/ramdisk.o \
         drivers/char/char.o drivers/block/block.o drivers/misc/misc.o drivers/net/net.o drivers/media/media.o drivers/pci/driver.o drivers/mtd/mtdlink.o \
        net/network.o \
        arch/mips/lib/lib.a /home/espin/linux/lib/lib.a arch/mips/korva/korva.a
\
        --end-group \
        -o vmlinux
drivers/char/char.o(.data+0x3990): undefined reference to `local symbols in discarded section .text.exit'
make: *** [vmlinux] Error 1


If I don't include CONFIG_PCI the problem goes away.
It also sometimes complained about symbols in drivers/net/net.o.

I stumbled on:

   http://lists.debian.org/debian-devel/2001/debian-devel-200112/msg00768.html

which says that Alan Cox came up with enabling CONFIG_HOTPLUG as a workaround.
Seems to work.  :-/

Other useful suggestions found were to downgrade ones' binutils. :-)

Geoff
-- 
Geoffrey Espin
espin@idiom.com
--

From owner-linux-mips@oss.sgi.com Wed Apr 24 14:01:40 2002
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Date: Wed, 24 Apr 2002 14:01:56 -0700
From: "H . J . Lu" <hjl@lucon.org>
To: Geoffrey Espin <espin@idiom.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: Updates for RedHat 7.1/mips
Message-ID: <20020424140156.A28438@lucon.org>
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On Wed, Apr 24, 2002 at 01:53:39PM -0700, Geoffrey Espin wrote:
> On Tue, Apr 23, 2002 at 03:59:25PM -0700, H . J . Lu wrote:
> > I updated glibc, python, gcc, gdb, rpm, openssl, binutils and toolchain at
> > ftp://oss.sgi.com/pub/linux/mips/redhat/7.1/
> > Let know know if there are any problems.
> 
> I've been using your old October toolchain-20011020-* quite happily.
> So foolishly, I upgraded to this new toolchain*rpm for mipsel on i386.
> 
> When building a linux-mips.sourceforge.net -based kernel, if I
> include CONFIG_PCI in the configuration, I get:
> 
> drivers/char/char.o(.data+0x3990): undefined reference to `local symbols in discarded section .text.exit'
> make: *** [vmlinux] Error 1
> 
> 

That is a kernel bug which has been fixed in the newer kernel. From my
binutils release note:

Changes from binutils 2.11.92.0.10:

1. Update from binutils 2001 1121.
2. Fix a linker symbol version bug for common symbols.
3. Update handling relocations against the discarded sections. You may
need to apply the kernel patch enclosed here to your kernel source. If
you still see things like

drivers/char/char.o(.data+0x46b4): undefined reference to `local symbols in discarded
 section .text.exit'

in the final kernel link, that means you have compiled a driver into
the kernel which has a reference to the symbol in a discarded section.
Kernel 2.4.17 or above should work fine.


H.J.

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Date: Wed, 24 Apr 2002 14:11:36 -0700
From: Geoffrey Espin <espin@idiom.com>
To: "H . J . Lu" <hjl@lucon.org>
Cc: linux-mips@oss.sgi.com, linux-mips-kernel@lists.sourceforge.net
Subject: Re: Updates for RedHat 7.1/mips
Message-ID: <20020424141136.A63873@idiom.com>
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On Wed, Apr 24, 2002 at 02:01:56PM -0700, H . J . Lu wrote:
> That is a kernel bug which has been fixed in the newer kernel. From my
> binutils release note:
> Changes from binutils 2.11.92.0.10:
> 1. Update from binutils 2001 1121.
> 2. Fix a linker symbol version bug for common symbols.
> 3. Update handling relocations against the discarded sections. You may
> need to apply the kernel patch enclosed here to your kernel source. If
> you still see things like
> drivers/char/char.o(.data+0x46b4): undefined reference to `local symbols in discarded
>  section .text.exit'
> in the final kernel link, that means you have compiled a driver into
> the kernel which has a reference to the symbol in a discarded section.
> Kernel 2.4.17 or above should work fine.
> H.J.

Sorry, I should have specified my kernel *IS* recently (Monday)
from linux-mips.sourceforge.net.  And it was previously sync'd
to oss.sgi.com on Sunday, 21Apr02.

    VERSION = 2
    PATCHLEVEL = 4
    SUBLEVEL = 18
    EXTRAVERSION = -mips

Hence my befuddlement.

I'll fix the cc list to l-m-k.

Geoff
-- 
Geoffrey Espin
espin@idiom.com
--

From owner-linux-mips@oss.sgi.com Wed Apr 24 14:18:24 2002
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Date: Wed, 24 Apr 2002 14:18:40 -0700
From: "H . J . Lu" <hjl@lucon.org>
To: Geoffrey Espin <espin@idiom.com>
Cc: linux-mips@oss.sgi.com, linux-mips-kernel@lists.sourceforge.net
Subject: Re: Updates for RedHat 7.1/mips
Message-ID: <20020424141840.A28683@lucon.org>
References: <20020423155925.A8846@lucon.org> <20020424135339.A24558@idiom.com> <20020424140156.A28438@lucon.org> <20020424141136.A63873@idiom.com>
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On Wed, Apr 24, 2002 at 02:11:36PM -0700, Geoffrey Espin wrote:
> On Wed, Apr 24, 2002 at 02:01:56PM -0700, H . J . Lu wrote:
> > That is a kernel bug which has been fixed in the newer kernel. From my
> > binutils release note:
> > Changes from binutils 2.11.92.0.10:
> > 1. Update from binutils 2001 1121.
> > 2. Fix a linker symbol version bug for common symbols.
> > 3. Update handling relocations against the discarded sections. You may
> > need to apply the kernel patch enclosed here to your kernel source. If
> > you still see things like
> > drivers/char/char.o(.data+0x46b4): undefined reference to `local symbols in discarded
> >  section .text.exit'
> > in the final kernel link, that means you have compiled a driver into
> > the kernel which has a reference to the symbol in a discarded section.
> > Kernel 2.4.17 or above should work fine.
> > H.J.
> 
> Sorry, I should have specified my kernel *IS* recently (Monday)
> from linux-mips.sourceforge.net.  And it was previously sync'd
> to oss.sgi.com on Sunday, 21Apr02.
> 

Your kernel still have references to symbols in discarded sections. Please
read linux/include/linux/init.h:

/* Functions marked as __devexit may be discarded at kernel link time, depending
   on config options.  Newer versions of binutils detect references from
   retained sections to discarded sections and flag an error.  Pointers to
   __devexit functions must use __devexit_p(function_name), the wrapper will
   insert either the function_name or NULL, depending on the config options.
 */
#if defined(MODULE) || defined(CONFIG_HOTPLUG)
#define __devexit_p(x) x 
#else
#define __devexit_p(x) NULL
#endif


H.J.

From owner-linux-mips@oss.sgi.com Wed Apr 24 14:26:52 2002
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From: "Maurice Turcotte" <turcotte@broadcom.com>
To: linux-mips@oss.sgi.com
cc: "Maurice Turcotte" <mturc@broadcom.com>
Subject: Linux Shared Memory Issue
Date: Wed, 24 Apr 2002 17:27:12 -0400
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Greetings:

I am having a problem with Linux Kernel 2.4.5 on a mips.

I have two processes using share memory for IPC. This same
code works fine with Kernel 2.4.7 on a x86. The problem is 
that the second process reads old data out of the shared
memory.

The executive summary->

Process #1 writes "A" to shared memory at 0x2aac7210
Process #2 reads 0 from shared memory at address 0x2aaca210
Process #1 writes "B" to shared memory at 0x2aac7210
Process #2 read "A" from shared memory at address 0x2aaca210
Process #1 writes "C" to shared memory at 0x2aac7210
Process #2 read "B" from shared memory at address 0x2aaca210

It is interesting that the processes get different addresses
associated with the same shmId. I assume this is because of 
some user-space mapping that is going on.

I left out the semaphore diddling, but I believe that part of
the code is correct because it works flawlessly on the 2.4.7 x86.

Any tips on debugging this would be greatly appreciated. If this
is not the proper forum for questions like this, please point me
in the right direction.

Thanks,

mturc


From owner-linux-mips@oss.sgi.com Wed Apr 24 15:18:53 2002
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Date: Wed, 24 Apr 2002 15:03:15 -0700
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Looks like the infamous cache aliasing problem.  Steve Longerbeam had a patch 
which may help.  Please try it and let me know the results.

Thanks.

Jun


Maurice Turcotte wrote:

> Greetings:
> 
> I am having a problem with Linux Kernel 2.4.5 on a mips.
> 
> I have two processes using share memory for IPC. This same
> code works fine with Kernel 2.4.7 on a x86. The problem is 
> that the second process reads old data out of the shared
> memory.
> 
> The executive summary->
> 
> Process #1 writes "A" to shared memory at 0x2aac7210
> Process #2 reads 0 from shared memory at address 0x2aaca210
> Process #1 writes "B" to shared memory at 0x2aac7210
> Process #2 read "A" from shared memory at address 0x2aaca210
> Process #1 writes "C" to shared memory at 0x2aac7210
> Process #2 read "B" from shared memory at address 0x2aaca210
> 
> It is interesting that the processes get different addresses
> associated with the same shmId. I assume this is because of 
> some user-space mapping that is going on.
> 
> I left out the semaphore diddling, but I believe that part of
> the code is correct because it works flawlessly on the 2.4.7 x86.
> 
> Any tips on debugging this would be greatly appreciated. If this
> is not the proper forum for questions like this, please point me
> in the right direction.
> 
> Thanks,
> 
> mturc
> 
> 


--------------050506030600070802060007
Content-Type: text/plain;
 name="cache-alias.patch"
Content-Transfer-Encoding: 7bit
Content-Disposition: inline;
 filename="cache-alias.patch"

diff -Nuar -X /home/stevel/dontdiff linux-2.4.17.orig/arch/mips/kernel/syscall.c linux-2.4.17/arch/mips/kernel/syscall.c
--- linux-2.4.17.orig/arch/mips/kernel/syscall.c	Sun Sep 16 16:29:10 2001
+++ linux-2.4.17/arch/mips/kernel/syscall.c	Thu Jan 24 15:02:18 2002
@@ -24,6 +24,7 @@
 #include <linux/slab.h>
 #include <linux/utsname.h>
 #include <linux/unistd.h>
+#include <linux/shm.h>
 #include <asm/branch.h>
 #include <asm/offset.h>
 #include <asm/ptrace.h>
@@ -53,6 +54,50 @@
 out:
 	return res;
 }
+
+/*
+ * To avoid cache aliases, we map the shard page with same color.
+ */
+#define COLOUR_ALIGN(addr)    (((addr)+SHMLBA-1)&~(SHMLBA-1))
+
+unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
+				     unsigned long len, unsigned long pgoff,
+				     unsigned long flags)
+{
+	struct vm_area_struct *vma;
+
+	if (flags & MAP_FIXED) {
+		/*
+		 * We do not accept a shared mapping if it would violate
+		 * cache aliasing constraints.
+		 */
+		if ((flags & MAP_SHARED) && (addr & (SHMLBA - 1)))
+			return -EINVAL;
+		return addr;
+	}
+
+	if (len > TASK_SIZE)
+		return -ENOMEM;
+	if (!addr)
+		addr = TASK_UNMAPPED_BASE;
+
+	if (flags & MAP_SHARED)
+		addr = COLOUR_ALIGN(addr);
+	else
+		addr = PAGE_ALIGN(addr);
+
+	for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) {
+		/* At this point:  (!vma || addr < vma->vm_end). */
+		if (TASK_SIZE - len < addr)
+			return -ENOMEM;
+		if (!vma || addr + len <= vma->vm_start)
+			return addr;
+		addr = vma->vm_end;
+		if (flags & MAP_SHARED)
+			addr = COLOUR_ALIGN(addr);
+	}
+}
+
 
 /* common code for old and new mmaps */
 static inline long
diff -Nuar -X /home/stevel/dontdiff linux-2.4.17.orig/include/asm-mips/pgtable.h linux-2.4.17/include/asm-mips/pgtable.h
--- linux-2.4.17.orig/include/asm-mips/pgtable.h	Thu Jan 24 14:35:06 2002
+++ linux-2.4.17/include/asm-mips/pgtable.h	Thu Jan 24 14:56:52 2002
@@ -64,6 +64,9 @@
 #define flush_icache_all()		do { } while(0)
 #endif
 
+/* We provide our own get_unmapped_area to avoid cache aliasing */
+#define HAVE_ARCH_UNMAPPED_AREA
+
 /*
  * - add_wired_entry() add a fixed TLB entry, and move wired register
  */

--------------050506030600070802060007--


From owner-linux-mips@oss.sgi.com Wed Apr 24 15:22:06 2002
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Date: Wed, 24 Apr 2002 15:22:20 -0700 (PDT)
From: James Simmons <jsimmons@transvirtual.com>
To: Zhang Fuxin <fxzhang@ict.ac.cn>
cc: "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Subject: Re: vga initialization
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>   I find most code is already there in scitech's x86emu-0.8.
> in one day it is adapted into linux kernel.

Yipes!!! It has been discussed before and no x86 emulator will go into the
kernel. Now what I really love to ses is a way to trace threw the bios
code so we can write video drivers that don't need the BIOS to work. 


From owner-linux-mips@oss.sgi.com Wed Apr 24 15:39:26 2002
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Date: Wed, 24 Apr 2002 18:39:28 -0400
From: Jim Paris <jim@jtan.com>
To: James Simmons <jsimmons@transvirtual.com>
Cc: Zhang Fuxin <fxzhang@ict.ac.cn>,
   "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Subject: Re: vga initialization
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> Yipes!!! It has been discussed before and no x86 emulator will go into the
> kernel. Now what I really love to ses is a way to trace threw the bios
> code so we can write video drivers that don't need the BIOS to work. 

If you mean "trace through" as in automatically, well, that's an x86
emulator. :) If you mean manually, there's a problem, because every
card is going to be entirely different.

-jim

From owner-linux-mips@oss.sgi.com Wed Apr 24 16:12:36 2002
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Subject: reiserfs
From: Pete Popov <ppopov@mvista.com>
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Has anyone been able to run reiserfs on big endian systems?

Pete




From owner-linux-mips@oss.sgi.com Wed Apr 24 16:28:35 2002
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Date: Wed, 24 Apr 2002 16:28:58 -0700
From: Geoffrey Espin <espin@idiom.com>
To: "H . J . Lu" <hjl@lucon.org>
Cc: linux-mips@oss.sgi.com, linux-mips-kernel@lists.sourceforge.net
Subject: Re: Updates for RedHat 7.1/mips
Message-ID: <20020424162858.A44115@idiom.com>
References: <20020423155925.A8846@lucon.org> <20020424135339.A24558@idiom.com> <20020424140156.A28438@lucon.org> <20020424141136.A63873@idiom.com> <20020424141840.A28683@lucon.org>
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On Wed, Apr 24, 2002 at 02:18:40PM -0700, H . J . Lu wrote:
> > Sorry, I should have specified my kernel *IS* recently (Monday)
> > from linux-mips.sourceforge.net.  And it was previously sync'd
> > to oss.sgi.com on Sunday, 21Apr02.
> Your kernel still have references to symbols in discarded sections. Please
> read linux/include/linux/init.h:

Woops, I wasn't working in my latest OSS/SF tree, as I thought.
All compiles and runs well.  Sorry for the noise.  Thanks for
the new tools, H.J..

Geoff
-- 
Geoffrey Espin
espin@idiom.com
--

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From: Keith Owens <kaos@sgi.com>
To: Geoffrey Espin <espin@idiom.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: Updates for RedHat 7.1/mips 
In-reply-to: Your message of "Wed, 24 Apr 2002 13:53:39 MST."
             <20020424135339.A24558@idiom.com> 
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On Wed, 24 Apr 2002 13:53:39 -0700, 
Geoffrey Espin <espin@idiom.com> wrote:
>drivers/char/char.o(.data+0x3990): undefined reference to `local symbols in discarded section .text.exit'

Assuming that your kernel is up to date, it is likely to be a MIPS only
char driver that has not been converted to __devexit_p.  Run this
script to find the offending driver and correct the source code.

#!/usr/bin/perl -w
#
# reference_discarded.pl (C) Keith Owens 2001 <kaos@ocs.com.au>
#
# List dangling references to vmlinux discarded sections.

use strict;
die($0 . " takes no arguments\n") if($#ARGV >= 0);

my %object;
my $object;
my $line;
my $ignore;

$| = 1;

printf("Finding objects, ");
open(OBJDUMP_LIST, "find . -name '*.o' | xargs objdump -h |") || die "getting objdump list failed";
while (defined($line = <OBJDUMP_LIST>)) {
	chomp($line);
	if ($line =~ /:\s+file format/) {
		($object = $line) =~ s/:.*//;
		$object{$object}->{'module'} = 0;
		$object{$object}->{'size'} = 0;
		$object{$object}->{'off'} = 0;
	}
	if ($line =~ /^\s*\d+\s+\.modinfo\s+/) {
		$object{$object}->{'module'} = 1;
	}
	if ($line =~ /^\s*\d+\s+\.comment\s+/) {
		($object{$object}->{'size'}, $object{$object}->{'off'}) = (split(' ', $line))[2,5]; 
	}
}
close(OBJDUMP_LIST);
printf("%d objects, ", scalar keys(%object));
$ignore = 0;
foreach $object (keys(%object)) {
	if ($object{$object}->{'module'}) {
		++$ignore;
		delete($object{$object});
	}
}
printf("ignoring %d module(s)\n", $ignore);

# Ignore conglomerate objects, they have been built from multiple objects and we
# only care about the individual objects.  If an object has more than one GCC:
# string in the comment section then it is conglomerate.  This does not filter
# out conglomerates that consist of exactly one object, can't be helped.

printf("Finding conglomerates, ");
$ignore = 0;
foreach $object (keys(%object)) {
	if (exists($object{$object}->{'off'})) {
		my ($off, $size, $comment, $l);
		$off = hex($object{$object}->{'off'});
		$size = hex($object{$object}->{'size'});
		open(OBJECT, "<$object") || die "cannot read $object";
		seek(OBJECT, $off, 0) || die "seek to $off in $object failed";
		$l = read(OBJECT, $comment, $size);
		die "read $size bytes from $object .comment failed" if ($l != $size);
		close(OBJECT);
		if ($comment =~ /GCC\:.*GCC\:/m) {
			++$ignore;
			delete($object{$object});
		}
	}
}
printf("ignoring %d conglomerate(s)\n", $ignore);

printf("Scanning objects\n");
foreach $object (keys(%object)) {
	my $from;
	open(OBJDUMP, "objdump -r $object|") || die "cannot objdump -r $object";
	while (defined($line = <OBJDUMP>)) {
		chomp($line);
		if ($line =~ /RELOCATION RECORDS FOR /) {
			($from = $line) =~ s/.*\[([^]]*).*/$1/;
		}
		if (($line =~ /\.text\.exit$/ ||
		     $line =~ /\.data\.exit$/ ||
		     $line =~ /\.exitcall\.exit$/) &&
		    ($from !~ /\.text\.exit$/ &&
		     $from !~ /\.data\.exit$/ &&
		     $from !~ /\.exitcall\.exit$/)) {
			printf("Error: %s %s refers to %s\n", $object, $from, $line);
		}
	}
	close(OBJDUMP);
}
printf("Done\n");


From owner-linux-mips@oss.sgi.com Wed Apr 24 22:25:09 2002
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Date: Thu, 25 Apr 2002 14:25:18 +0900 (JST)
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To: jsun@mvista.com
Cc: turcotte@broadcom.com, linux-mips@oss.sgi.com, mturc@broadcom.com
Subject: Re: Linux Shared Memory Issue
From: Atsushi Nemoto <nemoto@toshiba-tops.co.jp>
In-Reply-To: <3CC72BA3.90600@mvista.com>
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	<3CC72BA3.90600@mvista.com>
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>>>>> On Wed, 24 Apr 2002 15:03:15 -0700, Jun Sun <jsun@mvista.com> said:
jsun> Looks like the infamous cache aliasing problem.  Steve
jsun> Longerbeam had a patch which may help.  Please try it and let me
jsun> know the results.

jsun> +#define COLOUR_ALIGN(addr)    (((addr)+SHMLBA-1)&~(SHMLBA-1))

Recent sparc64's COLOUR_ALIGN macro have pgoff argument like this.
We should do it same way for MIPS?

#define COLOUR_ALIGN(addr,pgoff)		\
	((((addr)+SHMLBA-1)&~(SHMLBA-1)) +	\
	 (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1)))

Thank you.
---
Atsushi Nemoto

From owner-linux-mips@oss.sgi.com Thu Apr 25 00:51:02 2002
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Date: Thu, 25 Apr 2002 00:51:28 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Pete Popov <ppopov@mvista.com>
Cc: linux-mips <linux-mips@oss.sgi.com>
Subject: Re: reiserfs
Message-ID: <20020425005128.A26673@dea.linux-mips.net>
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On Wed, Apr 24, 2002 at 04:13:06PM -0700, Pete Popov wrote:

> Has anyone been able to run reiserfs on big endian systems?

I've seen reports of people running Reiserfs on MIPS but I don't know what
endianess.

  Ralf

From owner-linux-mips@oss.sgi.com Thu Apr 25 01:11:02 2002
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Date: Thu, 25 Apr 2002 10:10:53 +0200 (MEST)
From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Jim Paris <jim@jtan.com>
cc: James Simmons <jsimmons@transvirtual.com>, Zhang Fuxin <fxzhang@ict.ac.cn>,
   "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Subject: Re: vga initialization
In-Reply-To: <20020424183928.A21149@neurosis.mit.edu>
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On Wed, 24 Apr 2002, Jim Paris wrote:
> > Yipes!!! It has been discussed before and no x86 emulator will go into the
> > kernel. Now what I really love to ses is a way to trace threw the bios
> > code so we can write video drivers that don't need the BIOS to work. 
> 
> If you mean "trace through" as in automatically, well, that's an x86
> emulator. :) If you mean manually, there's a problem, because every
> card is going to be entirely different.

I think he means a BIOS `compiler' instead of an `interpreter' or `emulator'.
I.e. something that generates C code which can be compiled and used to
initialize the card later, without caring about the BIOS.

Some caveats:
  - BIOS code frequently uses the timers found in a typical PC-architecture box
  - The BIOS code copyright holder may consider this as a `translation' of
    his work, i.e. copyright infringement.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From owner-linux-mips@oss.sgi.com Thu Apr 25 01:11:39 2002
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Date: Thu, 25 Apr 2002 10:11:55 +0200 (MEST)
From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Ralf Baechle <ralf@oss.sgi.com>
cc: Pete Popov <ppopov@mvista.com>, linux-mips <linux-mips@oss.sgi.com>
Subject: Re: reiserfs
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On Thu, 25 Apr 2002, Ralf Baechle wrote:
> On Wed, Apr 24, 2002 at 04:13:06PM -0700, Pete Popov wrote:
> > Has anyone been able to run reiserfs on big endian systems?
> 
> I've seen reports of people running Reiserfs on MIPS but I don't know what
> endianess.

Some people run it on PowerPC, which is big endian as far as Linux is
concerned.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From owner-linux-mips@oss.sgi.com Thu Apr 25 01:31:17 2002
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Date: Thu, 25 Apr 2002 10:31:42 +0200
From: Guido Guenther <agx@sigxcpu.org>
To: Dani Eichhorn <dani.eichhorn@squix.ch>, linux-mips@oss.sgi.com
Subject: Re: Challenge S crashes configuring the base system
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On Sun, Apr 21, 2002 at 01:10:51PM +0200, Guido Guenther wrote:
[..snip..] 
> It doesn't really "crash". The porblem is that the installer doesn't
> correctly detect the serial console and therefore displays everything on
> tty1 not ttyS0. Boot with /bin/bash as init (use "boot init=/bin/bash"
I just doublechecked this on an Indy. The installer detects the serial
console with either console=ttyS0 as kernel command line argument or
"console=d1" as prom var correctly. Can you try another installation and
save /var/log/messages as well as /target/etc/inittab before you reboot
from the installer?
 -- Guido 

From owner-linux-mips@oss.sgi.com Thu Apr 25 05:30:06 2002
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Date: Thu, 25 Apr 2002 20:29:54 +0800
From: "Zhang Fuxin" <fxzhang@ict.ac.cn>
To: "GIRISH V. GULAWANI" <girishvg@yahoo.com>
CC: "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Subject: Re: Re: Re: vga initialization
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hi,

 I met the situation you described before.
x86emu0.6 will give such result on many cards.
I believe it's because their bioses access vga
memory between address [0xa0000-0xc0000],while
in x86emu0.6, the mem_read/mem_write doesn't
distinguish they from bios code section.
 
 I guess that your code:
  1. copy bios code to PHYSICAL MEMORY 0xc0000
  2. emulation code,and redirect accesses to
    [0xa0000-0xfffff] to PHYSICAL memory 0xa0000-0xfffff
  3. code ok,vga memory access failed. Because pci addr
    !=physical addr in your platform

x86emu-0.8 solve this.

Another caution please,the original code may define 
 #define char u8
and your compiler might treat 'char' as unsigned!At
least my sde-gcc from algor seems to do this.it will
lead to failure of 'JB' emulation.


	

======= 2002-04-25 03:14:00 ÄúÔÚÀ´ÐÅÖÐÐ´µÀ£º=======

>thanks for replying. this card PT80 seems a SPECIAL
>one. perhaps i am the only user for it on non-x86
>platform. 
>
>>   1. what you do
>i borrowed an old MIPS board from my company. from
>home i'm learning MIPS as well as linux. 
>
>>   2. output (dmesg,or captured from your serial
>> console).
>i've NOT used your particular code. somebody gave me a
>PMON code which has SciTech's bios emulation code. 
>i've integrated this code as part of bootloader. i
>dont see any dmesg or something.
>
>>   3. your platform,esp. whether it has pc legacy
>> hardware support.
>the board has a custom PCI bridge with 2 PCI slots.
>the PCI slots are 3.3v. i'm trying to port linux 2.4.3
>on this board. so far i'm able to build kernel with
>serial console. in order to support x-windows i need
>VGA monitor. hence i purchased one AOpen's PT80 card
>which supports PCI 3.3v. i was trying to emulate the
>BIOS. since it has only x86 bios. 
>
>in my case, the emulation as such completes. with no
>errors at any time. the monitor switches from power
>down to power on mode & also appears there AOpen's
>splash window. the one comes initially with AOpen's
>icon & some text explaining the card configuration.
>HOWEVER this whole screen is filled with colorful
>vertical lines. that's it & i'm stucked. 
>
>since i dont have any tools like PCI bus analyzer or
>something. so i have no clue to proceed further. i
>have checked the card & also the monitor. it works
>well on a PC running both windows-me & redhat linux
>7.1. 
>
>one thing i checked however is, an user command build
>on linux dumps the register access. the register
>access & the values written there or read from are
>ditto. exact match.
>
>could you make out anything from this?? any clues??
>
>many thanks & best regards,
>girish.
>
><<snip>>
>
>__________________________________________________
>Do You Yahoo!?
>Yahoo! Games - play chess, backgammon, pool and more
>http://games.yahoo.com/

= = = = = = = = = = = = = = = = = = = =
			

¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡ÖÂ
Àñ£¡
 
				 
¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡Zhang Fuxin
¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡fxzhang@ict.ac.cn
¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡2002-04-25





From owner-linux-mips@oss.sgi.com Thu Apr 25 08:37:58 2002
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From: Florian Lohoff <flo@rfc822.org>
To: Maurice Turcotte <turcotte@broadcom.com>
Cc: linux-mips@oss.sgi.com, Maurice Turcotte <mturc@broadcom.com>
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On Wed, Apr 24, 2002 at 05:27:12PM -0400, Maurice Turcotte wrote:
> Greetings:
>=20
> I am having a problem with Linux Kernel 2.4.5 on a mips.
>=20
> I have two processes using share memory for IPC. This same
> code works fine with Kernel 2.4.7 on a x86. The problem is=20
> that the second process reads old data out of the shared
> memory.

This also shows with x-windows on mips with shared pixmaps.

We see this for a long time and did not come to a solution.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
Nine nineth on september the 9th              Welcome to the new billenium

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Subject: Re: reiserfs
From: Pete Popov <ppopov@mvista.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Ralf Baechle <ralf@oss.sgi.com>, linux-mips <linux-mips@oss.sgi.com>
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On Thu, 2002-04-25 at 01:11, Geert Uytterhoeven wrote:
> On Thu, 25 Apr 2002, Ralf Baechle wrote:
> > On Wed, Apr 24, 2002 at 04:13:06PM -0700, Pete Popov wrote:
> > > Has anyone been able to run reiserfs on big endian systems?
> > 
> > I've seen reports of people running Reiserfs on MIPS but I don't know what
> > endianess.
> 
> Some people run it on PowerPC, which is big endian as far as Linux is
> concerned.

Right, but mips be hangs hard. I'll have to investigate ... MIPS LE is
fine.

Pete


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Geert Uytterhoeven wrote:

>On Thu, 25 Apr 2002, Ralf Baechle wrote:
>
>>On Wed, Apr 24, 2002 at 04:13:06PM -0700, Pete Popov wrote:
>>
>>>Has anyone been able to run reiserfs on big endian systems?
>>>
>>I've seen reports of people running Reiserfs on MIPS but I don't know what
>>endianess.
>>
>
>Some people run it on PowerPC, which is big endian as far as Linux is
>concerned.
>
>Gr{oetje,eeting}s,
>
>						Geert
>
>--
>Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
>In personal conversations with technical people, I call myself a hacker. But
>when I'm talking to journalists I just say "programmer" or something like that.
>							    -- Linus Torvalds
>
Jeff Mahoney, probably the lead big-endian reiserfs developer, has run 
reiserfs on (that I've seen with my own eyes) Sun and Apple (G3 or 
later).  There is no reason his code would not similarly work on 
big-endian mips machines.

-George


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Subject: Re: Linux Shared Memory Issue
References: <NDBBKEAAOJECIDBJKLIHOEDDCDAA.turcotte@broadcom.com>	<3CC72BA3.90600@mvista.com> <20020425.142518.85417141.nemoto@toshiba-tops.co.jp>
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Atsushi Nemoto wrote:

>>>>>>On Wed, 24 Apr 2002 15:03:15 -0700, Jun Sun <jsun@mvista.com> said:
>>>>>>
> jsun> Looks like the infamous cache aliasing problem.  Steve
> jsun> Longerbeam had a patch which may help.  Please try it and let me
> jsun> know the results.
> 
> jsun> +#define COLOUR_ALIGN(addr)    (((addr)+SHMLBA-1)&~(SHMLBA-1))
> 
> Recent sparc64's COLOUR_ALIGN macro have pgoff argument like this.
> We should do it same way for MIPS?
> 
> #define COLOUR_ALIGN(addr,pgoff)		\
> 	((((addr)+SHMLBA-1)&~(SHMLBA-1)) +	\
> 	 (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1)))
> 


What is the purpose of adding the pgoff part?  To avoid mapping all shared 
regions into the beginning of cache?

Jun


From owner-linux-mips@oss.sgi.com Thu Apr 25 20:10:58 2002
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Subject: Re: Linux Shared Memory Issue
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>>>>> On Thu, 25 Apr 2002 11:46:04 -0700, Jun Sun <jsun@mvista.com> said:
>> #define COLOUR_ALIGN(addr,pgoff) \ ((((addr)+SHMLBA-1)&~(SHMLBA-1))
>> + \ (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1)))

jsun> What is the purpose of adding the pgoff part?  To avoid mapping
jsun> all shared regions into the beginning of cache?

I suppose so.  For example, mmapping offset 0x1000 of /dev/kmem will
return 0xXXXX0000 address if we ignore pgoff.  This can cause aliasing
problem with KSEG0 address (0x80001000).  Adding pgoff, mmap will
return 0xXXXX1000.

In case of IPC shm, pgoff is always 0 so this change does not effect.

---
Atsushi Nemoto

From owner-linux-mips@oss.sgi.com Fri Apr 26 08:20:49 2002
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Date: Fri, 26 Apr 2002 17:21:12 +0200 (MEST)
From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Linux/MIPS Development <linux-mips@oss.sgi.com>
Subject: asm type names
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	Hi,

include/asm-mips*/unaligned.h uses different terminology for the same sizes,
sometimes even in the same file, making things a bit confusing:
  - double vs. quad
  - word vs. long
  - halfword vs. word

Which set of terms is preferred, so we can increase consistency?

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From owner-linux-mips@oss.sgi.com Fri Apr 26 11:33:18 2002
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Subject: Re: reiserfs
From: Pete Popov <ppopov@mvista.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Ralf Baechle <ralf@oss.sgi.com>, linux-mips <linux-mips@oss.sgi.com>
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On Thu, 2002-04-25 at 01:11, Geert Uytterhoeven wrote:
> On Thu, 25 Apr 2002, Ralf Baechle wrote:
> > On Wed, Apr 24, 2002 at 04:13:06PM -0700, Pete Popov wrote:
> > > Has anyone been able to run reiserfs on big endian systems?
> > 
> > I've seen reports of people running Reiserfs on MIPS but I don't know what
> > endianess.
> 
> Some people run it on PowerPC, which is big endian as far as Linux is
> concerned.

FYI, it turned out to be a toolchain bug (2.95.3). Versions 2.96 and 3.x
work just fine.

Pete


From owner-linux-mips@oss.sgi.com Fri Apr 26 14:04:31 2002
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Date: Fri, 26 Apr 2002 14:05:01 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Linux/MIPS Development <linux-mips@oss.sgi.com>
Subject: Re: asm type names
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On Fri, Apr 26, 2002 at 05:21:12PM +0200, Geert Uytterhoeven wrote:

> include/asm-mips*/unaligned.h uses different terminology for the same sizes,
> sometimes even in the same file, making things a bit confusing:
>   - double vs. quad
>   - word vs. long
>   - halfword vs. word
> 
> Which set of terms is preferred, so we can increase consistency?

The MIPS terminology is:

  - 2 bytes - halfword
  - 4 bytes - word
  - 8 bytes - doubleword
  - 16 bytes - quadword

Unfortunately part of the industry have a different idea of what the size
of a word should be, so for example on i386 the use of the terms is:

 - 2 bytes word
 - 4 bytes doubleword
 - 8 bytes quadword

At times it's hard to avoid confusion; in general I therefore prefer to
avoid these terms or their abreviations but there are places like the
old assembler implementation of inw() where both are used next to each
other ...

  Ralf

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Subject: Re: reiserfs
To: ppopov@mvista.com (Pete Popov)
Date: Sat, 27 Apr 2002 21:19:53 +0100 (BST)
Cc: linux-mips@oss.sgi.com (linux-mips)
In-Reply-To: <1019689986.8208.104.camel@zeus> from "Pete Popov" at Apr 24, 2002 04:13:06 PM
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> Has anyone been able to run reiserfs on big endian systems?

Should work on newer 2.4 kernels

From owner-linux-mips@oss.sgi.com Sat Apr 27 13:06:17 2002
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Date: Sat, 27 Apr 2002 13:05:53 -0700
From: Pete Popov <ppopov@mvista.com>
Subject: Re: reiserfs
In-reply-to: <E171Yfh-0000gA-00@the-village.bc.nu>
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On Sat, 2002-04-27 at 13:19, Alan Cox wrote:
> > Has anyone been able to run reiserfs on big endian systems?
> 
> Should work on newer 2.4 kernels

Yes, it does. I sent an email yesterday explaining what the problem
was.  The 2.95.3 toolchain is miscompiling the cpu_to_le16 and
le16_to_cpu functions. The problem appears to be fixed in 2.96 and 3.x
so reiserfs is looking good for both, LE and BE mips systems.

Pete


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From: Florian Lohoff <flo@rfc822.org>
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Hi Ralf, *,

On Wed, Apr 24, 2002 at 03:03:15PM -0700, Jun Sun wrote:
> Looks like the infamous cache aliasing problem.  Steve Longerbeam had a=
=20
> patch which may help.  Please try it and let me know the results.

> Maurice Turcotte wrote:
> >I am having a problem with Linux Kernel 2.4.5 on a mips.
> >
> >I have two processes using share memory for IPC. This same
> >code works fine with Kernel 2.4.7 on a x86. The problem is=20
> >that the second process reads old data out of the shared
> >memory.
> >
> >The executive summary->
> >
> >Process #1 writes "A" to shared memory at 0x2aac7210
> >Process #2 reads 0 from shared memory at address 0x2aaca210
> >Process #1 writes "B" to shared memory at 0x2aac7210
> >Process #2 read "A" from shared memory at address 0x2aaca210
> >Process #1 writes "C" to shared memory at 0x2aac7210
> >Process #2 read "B" from shared memory at address 0x2aaca210
> >

I today tried the patch in conjunction with XFree86 and XSHM on
an Indy R5000/150. Usually all gtk shared-pixmaps get destroyed
and written lines in it. With this patch all these garbage disappears.
As long as there a no serious issues against this patch i would
vote for inclused. It applies against todays cvs with only little
offsets and gave me no problems. It definitly solves some serious
issues with shm.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
Nine nineth on september the 9th              Welcome to the new billenium

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diff -Nuar -X /home/stevel/dontdiff linux-2.4.17.orig/arch/mips/kernel/sysc=
all.c linux-2.4.17/arch/mips/kernel/syscall.c
--- linux-2.4.17.orig/arch/mips/kernel/syscall.c	Sun Sep 16 16:29:10 2001
+++ linux-2.4.17/arch/mips/kernel/syscall.c	Thu Jan 24 15:02:18 2002
@@ -24,6 +24,7 @@
 #include <linux/slab.h>
 #include <linux/utsname.h>
 #include <linux/unistd.h>
+#include <linux/shm.h>
 #include <asm/branch.h>
 #include <asm/offset.h>
 #include <asm/ptrace.h>
@@ -53,6 +54,50 @@
 out:
 	return res;
 }
+
+/*
+ * To avoid cache aliases, we map the shard page with same color.
+ */
+#define COLOUR_ALIGN(addr)    (((addr)+SHMLBA-1)&~(SHMLBA-1))
+
+unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
+				     unsigned long len, unsigned long pgoff,
+				     unsigned long flags)
+{
+	struct vm_area_struct *vma;
+
+	if (flags & MAP_FIXED) {
+		/*
+		 * We do not accept a shared mapping if it would violate
+		 * cache aliasing constraints.
+		 */
+		if ((flags & MAP_SHARED) && (addr & (SHMLBA - 1)))
+			return -EINVAL;
+		return addr;
+	}
+
+	if (len > TASK_SIZE)
+		return -ENOMEM;
+	if (!addr)
+		addr =3D TASK_UNMAPPED_BASE;
+
+	if (flags & MAP_SHARED)
+		addr =3D COLOUR_ALIGN(addr);
+	else
+		addr =3D PAGE_ALIGN(addr);
+
+	for (vma =3D find_vma(current->mm, addr); ; vma =3D vma->vm_next) {
+		/* At this point:  (!vma || addr < vma->vm_end). */
+		if (TASK_SIZE - len < addr)
+			return -ENOMEM;
+		if (!vma || addr + len <=3D vma->vm_start)
+			return addr;
+		addr =3D vma->vm_end;
+		if (flags & MAP_SHARED)
+			addr =3D COLOUR_ALIGN(addr);
+	}
+}
+
=20
 /* common code for old and new mmaps */
 static inline long
diff -Nuar -X /home/stevel/dontdiff linux-2.4.17.orig/include/asm-mips/pgta=
ble.h linux-2.4.17/include/asm-mips/pgtable.h
--- linux-2.4.17.orig/include/asm-mips/pgtable.h	Thu Jan 24 14:35:06 2002
+++ linux-2.4.17/include/asm-mips/pgtable.h	Thu Jan 24 14:56:52 2002
@@ -64,6 +64,9 @@
 #define flush_icache_all()		do { } while(0)
 #endif
=20
+/* We provide our own get_unmapped_area to avoid cache aliasing */
+#define HAVE_ARCH_UNMAPPED_AREA
+
 /*
  * - add_wired_entry() add a fixed TLB entry, and move wired register
  */

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Pete Popov wrote:

> On Sat, 2002-04-27 at 13:19, Alan Cox wrote:
> 
>>>Has anyone been able to run reiserfs on big endian systems?
>>>
>>Should work on newer 2.4 kernels
>>
> 
> Yes, it does. I sent an email yesterday explaining what the problem
> was.  The 2.95.3 toolchain is miscompiling the cpu_to_le16 and
> le16_to_cpu functions. The problem appears to be fixed in 2.96 and 3.x
> so reiserfs is looking good for both, LE and BE mips systems.
> 


Here is the test case that reveals the toolchain problem.  Brave souls are 
welcome to look into it.

Apparently the bug only happens on be tools with 2.95.x.

Jun



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#if 0

compile instructions:

/opt/hardhat/devkit/mips/fp_be/bin/mips_fp_be-gcc -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -g -G 0 -mno-abicalls -fno-pic -mcpu=r4600 -mips2 -Wa,--trap -pipe    -c -o try.o try.c

#endif

typedef	unsigned short __u16;
typedef	unsigned __u32;

#define ___swab16_new(x) \
({ \
        __u32 __x = (x); \
        __x = ((__u32)( \
                ((__u32)(__x) << 8) | \
                (((__u32)(__x) & (__u16)0xff00U) >> 8) )); \
        (__u16)(__x & 0xffff); \
})

#define ___swab16(x) \
({ \
        __u16 __x = (x); \
        ((__u16)( \
                (((__u16)(__x) & (__u16)0x00ffU) << 8) | \
                (((__u16)(__x) & (__u16)0xff00U) >> 8) )); \
})

#  define __swab16(x) \
(__builtin_constant_p((__u16)(x)) ? \
  ___swab16((x)) : \
   __fswab16((x)))

#ifndef __arch__swab16
#  define __arch__swab16(x) ({ __u16 __tmp = (x) ; ___swab16(__tmp); })
#endif

static __inline__ __const__ __u16 __fswab16(__u16 x)
{
	        return __arch__swab16(x);
}

#define __le16_to_cpu(x) __swab16((x))
#define le16_to_cpu __le16_to_cpu

extern __u16 x;
extern __u16 y;

void foo_old(void)
{
	if (le16_to_cpu(x) > y) 
		y = x;
}

--------------060504060505070508050507--


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From: Manoj Ekbote <Manoj_Ekbote@pmc-sierra.com>
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Subject: sash for MIPS
Date: Mon, 29 Apr 2002 11:52:48 -0700
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Hi,

Is there a port of sash(shell) on MIPS?

TIA
Manoj


From owner-linux-mips@oss.sgi.com Mon Apr 29 12:26:36 2002
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	for linux-mips@oss.sgi.com; Mon, 29 Apr 2002 21:17:53 +0200 (CEST) 
Date: Mon, 29 Apr 2002 21:17:53 +0200
From: Martin Schulze <joey@infodrom.org>
To: Manoj Ekbote <Manoj_Ekbote@pmc-sierra.com>
Cc: "Linux (E-mail)" <linux-mips@oss.sgi.com>
Subject: Re: sash for MIPS
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Manoj Ekbote wrote:
> Hi,
> 
> Is there a port of sash(shell) on MIPS?

http://ftp.debian.org/debian/pool/main/s/sash/sash_3.4-8.2_mips.deb

Regards,

	Joey

-- 
Experience is something you don't get until just after you need it.

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Subject: Re: sash for MIPS
From: Justin Carlson <justincarlson@cmu.edu>
To: Manoj Ekbote <Manoj_Ekbote@pmc-sierra.com>
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On Mon, 2002-04-29 at 14:52, Manoj Ekbote wrote:
> Hi,
>=20
> Is there a port of sash(shell) on MIPS?
>=20

A bit more than a year ago I got it working on a MIPS board with very
little effort.  Don't have it anymore, though.  Have you tried just
grabbing the source and compiling it?

-Justin

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From owner-linux-mips@oss.sgi.com Mon Apr 29 18:04:20 2002
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Date: Tue, 30 Apr 2002 10:04:55 +0900 (JST)
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To: jsun@mvista.com
Cc: ppopov@mvista.com, alan@lxorguk.ukuu.org.uk, linux-mips@oss.sgi.com
Subject: Re: reiserfs
From: Hiroyuki Machida <machida@sm.sony.co.jp>
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Hello, all

From: Jun Sun <jsun@mvista.com>
Subject: Re: reiserfs
Date: Mon, 29 Apr 2002 10:35:54 -0700

> Here is the test case that reveals the toolchain problem.  Brave souls are 
> welcome to look into it.
> 
> Apparently the bug only happens on be tools with 2.95.x.
> 
> Jun

I think this bug has been fixed with
     http://gcc.gnu.org/ml/gcc-patches/2000-02/msg00489.html
for gcc-3.x.

You can apply the patch included that mail to gcc-2.95.x, easily.

---
Hiroyuki Machida
Sony Corp.

From owner-linux-mips@oss.sgi.com Tue Apr 30 03:15:43 2002
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From: Dominic Sweetman <dom@algor.co.uk>
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To: Johannes Stezenbach <js@convergence.de>,
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cc: gcc@gcc.gnu.org, linux-mips@oss.sgi.com
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Subject: Re: [Fwd: Current state of MIPS16 support?]
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On 17th April (yes, I know that's a long time) Johannes wrote:

> I quickly discovered that mips16 support in gcc-2.95 is broken.
> ...
> gcc-3.1 does seem to generate correct code for my tiny
> test programs, but lacks mips16 support routines in
> libgcc.a when configured for target mips-linux.
> ...
> Dominic Sweetman from Algorithmics mentioned in a posting
> to the linux-mips list (http://oss.sgi.com/mips/mail.html)
> that they have numerous patches against an old gcc version.
> Has someone had a look at the Algorithmics gcc, or even
> attempted to incorporate thier patches into gcc-3.x?

I really owe you guys a reply, so I'll go for a cross-post.

Eric replied:

> mips16 support was broken for quite some time. Recently a lot of bug
> fixes have gone into making it quite usable, though fairly unstable...

Sounds fair.

> I have not looked at the Algorithmics code because I don't have
> copyright on it...

We do publish our sources on our web server.  Not only are they GPL
but we have a copyright assignment to the FSF in place (which I know
was sent to Jim Wilson of Cygnus, albeit in 1993...)

We're operating from a baseline which was a Cygnus/RedHat "2.96"
release made to MIPS Technologies in late 2000.  A snapshot from a
contract which had run into some kind of dissension, it had some new
MIPS16 support but it was very buggy (the regular 32-bit MIPS code
generator, too).  It has some nice features, though, like the "Haifa"
scheduler and the DFA extensions to machine descriptions for
superscalar CPUs.

It's true we have not contributed patches lately.  We don't really
have the resouces; our success rate used to be very low, and since
we're not working around the developing 3.x sources the prospects seem
even dimmer.

We're working (with funding from MIPS Technologies) on building a
toolchain which:

o Can build Linux kernel, libraries and applications alike;

o Is substantially more efficient than other GCC versions when
  producing MIPS application ("MIPS/ABI", PIC) code;

o Will produce ugly-but-correct PIC code for MIPS16 functions, so
  MIPS16 can be tested in a standard Linux environment;

o Operates to a known and documented ABI (even the forgotten details,
  like gprof...)

(The modesty of those ambitions should be measured against the reality
of today's Linux/MIPS...)

We should be done in 6 weeks or so.  Our intention is to provide this
port as both source and binary RPMs for free download, and to
encourage its widespread use.

We appreciate it would be great if this work was converged into a
robust 3.x compiler (though the change in C++ code conventions means,
I think, that it will be a long time before such a compiler can be
used by a majority of substantial embedded projects).  We're
canvassing anyone we can think of with the funds or influence to help
make it happen.

It would be even more valuable if we could ensure that MIPS becomes a
"first-class" architecture for the evolving GCC - but the latter
surely is a big commitment for the core GCC group.

It's a pity that the different priorities of various funders and
developers mean that there is no baseline toolkit for Linux/MIPS, so
that such resources as are available are frequently used to re-invent
the wheel.

Anyone got any ideas how to make it better?

--
Dominic Sweetman
Algorithmics Ltd
The Fruit Farm, Ely Road, Chittering, CAMBS CB5 9PH, ENGLAND
phone +44 1223 706200/fax +44 1223 706250/direct +44 1223 706205
http://www.algor.co.uk

From owner-linux-mips@oss.sgi.com Tue Apr 30 11:03:33 2002
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Message-ID: <3CCEDC94.B668649E@mvista.com>
Date: Tue, 30 Apr 2002 12:04:04 -0600
From: Michael Pruznick <michael_pruznick@mvista.com>
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Organization: MontaVista
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To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
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Subject: Re: ps2 keyboard -- no key down events
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"Maciej W. Rozycki" wrote:
> 
> On Wed, 24 Apr 2002, Michael Pruznick wrote:
> 
> > I'm working on this mips board with a smsc 90e66 south bridge and
> > fdc37m812 super io.  I'm using the standard pc_keyb.c driver.  I only
> > see keyboard interrupts and KBD_STAT_OBF set in response to "key up"
> > events.  I never see them in response to "key down" events.  Thus, the
> > shell running on the vga console never gets my input (since it is the
> > "key down" events that pass the character typed to the shell).
> >
> > At this point, I'm thinking that the standard driver needs some mods
> > to work with the super io's ps2 controller.  The smsc doc only covers
> > programming the plug and play registers and doesn't give any info about
> > programming the ps2 controller.
> 
>  An 8042-compatible microcontroller (actually the firmware it runs) may
> need to be programmed to a PC/AT-compatible mode.  On an i386 it is
> typically done by the BIOS.  Try dumping configuration data from your chip
> and compare it with what is set up in an i386 system.  You can dump 32
> bytes of configuration data with the 0x20 command of the 8042 (5 low-order
> bits of a command byte specify an address).  Writing can be performed
> using the 0x60 command (the same semantics).
> 
>  Some data is available in the Ralf Brown's interrupt list (look for
> "inter60*.zip" files on a SimTel DOS collection's mirror).  I have an old
> Intel hardcopy document somewhere that describes to some extent the
> IBM-defined locations of the configuration data -- I may try to dig it out
> and see if I could help you.  Anyway, you should probably contact the
> chip's manufacturer.
Thanks, that seams to be the issue or at least part of it.  I dumped
offset 0x20-0x3f on several systems.  All gave different results.
Some helped, some did not.  In the case of the ones that helped, all
the keys I tried (alpha,num,symbol) worked, until I pressed a shift,
control, or alt key, in which case the keyboard was stuck sending
the shifted value of all keys.  I sent a message to the chip
manufacturer, waiting for their response.  In all cases, the mouse
doesn't work and enabling the mouse via "gpm -t ps2 -m /dev/mouse"
or "od -tx1 -w1 /dev/mouse" causes the keyboard to stop sending
scancodes (on key up or key down).


-- 
Michael Pruznick, michael_pruznick@mvista.com, www.mvista.com
MontaVista Software, 1237 East Arques Ave, Sunnyvale, CA 94085
direct voice/fax:970-266-1108, main office:408-328-9200

