From owner-linux-mips@oss.sgi.com Thu May  2 11:51:37 2002
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Date: Thu, 02 May 2002 14:50:10 -0500
From: Scott A McConnell <samcconn@cotw.com>
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Subject: Accounting for all memory.
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I am trying to understand memory usage on my system.
NEC VR5432, mipsel, 2.4.5 kernel

Does slab info appear in "used:" column of /proc/meminfo?
What the holes "??????" in /proc/iomem are used for?
I can not account for all of the "1268k reserved memory.

Thanks in advance,
Scott

-----------------------------------------------------------------------
<4>Memory: 4876k/6144k available (801k kernel code, 1268k reserved, 69k
data, 60k init)
...
<4>Freeing unused kernel memory: 60k freed
-----------------------------------------------------------------------

/proc # cat iomem 
00000000-005fffff : System RAM
  00000000-00000fff : ???????????       4096 (added by hand)
  00001000-000ca687 : Kernel code     824968
  000ca688-000db99f : ???????????      70424 (added by hand)
  000db9a0-000ed033 : Kernel data      71316
                                      ------
                                      970804

/proc # cat meminfo 
        total:    used:    free:  shared: buffers:  cached:
Mem:   5046272  1392640  3653632        0    16384   598016
Swap:        0        0        0
MemTotal:         4928 kB
MemFree:          3568 kB
MemShared:           0 kB
Buffers:            16 kB
Cached:            584 kB
Active:            600 kB
Inact_dirty:         0 kB
Inact_clean:         0 kB
Inact_target:       12 kB
HighTotal:           0 kB
HighFree:            0 kB
LowTotal:         4928 kB
LowFree:          3568 kB
SwapTotal:           0 kB

  6291456     (6 MB allocated to kernel in prom.c)
- 5046272     (Total memory in use)
---------
  1245184     

1245184 - 970804(Kernel memory) = 274380 I can not account for this
memory.

-- 
Scott A. McConnell

From owner-linux-mips@oss.sgi.com Fri May  3 14:46:24 2002
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From: Jun Sun <jsun@mvista.com>
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Subject: what is the right behavior of copy_to_user(0x0, ..., ...)?
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When running LTP, I notice that recent kernel has a kernel access fault:

<1>Unable to handle kernel paging request at virtual address 00000000, epc
== 80273860, ra == 80205aa4
Oops in fault.c:do_page_fault, line 204:
$0 : 00000000 10001f00 00000002 00000002 00000000 86df5e98 00000001 00000040
$8 : 00000000 00000000 00000001 ffffffff 00000002 802b4864 00000001 00000001
$16: 100003d8 00000000 00000002 86df5e98 00401080 10002df8 00000000 00000097
$24: 0000000a 802e7ab6                   86df4000 86df5e60 7fff7c60 80205aa4
Hi : 00000000
Lo : 00000000
epc  : 80273860    Not tainted
Status: 10001f03
Cause : 9080800c
  ....

Tracing error reveals that user process passed a NULL buffer pointer to 
sys_getpeername() syscall, probably intentionally.  Then it goes all the way 
down to copy_to_user(0x0, ..., ...) and caused a oops as above.

As a result of oops the user process is killed.  However I am not sure if this 
is the right way to respond to an ill argument.  copy_to_user() probably 
should catch this case and return some meaningful error back to the caller.

I am not sure what is the best way to achieve this.  Any thoughts?

Jun


From owner-linux-mips@oss.sgi.com Fri May  3 16:22:33 2002
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	Fri, 3 May 2002 16:23:37 -0700
Date: Fri, 3 May 2002 16:23:37 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Jun Sun <jsun@mvista.com>
Cc: linux-mips <linux-mips@oss.sgi.com>
Subject: Re: what is the right behavior of copy_to_user(0x0, ..., ...)?
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On Fri, May 03, 2002 at 02:46:19PM -0700, Jun Sun wrote:

> When running LTP, I notice that recent kernel has a kernel access fault:
> 
> <1>Unable to handle kernel paging request at virtual address 00000000, epc
> == 80273860, ra == 80205aa4

Well, decode the oops message.  The question is what is at 0x80273860?

  Ralf

From owner-linux-mips@oss.sgi.com Fri May  3 16:42:04 2002
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Date: Fri, 03 May 2002 16:41:56 -0700
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Subject: Re: what is the right behavior of copy_to_user(0x0, ..., ...)?
References: <3CD3052B.1050400@mvista.com> <20020503162337.A27366@dea.linux-mips.net>
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Ralf Baechle wrote:

> On Fri, May 03, 2002 at 02:46:19PM -0700, Jun Sun wrote:
> 
> 
>>When running LTP, I notice that recent kernel has a kernel access fault:
>>
>><1>Unable to handle kernel paging request at virtual address 00000000, epc
>>== 80273860, ra == 80205aa4
>>
> 
> Well, decode the oops message.  The question is what is at 0x80273860?
> 


0x80273860 is copy_bytes in arch/mips/lib/memcpy.S, which is reached through __copy_user.

The faulting instruction, not suprisingly, is writing a byte to the 
destination at 0x0.

Anybody can try to call copy_to_user(0x0, ...) inside kernel and see the 
scene.  The question here is whether we should reach do_page_fault() and 
terminate calling process or try to catch the fault and return some meaningful 
error.

It appears earlier version of kernel does not have this problem.  I have not 
fully figured out why.

Jun



From owner-linux-mips@oss.sgi.com Fri May  3 18:39:03 2002
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Date: Fri, 3 May 2002 18:40:00 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Jun Sun <jsun@mvista.com>
Cc: linux-mips <linux-mips@oss.sgi.com>
Subject: Re: what is the right behavior of copy_to_user(0x0, ..., ...)?
Message-ID: <20020503184000.A1238@dea.linux-mips.net>
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On Fri, May 03, 2002 at 04:41:56PM -0700, Jun Sun wrote:

> It appears earlier version of kernel does not have this problem.  I have not 
> fully figured out why.

We didn't handle exceptions in branch delay slots.  Try this patch and
tell me if it helps.

  Ralf

Index: arch/mips/mm/fault.c
===================================================================
RCS file: /home/pub/cvs/linux/arch/mips/mm/fault.c,v
retrieving revision 1.25.2.2
diff -u -r1.25.2.2 fault.c
--- arch/mips/mm/fault.c	16 Jan 2002 03:49:24 -0000	1.25.2.2
+++ arch/mips/mm/fault.c	4 May 2002 01:28:34 -0000
@@ -19,6 +19,7 @@
 #include <linux/smp_lock.h>
 #include <linux/version.h>
 
+#include <asm/branch.h>
 #include <asm/hardirq.h>
 #include <asm/pgalloc.h>
 #include <asm/mmu_context.h>
@@ -77,7 +78,7 @@
 	struct vm_area_struct * vma;
 	struct task_struct *tsk = current;
 	struct mm_struct *mm = tsk->mm;
-	unsigned long fixup;
+	unsigned long epc, fixup;
 	siginfo_t info;
 
 	/*
@@ -181,7 +182,8 @@
 
 no_context:
 	/* Are we prepared to handle this kernel fault?  */
-	fixup = search_exception_table(regs->cp0_epc);
+	epc = regs->cp0_epc + delay_slot(regs) ? 4 : 0;
+	fixup = search_exception_table(epc);
 	if (fixup) {
 		long new_epc;
 
Index: arch/mips64/mm/fault.c
===================================================================
RCS file: /home/pub/cvs/linux/arch/mips64/mm/fault.c,v
retrieving revision 1.26.2.6
diff -u -r1.26.2.6 fault.c
--- arch/mips64/mm/fault.c	23 Feb 2002 02:16:42 -0000	1.26.2.6
+++ arch/mips64/mm/fault.c	4 May 2002 01:28:34 -0000
@@ -21,6 +21,7 @@
 #include <linux/smp_lock.h>
 #include <linux/version.h>
 
+#include <asm/branch.h>
 #include <asm/hardirq.h>
 #include <asm/pgalloc.h>
 #include <asm/mmu_context.h>
@@ -103,7 +104,7 @@
 	struct vm_area_struct * vma;
 	struct task_struct *tsk = current;
 	struct mm_struct *mm = tsk->mm;
-	unsigned long fixup;
+	unsigned long epc, fixup;
 	siginfo_t info;
 
 #if 0
@@ -208,7 +209,8 @@
 
 no_context:
 	/* Are we prepared to handle this kernel fault?  */
-	fixup = search_exception_table(regs->cp0_epc);
+	epc = regs->cp0_epc + delay_slot(regs) ? 4 : 0;
+	fixup = search_exception_table(epc);
 	if (fixup) {
 		long new_epc;
 

From owner-linux-mips@oss.sgi.com Mon May  6 03:26:54 2002
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Date: Mon, 6 May 2002 12:27:32 +0200
From: Florian Lohoff <flo@rfc822.org>
To: linux-mips@oss.sgi.com
Subject: RM200 big endian prom ?
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Hi,
i yesterday had a try booting my RM200 (Big Endian Sinix firmware)
with a big endian compiled kernel - It immediatly crashes in ArcWrite
as the Bios is not an Arc (Probably a bit similar).

Does anyone have interesting informations about that prom ?

BTW: There are really some funny lines in arc/init.c :)

arch/mips/arc/init.c
     36         if (pb->magic !=3D 0x53435241) {
     37                 prom_printf("Aieee, bad prom vector magic %08lx\n",=
 pb->magic);
     38                 while(1)
     39                         ;
     40         }
     41=20

Calling ArcWrite in case of no Arc ;) At least one knows what happens
if the Firmware is giving out EPC Faulting address (Which in this case
is 0x6c)

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From owner-linux-mips@oss.sgi.com Mon May  6 04:03:32 2002
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Date: Mon, 6 May 2002 13:04:58 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Reply-To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Florian Lohoff <flo@rfc822.org>
cc: ralf@oss.sgi.com, linux-mips@oss.sgi.com, agx@sigxcpu.org
Subject: Re: XSHM/shared-pixmap fix  Was: Linux Shared Memory Issue
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On Sat, 27 Apr 2002, Florian Lohoff wrote:

  [NON-Text Body part not included]

 Check it doesn't break static executables -- there were a few
arch_get_unmapped_area() updates in mm/mmap.c that you don't include in
the patch it would seem. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon May  6 05:43:26 2002
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Date: Mon, 6 May 2002 14:44:33 +0200 (CEST)
From: Kjeld Borch Egevang <kjelde@mips.com>
To: linux-mips mailing list <linux-mips@oss.sgi.com>
Subject: zsh on console
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When I run zsh on the console (serial interface) the process hangs. I can 
login with /bin/bash, but when I start /bin/zsh it waits forever. I can 
interrupt the process and regain control.

It's only related to the console. If I login with telnet it works just 
fine.

Any idea, what could be wrong?


/Kjeld

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From owner-linux-mips@oss.sgi.com Mon May  6 05:51:36 2002
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From: "Kevin D. Kissell" <kevink@mips.com>
To: "Kjeld Borch Egevang" <kjelde@mips.com>,
   "linux-mips mailing list" <linux-mips@oss.sgi.com>
References: <Pine.LNX.4.44.0205061440210.21711-100000@coplin19.mips.com>
Subject: Re: zsh on console
Date: Mon, 6 May 2002 14:57:28 +0200
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> When I run zsh on the console (serial interface) the process hangs. I can 
> login with /bin/bash, but when I start /bin/zsh it waits forever. I can 
> interrupt the process and regain control.
> 
> It's only related to the console. If I login with telnet it works just 
> fine.
> 
> Any idea, what could be wrong?

I don't know what it would be specifically, but having
dealt with similar problems on other Unix systems,
it's proably the case that zsh uses a particular tty
mode that isn't correctly supported by the serial
console driver, either due to a bug in the driver or
due to a conflict with some other feature enabled
on the console port.  The next step to take would
be to run "stty -all" under /bin/bash and under
/bin/zsh on a telnet session, and compare the 
outputs.


From owner-linux-mips@oss.sgi.com Mon May  6 11:35:22 2002
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It would help if not for the gross typo. :-)  See the attachment.

Jun


Ralf Baechle wrote:

> On Fri, May 03, 2002 at 04:41:56PM -0700, Jun Sun wrote:
> 
> 
>>It appears earlier version of kernel does not have this problem.  I have not 
>>fully figured out why.
>>
> 
> We didn't handle exceptions in branch delay slots.  Try this patch and
> tell me if it helps.
> 
>   Ralf
> 
> Index: arch/mips/mm/fault.c
> ===================================================================
> RCS file: /home/pub/cvs/linux/arch/mips/mm/fault.c,v
> retrieving revision 1.25.2.2
> diff -u -r1.25.2.2 fault.c
> --- arch/mips/mm/fault.c	16 Jan 2002 03:49:24 -0000	1.25.2.2
> +++ arch/mips/mm/fault.c	4 May 2002 01:28:34 -0000
> @@ -19,6 +19,7 @@
>  #include <linux/smp_lock.h>
>  #include <linux/version.h>
>  
> +#include <asm/branch.h>
>  #include <asm/hardirq.h>
>  #include <asm/pgalloc.h>
>  #include <asm/mmu_context.h>
> @@ -77,7 +78,7 @@
>  	struct vm_area_struct * vma;
>  	struct task_struct *tsk = current;
>  	struct mm_struct *mm = tsk->mm;
> -	unsigned long fixup;
> +	unsigned long epc, fixup;
>  	siginfo_t info;
>  
>  	/*
> @@ -181,7 +182,8 @@
>  
>  no_context:
>  	/* Are we prepared to handle this kernel fault?  */
> -	fixup = search_exception_table(regs->cp0_epc);
> +	epc = regs->cp0_epc + delay_slot(regs) ? 4 : 0;
> +	fixup = search_exception_table(epc);
>  	if (fixup) {
>  		long new_epc;
>  
> Index: arch/mips64/mm/fault.c
> ===================================================================
> RCS file: /home/pub/cvs/linux/arch/mips64/mm/fault.c,v
> retrieving revision 1.26.2.6
> diff -u -r1.26.2.6 fault.c
> --- arch/mips64/mm/fault.c	23 Feb 2002 02:16:42 -0000	1.26.2.6
> +++ arch/mips64/mm/fault.c	4 May 2002 01:28:34 -0000
> @@ -21,6 +21,7 @@
>  #include <linux/smp_lock.h>
>  #include <linux/version.h>
>  
> +#include <asm/branch.h>
>  #include <asm/hardirq.h>
>  #include <asm/pgalloc.h>
>  #include <asm/mmu_context.h>
> @@ -103,7 +104,7 @@
>  	struct vm_area_struct * vma;
>  	struct task_struct *tsk = current;
>  	struct mm_struct *mm = tsk->mm;
> -	unsigned long fixup;
> +	unsigned long epc, fixup;
>  	siginfo_t info;
>  
>  #if 0
> @@ -208,7 +209,8 @@
>  
>  no_context:
>  	/* Are we prepared to handle this kernel fault?  */
> -	fixup = search_exception_table(regs->cp0_epc);
> +	epc = regs->cp0_epc + delay_slot(regs) ? 4 : 0;
> +	fixup = search_exception_table(epc);
>  	if (fixup) {
>  		long new_epc;
>  
> 


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diff -Nru link/arch/mips/mm/fault.c.orig link/arch/mips/mm/fault.c
--- link/arch/mips/mm/fault.c.orig	Mon May  6 11:12:41 2002
+++ link/arch/mips/mm/fault.c	Mon May  6 11:15:12 2002
@@ -182,7 +182,7 @@
 
 no_context:
 	/* Are we prepared to handle this kernel fault?  */
-	epc = regs->cp0_epc + delay_slot(regs) ? 4 : 0;
+	epc = regs->cp0_epc + (delay_slot(regs) ? 4 : 0);
 	fixup = search_exception_table(epc);
 	if (fixup) {
 		long new_epc;
diff -Nru link/arch/mips64/mm/fault.c.orig link/arch/mips64/mm/fault.c
--- link/arch/mips64/mm/fault.c.orig	Mon May  6 11:12:44 2002
+++ link/arch/mips64/mm/fault.c	Mon May  6 11:15:26 2002
@@ -209,7 +209,7 @@
 
 no_context:
 	/* Are we prepared to handle this kernel fault?  */
-	epc = regs->cp0_epc + delay_slot(regs) ? 4 : 0;
+	epc = regs->cp0_epc + (delay_slot(regs) ? 4 : 0);
 	fixup = search_exception_table(epc);
 	if (fixup) {
 		long new_epc;

--------------080607000901020806060009--


From owner-linux-mips@oss.sgi.com Mon May  6 12:14:59 2002
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From: "H . J . Lu" <hjl@lucon.org>
To: "Kevin D. Kissell" <kevink@mips.com>
Cc: Kjeld Borch Egevang <kjelde@mips.com>,
   linux-mips mailing list <linux-mips@oss.sgi.com>
Subject: Re: zsh on console
Message-ID: <20020506121606.B28872@lucon.org>
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On Mon, May 06, 2002 at 02:57:28PM +0200, Kevin D. Kissell wrote:
> > When I run zsh on the console (serial interface) the process hangs. I can 
> > login with /bin/bash, but when I start /bin/zsh it waits forever. I can 
> > interrupt the process and regain control.
> > 
> > It's only related to the console. If I login with telnet it works just 
> > fine.
> > 
> > Any idea, what could be wrong?
> 
> I don't know what it would be specifically, but having
> dealt with similar problems on other Unix systems,
> it's proably the case that zsh uses a particular tty
> mode that isn't correctly supported by the serial
> console driver, either due to a bug in the driver or
> due to a conflict with some other feature enabled
> on the console port.  The next step to take would
> be to run "stty -all" under /bin/bash and under
> /bin/zsh on a telnet session, and compare the 
> outputs.

That sounds like a zsh bug I fixed. Please try zsh 3.0.8-8.1 in my RedHat 7.1
port and let me know if it doesn't work for you.



H.J.

From owner-linux-mips@oss.sgi.com Mon May  6 15:05:47 2002
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From: Hartvig Ekner <hartvige@mips.com>
Message-Id: <200205062206.g46M6ge17977@coplin09.mips.com>
Subject: Re: zsh on console
To: hjl@lucon.org (H . J . Lu)
Date: Tue, 7 May 2002 00:06:42 +0200 (CEST)
Cc: kevink@mips.com (Kevin D. Kissell), kjelde@mips.com (Kjeld Borch Egevang),
   linux-mips@oss.sgi.com (linux-mips mailing list)
In-Reply-To: <20020506121606.B28872@lucon.org> from "H . J . Lu" at May 06, 2002 12:16:06 PM
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H . J . Lu writes:
> 
> On Mon, May 06, 2002 at 02:57:28PM +0200, Kevin D. Kissell wrote:
> > > When I run zsh on the console (serial interface) the process hangs. I can 
> > > login with /bin/bash, but when I start /bin/zsh it waits forever. I can 
> > > interrupt the process and regain control.
> > > 
> > > It's only related to the console. If I login with telnet it works just 
> > > fine.
> > > 
> > > Any idea, what could be wrong?
> > 
> > I don't know what it would be specifically, but having
> > dealt with similar problems on other Unix systems,
> > it's proably the case that zsh uses a particular tty
> > mode that isn't correctly supported by the serial
> > console driver, either due to a bug in the driver or
> > due to a conflict with some other feature enabled
> > on the console port.  The next step to take would
> > be to run "stty -all" under /bin/bash and under
> > /bin/zsh on a telnet session, and compare the 
> > outputs.
> 
> That sounds like a zsh bug I fixed. Please try zsh 3.0.8-8.1 in my RedHat 7.1
> port and let me know if it doesn't work for you.

You only have the source RPM on OSS?
I believe we compiled from another SRC RPM: zsh-4.0.4-5.src.rpm. 

What was your fix? 

/Hartvig

From owner-linux-mips@oss.sgi.com Mon May  6 16:07:45 2002
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Date: Mon, 6 May 2002 16:06:51 -0700
From: "H . J . Lu" <hjl@lucon.org>
To: Hartvig Ekner <hartvige@mips.com>
Cc: "Kevin D. Kissell" <kevink@mips.com>,
   Kjeld Borch Egevang <kjelde@mips.com>,
   linux-mips mailing list <linux-mips@oss.sgi.com>
Subject: Re: zsh on console
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On Tue, May 07, 2002 at 12:06:42AM +0200, Hartvig Ekner wrote:
> H . J . Lu writes:
> > 
> > On Mon, May 06, 2002 at 02:57:28PM +0200, Kevin D. Kissell wrote:
> > > > When I run zsh on the console (serial interface) the process hangs. I can 
> > > > login with /bin/bash, but when I start /bin/zsh it waits forever. I can 
> > > > interrupt the process and regain control.
> > > > 
> > > > It's only related to the console. If I login with telnet it works just 
> > > > fine.
> > > > 
> > > > Any idea, what could be wrong?
> > > 
> > > I don't know what it would be specifically, but having
> > > dealt with similar problems on other Unix systems,
> > > it's proably the case that zsh uses a particular tty
> > > mode that isn't correctly supported by the serial
> > > console driver, either due to a bug in the driver or
> > > due to a conflict with some other feature enabled
> > > on the console port.  The next step to take would
> > > be to run "stty -all" under /bin/bash and under
> > > /bin/zsh on a telnet session, and compare the 
> > > outputs.
> > 
> > That sounds like a zsh bug I fixed. Please try zsh 3.0.8-8.1 in my RedHat 7.1
> > port and let me know if it doesn't work for you.
> 
> You only have the source RPM on OSS?

I didn't add cross compile support for zsh. You have to compile it natively.

> I believe we compiled from another SRC RPM: zsh-4.0.4-5.src.rpm. 

zsh-4.0.4-5 will be in my RedHat 7.3 port.

> 
> What was your fix? 
> 

zsh-3.0.8-open.patch is in baseline.tar.bz2.


H.J.

From owner-linux-mips@oss.sgi.com Mon May  6 16:10:02 2002
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Date: Mon, 6 May 2002 16:11:10 +0800
From: Ralf Baechle <ralf@oss.sgi.com>
To: Florian Lohoff <flo@rfc822.org>
Cc: linux-mips@oss.sgi.com
Subject: Re: RM200 big endian prom ?
Message-ID: <20020506161110.A10422@guest.intrengr>
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On Mon, May 06, 2002 at 12:27:32PM +0200, Florian Lohoff wrote:

> i yesterday had a try booting my RM200 (Big Endian Sinix firmware)
> with a big endian compiled kernel - It immediatly crashes in ArcWrite
> as the Bios is not an Arc (Probably a bit similar).
> 
> Does anyone have interesting informations about that prom ?
> 
> BTW: There are really some funny lines in arc/init.c :)
> 
> arch/mips/arc/init.c
>      36         if (pb->magic != 0x53435241) {
>      37                 prom_printf("Aieee, bad prom vector magic %08lx\n", pb->magic);
>      38                 while(1)
>      39                         ;
>      40         }
>      41 
> 
> Calling ArcWrite in case of no Arc ;) At least one knows what happens
> if the Firmware is giving out EPC Faulting address (Which in this case
> is 0x6c)

So far the assumption is that SNI's firmware is lookling like ARCS which is
basically a big endian abortion of ARC.  Alternativly it might as well
look similar to the firmware of the old MIPS workstations such as the
RC3230 or similar.

I wonder if the the magic just needs to be endianess swapped?

  Ralf

From owner-linux-mips@oss.sgi.com Mon May  6 19:51:02 2002
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	Mon, 6 May 2002 19:53:41 +0800
Date: Mon, 6 May 2002 19:53:41 +0800
From: Ralf Baechle <ralf@oss.sgi.com>
To: Kjeld Borch Egevang <kjelde@mips.com>
Cc: linux-mips mailing list <linux-mips@oss.sgi.com>
Subject: Re: zsh on console
Message-ID: <20020506195340.B15551@guest.intrengr>
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In-Reply-To: <Pine.LNX.4.44.0205061440210.21711-100000@coplin19.mips.com>; from kjelde@mips.com on Mon, May 06, 2002 at 02:44:33PM +0200
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On Mon, May 06, 2002 at 02:44:33PM +0200, Kjeld Borch Egevang wrote:

> When I run zsh on the console (serial interface) the process hangs. I can 
> login with /bin/bash, but when I start /bin/zsh it waits forever. I can 
> interrupt the process and regain control.
> 
> It's only related to the console. If I login with telnet it works just 
> fine.
> 
> Any idea, what could be wrong?

I recently fixed a simliar bug in the sb1250_duart.c driver.  Basically
a hangup of the tty did result in the close routine getting called thus
the driver's usage counter for ttyS0 eventually dropping to zero though
it was still open ...

  Ralf

From owner-linux-mips@oss.sgi.com Mon May  6 21:09:14 2002
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From: "Robert Rusek" <robru@teknuts.com>
To: <linux-mips@oss.sgi.com>
Subject: depmod help !
Date: Mon, 6 May 2002 21:09:11 -0700
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I am running his on an Indy. I have kernel 2.4.17 and modutils 2.4.16.
When a depmod is performed I get the following message:

depmod: cannot read ELF header from /lib/modules/2.4.17/modules.dep
depmod: cannot read ELF header from
/lib/modules/2.4.17/modules.generic_string
depmod: /lib/modules/2.4.17/modules.ieee1394map is not an ELF file
depmod: /lib/modules/2.4.17/modules.isapnpmap is not an ELF file
depmod: cannot read ELF header from
/lib/modules/2.4.17/modules.parportmap
depmod: /lib/modules/2.4.17/modules.pcimap is not an ELF file
depmod: cannot read ELF header from
/lib/modules/2.4.17/modules.pnpbiosmap
depmod: /lib/modules/2.4.17/modules.usbmap is not an ELF file

How can I correct this?  I am trying to clean up my startup before I
start using the machine.

Thank you in advance.
--
Robert Rusek


From owner-linux-mips@oss.sgi.com Mon May  6 23:47:23 2002
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To: macro@ds2.pg.gda.pl
Cc: flo@rfc822.org, ralf@oss.sgi.com, linux-mips@oss.sgi.com, agx@sigxcpu.org
Subject: Re: XSHM/shared-pixmap fix Was: Linux Shared Memory Issue
From: Atsushi Nemoto <nemoto@toshiba-tops.co.jp>
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>>>>> On Mon, 6 May 2002 13:04:58 +0200 (MET DST), "Maciej W. Rozycki" <macro@ds2.pg.gda.pl> said:
macro>  Check it doesn't break static executables -- there were a few
macro> arch_get_unmapped_area() updates in mm/mmap.c that you don't
macro> include in the patch it would seem.

I have yet another arch_get_unmapped_area which includes it.

My arch_get_unmapped_area is a hybrid of one in mm/mmap.c and one in
arch/sparc64/sys_sparc64.c.  Also, I am using MY_SHMLBA to avoid
wasting address space.  I got following comments from Ralf when I
posted my previous patch.

>>>>> On Tue, 14 Aug 2001 10:49:41 +0200, Ralf Baechle <ralf@oss.sgi.com> said:
ralf> It's wasting huge amounts of address space.  That can be
ralf> prohibitive if you want to run something such as electric fence.
ralf> Technically the worst case of any CPU that's required is 32kb on
ralf> R4000 / R4400 SC and MC versions, so I don't want to go beyond
ralf> that.


Here is my arch_get_unmapped_area.

#ifdef HAVE_ARCH_UNMAPPED_AREA
/* solve cache aliasing problem (see Documentation/cachetlb.txt and
   arch/sparc64/kernel/sys_sparc.c */
#if SHMLBA > 0x10000
/* avoid overkill... */
#define MY_SHMLBA	0x10000
#else
#define MY_SHMLBA	SHMLBA
#endif
#define COLOUR_ALIGN(addr,pgoff)		\
	((((addr)+MY_SHMLBA-1)&~(MY_SHMLBA-1)) +	\
	 (((pgoff)<<PAGE_SHIFT) & (MY_SHMLBA-1)))

unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags)
{
	struct vm_area_struct * vmm;
	int do_color_align;

	if (flags & MAP_FIXED) {
		/* We do not accept a shared mapping if it would violate
		 * cache aliasing constraints.
		 */
		if ((flags & MAP_SHARED) && (addr & (MY_SHMLBA - 1)))
			return -EINVAL;
		return addr;
	}

	if (len > TASK_SIZE)
		return -ENOMEM;
	do_color_align = 0;
	if (filp || (flags & MAP_SHARED))
		do_color_align = 1;
	if (addr) {
		if (do_color_align)
			addr = COLOUR_ALIGN(addr, pgoff);
		else
			addr = PAGE_ALIGN(addr);
		vmm = find_vma(current->mm, addr);
		if (TASK_SIZE - len >= addr &&
		    (!vmm || addr + len <= vmm->vm_start))
			return addr;
	}
	addr = TASK_UNMAPPED_BASE;
	if (do_color_align)
		addr = COLOUR_ALIGN(addr, pgoff);
	else
		addr = PAGE_ALIGN(addr);

	for (vmm = find_vma(current->mm, addr); ; vmm = vmm->vm_next) {
		/* At this point:  (!vmm || addr < vmm->vm_end). */
		if (TASK_SIZE - len < addr)
			return -ENOMEM;
		if (!vmm || addr + len <= vmm->vm_start)
			return addr;
		addr = vmm->vm_end;
		if (do_color_align)
			addr = COLOUR_ALIGN(addr, pgoff);
	}
}
#endif /* HAVE_ARCH_UNMAPPED_AREA */

---
Atsushi Nemoto

From owner-linux-mips@oss.sgi.com Tue May  7 00:26:49 2002
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From: "Robert Rusek" <robru@teknuts.com>
To: <linux-mips@oss.sgi.com>
Subject: kernel: EXT2-fs error ?
Date: Tue, 7 May 2002 00:29:27 -0700
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I am running Kernel 2.4.17 on an SGI Indy.  I recently noticed that I
have been getting the following error sparatically.  What does this
mean?  The system boots up cleanly and then the fs gets corrupted
somehow.  Any help would be greatly appreciated.


May  6 04:02:17 catbert kernel: EXT2-fs error (device sd(8,1)):
ext2_check_page: bad entry in directory #110032: unaligned di
rectory entry - offset=0, inode=6226015, rec_len=95, name_len=95
May  6 04:02:17 catbert kernel: EXT2-fs error (device sd(8,1)):
ext2_check_page: bad entry in directory #110056: rec_len is s
maller than minimal - offset=0, inode=2551, rec_len=0, name_len=8
May  6 04:02:17 catbert kernel: EXT2-fs error (device sd(8,1)):
ext2_check_page: bad entry in directory #110071: rec_len is s
maller than minimal - offset=0, inode=0, rec_len=0, name_len=0
May  6 04:02:17 catbert kernel: EXT2-fs error (device sd(8,1)):
ext2_check_page: bad entry in directory #110081: rec_len is s
maller than minimal - offset=0, inode=547544874, rec_len=0, name_len=0


Thank you in advance,
Rob.



From owner-linux-mips@oss.sgi.com Tue May  7 01:46:59 2002
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Date: Tue, 07 May 2002 10:47:56 +0200
From: Carsten Langgaard <carstenl@mips.com>
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To: Ralf Baechle <ralf@oss.sgi.com>
CC: Jun Sun <jsun@mvista.com>, linux-mips <linux-mips@oss.sgi.com>
Subject: Re: what is the right behavior of copy_to_user(0x0, ..., ...)?
References: <3CD3052B.1050400@mvista.com> <20020503162337.A27366@dea.linux-mips.net> <3CD32044.9040109@mvista.com> <20020503184000.A1238@dea.linux-mips.net>
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Ralf Baechle wrote:

> On Fri, May 03, 2002 at 04:41:56PM -0700, Jun Sun wrote:
>
> > It appears earlier version of kernel does not have this problem.  I have not
> > fully figured out why.
>
> We didn't handle exceptions in branch delay slots.  Try this patch and
> tell me if it helps.

It fix a problem I have had for quite a while in the r4k_fpu.S. The code in
question is:
        jr      ra
        .set    nomacro
         EX(sw  t0,SC_FPC_EIR(a0))
        .set    macro

I have fixed it locally by removing the SW from the delay-slot, but obviously
your fix is the right one.
But I guess we need the same fix in arch/mips/kernel/unaligned.c.


>
>   Ralf
>
> Index: arch/mips/mm/fault.c
> ===================================================================
> RCS file: /home/pub/cvs/linux/arch/mips/mm/fault.c,v
> retrieving revision 1.25.2.2
> diff -u -r1.25.2.2 fault.c
> --- arch/mips/mm/fault.c        16 Jan 2002 03:49:24 -0000      1.25.2.2
> +++ arch/mips/mm/fault.c        4 May 2002 01:28:34 -0000
> @@ -19,6 +19,7 @@
>  #include <linux/smp_lock.h>
>  #include <linux/version.h>
>
> +#include <asm/branch.h>
>  #include <asm/hardirq.h>
>  #include <asm/pgalloc.h>
>  #include <asm/mmu_context.h>
> @@ -77,7 +78,7 @@
>         struct vm_area_struct * vma;
>         struct task_struct *tsk = current;
>         struct mm_struct *mm = tsk->mm;
> -       unsigned long fixup;
> +       unsigned long epc, fixup;
>         siginfo_t info;
>
>         /*
> @@ -181,7 +182,8 @@
>
>  no_context:
>         /* Are we prepared to handle this kernel fault?  */
> -       fixup = search_exception_table(regs->cp0_epc);
> +       epc = regs->cp0_epc + delay_slot(regs) ? 4 : 0;
> +       fixup = search_exception_table(epc);
>         if (fixup) {
>                 long new_epc;
>
> Index: arch/mips64/mm/fault.c
> ===================================================================
> RCS file: /home/pub/cvs/linux/arch/mips64/mm/fault.c,v
> retrieving revision 1.26.2.6
> diff -u -r1.26.2.6 fault.c
> --- arch/mips64/mm/fault.c      23 Feb 2002 02:16:42 -0000      1.26.2.6
> +++ arch/mips64/mm/fault.c      4 May 2002 01:28:34 -0000
> @@ -21,6 +21,7 @@
>  #include <linux/smp_lock.h>
>  #include <linux/version.h>
>
> +#include <asm/branch.h>
>  #include <asm/hardirq.h>
>  #include <asm/pgalloc.h>
>  #include <asm/mmu_context.h>
> @@ -103,7 +104,7 @@
>         struct vm_area_struct * vma;
>         struct task_struct *tsk = current;
>         struct mm_struct *mm = tsk->mm;
> -       unsigned long fixup;
> +       unsigned long epc, fixup;
>         siginfo_t info;
>
>  #if 0
> @@ -208,7 +209,8 @@
>
>  no_context:
>         /* Are we prepared to handle this kernel fault?  */
> -       fixup = search_exception_table(regs->cp0_epc);
> +       epc = regs->cp0_epc + delay_slot(regs) ? 4 : 0;
> +       fixup = search_exception_table(epc);
>         if (fixup) {
>                 long new_epc;
>

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Tue May  7 01:50:33 2002
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	Tue, 7 May 2002 01:53:13 +0800
Date: Tue, 7 May 2002 01:53:13 +0800
From: Ralf Baechle <ralf@oss.sgi.com>
To: Carsten Langgaard <carstenl@mips.com>
Cc: Jun Sun <jsun@mvista.com>, linux-mips <linux-mips@oss.sgi.com>
Subject: Re: what is the right behavior of copy_to_user(0x0, ..., ...)?
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In-Reply-To: <3CD794BC.43264E9E@mips.com>; from carstenl@mips.com on Tue, May 07, 2002 at 10:47:56AM +0200
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On Tue, May 07, 2002 at 10:47:56AM +0200, Carsten Langgaard wrote:

> It fix a problem I have had for quite a while in the r4k_fpu.S. The code in
> question is:
>         jr      ra
>         .set    nomacro
>          EX(sw  t0,SC_FPC_EIR(a0))
>         .set    macro
> 
> I have fixed it locally by removing the SW from the delay-slot, but obviously
> your fix is the right one.
> But I guess we need the same fix in arch/mips/kernel/unaligned.c.

Good spotting.  I'll use a slightly different fix using the new inline
function exception_epc() in <asm/branch.h> to implement that slightly
more elegant.

Thanks,

  Ralf

From owner-linux-mips@oss.sgi.com Tue May  7 03:00:50 2002
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Date: Tue, 7 May 2002 12:01:17 +0200
From: Florian Lohoff <flo@rfc822.org>
To: Ralf Baechle <ralf@oss.sgi.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: RM200 big endian prom ?
Message-ID: <20020507100117.GA28542@paradigm.rfc822.org>
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On Mon, May 06, 2002 at 04:11:10PM +0800, Ralf Baechle wrote:
> So far the assumption is that SNI's firmware is lookling like ARCS which =
is
> basically a big endian abortion of ARC.  Alternativly it might as well
> look similar to the firmware of the old MIPS workstations such as the
> RC3230 or similar.
>=20
> I wonder if the the magic just needs to be endianess swapped?

 From dumping the area a0001000 it does not look like it - Not even
any version or revision fits the description of the prom block.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From owner-linux-mips@oss.sgi.com Tue May  7 03:31:33 2002
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Date: Tue, 7 May 2002 12:32:49 +0200
From: Guido Guenther <agx@sigxcpu.org>
To: linux-mips@oss.sgi.com
Cc: ralf@gnu.org
Subject: howto pass ramdisk loaddress to kernel
Message-ID: <20020507123249.A9827@gandalf.physik.uni-konstanz.de>
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Hi,
in order to get rid of some ip22 specific hacks in setup.c as well as
addinitrd/elf2ecoff I've written a small tool that links kernel+initrd
as type "binary" into the data segment of the bootloader. This file can
then be fetched by the prom via tftp(or from a CD or whatever). The
bootloader copies the kernel to its loaddress and puts the initrd just
after the kernel.
My question is now: how do i properly pass the initrd's memory address
to the kernel? Choices are:
1) on the commandline: rd_start=0x...
2) a bootparameter block like on i386 or sparc in head.S
3) rely on the kernel to identify if a radisk has
  been loaded by a magic number

I'd prefer (1) but it seems none of the other arches does this. Is there
a reason for that? If not could we just introduce a new kernel
commandline parameter rd_start which has a memory address as a
parameter. Ralf, would you let this into the kernel?
 -- Guido

From owner-linux-mips@oss.sgi.com Tue May  7 03:42:00 2002
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Date: Tue, 7 May 2002 03:44:38 +0800
From: Ralf Baechle <ralf@oss.sgi.com>
To: Carsten Langgaard <carstenl@mips.com>
Cc: Jun Sun <jsun@mvista.com>, linux-mips <linux-mips@oss.sgi.com>
Subject: Re: what is the right behavior of copy_to_user(0x0, ..., ...)?
Message-ID: <20020507034438.B14268@guest.intrengr>
References: <3CD3052B.1050400@mvista.com> <20020503162337.A27366@dea.linux-mips.net> <3CD32044.9040109@mvista.com> <20020503184000.A1238@dea.linux-mips.net> <3CD794BC.43264E9E@mips.com>
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On Tue, May 07, 2002 at 10:47:56AM +0200, Carsten Langgaard wrote:

> I have fixed it locally by removing the SW from the delay-slot, but obviously
> your fix is the right one.
> But I guess we need the same fix in arch/mips/kernel/unaligned.c.

Smoke this:

Index: arch/mips64/kernel/unaligned.c
===================================================================
RCS file: /home/pub/cvs/linux/arch/mips64/kernel/unaligned.c,v
retrieving revision 1.6.2.3
diff -u -r1.6.2.3 unaligned.c
--- arch/mips64/kernel/unaligned.c	24 Apr 2002 07:58:54 -0000	1.6.2.3
+++ arch/mips64/kernel/unaligned.c	7 May 2002 10:29:05 -0000
@@ -351,7 +351,7 @@
 
 fault:
 	/* Did we have an exception handler installed? */
-	fixup = search_exception_table(regs->cp0_epc);
+	fixup = search_exception_table(exception_epc(regs));
 	if (fixup) {
 		long new_epc;
 		new_epc = fixup_exception(dpf_reg, fixup, regs->cp0_epc);
Index: arch/mips/kernel/unaligned.c
===================================================================
RCS file: /home/pub/cvs/linux/arch/mips/kernel/unaligned.c,v
retrieving revision 1.15.2.4
diff -u -r1.15.2.4 unaligned.c
--- arch/mips/kernel/unaligned.c	24 Apr 2002 07:50:26 -0000	1.15.2.4
+++ arch/mips/kernel/unaligned.c	7 May 2002 10:29:05 -0000
@@ -332,7 +332,7 @@
 
 fault:
 	/* Did we have an exception handler installed? */
-	fixup = search_exception_table(regs->cp0_epc);
+	fixup = search_exception_table(exception_epc(regs));
 	if (fixup) {
 		long new_epc;
 		new_epc = fixup_exception(dpf_reg, fixup, regs->cp0_epc);

  Ralf

From owner-linux-mips@oss.sgi.com Tue May  7 03:44:49 2002
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From: Florian Lohoff <flo@rfc822.org>
To: Guido Guenther <agx@sigxcpu.org>
Cc: linux-mips@oss.sgi.com, ralf@gnu.org
Subject: Re: howto pass ramdisk loaddress to kernel
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On Tue, May 07, 2002 at 12:32:49PM +0200, Guido Guenther wrote:
> My question is now: how do i properly pass the initrd's memory address
> to the kernel? Choices are:
> 1) on the commandline: rd_start=3D0x...
> 2) a bootparameter block like on i386 or sparc in head.S
> 3) rely on the kernel to identify if a radisk has
>   been loaded by a magic number
>=20
> I'd prefer (1) but it seems none of the other arches does this. Is there
> a reason for that? If not could we just introduce a new kernel
> commandline parameter rd_start which has a memory address as a
> parameter. Ralf, would you let this into the kernel?

I would do 1+3 - Give the address on the command line and let the ramdisk
have a magic + length in the first 2 __u32.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From owner-linux-mips@oss.sgi.com Tue May  7 05:04:04 2002
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Date: Tue, 7 May 2002 14:05:08 +0200
From: Johannes Stezenbach <js@convergence.de>
To: Robert Rusek <robru@teknuts.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: depmod help !
Message-ID: <20020507120507.GA5859@convergence.de>
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	Robert Rusek <robru@teknuts.com>, linux-mips@oss.sgi.com
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On Mon, May 06, 2002 at 09:09:11PM -0700, Robert Rusek wrote:
> When a depmod is performed I get the following message:
> 
> depmod: cannot read ELF header from /lib/modules/2.4.17/modules.dep
> depmod: cannot read ELF header from
> /lib/modules/2.4.17/modules.generic_string
> depmod: /lib/modules/2.4.17/modules.ieee1394map is not an ELF file
> depmod: /lib/modules/2.4.17/modules.isapnpmap is not an ELF file
> depmod: cannot read ELF header from
> /lib/modules/2.4.17/modules.parportmap
> depmod: /lib/modules/2.4.17/modules.pcimap is not an ELF file
> depmod: cannot read ELF header from
> /lib/modules/2.4.17/modules.pnpbiosmap
> depmod: /lib/modules/2.4.17/modules.usbmap is not an ELF file

depmod bug, you get this if you've compiled your kernel with module
support but actually havent't installed any modules. Create an empty
/lib/modules/2.4.17/kernel/ directory to make depmod happy.

Regards,
Johannes


From owner-linux-mips@oss.sgi.com Tue May  7 15:06:53 2002
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From: "Siders, Keith" <keith_siders@toshibatv.com>
To: "Linux-Mips (E-mail)" <linux-mips@oss.sgi.com>
Subject: Debugging of embedded target applications
Date: Tue, 7 May 2002 17:05:36 -0500 
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I am using x86 Linux for host development to a MIPS Linux embedded target. I
finally have a hardware debugger for my target board that works, but I have
to get large application files downloaded in a timely fashion. The debugger
must download to the target via JTAG, therefore downloads have lots of bits
of overhead, i.e. downloads are slow. Is there anything like a gdb server
that can I run on the target to connect to a remote client via ethernet? I
don't really want to have to compile a complete gdb tool to run on my target
board to do this. I don't have the luxury of a lot of memory on this board,
and no swap space (flash-based system, no hdd). The real catch is I would
like to be able to resolve the symbols of the application so the debugger
can be used to set hardware breakpoints, and provide source-level debugging
of the application. Or am I going about this totally bassackwards?

Keith

From owner-linux-mips@oss.sgi.com Tue May  7 15:13:55 2002
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Date: Tue, 7 May 2002 18:15:12 -0400
From: Daniel Jacobowitz <dan@debian.org>
To: "Siders, Keith" <keith_siders@toshibatv.com>
Cc: "Linux-Mips (E-mail)" <linux-mips@oss.sgi.com>
Subject: Re: Debugging of embedded target applications
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On Tue, May 07, 2002 at 05:05:36PM -0500, Siders, Keith wrote:
> I am using x86 Linux for host development to a MIPS Linux embedded target. I
> finally have a hardware debugger for my target board that works, but I have
> to get large application files downloaded in a timely fashion. The debugger
> must download to the target via JTAG, therefore downloads have lots of bits
> of overhead, i.e. downloads are slow. Is there anything like a gdb server
> that can I run on the target to connect to a remote client via ethernet? I
> don't really want to have to compile a complete gdb tool to run on my target
> board to do this. I don't have the luxury of a lot of memory on this board,
> and no swap space (flash-based system, no hdd). The real catch is I would
> like to be able to resolve the symbols of the application so the debugger
> can be used to set hardware breakpoints, and provide source-level debugging
> of the application. Or am I going about this totally bassackwards?

There is an appropriate program.  In fact, you even got the name right:
it's called "gdbserver", and is included with the GDB distribution.

I recommend you get GDB 5.2, released last week; the gdbserver included
in that version is far superior for GNU/Linux targets to any previous
release.

-- 
Daniel Jacobowitz                           Carnegie Mellon University
MontaVista Software                         Debian GNU/Linux Developer

From owner-linux-mips@oss.sgi.com Tue May  7 15:32:34 2002
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To: "Siders, Keith" <keith_siders@toshibatv.com>
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On Tue, May 07, 2002 at 05:05:36PM -0500, Siders, Keith wrote:
> I am using x86 Linux for host development to a MIPS Linux embedded target. I
> finally have a hardware debugger for my target board that works, but I have
> to get large application files downloaded in a timely fashion. The debugger
> must download to the target via JTAG, therefore downloads have lots of bits
> of overhead, i.e. downloads are slow. Is there anything like a gdb server
> that can I run on the target to connect to a remote client via ethernet? I

If you have a Linux Ethernet driver working, then most people
boot and mount with an NFS root disk.  Then you just cross-compile
additional apps and tools and adding to your NFS disk.  Presumably
including gdb (not tried it).  Then just debug "normally" -- with
the CLI.  The JTAG hardware debugger is not used (or maybe just
to initially bootstrap the kernel and trap certain exceptions).

RH7.1 fs at: ftp://ftp.linux.sgi.com/pub/linux/mips/mipsel-linux/root/
And see: http://www.linux.sgi.com/downloads.html

Once your basic apps are complete, then you can think about
creating a JFFS2 partition (after the MTD flash driver's debuggged)
and using that for standalone bootup.

Actually, my first approach was to flash the linux kernel with
just a cramfs'd busybox and then NFS mount my home directory from
a startup script.

To save (a lot of) space in applications checkout uclibc.org.
Shared libs support with uclibc is real close for MIPS, but for
now use static linking.

Geoff
-- 
Geoffrey Espin
espin@idiom.com
--

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Date: Tue, 7 May 2002 15:44:27 -0700
From: Geoffrey Espin <espin@idiom.com>
To: Daniel Jacobowitz <dan@debian.org>
Cc: "Siders, Keith" <keith_siders@toshibatv.com>,
   "Linux-Mips (E-mail)" <linux-mips@oss.sgi.com>
Subject: Re: Debugging of embedded target applications
Message-ID: <20020507154427.D12509@idiom.com>
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On Tue, May 07, 2002 at 06:15:12PM -0400, Daniel Jacobowitz wrote:
> it's called "gdbserver", and is included with the GDB distribution.
> I recommend you get GDB 5.2, released last week; the gdbserver included
> in that version is far superior for GNU/Linux targets to any previous
> release.

Does work it for kernel type debugging over *Ethernet*?
I see some docs saying "TCP/IP" connection... but does that
mean a special kind of network driver?  Or a gdbstub/agent
outside the kernel in a special monitor?

Geoff
-- 
Geoffrey Espin
espin@idiom.com
--

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Date: Tue, 7 May 2002 21:43:14 -0400
From: Daniel Jacobowitz <dan@debian.org>
To: Geoffrey Espin <espin@idiom.com>
Cc: "Siders, Keith" <keith_siders@toshibatv.com>,
   "Linux-Mips (E-mail)" <linux-mips@oss.sgi.com>
Subject: Re: Debugging of embedded target applications
Message-ID: <20020508014314.GA30243@nevyn.them.org>
References: <7DF7BFDC95ECD411B4010090278A44CA379AA1@ATVX> <20020507221512.GA22326@nevyn.them.org> <20020507154427.D12509@idiom.com>
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On Tue, May 07, 2002 at 03:44:27PM -0700, Geoffrey Espin wrote:
> On Tue, May 07, 2002 at 06:15:12PM -0400, Daniel Jacobowitz wrote:
> > it's called "gdbserver", and is included with the GDB distribution.
> > I recommend you get GDB 5.2, released last week; the gdbserver included
> > in that version is far superior for GNU/Linux targets to any previous
> > release.
> 
> Does work it for kernel type debugging over *Ethernet*?
> I see some docs saying "TCP/IP" connection... but does that
> mean a special kind of network driver?  Or a gdbstub/agent
> outside the kernel in a special monitor?

What do you mean by kernel type debugging?  It's not a kernel stub.  It
can debug user programs over TCP/IP or a serial line.

-- 
Daniel Jacobowitz                           Carnegie Mellon University
MontaVista Software                         Debian GNU/Linux Developer

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Date: Tue, 7 May 2002 19:25:23 -0700
From: Geoffrey Espin <espin@idiom.com>
To: Daniel Jacobowitz <dan@debian.org>
Cc: "Siders, Keith" <keith_siders@toshibatv.com>,
   "Linux-Mips (E-mail)" <linux-mips@oss.sgi.com>
Subject: Re: Debugging of embedded target applications
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On Tue, May 07, 2002 at 09:43:14PM -0400, Daniel Jacobowitz wrote:
> > Does work it for kernel type debugging over *Ethernet*?
> > I see some docs saying "TCP/IP" connection... but does that
> > mean a special kind of network driver?  Or a gdbstub/agent
> > outside the kernel in a special monitor?
> What do you mean by kernel type debugging?  It's not a kernel stub.  It
> can debug user programs over TCP/IP or a serial line.

In traditional embedded RTOS land, "system-level debugging".
In the olden days one had to have BDM/JTAG hardware assist
to step thru truly arbitary bits of code, like interrupt handlers,
scheduler.

The original question was about using using a hardware debugger.
Clearly using gdb/gdbserver is for apps only, AFAIK.  Does one
bother with a h/w debugger for apps?  Using kgdb with some kind
of remote debug-agent would be a "system level debugger", a s/w
solution to a traditional hardware only debug aid.  At this time
kind of pointless, as its painful to setup and JTAG debuggers
are so cheap (for mainline CPUs).

Geoff
-- 
Geoffrey Espin
espin@idiom.com
--

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Date: Tue, 7 May 2002 22:32:36 -0400
From: Daniel Jacobowitz <dan@debian.org>
To: Geoffrey Espin <espin@idiom.com>
Cc: "Siders, Keith" <keith_siders@toshibatv.com>,
   "Linux-Mips (E-mail)" <linux-mips@oss.sgi.com>
Subject: Re: Debugging of embedded target applications
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On Tue, May 07, 2002 at 07:25:23PM -0700, Geoffrey Espin wrote:
> On Tue, May 07, 2002 at 09:43:14PM -0400, Daniel Jacobowitz wrote:
> > > Does work it for kernel type debugging over *Ethernet*?
> > > I see some docs saying "TCP/IP" connection... but does that
> > > mean a special kind of network driver?  Or a gdbstub/agent
> > > outside the kernel in a special monitor?
> > What do you mean by kernel type debugging?  It's not a kernel stub.  It
> > can debug user programs over TCP/IP or a serial line.
> 
> In traditional embedded RTOS land, "system-level debugging".
> In the olden days one had to have BDM/JTAG hardware assist
> to step thru truly arbitary bits of code, like interrupt handlers,
> scheduler.
> 
> The original question was about using using a hardware debugger.
> Clearly using gdb/gdbserver is for apps only, AFAIK.  Does one
> bother with a h/w debugger for apps?  Using kgdb with some kind

Actually, yes, you can.  I believe at least the Abatron BDI can do
this.  Could be wrong, though.

> of remote debug-agent would be a "system level debugger", a s/w
> solution to a traditional hardware only debug aid.  At this time
> kind of pointless, as its painful to setup and JTAG debuggers
> are so cheap (for mainline CPUs).

Depends on your platform.

-- 
Daniel Jacobowitz                           Carnegie Mellon University
MontaVista Software                         Debian GNU/Linux Developer

From owner-linux-mips@oss.sgi.com Tue May  7 20:15:17 2002
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Date: Tue, 7 May 2002 20:16:37 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Jun Sun <jsun@mvista.com>
Cc: linux-mips <linux-mips@oss.sgi.com>
Subject: Re: what is the right behavior of copy_to_user(0x0, ..., ...)?
Message-ID: <20020507201637.B13717@dea.linux-mips.net>
References: <3CD3052B.1050400@mvista.com> <20020503162337.A27366@dea.linux-mips.net> <3CD32044.9040109@mvista.com> <20020503184000.A1238@dea.linux-mips.net> <3CD6C8EA.9060807@mvista.com>
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On Mon, May 06, 2002 at 11:18:18AM -0700, Jun Sun wrote:

> It would help if not for the gross typo. :-)  See the attachment.

Never noticed that because I already had a slightly more elegant solution
in my tree.  It's already in CVS, check it out.

  Ralf

From owner-linux-mips@oss.sgi.com Wed May  8 00:54:34 2002
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Date: Wed, 8 May 2002 09:55:08 +0200
From: Szabo Attila <trial@ugyvitelszolgaltato.hu>
To: linux-mips@oss.sgi.com
Subject: indy scsi
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Hi !

I've put a WD enterprise 4360 Ultra3 scsi disk into my Indy.
It is the only disk, and I disabled the wide negotiating on the disk.
But it is too slow.I'm running debian woody and I've tested it
with hdparm, but the buffered disk reads is just 1.7 MB/sec.
It is very slow !!
Is there any way to make it faster ??

Thanks

-- 
------------------------------------------------------
A t t i l a | trial@ugyvitelszolgaltato.hu | S z a b o
------------------------------------------------------

From owner-linux-mips@oss.sgi.com Wed May  8 04:48:46 2002
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From: Florian Lohoff <flo@rfc822.org>
To: Szabo Attila <trial@ugyvitelszolgaltato.hu>
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Subject: Re: indy scsi
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On Wed, May 08, 2002 at 09:55:08AM +0200, Szabo Attila wrote:
> Hi !
>=20
> I've put a WD enterprise 4360 Ultra3 scsi disk into my Indy.
> It is the only disk, and I disabled the wide negotiating on the disk.
> But it is too slow.I'm running debian woody and I've tested it
> with hdparm, but the buffered disk reads is just 1.7 MB/sec.
> It is very slow !!
> Is there any way to make it faster ??

Probably no - 1.7MB/s sound not too bad - Remember - That machine
is 10 Years old and was produced at times a i386 was modern which
had 1MB/s memory bandwidth.

SCSI transfers on the indy/I2 are made with DMA so i guess there is=20
no real speedup to expect.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From: Szabo Attila <trial@ugyvitelszolgaltato.hu>
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2002, May 08 -> Florian Lohoff wrote :
> Probably no - 1.7MB/s sound not too bad - Remember - That machine
> is 10 Years old and was produced at times a i386 was modern which
> had 1MB/s memory bandwidth.

Yes, I know all of that, and I've expected only max 3-5 MB/sec but not
1.7.
The scsi bandwith on indy is 10MB/s, the disk is above 10 MB/s.
Maybe I expect too much

Thanks
--
------------------------------------------------------
A t t i l a | trial@ugyvitelszolgaltato.hu | S z a b o
------------------------------------------------------

From owner-linux-mips@oss.sgi.com Wed May  8 06:07:01 2002
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From: "Siders, Keith" <keith_siders@toshibatv.com>
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Cc: "'Daniel Jacobowitz'" <dan@debian.org>, Geoffrey Espin <espin@idiom.com>
Subject: RE: Debugging of embedded target applications
Date: Wed, 8 May 2002 08:05:43 -0500 
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Thanks for the lively discussion and input. It's now clear to me that I'll
be tracking (not tracing) the kernel with the h/w debugger through its kgdb
shell. We're still working on some drivers, so control over the kernel is a
must. I'll have to set up the server to autoload when a connection on a
particular port is attempted from another gdb shell, and shut down on
disconnection.

Keith

-> -----Original Message-----
-> From: Daniel Jacobowitz [mailto:dan@debian.org]
-> Sent: Tuesday, May 07, 2002 9:33 PM
-> To: Geoffrey Espin
-> Cc: Siders, Keith; Linux-Mips (E-mail)
-> Subject: Re: Debugging of embedded target applications
-> 
-> 
-> On Tue, May 07, 2002 at 07:25:23PM -0700, Geoffrey Espin wrote:
-> > On Tue, May 07, 2002 at 09:43:14PM -0400, Daniel Jacobowitz wrote:
-> > > > Does work it for kernel type debugging over *Ethernet*?
-> > > > I see some docs saying "TCP/IP" connection... but does that
-> > > > mean a special kind of network driver?  Or a gdbstub/agent
-> > > > outside the kernel in a special monitor?
-> > > What do you mean by kernel type debugging?  It's not a 
-> kernel stub.  It
-> > > can debug user programs over TCP/IP or a serial line.
-> > 
-> > In traditional embedded RTOS land, "system-level debugging".
-> > In the olden days one had to have BDM/JTAG hardware assist
-> > to step thru truly arbitary bits of code, like interrupt handlers,
-> > scheduler.
-> > 
-> > The original question was about using using a hardware debugger.
-> > Clearly using gdb/gdbserver is for apps only, AFAIK.  Does one
-> > bother with a h/w debugger for apps?  Using kgdb with some kind
-> 
-> Actually, yes, you can.  I believe at least the Abatron BDI can do
-> this.  Could be wrong, though.
-> 
-> > of remote debug-agent would be a "system level debugger", a s/w
-> > solution to a traditional hardware only debug aid.  At this time
-> > kind of pointless, as its painful to setup and JTAG debuggers
-> > are so cheap (for mainline CPUs).
-> 
-> Depends on your platform.
-> 
-> -- 
-> Daniel Jacobowitz                           Carnegie Mellon 
-> University
-> MontaVista Software                         Debian GNU/Linux 
-> Developer
-> 

From owner-linux-mips@oss.sgi.com Wed May  8 07:24:04 2002
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Subject: Re: indy scsi
To: trial@ugyvitelszolgaltato.hu (Szabo Attila)
Date: Wed, 8 May 2002 14:37:43 +0100 (BST)
Cc: linux-mips@oss.sgi.com
In-Reply-To: <20020508144247.A2023@ugyvitelszolgaltato.hu> from "Szabo Attila" at May 08, 2002 02:42:47 PM
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> Yes, I know all of that, and I've expected only max 3-5 MB/sec but not
> 1.7.
> The scsi bandwith on indy is 10MB/s, the disk is above 10 MB/s.
> Maybe I expect too much

An old 2Gb 5400 RPM drive ought to deliver about 2Mbytes/second data rates.
The 1.7 sounds suprisingly low unless the driver code doesn't support 
disconnect and scsi2 tagged stuff. For an old NCR538x/9x device without
those it sounds all too believable.

Alan

From owner-linux-mips@oss.sgi.com Wed May  8 07:32:58 2002
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Date: Wed, 8 May 2002 16:32:35 +0200 (MEST)
From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Alan Cox <alan@lxorguk.ukuu.org.uk>
cc: Szabo Attila <trial@ugyvitelszolgaltato.hu>,
   Linux/MIPS Development <linux-mips@oss.sgi.com>
Subject: Re: indy scsi
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On Wed, 8 May 2002, Alan Cox wrote:
> > Yes, I know all of that, and I've expected only max 3-5 MB/sec but not
> > 1.7.
> > The scsi bandwith on indy is 10MB/s, the disk is above 10 MB/s.
> > Maybe I expect too much
> 
> An old 2Gb 5400 RPM drive ought to deliver about 2Mbytes/second data rates.
> The 1.7 sounds suprisingly low unless the driver code doesn't support 
> disconnect and scsi2 tagged stuff. For an old NCR538x/9x device without
> those it sounds all too believable.

Doesn't the Indy have a wd33c93, like the Amiga 3000? If yes, 1.7 MiB/s is
indeed quite low.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


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From: Florian Lohoff <flo@rfc822.org>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>,
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On Wed, May 08, 2002 at 04:32:35PM +0200, Geert Uytterhoeven wrote:
> On Wed, 8 May 2002, Alan Cox wrote:
> > > Yes, I know all of that, and I've expected only max 3-5 MB/sec but not
> > > 1.7.
> > > The scsi bandwith on indy is 10MB/s, the disk is above 10 MB/s.
> > > Maybe I expect too much
> >=20
> > An old 2Gb 5400 RPM drive ought to deliver about 2Mbytes/second data ra=
tes.
> > The 1.7 sounds suprisingly low unless the driver code doesn't support=
=20
> > disconnect and scsi2 tagged stuff. For an old NCR538x/9x device without
> > those it sounds all too believable.
>=20
> Doesn't the Indy have a wd33c93, like the Amiga 3000? If yes, 1.7 MiB/s is
> indeed quite low.

It does have one of those. And it supports disconnect which was
the problem with the read corruption going on in former days.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From owner-linux-mips@oss.sgi.com Wed May  8 10:21:55 2002
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From: "Robert Rusek" <rrusek@teknuts.com>
To: <linux-mips@oss.sgi.com>
Subject: Indy SCSI Errors
Date: Wed, 8 May 2002 10:23:18 -0700
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I am currently running kernel 2.4.17 and am getting sparatice errors
like the following.  I seen that there had been bugs in the scsi driver
in the earlier kernel versions.  Has anyone encountered this?  Is there
a newer kernal that maybe addresses this?


EXT2-fs error (device sd(8,1)): ext2_check_page: bad entry in directory
#110030: unaligned
 directory entry - offset=0, inode=6226015, rec_len=95, name_len=95

Thank you in advance,
--
Robert Rusek


From owner-linux-mips@oss.sgi.com Wed May  8 11:17:04 2002
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Subject: Re: Debugging of embedded target applications
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Daniel Jacobowitz wrote:

> On Tue, May 07, 2002 at 07:25:23PM -0700, Geoffrey Espin wrote:
> 
>>On Tue, May 07, 2002 at 09:43:14PM -0400, Daniel Jacobowitz wrote:
>>
>>>>Does work it for kernel type debugging over *Ethernet*?
>>>>I see some docs saying "TCP/IP" connection... but does that
>>>>mean a special kind of network driver?  Or a gdbstub/agent
>>>>outside the kernel in a special monitor?
>>>>
>>>What do you mean by kernel type debugging?  It's not a kernel stub.  It
>>>can debug user programs over TCP/IP or a serial line.
>>>
>>In traditional embedded RTOS land, "system-level debugging".
>>In the olden days one had to have BDM/JTAG hardware assist
>>to step thru truly arbitary bits of code, like interrupt handlers,
>>scheduler.
>>
>>The original question was about using using a hardware debugger.
>>Clearly using gdb/gdbserver is for apps only, AFAIK.  Does one
>>bother with a h/w debugger for apps?  Using kgdb with some kind
>>
> 
> Actually, yes, you can.  I believe at least the Abatron BDI can do
> this.  Could be wrong, though.
> 


I have used kgdb over JTAG.

Jun



From owner-linux-mips@oss.sgi.com Wed May  8 14:24:44 2002
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Date: Wed, 08 May 2002 17:26:09 -0400
From: Rick Spanbauer <rick@sirius.cvnet.com>
Subject: copy_mount_options
To: linux-mips@oss.sgi.com
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Howdy - I am having a bit of a problem with a kernel port I've been working
on recently.  Linux is up and running to the initial sh prompt, networking/ethernet
works, and so on.  When I try a mount(), I am getting a kernel page fault.  Between
a few hours worth of debugging and some Googling around, I believe I understand
what is happening, ie when copy_mount_option is copying in from user space, it
seems to be running off the end of the data segment (code was apparently written with
the assumption that this is legal).  I can think of several different solutions, but
the question is this - is there some common, accepted practice solution to
this particular problem?  From searching the discussion groups, this class of problem
seems to be a known issue, but the arguments pro/con about what to do about
it never seem to converge :)  So before tracking off into the wilderness
on my own, I thought I might ask!  Tnx Rick Spanbauer


From owner-linux-mips@oss.sgi.com Wed May  8 14:32:24 2002
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Subject: Re: copy_mount_options
References: <NFBBJEOAELIHHOOPHOOHOEOACGAA.rick@sirius.cvnet.com>
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Rick Spanbauer wrote:

> Howdy - I am having a bit of a problem with a kernel port I've been working
> on recently.  Linux is up and running to the initial sh prompt, networking/ethernet
> works, and so on.  When I try a mount(), I am getting a kernel page fault.  Between
> a few hours worth of debugging and some Googling around, I believe I understand
> what is happening, ie when copy_mount_option is copying in from user space, it
> seems to be running off the end of the data segment (code was apparently written with
> the assumption that this is legal).  I can think of several different solutions, but
> the question is this - is there some common, accepted practice solution to
> this particular problem?  From searching the discussion groups, this class of problem
> seems to be a known issue, but the arguments pro/con about what to do about
> it never seem to converge :)  So before tracking off into the wilderness
> on my own, I thought I might ask!  Tnx Rick Spanbauer
> 


Congradulations!  You must have checked out the kernel from OSS CVS tree 
sometime in the past a couple of days.  There is a small time window when Ralf 
checked in the "correct epc for delay slot" fix with a typo and later got 
fixed again.  And coyp_mount_option() kernel fault was the symptom of the typo.

Get the latest code and give it a try.

Jun



From owner-linux-mips@oss.sgi.com Wed May  8 14:41:47 2002
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Subject: Re: [Fwd: Current state of MIPS16 support?]
From: Eric Christopher <echristo@redhat.com>
To: Dominic Sweetman <dom@algor.co.uk>
Cc: Johannes Stezenbach <js@convergence.de>, gcc@gcc.gnu.org,
   linux-mips@oss.sgi.com, sde@algor.co.uk
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	<15566.28397.770794.272735@gladsmuir.algor.co.uk>
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Dominic, 

> > I have not looked at the Algorithmics code because I don't have
> > copyright on it...
> 
> We do publish our sources on our web server.  Not only are they GPL
> but we have a copyright assignment to the FSF in place (which I know
> was sent to Jim Wilson of Cygnus, albeit in 1993...)
> 
It's great that your changes do get out in one form or another. I'm
personally uncertain as to the nature of copyright and how it would
affect if I looked at your code and put it into the mainline sources -
so I haven't :) 

> We're operating from a baseline which was a Cygnus/RedHat "2.96"
> release made to MIPS Technologies in late 2000.  A snapshot from a
> contract which had run into some kind of dissension, it had some new
> MIPS16 support but it was very buggy (the regular 32-bit MIPS code
> generator, too).  It has some nice features, though, like the "Haifa"
> scheduler and the DFA extensions to machine descriptions for
> superscalar CPUs.
> 
I don't remember any new mips16 support, however, I do remember that the
work was quite old (more than 2 years now). MIPS32 support is quite a
bit better now, and with the acceptance of Vlad's DFA scheduler into
mainline the scheduling descriptions will be following shortly. 

> It's true we have not contributed patches lately.  We don't really
> have the resouces; our success rate used to be very low, and since
> we're not working around the developing 3.x sources the prospects seem
> even dimmer.
> 
The backend has changed a bit in the time, however, it hasn't changed so
much that the patches would be that difficult for you to bring forward.
I encourage you to reconsider contributing them. 

> We're working (with funding from MIPS Technologies) on building a
> toolchain which:
> 
> o Can build Linux kernel, libraries and applications alike;
> 
> o Is substantially more efficient than other GCC versions when
>   producing MIPS application ("MIPS/ABI", PIC) code;
> 
> o Will produce ugly-but-correct PIC code for MIPS16 functions, so
>   MIPS16 can be tested in a standard Linux environment;
> 
> o Operates to a known and documented ABI (even the forgotten details,
>   like gprof...)
> 
> (The modesty of those ambitions should be measured against the reality
> of today's Linux/MIPS...)
I'm not certain what you are actually fixing here as I've not seen any
descriptions of problems here. I'd love to fix any problems that you've
had reported in the mainline sources so that everyone can get the
benefit of the work you are doing. 


> It would be even more valuable if we could ensure that MIPS becomes a
> "first-class" architecture for the evolving GCC - but the latter
> surely is a big commitment for the core GCC group.
> 
I'm putting in a lot of effort to cleaning up the MIPS port and am
committed to the architecture. 

> It's a pity that the different priorities of various funders and
> developers mean that there is no baseline toolkit for Linux/MIPS, so
> that such resources as are available are frequently used to re-invent
> the wheel.
> 
> Anyone got any ideas how to make it better?
> 
The problem as I see it is that no one wants/cares to contribute their
changes back that they make, or at least file bug reports against the
problems that they have. Almost 90% of the bug reports I see are against
IRIX. People have to "re-invent the wheel" because the changes never
make it back into the official sources - everyone has their own one
offs. If we fix this then the work that all of the disparate groups are
doing will at least go toward a common goal. 

-eric 

-- 
A fire drill does not demand
a fire.


From owner-linux-mips@oss.sgi.com Wed May  8 19:30:11 2002
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Date: Wed, 8 May 2002 19:31:15 -0700 (PDT)
From: Krishna Kondaka <krishna@Sanera.net>
Reply-To: Krishna Kondaka <krishna@Sanera.net>
Subject: Is this a /proc or kernel bug?
To: linux-mips@oss.sgi.com
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Hi,

	Here is an example proc read function which is part of my driver


static int
mydriver_proc_read(char *page, char **start, off_t off, int count, int *eof, 
void *d)
{
        uint32_t pos, len;
	
	/* Here I replaced the original code with some test code.
	   Basically, I want to write a SIZE number of bytes to 'page'
	 */
	len = SIZE;
        for (pos=0;pos<SIZE;pos++)
                page[pos] = ' '+ pos % 64;
        
        *start = page + off;
        len -= off;
        if (len <= count)
                *eof = 1;
        if (len > count)
                len = count;
        if (len < 0)
                len = 0; 
	return (len)
}

The above function works fine as long as the SIZE is lessthan 4K. If SIZE is
greater than 4K then some times I see the following kernel panic when
I try to do "cat /proc/<myfilename>"

Unhandled kernel unaligned access in unaligned.c:emulate_load_store_insn, line 
373:
$0 : 00000000 10009f00 8f20802c 48494a4b
$4 : 8f320988 00000001 00000000 00000116
$8 : 00000002 5c5d5e5f 00000000 20212223
$12: 24252627 00000025 10009f00 8f2fe116
$16: 4c4d4e4f 00000000 8f208024 00000001
$20: 8f320988 10009f01 80282998 00000001
$24: 00000001 2ac0ec10
$28: 8f226000 8f227ce8 8f227ce8 8019d938
epc    : 000000008011268c
Status : 10009f02
Cause  : 00800010

BadAddr: 0000000048494a4bProcess cat (pid: 72, stackpage=8f226000)
Stack: 801af260 0000003c 8f320000 00000000 8f320000 00000000 8f227e68 00001000
       00000000 10009f01 00000000 8f2ff150 10000238 8019d938 8011b7a8 00000000
       00000000 801cd818 8fdd3300 02000001 00000001 8027b880 00000000 8027b888
       8011b1b8 8011b1b8 80283a94 0000ee41 00000001 802a7420 8027b260 8fdd3300
       00000013 fffffffb 8010ec40 8010ebf4 00801400 b00a0020 80223744 63646566
       00080000 ...
Call Trace: [<801af260>] [<8019d938>] [<8011b7a8>] [<801cd818>] [<8011b1b8>] 
[<8011b1b8>]
 [<8010ec40>] [<8010ebf4>] [<80223744>] [<80223518>] [<801a1cc8>] [<8019d080>]
 [<8019f960>] [<801362c8>] [<8019f790>] [<8019a3d4>] [<8013c81c>] [<8013c6a8>]
 [<80128514>] [<80147ba0>] [<8010d924>] [<8010d924>]

Code: 00003021  8e100000  8c620000 <00571024> 1040002f  00000000  40116000  
36210001  38210001 
Unhandled kernel unaligned access in unaligned.c:emulate_load_store_insn, line 
373:
$0 : 00000000 10009f00 8f208014 30313233
$4 : 8f51bf5c 00000001 00000000 00000000
$8 : 8fa3f960 00000001 00001000 00002000
$12: 10009f00 00000000 00000000 00000000
$16: 34353637 8fa3faec 8f20800c 00000001
$20: 8f51bf5c 10009f01 80282998 00000001
$24: 00000000 00000001
$28: 80106000 80107cb0 80107cb0 801c85a4
epc    : 000000008011268c
Status : 10009f02
Cause  : 00800010

BadAddr: 0000000030313233Process swapper (pid: 0, stackpage=80106000)
Stack: 00000060 00000248 81617e91 8fd41a48 8fa3f960 8fa3faec 8fd4f460 8fa3f960
       8fd43044 ffffffff 00000000 0000012c 8027b9ac 801c85a4 8fa3fa1c 00000001
       8fd4f460 8fa3f960 8fa3fa1c 801ed86c 8fcf6064 801cb304 8fcf6000 8f227d70
       8fa3fa1c 00000014 8fd4f460 8fa3f960 8fd43044 00000000 00000000 0000012c
       801ef1a0 801ef168 8fd42660 8fd42660 00000068 8fd47044 8fd43030 8fd4f460
       8fd4f460 ...
Call Trace: [<801c85a4>] [<801ed86c>] [<801cb304>] [<801ef1a0>] [<801ef168>] 
[<801f89c4>]
 [<801f9050>] [<801dd32c>] [<801dd350>] [<801dbd5c>] [<801c89e4>] [<801dc188>]
 [<801dc2a0>] [<801cd658>] [<801af088>] [<801af07c>] [<801af088>] [<801af07c>]
 [<801cdb14>] [<801b0654>] [<80107eb8>] [<8011b1b8>] [<8010ec40>] [<8010ebf4>]
 [<80223744>] [<80223518>] [<80223518>] [<80107fe0>] [<80106000>] [<80107f68>]
 [<8010891c>] [<80108928>] [<80108030>] [<80227628>] [<80107d40>] [<8010078c>]

Code: 00003021  8e100000  8c620000 <00571024> 1040002f  00000000  40116000  
36210001  38210001 
Kernel panic: Aiee, killing interrupt handler!
In interrupt handler - not syncing

Some times the user level process "cat" panics with the same panic message.
Some times the "cat" process prints the proper messages but at the end
does segmentation fault.

I did some investigation and found that the value of "page", when the
function is entered multiple times, is different causing the statement

*start = page + off

meaningless because "page" is not always same as the "page" when called with 
off=0.
Here is the print log-
page = 8f209000 count = 3072 off = 0
page = 8f209000 count = 1024 off = 3072
page = 8f207000 count = 3072 off = 4096


Is this a bug in my code or in the kernel code?

Thanks
Krishna Kondaka
Sanera Systems Inc.


From owner-linux-mips@oss.sgi.com Wed May  8 20:27:32 2002
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Date: Wed, 8 May 2002 20:28:32 -0700 (PDT)
From: Krishna Kondaka <krishna@Sanera.net>
Reply-To: Krishna Kondaka <krishna@Sanera.net>
Subject: Is this a /proc or kernel bug? (more info...)
To: linux-mips@oss.sgi.com
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Sorry for not including the following information:

OS version: 2.4.9

# cat /proc/version
Linux version 2.4.9sb20011031 (gcc version 3.0.1 with SiByte modifications) #1 
Tue Mar  5 10:58:57 PST 2002

# cat /proc/cpuinfo
cpu                     : MIPS
processor               : 0
cpu model               : SiByte SB1 V0.1
BogoMIPS                : 332.59
system type             : SiByte SWARM
byteorder               : big endian
unaligned accesses      : 0
wait instruction        : no
microsecond timers      : yes
extra interrupt vector  : yes
hardware watchpoint     : no
VCED exceptions         : not available
VCEI exceptions         : not available



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Date: Wed, 8 May 2002 19:31:15 -0700 (PDT)
From: Krishna Kondaka <krishna@Sanera.net>
Subject: Is this a /proc or kernel bug?
To: linux-mips@oss.sgi.com
MIME-Version: 1.0
Content-MD5: MlNmEPCKMcnxsokctwLjjQ==

Hi,

	Here is an example proc read function which is part of my driver


static int
mydriver_proc_read(char *page, char **start, off_t off, int count, int *eof, 
void *d)
{
        uint32_t pos, len;
	
	/* Here I replaced the original code with some test code.
	   Basically, I want to write a SIZE number of bytes to 'page'
	 */
	len = SIZE;
        for (pos=0;pos<SIZE;pos++)
                page[pos] = ' '+ pos % 64;
        
        *start = page + off;
        len -= off;
        if (len <= count)
                *eof = 1;
        if (len > count)
                len = count;
        if (len < 0)
                len = 0; 
	return (len)
}

The above function works fine as long as the SIZE is lessthan 4K. If SIZE is
greater than 4K then some times I see the following kernel panic when
I try to do "cat /proc/<myfilename>"

Unhandled kernel unaligned access in unaligned.c:emulate_load_store_insn, line 
373:
$0 : 00000000 10009f00 8f20802c 48494a4b
$4 : 8f320988 00000001 00000000 00000116
$8 : 00000002 5c5d5e5f 00000000 20212223
$12: 24252627 00000025 10009f00 8f2fe116
$16: 4c4d4e4f 00000000 8f208024 00000001
$20: 8f320988 10009f01 80282998 00000001
$24: 00000001 2ac0ec10
$28: 8f226000 8f227ce8 8f227ce8 8019d938
epc    : 000000008011268c
Status : 10009f02
Cause  : 00800010

BadAddr: 0000000048494a4bProcess cat (pid: 72, stackpage=8f226000)
Stack: 801af260 0000003c 8f320000 00000000 8f320000 00000000 8f227e68 00001000
       00000000 10009f01 00000000 8f2ff150 10000238 8019d938 8011b7a8 00000000
       00000000 801cd818 8fdd3300 02000001 00000001 8027b880 00000000 8027b888
       8011b1b8 8011b1b8 80283a94 0000ee41 00000001 802a7420 8027b260 8fdd3300
       00000013 fffffffb 8010ec40 8010ebf4 00801400 b00a0020 80223744 63646566
       00080000 ...
Call Trace: [<801af260>] [<8019d938>] [<8011b7a8>] [<801cd818>] [<8011b1b8>] 
[<8011b1b8>]
 [<8010ec40>] [<8010ebf4>] [<80223744>] [<80223518>] [<801a1cc8>] [<8019d080>]
 [<8019f960>] [<801362c8>] [<8019f790>] [<8019a3d4>] [<8013c81c>] [<8013c6a8>]
 [<80128514>] [<80147ba0>] [<8010d924>] [<8010d924>]

Code: 00003021  8e100000  8c620000 <00571024> 1040002f  00000000  40116000  
36210001  38210001 
Unhandled kernel unaligned access in unaligned.c:emulate_load_store_insn, line 
373:
$0 : 00000000 10009f00 8f208014 30313233
$4 : 8f51bf5c 00000001 00000000 00000000
$8 : 8fa3f960 00000001 00001000 00002000
$12: 10009f00 00000000 00000000 00000000
$16: 34353637 8fa3faec 8f20800c 00000001
$20: 8f51bf5c 10009f01 80282998 00000001
$24: 00000000 00000001
$28: 80106000 80107cb0 80107cb0 801c85a4
epc    : 000000008011268c
Status : 10009f02
Cause  : 00800010

BadAddr: 0000000030313233Process swapper (pid: 0, stackpage=80106000)
Stack: 00000060 00000248 81617e91 8fd41a48 8fa3f960 8fa3faec 8fd4f460 8fa3f960
       8fd43044 ffffffff 00000000 0000012c 8027b9ac 801c85a4 8fa3fa1c 00000001
       8fd4f460 8fa3f960 8fa3fa1c 801ed86c 8fcf6064 801cb304 8fcf6000 8f227d70
       8fa3fa1c 00000014 8fd4f460 8fa3f960 8fd43044 00000000 00000000 0000012c
       801ef1a0 801ef168 8fd42660 8fd42660 00000068 8fd47044 8fd43030 8fd4f460
       8fd4f460 ...
Call Trace: [<801c85a4>] [<801ed86c>] [<801cb304>] [<801ef1a0>] [<801ef168>] 
[<801f89c4>]
 [<801f9050>] [<801dd32c>] [<801dd350>] [<801dbd5c>] [<801c89e4>] [<801dc188>]
 [<801dc2a0>] [<801cd658>] [<801af088>] [<801af07c>] [<801af088>] [<801af07c>]
 [<801cdb14>] [<801b0654>] [<80107eb8>] [<8011b1b8>] [<8010ec40>] [<8010ebf4>]
 [<80223744>] [<80223518>] [<80223518>] [<80107fe0>] [<80106000>] [<80107f68>]
 [<8010891c>] [<80108928>] [<80108030>] [<80227628>] [<80107d40>] [<8010078c>]

Code: 00003021  8e100000  8c620000 <00571024> 1040002f  00000000  40116000  
36210001  38210001 
Kernel panic: Aiee, killing interrupt handler!
In interrupt handler - not syncing

Some times the user level process "cat" panics with the same panic message.
Some times the "cat" process prints the proper messages but at the end
does segmentation fault.

I did some investigation and found that the value of "page", when the
function is entered multiple times, is different causing the statement

*start = page + off

meaningless because "page" is not always same as the "page" when called with 
off=0.
Here is the print log-
page = 8f209000 count = 3072 off = 0
page = 8f209000 count = 1024 off = 3072
page = 8f207000 count = 3072 off = 4096


Is this a bug in my code or in the kernel code?

Thanks
Krishna Kondaka
Sanera Systems Inc.


From owner-linux-mips@oss.sgi.com Thu May  9 08:43:03 2002
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On Wed, May 08, 2002 at 10:23:18AM -0700, Robert Rusek wrote:
> I am currently running kernel 2.4.17 and am getting sparatice errors
> like the following.  I seen that there had been bugs in the scsi driver
> in the earlier kernel versions.  Has anyone encountered this?  Is there
> a newer kernal that maybe addresses this?
>=20
> EXT2-fs error (device sd(8,1)): ext2_check_page: bad entry in directory
> #110030: unaligned
>  directory entry - offset=3D0, inode=3D6226015, rec_len=3D95, name_len=3D=
95
>=20

The SCSI errors we had on the Indy and Indigo2 happened with multiple
disks, disconnects and were pure "read" errors. Filesystem corruption
was quite rare. Mostly we had file data corruption on copy. The bug is
fixed for at least half a year now.

Do you see any other errors than that ? SCSI errors ?

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From owner-linux-mips@oss.sgi.com Thu May  9 09:31:02 2002
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From: "Robert Rusek" <rrusek@teknuts.com>
To: "'Florian Lohoff'" <flo@rfc822.org>
Cc: <linux-mips@oss.sgi.com>
Subject: RE: Indy SCSI Errors
Date: Thu, 9 May 2002 09:31:01 -0700
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I am familiar with the error that you are referring to.  I just fixed it
by upgrading to kernel 2.4.17.  The error that I am describing, should I
just ignore it and just do a fsck on my main drive every month?  I have
three drives sda1, sdb1, and sdc1 and it only seems to happened on the
sda1.  My sda2 is the swap drive, would that be affecting my sda1 ?

Thanks,
Rob.
     -----Original Message-----
     From: owner-linux-mips@oss.sgi.com 
     [mailto:owner-linux-mips@oss.sgi.com] On Behalf Of Florian Lohoff
     Sent: Thursday, May 09, 2002 8:43 AM
     To: Robert Rusek
     Cc: linux-mips@oss.sgi.com
     Subject: Re: Indy SCSI Errors
     
     
     On Wed, May 08, 2002 at 10:23:18AM -0700, Robert Rusek wrote:
     > I am currently running kernel 2.4.17 and am getting 
     sparatice errors 
     > like the following.  I seen that there had been bugs in the scsi 
     > driver in the earlier kernel versions.  Has anyone 
     encountered this?  
     > Is there a newer kernal that maybe addresses this?
     > 
     > EXT2-fs error (device sd(8,1)): ext2_check_page: bad entry in 
     > directory
     > #110030: unaligned
     >  directory entry - offset=0, inode=6226015, rec_len=95, 
     name_len=95
     > 
     
     The SCSI errors we had on the Indy and Indigo2 happened 
     with multiple disks, disconnects and were pure "read" 
     errors. Filesystem corruption was quite rare. Mostly we 
     had file data corruption on copy. The bug is fixed for at 
     least half a year now.
     
     Do you see any other errors than that ? SCSI errors ?
     
     Flo
     -- 
     Florian Lohoff                  flo@rfc822.org             
     +49-5201-669912
                             Heisenberg may have been here.
     


From owner-linux-mips@oss.sgi.com Thu May  9 09:38:45 2002
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Date: Thu, 9 May 2002 09:40:11 -0700 (PDT)
From: James Simmons <jsimmons@transvirtual.com>
To: linux-mips@oss.sgi.com
Subject: Debian on Indy.
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I just recently attempted to install debian on a new indy I just got. I
entered the prom boot console and typed bootp()/tftpboot/tfptboot.img. It
failed. What steps am I missing?

   . ---
   |o_o |
   |:_/ |   Give Micro$oft the Bird!!!!
  //   \ \  Use Linux!!!!
 (|     | )
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From owner-linux-mips@oss.sgi.com Thu May  9 10:08:21 2002
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From: Karsten Merker <karsten@excalibur.cologne.de>
To: James Simmons <jsimmons@transvirtual.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: Debian on Indy.
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On Thu, May 09, 2002 at 09:40:11AM -0700, James Simmons wrote:
> 
> I just recently attempted to install debian on a new indy I just got. I
> entered the prom boot console and typed bootp()/tftpboot/tfptboot.img. It
> failed. What steps am I missing?

Without more information on how it failed that is difficult to tell.
Any logfile entries on the bootp/tftp server?
Have you looked at http://www.linux-mips.org/technical_faq.html?
There you can find a list of possible problems when netbooting an Indy.

HTH,
Karsten
-- 
#include <standard_disclaimer>
Nach Paragraph 28 Abs. 3 Bundesdatenschutzgesetz widerspreche ich der Nutzung
oder Uebermittlung meiner Daten fuer Werbezwecke oder fuer die Markt- oder
Meinungsforschung.

From owner-linux-mips@oss.sgi.com Thu May  9 10:26:51 2002
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Subject: Re: Debian on Indy.
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Apparently, on Thu, May 09, 2002 at 07:19:45PM +0200, Karsten Merker wrote:
> On Thu, May 09, 2002 at 09:40:11AM -0700, James Simmons wrote:
> > 
> > I just recently attempted to install debian on a new indy I just got. I
> > entered the prom boot console and typed bootp()/tftpboot/tfptboot.img. It
> > failed. What steps am I missing?
> 
> Without more information on how it failed that is difficult to tell.
> Any logfile entries on the bootp/tftp server?
> Have you looked at http://www.linux-mips.org/technical_faq.html?
> There you can find a list of possible problems when netbooting an Indy.
> 
http://ftp.debian.org/debian/dists/woody/main/disks-mips/current/doc/ch-install-methods.en.html#s-install-tftp

In particular, make sure to set the two /proc settings on the tftp
server:
     echo 1 > /proc/sys/net/ipv4/ip_no_pmtu_disc
     echo "2048 32767" > /proc/sys/net/ipv4/ip_local_port_range


From owner-linux-mips@oss.sgi.com Thu May  9 11:02:09 2002
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From: James Simmons <jsimmons@transvirtual.com>
To: Tim Moss <mips@to11.net>
cc: Karsten Merker <karsten@excalibur.cologne.de>, linux-mips@oss.sgi.com
Subject: Re: Debian on Indy.
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> Apparently, on Thu, May 09, 2002 at 07:19:45PM +0200, Karsten Merker wrote:
> > On Thu, May 09, 2002 at 09:40:11AM -0700, James Simmons wrote:
> > > 
> > > I just recently attempted to install debian on a new indy I just got. I
> > > entered the prom boot console and typed bootp()/tftpboot/tfptboot.img. It
> > > failed. What steps am I missing?
> > 
> > Without more information on how it failed that is difficult to tell.
> > Any logfile entries on the bootp/tftp server?
> > Have you looked at http://www.linux-mips.org/technical_faq.html?
> > There you can find a list of possible problems when netbooting an Indy.
> > 
> http://ftp.debian.org/debian/dists/woody/main/disks-mips/current/doc/ch-install-methods.en.html#s-install-tftp
> 
> In particular, make sure to set the two /proc settings on the tftp
> server:
>      echo 1 > /proc/sys/net/ipv4/ip_no_pmtu_disc
>      echo "2048 32767" > /proc/sys/net/ipv4/ip_local_port_ran


Okay. Got it to boot. Now it fails with a bunch of SCSI errors. After it
complained it hanged. Any ideas or do you need th exact SCSI errors?



From owner-linux-mips@oss.sgi.com Fri May 10 02:31:43 2002
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From: Florian Lohoff <flo@rfc822.org>
To: Robert Rusek <rrusek@teknuts.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: Indy SCSI Errors
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On Thu, May 09, 2002 at 09:31:01AM -0700, Robert Rusek wrote:
> I am familiar with the error that you are referring to.  I just fixed it
> by upgrading to kernel 2.4.17.  The error that I am describing, should I
> just ignore it and just do a fsck on my main drive every month?  I have
> three drives sda1, sdb1, and sdc1 and it only seems to happened on the
> sda1.  My sda2 is the swap drive, would that be affecting my sda1 ?

If its not the error i fixed a couple of months ago i would
suspect bad hardware - Either ram or disk. I wouldnt ignore it.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From owner-linux-mips@oss.sgi.com Fri May 10 11:36:06 2002
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From: Guido Guenther <agx@sigxcpu.org>
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Cc: linux-mips@oss.sgi.com
Subject: Re: howto pass ramdisk loaddress to kernel
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Hi,
On Tue, May 07, 2002 at 12:45:38PM +0200, Florian Lohoff wrote:
> On Tue, May 07, 2002 at 12:32:49PM +0200, Guido Guenther wrote:
> > My question is now: how do i properly pass the initrd's memory address
> > to the kernel? Choices are:
> > 1) on the commandline: rd_start=0x...
> > 2) a bootparameter block like on i386 or sparc in head.S
> > 3) rely on the kernel to identify if a radisk has
> >   been loaded by a magic number
> > 
> > I'd prefer (1) but it seems none of the other arches does this. Is there
> > a reason for that? If not could we just introduce a new kernel
> > commandline parameter rd_start which has a memory address as a
> > parameter. Ralf, would you let this into the kernel?
> 
> I would do 1+3 - Give the address on the command line and let the ramdisk
> have a magic + length in the first 2 __u32.
I implemented (1) only since the kernel checks for a proper fs/gzip
magic anyway. I added this to the kernels at:
 http://honk.physik.uni-konstanz.de/linux-mips/kernels/
Patch is at:
 http://honk.physik.uni-konstanz.de/linux-mips/kernel-patches/ramdisk-cmdline-2002-05-09.diff
Regards,
 -- Guido

From owner-linux-mips@oss.sgi.com Sat May 11 11:51:09 2002
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From: Florian Lohoff <flo@rfc822.org>
To: Guido Guenther <agx@sigxcpu.org>
Cc: linux-mips@oss.sgi.com
Subject: Re: howto pass ramdisk loaddress to kernel
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On Fri, May 10, 2002 at 08:37:37PM +0200, Guido Guenther wrote:
> > I would do 1+3 - Give the address on the command line and let the ramdi=
sk
> > have a magic + length in the first 2 __u32.
> I implemented (1) only since the kernel checks for a proper fs/gzip
> magic anyway. I added this to the kernels at:

Ok ...

>  http://honk.physik.uni-konstanz.de/linux-mips/kernels/
> Patch is at:
>  http://honk.physik.uni-konstanz.de/linux-mips/kernel-patches/ramdisk-cmd=
line-2002-05-09.diff

I looked at the patch and it seems it does support all sub-archs - Is that
correct ?

BTW: When we boot with tip we might also compress the kernel as gzip.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From: "nsauzede" <nsauzede@online.fr>
To: "James Simmons" <jsimmons@transvirtual.com>
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References: <Pine.LNX.4.10.10205091055260.9983-100000@www.transvirtual.com>
Subject: Re: Debian on Indy.
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> Okay. Got it to boot. Now it fails with a bunch of SCSI errors. After it
> complained it hanged. Any ideas or do you need th exact SCSI errors?


Just for info : I managed to have the Debian Woody to work fine on my Indy
(kernel is 2.4.13 if I remember well...)

But when I tried to boot some kernel 2.5.?? (can't remember last number -- I
fetched the source from CVS) I cross compiled on an i386 platform, I got the
same problem : bootup crashes at SCSI probing time...

Must be some kind of SCSI code regression or something..

I think I already posted my problem to the list but didn't get reply....

Nicolas Sauzede.


From owner-linux-mips@oss.sgi.com Sun May 12 06:34:09 2002
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To: nsauzede <nsauzede@online.fr>
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Subject: Re: Debian on Indy.
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On Sun, May 12, 2002 at 01:08:13AM +0200, nsauzede wrote:
> Just for info : I managed to have the Debian Woody to work fine on my Indy
> (kernel is 2.4.13 if I remember well...)
>=20
> But when I tried to boot some kernel 2.5.?? (can't remember last number -=
- I
> fetched the source from CVS) I cross compiled on an i386 platform, I got =
the
> same problem : bootup crashes at SCSI probing time...
>=20
> Must be some kind of SCSI code regression or something..
>=20
> I think I already posted my problem to the list but didn't get reply....

The problem is the major block device change in 2.5 - It is still not
finished and needs more work in the individual drivers (IIRC the
driver itself has to do some error handling).

So the crash points to work to be done in the driver.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From: Florian Lohoff <flo@rfc822.org>
To: Krishna Kondaka <krishna@Sanera.net>
Cc: linux-mips@oss.sgi.com
Subject: Re: Is this a /proc or kernel bug? (more info...)
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On Wed, May 08, 2002 at 08:28:32PM -0700, Krishna Kondaka wrote:
> The above function works fine as long as the SIZE is lessthan 4K. If SIZE=
 is
> greater than 4K then some times I see the following kernel panic when
> I try to do "cat /proc/<myfilename>"
>=20
> Unhandled kernel unaligned access in unaligned.c:emulate_load_store_insn,=
 line=20
> 373:
> $0 : 00000000 10009f00 8f20802c 48494a4b
> $4 : 8f320988 00000001 00000000 00000116

IIRC i386 has the same problem with reading more then a single page from=20
/proc.

Retrieving more information should probably be a device driver with
a char or block interface.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From: Guido Guenther <agx@sigxcpu.org>
To: Florian Lohoff <flo@rfc822.org>
Cc: linux-mips@oss.sgi.com
Subject: Re: howto pass ramdisk loaddress to kernel
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On Sat, May 11, 2002 at 08:38:08PM +0200, Florian Lohoff wrote:
> On Fri, May 10, 2002 at 08:37:37PM +0200, Guido Guenther wrote:
> > > I would do 1+3 - Give the address on the command line and let the ramdisk
> > > have a magic + length in the first 2 __u32.
> > I implemented (1) only since the kernel checks for a proper fs/gzip
> > magic anyway. I added this to the kernels at:
> 
> Ok ...
> 
> >  http://honk.physik.uni-konstanz.de/linux-mips/kernels/
> > Patch is at:
> >  http://honk.physik.uni-konstanz.de/linux-mips/kernel-patches/ramdisk-cmdline-2002-05-09.diff
> 
> I looked at the patch and it seems it does support all sub-archs - Is that
> correct ?
It doesn't refer to any subarchitecture specific details so it can be
used by any subarch, yes.
> 
> BTW: When we boot with tip we might also compress the kernel as gzip.
That's also on my todo list for arcboot/tip22 but I'd like to get
bootfloppies fixed first.
 -- Guido

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Subject: Fw: Mips scalibility problems & softirq.c improvments
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----- Original Message -----
From: "D.J. Barrow" <barrow_dj@yahoo.com>
To: "Kernel Mailing List" <linux-kernel@vger.kernel.org>; "Netfilter"
<netfilter-devel@lists.samba.org>
Sent: Monday, May 13, 2002 6:12 AM
Subject: Mips scalibility problems & softirq.c improvments


> Hi,
> While testing the SMP performance of iptables with a lot of rules on a
mips based cpu,
> I found that the SMP performance was 40% lower on 2 cpus than 1 cpu.
>
> There is a number of reasons for this the primary being that the rules
were bigger
> than the shared L2 cache, little enough can be done about this.
>
> The second is that interrupts are on every mips port I bothered checking
> are only delivered on cpu 0 ( this is really pathetic ).
>
>
> See the code that prints /proc/interrupts in arch/mips/kernel/irq.c
> int get_irq_list(char *buf)
> {
> struct irqaction * action;
> char *p = buf;
> int i;
>
> p += sprintf(p, "           ");
> for (i=0; i < 1 /*smp_num_cpus*/; i++)
>
> Need I say more.....
>
> As softirqs are usually bound to the same
> cpu that start the softirqs softirqs performs really really badly,
> also the fact that the softirq.c code checks in_interrupt on
> entry means that it frequently does a quick exit.
>
>
> I also will be providing a patch I developed to the developers of a mips
based
> system on chip which distributes the irqs over all cpus using 2 polices
> even interrupts to cpu 0 odd interrupts to cpu 1 or leaving the interrupts
> enter in all cpus & only call do_IRQ on the cpu with the lowest
local_irq_count
>  & local_bh_count this should cause softirqs to perform will on this
> system anyway.
>
>
> I've provided a small patch to irq.c which fixes /proc/interrupts in
2.4.18 mips32
> hopefully somebody will be kind enough to fix up the 64 bit &
> the latest stuff in mips64 & the latest oss.sgi.com cvs trees.
>
> --- linux.orig/arch/mips/kernel/irq.c   Sun Sep  9 18:43:01 2001
> +++ linux/arch/mips/kernel/irq.c        Mon May 13 10:34:15 2002
> @@ -71,13 +71,13 @@
>
>  int get_irq_list(char *buf)
>  {
> +       int i, j;
>         struct irqaction * action;
>         char *p = buf;
> -       int i;
>
>         p += sprintf(p, "           ");
> -       for (i=0; i < 1 /*smp_num_cpus*/; i++)
> -               p += sprintf(p, "CPU%d       ", i);
> +       for (j=0; j<smp_num_cpus; j++)
> +               p += sprintf(p, "CPU%d       ",j);
>         *p++ = '\n';
>
>         for (i = 0 ; i < NR_IRQS ; i++) {
> @@ -85,7 +85,13 @@
>                 if (!action)
>                         continue;
>                 p += sprintf(p, "%3d: ",i);
> +#ifndef CONFIG_SMP
>                 p += sprintf(p, "%10u ", kstat_irqs(i));
> +#else
> +               for (j = 0; j < smp_num_cpus; j++)
> +                       p += sprintf(p, "%10u ",
> +                               kstat.irqs[cpu_logical_map(j)][i]);
> +#endif
>                 p += sprintf(p, " %14s", irq_desc[i].handler->typename);
>                 p += sprintf(p, "  %s", action->name);
>
> @@ -93,7 +99,7 @@
>                         p += sprintf(p, ", %s", action->name);
>                 *p++ = '\n';
>         }
> -       p += sprintf(p, "ERR: %10lu\n", irq_err_count);
> +       p += sprintf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
>         return p - buf;
>  }
>
>
>
> I also provide a small patch for softirq.c which makes sure the
> the softirqs stay running if in cpu_idle & no reschedule is pending.
> This improves softirq.c performance a small bit as it usually exits
> after calling each softirq once rather than staying in the loop
> if it has nothing better to do.
>
> --- linux.old/kernel/softirq.c  Tue Jan 15 04:13:43 2002
> +++ linux.new/kernel/softirq.c  Thu May  9 12:36:46 2002
> @@ -95,7 +95,8 @@
>                 local_irq_disable();
>
>                 pending = softirq_pending(cpu);
> -               if (pending & mask) {
> +               if ((pending && current==idle_task(cpu) &&
!current->need_resched )
> +                   || (pending & mask) ) {
>                         mask &= ~pending;
>                         goto restart;
>                 }
> diff -u -r linux.old/include/linux/sched.h linux.new/include/linux/sched.h
> --- linux.old/include/linux/sched.h     Thu May  9 18:08:42 2002
> +++ linux.new/include/linux/sched.h     Thu May  9 10:30:34 2002
> @@ -936,6 +936,19 @@
>         return res;
>  }
>
> +#ifdef CONFIG_SMP
> +
> +#define idle_task(cpu) (init_tasks[cpu_number_map(cpu)])
> +#define can_schedule(p,cpu) \
> +       ((p)->cpus_runnable & (p)->cpus_allowed & (1 << cpu))
> +
> +#else
> +
> +#define idle_task(cpu) (&init_task)
> +#define can_schedule(p,cpu) (1)
> +
> +#endif
> +
>  #endif /* __KERNEL__ */
>
>  #endif
>
> diff -u -r linux.old/kernel/sched.c linux.new/kernel/sched.c
> --- linux.old/kernel/sched.c    Wed May  1 10:40:26 2002
> +++ linux.new/kernel/sched.c    Thu May  9 10:30:26 2002
> @@ -112,18 +112,7 @@
>  struct kernel_stat kstat;
>  extern struct task_struct *child_reaper;
>
> -#ifdef CONFIG_SMP
>
> -#define idle_task(cpu) (init_tasks[cpu_number_map(cpu)])
> -#define can_schedule(p,cpu) \
> -       ((p)->cpus_runnable & (p)->cpus_allowed & (1 << cpu))
> -
> -#else
> -
> -#define idle_task(cpu) (&init_task)
> -#define can_schedule(p,cpu) (1)
> -
> -#endif
>
>  void scheduling_functions_start_here(void) { }
>
>
> Also find the patches sent as attachments.
>
>
> =====
> D.J. Barrow Linux kernel developer
> eMail: dj_barrow@ariasoft.ie
> Home: +353-22-47196.
> Work: +353-91-758353
>
> __________________________________________________
> Do You Yahoo!?
> LAUNCH - Your Yahoo! Music Experience
> http://launch.yahoo.com

------=_NextPart_000_0069_01C1FA68.E14F06C0
Content-Type: application/octet-stream;
	name="softirq_fix.diff"
Content-Transfer-Encoding: quoted-printable
Content-Disposition: attachment;
	filename="softirq_fix.diff"

--- linux.old/kernel/softirq.c	Tue Jan 15 04:13:43 2002=0A=
+++ linux.new/kernel/softirq.c	Thu May  9 12:36:46 2002=0A=
@@ -95,7 +95,8 @@=0A=
 		local_irq_disable();=0A=
 =0A=
 		pending =3D softirq_pending(cpu);=0A=
-		if (pending & mask) {=0A=
+		if ((pending && current=3D=3Didle_task(cpu) && !current->need_resched =
)=0A=
+		    || (pending & mask) ) {=0A=
 			mask &=3D ~pending;=0A=
 			goto restart;=0A=
 		}=0A=
diff -u -r linux.old/include/linux/sched.h =
linux.new/include/linux/sched.h=0A=
--- linux.old/include/linux/sched.h	Thu May  9 18:08:42 2002=0A=
+++ linux.new/include/linux/sched.h	Thu May  9 10:30:34 2002=0A=
@@ -936,6 +936,19 @@=0A=
 	return res;=0A=
 }=0A=
 =0A=
+#ifdef CONFIG_SMP=0A=
+=0A=
+#define idle_task(cpu) (init_tasks[cpu_number_map(cpu)])=0A=
+#define can_schedule(p,cpu) \=0A=
+	((p)->cpus_runnable & (p)->cpus_allowed & (1 << cpu))=0A=
+=0A=
+#else=0A=
+=0A=
+#define idle_task(cpu) (&init_task)=0A=
+#define can_schedule(p,cpu) (1)=0A=
+=0A=
+#endif=0A=
+=0A=
 #endif /* __KERNEL__ */=0A=
 =0A=
 #endif=0A=
=0A=
diff -u -r linux.old/kernel/sched.c linux.new/kernel/sched.c=0A=
--- linux.old/kernel/sched.c	Wed May  1 10:40:26 2002=0A=
+++ linux.new/kernel/sched.c	Thu May  9 10:30:26 2002=0A=
@@ -112,18 +112,7 @@=0A=
 struct kernel_stat kstat;=0A=
 extern struct task_struct *child_reaper;=0A=
 =0A=
-#ifdef CONFIG_SMP=0A=
 =0A=
-#define idle_task(cpu) (init_tasks[cpu_number_map(cpu)])=0A=
-#define can_schedule(p,cpu) \=0A=
-	((p)->cpus_runnable & (p)->cpus_allowed & (1 << cpu))=0A=
-=0A=
-#else=0A=
-=0A=
-#define idle_task(cpu) (&init_task)=0A=
-#define can_schedule(p,cpu) (1)=0A=
-=0A=
-#endif=0A=
 =0A=
 void scheduling_functions_start_here(void) { }=0A=
=0A=
=0A=
=0A=
=0A=
=0A=
=0A=
=0A=
=0A=

------=_NextPart_000_0069_01C1FA68.E14F06C0
Content-Type: application/octet-stream;
	name="mips32_irq.c_fix.diff"
Content-Transfer-Encoding: quoted-printable
Content-Disposition: attachment;
	filename="mips32_irq.c_fix.diff"

--- linux.orig/arch/mips/kernel/irq.c	Sun Sep  9 18:43:01 2001=0A=
+++ linux/arch/mips/kernel/irq.c	Mon May 13 10:34:15 2002=0A=
@@ -71,13 +71,13 @@=0A=
 =0A=
 int get_irq_list(char *buf)=0A=
 {=0A=
+	int i, j;=0A=
 	struct irqaction * action;=0A=
 	char *p =3D buf;=0A=
-	int i;=0A=
 =0A=
 	p +=3D sprintf(p, "           ");=0A=
-	for (i=3D0; i < 1 /*smp_num_cpus*/; i++)=0A=
-		p +=3D sprintf(p, "CPU%d       ", i);=0A=
+	for (j=3D0; j<smp_num_cpus; j++)=0A=
+		p +=3D sprintf(p, "CPU%d       ",j);=0A=
 	*p++ =3D '\n';=0A=
 =0A=
 	for (i =3D 0 ; i < NR_IRQS ; i++) {=0A=
@@ -85,7 +85,13 @@=0A=
 		if (!action) =0A=
 			continue;=0A=
 		p +=3D sprintf(p, "%3d: ",i);=0A=
+#ifndef CONFIG_SMP=0A=
 		p +=3D sprintf(p, "%10u ", kstat_irqs(i));=0A=
+#else=0A=
+		for (j =3D 0; j < smp_num_cpus; j++)=0A=
+			p +=3D sprintf(p, "%10u ",=0A=
+				kstat.irqs[cpu_logical_map(j)][i]);=0A=
+#endif=0A=
 		p +=3D sprintf(p, " %14s", irq_desc[i].handler->typename);=0A=
 		p +=3D sprintf(p, "  %s", action->name);=0A=
 =0A=
@@ -93,7 +99,7 @@=0A=
 			p +=3D sprintf(p, ", %s", action->name);=0A=
 		*p++ =3D '\n';=0A=
 	}=0A=
-	p +=3D sprintf(p, "ERR: %10lu\n", irq_err_count);=0A=
+	p +=3D sprintf(p, "ERR: %10u\n", atomic_read(&irq_err_count));=0A=
 	return p - buf;=0A=
 }=0A=
 =0A=

------=_NextPart_000_0069_01C1FA68.E14F06C0--


From owner-linux-mips@oss.sgi.com Mon May 13 11:22:29 2002
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	id 177GOF-0004XY-00; Mon, 13 May 2002 16:01:27 +0200
To: linux-mips@oss.sgi.com
Subject: [PATCH] Basic Indigo-2 EISA support
Organization: Metropolis -- Nowhere
X-Attribution: maz
X-Baby-1: =?iso-8859-1?q?Lo=EBn?= 12 juin 1996 13:10
X-Baby-2: None
X-Love-1: Gone
X-Love-2: Crazy-Cat
Reply-to: maz@misterjones.org
From: Marc Zyngier <maz@misterjones.org>
Date: 13 May 2002 16:01:27 +0200
Message-ID: <wrpr8kgno3s.fsf@hina.wild-wind.fr.eu.org>
Lines: 62
MIME-Version: 1.0
Content-Type: multipart/mixed; boundary="=-=-="
Sender: owner-linux-mips@oss.sgi.com
Precedence: bulk

--=-=-=

Hi all,

The included patch adds some very basic EISA support to the Indigo-2
(patch is against oss.sgi.com CVS from yesterday). It only supports
PIO mode at the moment, and enabling CONFIG_ISA crashes the
machine. Handle with care !

Anyway, I've been able to use an unmodified 3c509 driver (with a 3c579
card) on my 150MHz Indigo-2 for hours without problems :

lazy:/home/maz# dmesg|tail -4
eth1: 3c5x9 at 0x3000, BNC port, address  00 20 af eb 79 a3, IRQ 10.
3c509.c:1.18a 17Nov2001becker@scyld.com
http://www.scyld.com/network/3c509.html
eth1: Setting Rx mode to 1 addresses.
lazy:/home/maz# cat /proc/interrupts 
           CPU0       
 10:      17556       IP22 EISA  eth1
 18:          0            MIPS  local0 cascade
 19:          0            MIPS  local1 cascade
 22:          0            MIPS  Bus Error
 23:    2534068            MIPS  timer
 25:      10615    IP22 local 0  SGI WD93
 26:          7    IP22 local 0  SGI WD93
 27:      32701    IP22 local 0  SGI Seeq8003
 31:          0    IP22 local 0  mappable0 cascade
 33:          0    IP22 local 1  Front Panel
 43:      17556    IP22 local 2  IP22 EISA
 44:          2    IP22 local 2  keyboard
 45:       1402    IP22 local 2  Zilog8530
ERR:          0

Summary of changes :

- Add 16 to all IRQ numbers, so we can insert EISA irq from 0 to 15
and keep existing drivers happy,
- Set io_port_base to 0x80000, which is where the EISA bus lives on
the IP22,
- Swap 32bits accesses to the IO space (16bits IO are handled just
fine... One more IP22 mystery),
- Add arch/mips/sgi-ip22/ip22-eisa.c, which implements the eisa
hw_interrupt_type, and programs the EIU in a mysterious way...
- Add CONFIG_IP22_EISA configuration option.

TODO :

- Solve CONFIG_ISA crashes
- Add DMA

I'd be very happy if someone with EIU knowledge could enlight me with
details about the magic bits in ip22_eisa_init()... I'd also be glad to
receive any comment on this patch.

Regards,

        M.


--=-=-=
Content-Type: text/x-patch
Content-Disposition: attachment; filename=eisa-irq.patch
Content-Description: Indigo-2 Eisa patch

Index: arch/mips/config.in
===================================================================
RCS file: /cvs/linux/arch/mips/config.in,v
retrieving revision 1.154.2.17
diff -u -r1.154.2.17 config.in
--- arch/mips/config.in	2002/05/12 07:13:04	1.154.2.17
+++ arch/mips/config.in	2002/05/13 11:51:23
@@ -178,6 +178,7 @@
    define_bool CONFIG_NEW_IRQ y
    define_bool CONFIG_NEW_TIME_C y
    define_bool CONFIG_NONCOHERENT_IO y
+   define_bool CONFIG_SWAP_IO_SPACE y
 fi
 if [ "$CONFIG_SNI_RM200_PCI" = "y" ]; then
    define_bool CONFIG_ARC32 y
@@ -447,6 +448,15 @@
 tristate 'Kernel support for MISC binaries' CONFIG_BINFMT_MISC
 if [ "$CONFIG_MIPS_AU1000" = "y" ]; then
 dep_bool 'Power Management support (experimental)' CONFIG_PM $CONFIG_EXPERIMENTAL
+fi
+
+if [ "$CONFIG_SGI_IP22" = "y" ]; then
+   bool 'Indigo-2 (IP22) EISA bus support' CONFIG_IP22_EISA
+fi
+
+if [ "$CONFIG_IP22_EISA" = "y" ]; then
+#   define_bool CONFIG_ISA y
+   define_bool CONFIG_EISA y
 fi
 
 bool 'Networking support' CONFIG_NET
Index: arch/mips/sgi-ip22/Makefile
===================================================================
RCS file: /cvs/linux/arch/mips/sgi-ip22/Makefile,v
retrieving revision 1.1.2.1
diff -u -r1.1.2.1 Makefile
--- arch/mips/sgi-ip22/Makefile	2001/12/07 15:45:29	1.1.2.1
+++ arch/mips/sgi-ip22/Makefile	2002/05/13 11:51:25
@@ -20,6 +20,8 @@
 obj-y	+= ip22-mc.o ip22-sc.o ip22-hpc.o ip22-int.o ip22-time.o ip22-rtc.o \
 	   ip22-irq.o ip22-system.o ip22-reset.o ip22-setup.o
 
+obj-$(CONFIG_IP22_EISA) += ip22-eisa.o
+
 ip22-irq.o: ip22-irq.S
 
 include $(TOPDIR)/Rules.make
Index: arch/mips/sgi-ip22/ip22-int.c
===================================================================
RCS file: /cvs/linux/arch/mips/sgi-ip22/ip22-int.c,v
retrieving revision 1.2.2.1
diff -u -r1.2.2.1 ip22-int.c
--- arch/mips/sgi-ip22/ip22-int.c	2001/12/19 18:23:48	1.2.2.1
+++ arch/mips/sgi-ip22/ip22-int.c	2002/05/13 11:51:26
@@ -41,6 +41,7 @@
 
 extern asmlinkage void indyIRQ(void);
 extern void do_IRQ(int irq, struct pt_regs *regs);
+extern int ip22_eisa_init (void);
 
 static void enable_local0_irq(unsigned int irq)
 {
@@ -415,5 +416,9 @@
 	setup_irq(SGI_MAP_0_IRQ, &map0_cascade);
 #ifdef I_REALLY_NEED_THIS_IRQ
 	setup_irq(SGI_MAP_1_IRQ, &map1_cascade);
+#endif
+#ifdef CONFIG_IP22_EISA
+	if (!sgi_guiness)	/* Only Indigo-2 have EISA stuff */
+	        ip22_eisa_init ();
 #endif
 }
Index: arch/mips/sgi-ip22/ip22-setup.c
===================================================================
RCS file: /cvs/linux/arch/mips/sgi-ip22/ip22-setup.c,v
retrieving revision 1.1.2.6
diff -u -r1.1.2.6 ip22-setup.c
--- arch/mips/sgi-ip22/ip22-setup.c	2002/05/12 07:25:39	1.1.2.6
+++ arch/mips/sgi-ip22/ip22-setup.c	2002/05/13 11:51:26
@@ -28,6 +28,7 @@
 #include <asm/sgi/sgint23.h>
 #include <asm/time.h>
 #include <asm/gdb-stub.h>
+#include <asm/io.h>
 
 #ifdef CONFIG_REMOTE_DEBUG
 extern void rs_kgdb_hook(int);
@@ -146,6 +147,9 @@
 
 	/* Now enable boardcaches, if any. */
 	indy_sc_init();
+
+	/* Set the IO space to some sane value */
+	set_io_port_base (KSEG1ADDR (0x00080000));
 
 #ifdef CONFIG_SERIAL_CONSOLE
 	/* ARCS console environment variable is set to "g?" for
Index: include/asm-mips/io.h
===================================================================
RCS file: /cvs/linux/include/asm-mips/io.h,v
retrieving revision 1.29.2.10
diff -u -r1.29.2.10 io.h
--- include/asm-mips/io.h	2002/04/15 07:37:50	1.29.2.10
+++ include/asm-mips/io.h	2002/05/13 11:51:56
@@ -30,7 +30,13 @@
 #if defined(CONFIG_SWAP_IO_SPACE) && defined(__MIPSEB__)
 
 #define __ioswab8(x) (x)
+#ifdef CONFIG_SGI_IP22
+/* IP22 seems braindead enough to swap 16bits values in hardware, but
+   not 32bits.  Go figure... Can't tell without documentation. */
+#define __ioswab16(x) (x)
+#else
 #define __ioswab16(x) swab16(x)
+#endif
 #define __ioswab32(x) swab32(x)
 
 #else
Index: include/asm-mips/sgi/sgint23.h
===================================================================
RCS file: /cvs/linux/include/asm-mips/sgi/sgint23.h,v
retrieving revision 1.5.2.1
diff -u -r1.5.2.1 sgint23.h
--- include/asm-mips/sgi/sgint23.h	2001/12/14 20:49:49	1.5.2.1
+++ include/asm-mips/sgi/sgint23.h	2002/05/13 11:51:59
@@ -21,12 +21,13 @@
  * HAL2 driver). This will prevent many complications, trust me ;-) 
  *	--ladis
  */
-#define SGINT_CPU	 0	/* MIPS CPU define 8 interrupt sources */
-#define SGINT_LOCAL0	 8	/* INDY has 8 local0 irq levels */
-#define SGINT_LOCAL1	16	/* INDY has 8 local1 irq levels */
-#define SGINT_LOCAL2	24	/* INDY has 8 local2 vectored irq levels */
-#define SGINT_LOCAL3	32	/* INDY has 8 local3 vectored irq levels */
-#define SGINT_END	40	/* End of 'spaces' */
+#define SGINT_EISA       0	/* INDIGO-2 has 16 EISA irq levels */
+#define SGINT_CPU	16	/* MIPS CPU define 8 interrupt sources */
+#define SGINT_LOCAL0	24	/* INDY has 8 local0 irq levels */
+#define SGINT_LOCAL1	32	/* INDY has 8 local1 irq levels */
+#define SGINT_LOCAL2	40	/* INDY has 8 local2 vectored irq levels */
+#define SGINT_LOCAL3	48	/* INDY has 8 local3 vectored irq levels */
+#define SGINT_END	56	/* End of 'spaces' */
 
 /*
  * Individual interrupt definitions for the INDY and Indigo2
--- /dev/null	Mon Mar 18 16:22:16 2002
+++ arch/mips/sgi-ip22/ip22-eisa.c	Mon May 13 13:52:16 2002
@@ -0,0 +1,224 @@
+/*
+ * Basic EISA bus support for the SGI Indigo-2.
+ *
+ * (C) 2002 Pascal Dameme <netinet@freesurf.fr>
+ *      and Marc Zyngier <mzyngier@freesurf.fr>
+ *
+ * This code is released under both the GPL version 2 and BSD
+ * licenses.  Either license may be used.
+ *
+ * This code offers a very basic support for this EISA bus present in
+ * the SGI Indigo-2. It currently only supports PIO (forget about DMA
+ * for the time being). This is enough for a low-end ethernet card,
+ * but forget about your favorite SCSI card...
+ *
+ * TODO :
+ * - Fix bugs...
+ * - Add ISA support
+ * - Add DMA (yeah, right...).
+ * - Fix more bugs.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/sgi/sgint23.h>
+
+extern int EISA_bus;
+extern void do_IRQ(int irq, struct pt_regs *regs);
+
+#define EISA_MAX_IRQ             16
+
+#define EISA_TO_PHYS(x)  (0x00080000 | (x))
+#define EISA_TO_KSEG1(x) ((void *) KSEG1ADDR(EISA_TO_PHYS(x)))
+
+#define EIU_MODE_REG     0x0009ffc0
+#define EIU_STAT_REG     0x0009ffc4
+#define EIU_PREMPT_REG   0x0009ffc8
+#define EIU_QUIET_REG    0x0009ffcc
+#define EIU_INTRPT_ACK   0x00090004
+
+#define EISA_DMA1_STATUS            8
+#define EISA_INT1_CTRL           0x20
+#define EISA_INT1_MASK           0x21
+#define EISA_INT2_CTRL           0xA0
+#define EISA_INT2_MASK           0xA1
+#define EISA_DMA2_STATUS         0xD0
+#define EISA_DMA2_WRITE_SINGLE   0xD4
+#define EISA_EXT_NMI_RESET_CTRL 0x461
+#define EISA_INT1_EDGE_LEVEL    0x4D0
+#define EISA_INT2_EDGE_LEVEL    0x4D1
+#define EISA_VENDOR_ID_OFFSET   0xC80
+
+#define EIU_WRITE_32(x,y) { *((u32 *) KSEG1ADDR(x)) = (u32) (y); mb (); }
+#define EIU_READ_8(x) *((volatile u8 *) KSEG1ADDR(x))
+#define EISA_WRITE_8(x,y) { *((u8 *) EISA_TO_KSEG1(x)) = (u8) (y); mb(); }
+#define EISA_READ_8(x) *((volatile u8 *) EISA_TO_KSEG1(x))
+
+static void ip22_eisa_intr (int irq, void *dev_id, struct pt_regs *regs)
+{
+  u8 eisa_irq, dma1, dma2;
+  
+  eisa_irq = EIU_READ_8 (EIU_INTRPT_ACK);
+  dma1 = EISA_READ_8 (EISA_DMA1_STATUS);
+  dma2 = EISA_READ_8 (EISA_DMA2_STATUS);
+  
+  if (eisa_irq >= EISA_MAX_IRQ)
+  {
+    /* Oops, Bad Stuff Happened... */
+    printk ("eisa_irq %d out of bound\n", eisa_irq);
+
+    if (eisa_irq >= 8)
+      EISA_WRITE_8 (EISA_INT2_CTRL, 0x20);
+    EISA_WRITE_8 (EISA_INT1_CTRL, 0x20);
+    
+    return;
+  }
+
+  do_IRQ (eisa_irq, regs);
+}
+
+static void enable_eisa_irq(unsigned int irq)
+{
+  unsigned long flags;
+  u8 mask1, mask2;
+
+  save_and_cli(flags);
+  mask1 = EISA_READ_8 (EISA_INT1_MASK);
+  mask2 = EISA_READ_8 (EISA_INT2_MASK);
+
+  if (irq < 8)
+    mask1 &= ~((u8) (1 << irq));
+  else
+  {
+    mask1 &= ~((u8) (1 << 2));	/* Activate cascade */
+    mask2 &= ~((u8) (1 << (irq - 8)));
+  }
+
+  EISA_WRITE_8 (EISA_INT1_MASK, mask1);
+  EISA_WRITE_8 (EISA_INT2_MASK, mask2);
+  restore_flags(flags);
+}
+
+static unsigned int startup_eisa_irq(unsigned int irq)
+{
+  u8 edge1, edge2;
+  
+  /* Only use edge interrupts for EISA */
+  edge1 = EISA_READ_8 (EISA_INT1_EDGE_LEVEL);
+  edge2 = EISA_READ_8 (EISA_INT2_EDGE_LEVEL);
+
+  if (irq < 8)
+    edge1 &= ~((u8) (1 << irq));
+  else
+    edge2 &= ~((u8) (1 << (irq - 8)));
+  
+  EISA_WRITE_8 (EISA_INT2_EDGE_LEVEL, edge2);
+  EISA_WRITE_8 (EISA_INT1_EDGE_LEVEL, edge1);
+
+  enable_eisa_irq(irq);
+  return 0;
+}
+
+static void disable_eisa_irq(unsigned int irq)
+{
+  u8 mask1, mask2;
+    
+  mask1 = EISA_READ_8 (EISA_INT1_MASK);
+  mask2 = EISA_READ_8 (EISA_INT2_MASK);
+
+  if (irq < 8)
+    mask1 |= ((u8) (1 << irq));
+  else
+  {
+    mask2 |= ((u8) (1 << (irq - 8)));
+    if (mask2 == 0xff)
+      mask1 |= ((u8) (1 << 2));
+  }
+    
+  EISA_WRITE_8 (EISA_INT1_MASK, mask1);
+  EISA_WRITE_8 (EISA_INT2_MASK, mask2);
+}
+
+#define shutdown_eisa_irq	disable_eisa_irq
+
+static void mask_and_ack_eisa_irq (unsigned int irq)
+{
+  disable_eisa_irq (irq);
+  
+  if (irq >= 8)
+    EISA_WRITE_8 (EISA_INT2_CTRL, 0x20);
+  EISA_WRITE_8 (EISA_INT1_CTRL, 0x20);
+}
+
+static void end_eisa_irq (unsigned int irq)
+{
+  if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+    enable_eisa_irq(irq);
+}
+
+static struct hw_interrupt_type ip22_eisa_irq_type =
+{
+  "IP22 EISA",
+  startup_eisa_irq,
+  shutdown_eisa_irq,
+  enable_eisa_irq,
+  disable_eisa_irq,
+  mask_and_ack_eisa_irq,
+  end_eisa_irq,
+  NULL
+};
+
+static struct irqaction eisa_action =
+	{ ip22_eisa_intr, 0, 0, "IP22 EISA", NULL, NULL };
+
+int ip22_eisa_init (void)
+{
+  int i;
+  
+  /* Warning : BlackMagicAhead(tm).
+     Please wave your favorite dead chicken over the busses */
+
+  /* First say hello to the EIU */
+  EIU_WRITE_32 (EIU_PREMPT_REG, 0x0000FFFF);
+  EIU_WRITE_32 (EIU_QUIET_REG, 1);
+  EIU_WRITE_32 (EIU_MODE_REG, 0x40f3c07F);
+
+  /* Now be nice to the EISA chipset */
+  EISA_WRITE_8 (EISA_EXT_NMI_RESET_CTRL, 1);
+  for (i = 0; i < 10000; i++);
+  EISA_WRITE_8 (EISA_EXT_NMI_RESET_CTRL, 0);
+  EISA_WRITE_8 (EISA_INT1_CTRL, 0x11);
+  EISA_WRITE_8 (EISA_INT2_CTRL, 0x11);
+  EISA_WRITE_8 (EISA_INT1_MASK, 0);
+  EISA_WRITE_8 (EISA_INT2_MASK, 8);
+  EISA_WRITE_8 (EISA_INT1_MASK, 4);
+  EISA_WRITE_8 (EISA_INT2_MASK, 2);
+  EISA_WRITE_8 (EISA_INT1_MASK, 1);
+  EISA_WRITE_8 (EISA_INT2_MASK, 1);
+  EISA_WRITE_8 (EISA_INT1_MASK, 0xfb);
+  EISA_WRITE_8 (EISA_INT2_MASK, 0xff);
+  EISA_WRITE_8 (EISA_DMA2_WRITE_SINGLE, 0);
+
+  for (i = SGINT_EISA; i < (SGINT_EISA + EISA_MAX_IRQ); i++)
+  {
+    irq_desc[i].status	= IRQ_DISABLED;
+    irq_desc[i].action	= 0;
+    irq_desc[i].depth	= 1;
+    irq_desc[i].handler	= &ip22_eisa_irq_type;
+  }
+
+  /* Cannot use request_irq because of kmalloc not being ready at such
+   * an early stage. Yes, I've been bitten... */
+  setup_irq(SGI_EISA_IRQ, &eisa_action);
+
+  EISA_bus = 1;
+  return 0;
+}

--=-=-=


-- 
Places change, faces change. Life is so very strange.

--=-=-=--

From owner-linux-mips@oss.sgi.com Mon May 13 11:22:29 2002
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	id 177Gty-0004Y6-00; Mon, 13 May 2002 16:34:14 +0200
To: linux-mips@oss.sgi.com
Subject: [PATCH] Basic Indigo-2 EISA support
Organization: Metropolis -- Nowhere
X-Attribution: maz
X-Baby-1: =?iso-8859-1?q?Lo=EBn?= 12 juin 1996 13:10
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Reply-to: mzyngier@freesurf.fr
From: Marc Zyngier <mzyngier@freesurf.fr>
Date: 13 May 2002 16:34:14 +0200
Message-ID: <wrpk7q8nml5.fsf@hina.wild-wind.fr.eu.org>
Lines: 62
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Content-Type: multipart/mixed; boundary="=-=-="
Sender: owner-linux-mips@oss.sgi.com
Precedence: bulk

--=-=-=

Hi all,

The included patch adds some very basic EISA support to the Indigo-2
(patch is against oss.sgi.com CVS from yesterday). It only supports
PIO mode at the moment, and enabling CONFIG_ISA crashes the
machine. Handle with care !

Anyway, I've been able to use an unmodified 3c509 driver (with a 3c579
card) on my 150MHz Indigo-2 for hours without problems :

lazy:/home/maz# dmesg|tail -4
eth1: 3c5x9 at 0x3000, BNC port, address  00 20 af eb 79 a3, IRQ 10.
3c509.c:1.18a 17Nov2001becker@scyld.com
http://www.scyld.com/network/3c509.html
eth1: Setting Rx mode to 1 addresses.
lazy:/home/maz# cat /proc/interrupts 
           CPU0       
 10:      17556       IP22 EISA  eth1
 18:          0            MIPS  local0 cascade
 19:          0            MIPS  local1 cascade
 22:          0            MIPS  Bus Error
 23:    2534068            MIPS  timer
 25:      10615    IP22 local 0  SGI WD93
 26:          7    IP22 local 0  SGI WD93
 27:      32701    IP22 local 0  SGI Seeq8003
 31:          0    IP22 local 0  mappable0 cascade
 33:          0    IP22 local 1  Front Panel
 43:      17556    IP22 local 2  IP22 EISA
 44:          2    IP22 local 2  keyboard
 45:       1402    IP22 local 2  Zilog8530
ERR:          0

Summary of changes :

- Add 16 to all IRQ numbers, so we can insert EISA irq from 0 to 15
and keep existing drivers happy,
- Set io_port_base to 0x80000, which is where the EISA bus lives on
the IP22,
- Swap 32bits accesses to the IO space (16bits IO are handled just
fine... One more IP22 mystery),
- Add arch/mips/sgi-ip22/ip22-eisa.c, which implements the eisa
hw_interrupt_type, and programs the EIU in a mysterious way...
- Add CONFIG_IP22_EISA configuration option.

TODO :

- Solve CONFIG_ISA crashes
- Add DMA

I'd be very happy if someone with EIU knowledge could enlight me with
details about the magic bits in ip22_eisa_init()... I'd also be glad to
receive any comment on this patch.

Regards,

        M.


--=-=-=
Content-Type: text/x-patch
Content-Disposition: attachment; filename=eisa-irq.patch
Content-Description: Indigo-2 Eisa patch

Index: arch/mips/config.in
===================================================================
RCS file: /cvs/linux/arch/mips/config.in,v
retrieving revision 1.154.2.17
diff -u -r1.154.2.17 config.in
--- arch/mips/config.in	2002/05/12 07:13:04	1.154.2.17
+++ arch/mips/config.in	2002/05/13 11:51:23
@@ -178,6 +178,7 @@
    define_bool CONFIG_NEW_IRQ y
    define_bool CONFIG_NEW_TIME_C y
    define_bool CONFIG_NONCOHERENT_IO y
+   define_bool CONFIG_SWAP_IO_SPACE y
 fi
 if [ "$CONFIG_SNI_RM200_PCI" = "y" ]; then
    define_bool CONFIG_ARC32 y
@@ -447,6 +448,15 @@
 tristate 'Kernel support for MISC binaries' CONFIG_BINFMT_MISC
 if [ "$CONFIG_MIPS_AU1000" = "y" ]; then
 dep_bool 'Power Management support (experimental)' CONFIG_PM $CONFIG_EXPERIMENTAL
+fi
+
+if [ "$CONFIG_SGI_IP22" = "y" ]; then
+   bool 'Indigo-2 (IP22) EISA bus support' CONFIG_IP22_EISA
+fi
+
+if [ "$CONFIG_IP22_EISA" = "y" ]; then
+#   define_bool CONFIG_ISA y
+   define_bool CONFIG_EISA y
 fi
 
 bool 'Networking support' CONFIG_NET
Index: arch/mips/sgi-ip22/Makefile
===================================================================
RCS file: /cvs/linux/arch/mips/sgi-ip22/Makefile,v
retrieving revision 1.1.2.1
diff -u -r1.1.2.1 Makefile
--- arch/mips/sgi-ip22/Makefile	2001/12/07 15:45:29	1.1.2.1
+++ arch/mips/sgi-ip22/Makefile	2002/05/13 11:51:25
@@ -20,6 +20,8 @@
 obj-y	+= ip22-mc.o ip22-sc.o ip22-hpc.o ip22-int.o ip22-time.o ip22-rtc.o \
 	   ip22-irq.o ip22-system.o ip22-reset.o ip22-setup.o
 
+obj-$(CONFIG_IP22_EISA) += ip22-eisa.o
+
 ip22-irq.o: ip22-irq.S
 
 include $(TOPDIR)/Rules.make
Index: arch/mips/sgi-ip22/ip22-int.c
===================================================================
RCS file: /cvs/linux/arch/mips/sgi-ip22/ip22-int.c,v
retrieving revision 1.2.2.1
diff -u -r1.2.2.1 ip22-int.c
--- arch/mips/sgi-ip22/ip22-int.c	2001/12/19 18:23:48	1.2.2.1
+++ arch/mips/sgi-ip22/ip22-int.c	2002/05/13 11:51:26
@@ -41,6 +41,7 @@
 
 extern asmlinkage void indyIRQ(void);
 extern void do_IRQ(int irq, struct pt_regs *regs);
+extern int ip22_eisa_init (void);
 
 static void enable_local0_irq(unsigned int irq)
 {
@@ -415,5 +416,9 @@
 	setup_irq(SGI_MAP_0_IRQ, &map0_cascade);
 #ifdef I_REALLY_NEED_THIS_IRQ
 	setup_irq(SGI_MAP_1_IRQ, &map1_cascade);
+#endif
+#ifdef CONFIG_IP22_EISA
+	if (!sgi_guiness)	/* Only Indigo-2 have EISA stuff */
+	        ip22_eisa_init ();
 #endif
 }
Index: arch/mips/sgi-ip22/ip22-setup.c
===================================================================
RCS file: /cvs/linux/arch/mips/sgi-ip22/ip22-setup.c,v
retrieving revision 1.1.2.6
diff -u -r1.1.2.6 ip22-setup.c
--- arch/mips/sgi-ip22/ip22-setup.c	2002/05/12 07:25:39	1.1.2.6
+++ arch/mips/sgi-ip22/ip22-setup.c	2002/05/13 11:51:26
@@ -28,6 +28,7 @@
 #include <asm/sgi/sgint23.h>
 #include <asm/time.h>
 #include <asm/gdb-stub.h>
+#include <asm/io.h>
 
 #ifdef CONFIG_REMOTE_DEBUG
 extern void rs_kgdb_hook(int);
@@ -146,6 +147,9 @@
 
 	/* Now enable boardcaches, if any. */
 	indy_sc_init();
+
+	/* Set the IO space to some sane value */
+	set_io_port_base (KSEG1ADDR (0x00080000));
 
 #ifdef CONFIG_SERIAL_CONSOLE
 	/* ARCS console environment variable is set to "g?" for
Index: include/asm-mips/io.h
===================================================================
RCS file: /cvs/linux/include/asm-mips/io.h,v
retrieving revision 1.29.2.10
diff -u -r1.29.2.10 io.h
--- include/asm-mips/io.h	2002/04/15 07:37:50	1.29.2.10
+++ include/asm-mips/io.h	2002/05/13 11:51:56
@@ -30,7 +30,13 @@
 #if defined(CONFIG_SWAP_IO_SPACE) && defined(__MIPSEB__)
 
 #define __ioswab8(x) (x)
+#ifdef CONFIG_SGI_IP22
+/* IP22 seems braindead enough to swap 16bits values in hardware, but
+   not 32bits.  Go figure... Can't tell without documentation. */
+#define __ioswab16(x) (x)
+#else
 #define __ioswab16(x) swab16(x)
+#endif
 #define __ioswab32(x) swab32(x)
 
 #else
Index: include/asm-mips/sgi/sgint23.h
===================================================================
RCS file: /cvs/linux/include/asm-mips/sgi/sgint23.h,v
retrieving revision 1.5.2.1
diff -u -r1.5.2.1 sgint23.h
--- include/asm-mips/sgi/sgint23.h	2001/12/14 20:49:49	1.5.2.1
+++ include/asm-mips/sgi/sgint23.h	2002/05/13 11:51:59
@@ -21,12 +21,13 @@
  * HAL2 driver). This will prevent many complications, trust me ;-) 
  *	--ladis
  */
-#define SGINT_CPU	 0	/* MIPS CPU define 8 interrupt sources */
-#define SGINT_LOCAL0	 8	/* INDY has 8 local0 irq levels */
-#define SGINT_LOCAL1	16	/* INDY has 8 local1 irq levels */
-#define SGINT_LOCAL2	24	/* INDY has 8 local2 vectored irq levels */
-#define SGINT_LOCAL3	32	/* INDY has 8 local3 vectored irq levels */
-#define SGINT_END	40	/* End of 'spaces' */
+#define SGINT_EISA       0	/* INDIGO-2 has 16 EISA irq levels */
+#define SGINT_CPU	16	/* MIPS CPU define 8 interrupt sources */
+#define SGINT_LOCAL0	24	/* INDY has 8 local0 irq levels */
+#define SGINT_LOCAL1	32	/* INDY has 8 local1 irq levels */
+#define SGINT_LOCAL2	40	/* INDY has 8 local2 vectored irq levels */
+#define SGINT_LOCAL3	48	/* INDY has 8 local3 vectored irq levels */
+#define SGINT_END	56	/* End of 'spaces' */
 
 /*
  * Individual interrupt definitions for the INDY and Indigo2
--- /dev/null	Mon Mar 18 16:22:16 2002
+++ arch/mips/sgi-ip22/ip22-eisa.c	Mon May 13 13:52:16 2002
@@ -0,0 +1,224 @@
+/*
+ * Basic EISA bus support for the SGI Indigo-2.
+ *
+ * (C) 2002 Pascal Dameme <netinet@freesurf.fr>
+ *      and Marc Zyngier <mzyngier@freesurf.fr>
+ *
+ * This code is released under both the GPL version 2 and BSD
+ * licenses.  Either license may be used.
+ *
+ * This code offers a very basic support for this EISA bus present in
+ * the SGI Indigo-2. It currently only supports PIO (forget about DMA
+ * for the time being). This is enough for a low-end ethernet card,
+ * but forget about your favorite SCSI card...
+ *
+ * TODO :
+ * - Fix bugs...
+ * - Add ISA support
+ * - Add DMA (yeah, right...).
+ * - Fix more bugs.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/sgi/sgint23.h>
+
+extern int EISA_bus;
+extern void do_IRQ(int irq, struct pt_regs *regs);
+
+#define EISA_MAX_IRQ             16
+
+#define EISA_TO_PHYS(x)  (0x00080000 | (x))
+#define EISA_TO_KSEG1(x) ((void *) KSEG1ADDR(EISA_TO_PHYS(x)))
+
+#define EIU_MODE_REG     0x0009ffc0
+#define EIU_STAT_REG     0x0009ffc4
+#define EIU_PREMPT_REG   0x0009ffc8
+#define EIU_QUIET_REG    0x0009ffcc
+#define EIU_INTRPT_ACK   0x00090004
+
+#define EISA_DMA1_STATUS            8
+#define EISA_INT1_CTRL           0x20
+#define EISA_INT1_MASK           0x21
+#define EISA_INT2_CTRL           0xA0
+#define EISA_INT2_MASK           0xA1
+#define EISA_DMA2_STATUS         0xD0
+#define EISA_DMA2_WRITE_SINGLE   0xD4
+#define EISA_EXT_NMI_RESET_CTRL 0x461
+#define EISA_INT1_EDGE_LEVEL    0x4D0
+#define EISA_INT2_EDGE_LEVEL    0x4D1
+#define EISA_VENDOR_ID_OFFSET   0xC80
+
+#define EIU_WRITE_32(x,y) { *((u32 *) KSEG1ADDR(x)) = (u32) (y); mb (); }
+#define EIU_READ_8(x) *((volatile u8 *) KSEG1ADDR(x))
+#define EISA_WRITE_8(x,y) { *((u8 *) EISA_TO_KSEG1(x)) = (u8) (y); mb(); }
+#define EISA_READ_8(x) *((volatile u8 *) EISA_TO_KSEG1(x))
+
+static void ip22_eisa_intr (int irq, void *dev_id, struct pt_regs *regs)
+{
+  u8 eisa_irq, dma1, dma2;
+  
+  eisa_irq = EIU_READ_8 (EIU_INTRPT_ACK);
+  dma1 = EISA_READ_8 (EISA_DMA1_STATUS);
+  dma2 = EISA_READ_8 (EISA_DMA2_STATUS);
+  
+  if (eisa_irq >= EISA_MAX_IRQ)
+  {
+    /* Oops, Bad Stuff Happened... */
+    printk ("eisa_irq %d out of bound\n", eisa_irq);
+
+    if (eisa_irq >= 8)
+      EISA_WRITE_8 (EISA_INT2_CTRL, 0x20);
+    EISA_WRITE_8 (EISA_INT1_CTRL, 0x20);
+    
+    return;
+  }
+
+  do_IRQ (eisa_irq, regs);
+}
+
+static void enable_eisa_irq(unsigned int irq)
+{
+  unsigned long flags;
+  u8 mask1, mask2;
+
+  save_and_cli(flags);
+  mask1 = EISA_READ_8 (EISA_INT1_MASK);
+  mask2 = EISA_READ_8 (EISA_INT2_MASK);
+
+  if (irq < 8)
+    mask1 &= ~((u8) (1 << irq));
+  else
+  {
+    mask1 &= ~((u8) (1 << 2));	/* Activate cascade */
+    mask2 &= ~((u8) (1 << (irq - 8)));
+  }
+
+  EISA_WRITE_8 (EISA_INT1_MASK, mask1);
+  EISA_WRITE_8 (EISA_INT2_MASK, mask2);
+  restore_flags(flags);
+}
+
+static unsigned int startup_eisa_irq(unsigned int irq)
+{
+  u8 edge1, edge2;
+  
+  /* Only use edge interrupts for EISA */
+  edge1 = EISA_READ_8 (EISA_INT1_EDGE_LEVEL);
+  edge2 = EISA_READ_8 (EISA_INT2_EDGE_LEVEL);
+
+  if (irq < 8)
+    edge1 &= ~((u8) (1 << irq));
+  else
+    edge2 &= ~((u8) (1 << (irq - 8)));
+  
+  EISA_WRITE_8 (EISA_INT2_EDGE_LEVEL, edge2);
+  EISA_WRITE_8 (EISA_INT1_EDGE_LEVEL, edge1);
+
+  enable_eisa_irq(irq);
+  return 0;
+}
+
+static void disable_eisa_irq(unsigned int irq)
+{
+  u8 mask1, mask2;
+    
+  mask1 = EISA_READ_8 (EISA_INT1_MASK);
+  mask2 = EISA_READ_8 (EISA_INT2_MASK);
+
+  if (irq < 8)
+    mask1 |= ((u8) (1 << irq));
+  else
+  {
+    mask2 |= ((u8) (1 << (irq - 8)));
+    if (mask2 == 0xff)
+      mask1 |= ((u8) (1 << 2));
+  }
+    
+  EISA_WRITE_8 (EISA_INT1_MASK, mask1);
+  EISA_WRITE_8 (EISA_INT2_MASK, mask2);
+}
+
+#define shutdown_eisa_irq	disable_eisa_irq
+
+static void mask_and_ack_eisa_irq (unsigned int irq)
+{
+  disable_eisa_irq (irq);
+  
+  if (irq >= 8)
+    EISA_WRITE_8 (EISA_INT2_CTRL, 0x20);
+  EISA_WRITE_8 (EISA_INT1_CTRL, 0x20);
+}
+
+static void end_eisa_irq (unsigned int irq)
+{
+  if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+    enable_eisa_irq(irq);
+}
+
+static struct hw_interrupt_type ip22_eisa_irq_type =
+{
+  "IP22 EISA",
+  startup_eisa_irq,
+  shutdown_eisa_irq,
+  enable_eisa_irq,
+  disable_eisa_irq,
+  mask_and_ack_eisa_irq,
+  end_eisa_irq,
+  NULL
+};
+
+static struct irqaction eisa_action =
+	{ ip22_eisa_intr, 0, 0, "IP22 EISA", NULL, NULL };
+
+int ip22_eisa_init (void)
+{
+  int i;
+  
+  /* Warning : BlackMagicAhead(tm).
+     Please wave your favorite dead chicken over the busses */
+
+  /* First say hello to the EIU */
+  EIU_WRITE_32 (EIU_PREMPT_REG, 0x0000FFFF);
+  EIU_WRITE_32 (EIU_QUIET_REG, 1);
+  EIU_WRITE_32 (EIU_MODE_REG, 0x40f3c07F);
+
+  /* Now be nice to the EISA chipset */
+  EISA_WRITE_8 (EISA_EXT_NMI_RESET_CTRL, 1);
+  for (i = 0; i < 10000; i++);
+  EISA_WRITE_8 (EISA_EXT_NMI_RESET_CTRL, 0);
+  EISA_WRITE_8 (EISA_INT1_CTRL, 0x11);
+  EISA_WRITE_8 (EISA_INT2_CTRL, 0x11);
+  EISA_WRITE_8 (EISA_INT1_MASK, 0);
+  EISA_WRITE_8 (EISA_INT2_MASK, 8);
+  EISA_WRITE_8 (EISA_INT1_MASK, 4);
+  EISA_WRITE_8 (EISA_INT2_MASK, 2);
+  EISA_WRITE_8 (EISA_INT1_MASK, 1);
+  EISA_WRITE_8 (EISA_INT2_MASK, 1);
+  EISA_WRITE_8 (EISA_INT1_MASK, 0xfb);
+  EISA_WRITE_8 (EISA_INT2_MASK, 0xff);
+  EISA_WRITE_8 (EISA_DMA2_WRITE_SINGLE, 0);
+
+  for (i = SGINT_EISA; i < (SGINT_EISA + EISA_MAX_IRQ); i++)
+  {
+    irq_desc[i].status	= IRQ_DISABLED;
+    irq_desc[i].action	= 0;
+    irq_desc[i].depth	= 1;
+    irq_desc[i].handler	= &ip22_eisa_irq_type;
+  }
+
+  /* Cannot use request_irq because of kmalloc not being ready at such
+   * an early stage. Yes, I've been bitten... */
+  setup_irq(SGI_EISA_IRQ, &eisa_action);
+
+  EISA_bus = 1;
+  return 0;
+}

--=-=-=


-- 
Places change, faces change. Life is so very strange.

--=-=-=--

From owner-linux-mips@oss.sgi.com Mon May 13 11:33:27 2002
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Date: Mon, 13 May 2002 11:33:27 -0700 (PDT)
From: Krishna Kondaka <krishna@Sanera.net>
Reply-To: Krishna Kondaka <krishna@Sanera.net>
Subject: Re: Is this a /proc or kernel bug? (more info...)
To: flo@rfc822.org
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Thanks for the reply florian!

I think I was able to fix this problem by writing the code differently.
Initially I copied some code from the existing proc_read routines but they
are assuming a maximum of page size, in this case 4K.

I have modified the my proc read code as below, and it seem to work fine!

static int
mydriver_proc_read(char *page, char **start, off_t off, int count, int *eof
void *d)
{
	uint32_t pos, len, i;
	
	len = MIN(count, (SIZE-off));
	pos = (off & (PAGE_SIZE-1));

	if (len > 0) {
		for (i = 0; i < len; i++)
			page[pos+i] = ' ' + i % 64;
		*start = page + (off & (PAGE_SIZE-1));
	} else {
		len = 0;
		*eof = 0;
	}
}
	
I am assuming that (off & (PAGE_SIZE-1)) + count <= PAGE_SIZE, which seems
to be the case always during my testing.


Krishna

>X-Authentication-Warning: oss.sgi.com: mail owned process doing -bs
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owner-linux-mips@oss.sgi.com using -f
>Date: Sun, 12 May 2002 15:36:56 +0200
>From: Florian Lohoff <flo@rfc822.org>
>To: Krishna Kondaka <krishna@Sanera.net>
>Cc: linux-mips@oss.sgi.com
>Subject: Re: Is this a /proc or kernel bug? (more info...)
>Mime-Version: 1.0
>Content-Disposition: inline
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>
>On Wed, May 08, 2002 at 08:28:32PM -0700, Krishna Kondaka wrote:
>> The above function works fine as long as the SIZE is lessthan 4K. If SIZE is
>> greater than 4K then some times I see the following kernel panic when
>> I try to do "cat /proc/<myfilename>"
>> 
>> Unhandled kernel unaligned access in unaligned.c:emulate_load_store_insn, 
line 
>> 373:
>> $0 : 00000000 10009f00 8f20802c 48494a4b
>> $4 : 8f320988 00000001 00000000 00000116
>
>IIRC i386 has the same problem with reading more then a single page from 
>/proc.
>
>Retrieving more information should probably be a device driver with
>a char or block interface.
>
>Flo
>-- 
>Florian Lohoff                  flo@rfc822.org             +49-5201-669912
>                        Heisenberg may have been here.


From owner-linux-mips@oss.sgi.com Mon May 13 14:53:10 2002
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From: "Robert Rusek" <rrusek@teknuts.com>
To: <linux-mips@oss.sgi.com>
Subject: dump/Restore issues on Indy
Date: Mon, 13 May 2002 14:53:26 -0700
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I am having problems doing a restore after a dump.  The dump finishes
without any problems.  I get an invalid header when doing a restore.
When I use tar it works great so I know that it is not a hardware
problem.  I have compiled the lates dump/restore and ef2progs.  

Any help would be greatly appreciated.

--
Robert Rusek
    


From owner-linux-mips@oss.sgi.com Mon May 13 18:02:47 2002
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Date: Mon, 13 May 2002 18:01:20 -0700
From: Jun Sun <jsun@mvista.com>
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I am running some stress tests (such as ltp, netperf, lmbench, etc) on the SMP 
swarm board.  Once in a while I notice /dev/zero will get deleted.  This 
causes all kinds of weired problems (such as internal gcc error.  Why?)

I don't know how to re-produce this problem yet.  It seems a little 
non-deterministic.  I would appreciate any insight into this problem.

Jun


From owner-linux-mips@oss.sgi.com Mon May 13 18:18:56 2002
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	Tue, 14 May 2002 11:19:00 +1000
Message-ID: <3CE06604.2050800@agile.tv>
Date: Tue, 14 May 2002 11:19:00 +1000
From: Liam Davies <liam.davies@agile.tv>
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Jun Sun wrote:
> 
> I don't know how to re-produce this problem yet.  It seems a little 
> non-deterministic.  I would appreciate any insight into this problem.


The ltp mtest05 test had a bug in which it would remove /dev/zero when
it cleaned up. Have you got an updated ltp suite?

This is the fix that they did in late March to the mtest05 test.

/ltp/ltp/testcases/kernel/mem/mtest05/mmstress.c:246
-    if (strcmp(filename, "NULL") || strcmp(filename, "/dev/zero"))
+    if (strcmp(filename, "NULL") && strcmp(filename, "/dev/zero"))

I suppose that there may be other LTP tests that could have similar
bugs...


Cheers
Liam





From owner-linux-mips@oss.sgi.com Mon May 13 18:29:54 2002
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Thanks.  I am using an old version of ltp, and I still see the bug there.

Jun

Liam Davies wrote:

> Jun Sun wrote:
> 
>>
>> I don't know how to re-produce this problem yet.  It seems a little 
>> non-deterministic.  I would appreciate any insight into this problem.
> 
> 
> 
> The ltp mtest05 test had a bug in which it would remove /dev/zero when
> it cleaned up. Have you got an updated ltp suite?
> 
> This is the fix that they did in late March to the mtest05 test.
> 
> /ltp/ltp/testcases/kernel/mem/mtest05/mmstress.c:246
> -    if (strcmp(filename, "NULL") || strcmp(filename, "/dev/zero"))
> +    if (strcmp(filename, "NULL") && strcmp(filename, "/dev/zero"))
> 
> I suppose that there may be other LTP tests that could have similar
> bugs...
> 
> 
> Cheers
> Liam
> 
> 
> 
> 



From owner-linux-mips@oss.sgi.com Mon May 13 19:35:29 2002
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CC: linux-mips@oss.sgi.com
Subject: [PATCH] gettimeoffset for swarm
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This is a multi-part message in MIME format.
--------------020401010503040805090101
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By default, swarm will use calibrate_div64_gettimeoffset().  That does
not work in SMP mode because the two cores have different counter register
value.  This patch gives swarm its own and accurate gettimeoffset().

The symptom without this patch is that cpu core 1 does not have micro-second
resolution of gettimeofday().

It applies to 2.4 branch with 1 or 2 line offset warnings.  It does not apply 
to 2.5 branch. 2.5 branch appears to be outdated.

http://linux.junsun.net/patches/oss.sgi.com/submitted/020515.swarm-own-gettimeoffset.patch

Jun



--------------020401010503040805090101
Content-Type: text/plain;
 name="020515.swarm-own-gettimeoffset.patch"
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 filename="020515.swarm-own-gettimeoffset.patch"


By default, swarm will use calibrate_div64_gettimeoffset().  That does
not work in SMP mode because the two cores have different counter register
value.  This patch gives swarm its own and accurate gettimeoffset().

The symptom without this patch is that cpu core 1 does not have micro-second
resolution of gettimeofday().

Jun

diff -Nru linux/arch/mips/sibyte/sb1250/time.c.orig linux/arch/mips/sibyte/sb1250/time.c
--- linux/arch/mips/sibyte/sb1250/time.c.orig	Tue Apr 30 17:29:25 2002
+++ linux/arch/mips/sibyte/sb1250/time.c	Fri May 10 14:53:39 2002
@@ -34,6 +34,7 @@
 #include <asm/ptrace.h>
 #include <asm/addrspace.h>
 #include <asm/time.h>
+#include <asm/debug.h>
 
 #include <asm/sibyte/sb1250.h>
 #include <asm/sibyte/sb1250_regs.h>
@@ -107,3 +108,19 @@
 	 */
 	ll_local_timer_interrupt(0, regs);
 }
+
+/*
+ * We use our own do_gettimeoffset() instead of the generic one,
+ * because the generic one does not work for SMP case.
+ * In addition, since we use general timer 0 for system time,
+ * we can get accurate intra-jiffy offset without calibration.
+ */
+unsigned long sb1250_gettimeoffset(void)
+{
+	unsigned long count =
+		in64(KSEG1 + A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT));
+
+	db_assert(count <= 1000000 / HZ);
+	return 1000000/HZ - count;
+}
+
diff -Nru linux/arch/mips/sibyte/swarm/setup.c.orig linux/arch/mips/sibyte/swarm/setup.c
--- linux/arch/mips/sibyte/swarm/setup.c.orig	Tue Apr 30 17:38:09 2002
+++ linux/arch/mips/sibyte/swarm/setup.c	Fri May 10 14:54:36 2002
@@ -237,12 +237,15 @@
          * interrupts through low-level (direct) meachanism.
          */
 
+	/* Use our own gettimeoffset() routine */
+	do_gettimeoffset = sb1250_gettimeoffset;
+
         /* We only need to setup the generic timer */
         sb1250_time_init();
 }
 
 extern int xicor_set_time(unsigned long);
-extern unsigned int xicor_get_time(void);
+extern unsigned long xicor_get_time(void);
 
 void __init swarm_setup(void)
 {
diff -Nru linux/include/asm-mips/sibyte/sb1250.h.orig linux/include/asm-mips/sibyte/sb1250.h
--- linux/include/asm-mips/sibyte/sb1250.h.orig	Tue Jan 15 13:25:45 2002
+++ linux/include/asm-mips/sibyte/sb1250.h	Fri May 10 14:51:50 2002
@@ -20,6 +20,7 @@
 #define _ASM_SIBYTE_SB1250_H
 
 extern void sb1250_time_init(void);
+extern unsigned long sb1250_gettimeoffset(void);
 extern void sb1250_mask_irq(int cpu, int irq);
 extern void sb1250_unmask_irq(int cpu, int irq);
 extern void sb1250_smp_finish(void);
diff -Nru linux/include/asm-mips64/sibyte/sb1250.h.orig linux/include/asm-mips64/sibyte/sb1250.h
--- linux/include/asm-mips64/sibyte/sb1250.h.orig	Tue Apr 30 17:30:44 2002
+++ linux/include/asm-mips64/sibyte/sb1250.h	Fri May 10 14:52:16 2002
@@ -20,6 +20,7 @@
 #define _ASM_SIBYTE_SB1250_H
 
 extern void sb1250_time_init(void);
+extern unsigned long sb1250_gettimeoffset(void);
 extern void sb1250_mask_irq(int cpu, int irq);
 extern void sb1250_unmask_irq(int cpu, int irq);
 extern void sb1250_smp_finish(void);

--------------020401010503040805090101--


From owner-linux-mips@oss.sgi.com Tue May 14 02:26:31 2002
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On Mon, 13 May 2002, Robert Rusek wrote:
> I am having problems doing a restore after a dump.  The dump finishes
> without any problems.  I get an invalid header when doing a restore.
> When I use tar it works great so I know that it is not a hardware
> problem.  I have compiled the lates dump/restore and ef2progs.  

Probably not related to the problem, but using dump on Linux (>= 2.4.x) is
unsafe due to the way the buffer cache works.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From owner-linux-mips@oss.sgi.com Tue May 14 06:02:26 2002
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Date: Tue, 14 May 2002 15:02:38 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: ldavies@agile.tv
cc: Jun Sun <jsun@mvista.com>, linux-mips@oss.sgi.com
Subject: Re: deleted /dev/zero
In-Reply-To: <3CE06604.2050800@agile.tv>
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On Tue, 14 May 2002, Liam Davies wrote:

> The ltp mtest05 test had a bug in which it would remove /dev/zero when
> it cleaned up. Have you got an updated ltp suite?
> 
> This is the fix that they did in late March to the mtest05 test.
> 
> /ltp/ltp/testcases/kernel/mem/mtest05/mmstress.c:246
> -    if (strcmp(filename, "NULL") || strcmp(filename, "/dev/zero"))
> +    if (strcmp(filename, "NULL") && strcmp(filename, "/dev/zero"))
> 
> I suppose that there may be other LTP tests that could have similar
> bugs...

 Which only proves again one shouldn't run software as root unless
absolutely needed... 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Tue May 14 06:18:56 2002
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Date: Tue, 14 May 2002 15:18:49 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Jun Sun <jsun@mvista.com>
cc: ralf@oss.sgi.com, linux-mips@oss.sgi.com
Subject: Re: [PATCH] gettimeoffset for swarm
In-Reply-To: <3CE073D0.8030402@mvista.com>
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On Mon, 13 May 2002, Jun Sun wrote:

> By default, swarm will use calibrate_div64_gettimeoffset().  That does
> not work in SMP mode because the two cores have different counter register
> value.  This patch gives swarm its own and accurate gettimeoffset().

 You may consider synchronising the counters as it's done for the i386,
instead.  See synchronize_tsc_ap().  It may be useful for other purposes
as well. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Tue May 14 10:55:10 2002
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Date: Tue, 14 May 2002 11:26:05 +0200 (CEST)
From: Adrian Schroeter <adrian@suse.de>
Reply-To: Adrian Schroeter <adrian@suse.de>
To: linux-mips@oss.sgi.com
Cc: ralf@gnu.org, Michael Schroeder <mls@suse.de>
Subject: sgiarcs_con generic SGI console driver
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Hi,

Michael Schroeder has written a console driver that only uses
functions from the ARCS prom and therefore should work on all
SGIs. The disadvantage is that it is not very fast and it needs
the RAM area reserved for the PROM. But you'll get a nice console
on IMPACT machines and other.

enjoy,
adrian

**********************************************************************
Adrian Schroeter
SuSE AG, Deutschherrnstr. 15-19, 90429 Nuernberg, Germany
email: adrian@suse.de   (296 mails already received today.)


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From owner-linux-mips@oss.sgi.com Wed May 15 01:47:03 2002
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Date: Wed, 15 May 2002 14:12:25 +0530 (IST)
From: Venkata Rajesh Bikkina <rajeshbv@intotoinc.com>
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Subject: RAMDISK problem on 79s334A board.
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Hi All,

I am working on 79s334A board with 32MB RAM and Linux 2.4.13 kernel. 
I have module to be inserted into kernel. The size of the module will be
around 1 MB.
I am using two file systems while building kernel image, one is NFS and
the other is RAMDISK.
When i work with NFS i do not have any problem.

But when i build RAMDISK image and insert the module, insmod is
doing fine. But after that i could not invoke any other application ( even
ps -ef is also giving segmentation fault.)
The RAMDISK size choosen is 10MB and the memory on board is 32MB.
When i did cat /proc/meminfo i found strange thing. All the figures are
corrupted.

The statistics before and after insmod are as follows:

# cat /proc/meminfo
        total:    used:    free:  shared: buffers:  cached:
Mem:  29237248 15319040 13918208        0 10240000  2908160
Swap:        0        0        0
MemTotal:        28552 kB
MemFree:         13592 kB
MemShared:           0 kB
Buffers:         10000 kB
Cached:           2840 kB
Active:          12840 kB
Inact_dirty:         0 kB
Inact_clean:         0 kB
Inact_target:       44 kB
HighTotal:           0 kB
HighFree:            0 kB
LowTotal:        28552 kB
LowFree:         13592 kB
SwapTotal:           0 kB
SwapFree:            0 kB
#
#
# cd /igateway
# /sbin/insmod igateway
Intoto Firewall Installed.
#
#
# /sbin/lsmod
Module                  Size  Used by
igateway              967056   0 (unused)
#
#
# cat /proc/meminfo
        total:    used:    free:  shared: buffers:  cached:
Mem:  %8lu %8lu %8lu %8lu %8lu %8u
Swap: %8lu %8lu %8lu
MemTotal:     %8lu kB
MemFree:      %8lu kB
MemShared:    %8lu kB
Buffers:      %8lu kB
Cached:       %8u kB
Active:       %8u kB
Inact_dirty:  %8u kB
Inact_clean:  %8u kB
Inact_target: %8lu kB
HighTotal:    %8lu kB
HighFree:     %8lu kB
LowTotal:     %8lu kB
LowFree:      %8lu kB
SwapTotal:    %8lu kB
SwapFree:     %8lu kB
#
#
# ps -ef
  PID  Uid      Gid State Command
Segmentation fault
# 

Can anybody give hint what is happening. 

Thanks and Regards,
--Rajesh


From owner-linux-mips@oss.sgi.com Wed May 15 04:24:18 2002
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Subject: Re: RAMDISK problem on 79s334A board.
To: rajeshbv@intotoinc.com (Venkata Rajesh Bikkina)
Date: Wed, 15 May 2002 12:00:27 +0100 (BST)
Cc: linux-mips@oss.sgi.com
In-Reply-To: <Pine.LNX.4.10.10205151403260.14414-100000@brahma.intotoind.com> from "Venkata Rajesh Bikkina" at May 15, 2002 02:12:25 PM
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> But when i build RAMDISK image and insert the module, insmod is
> doing fine. But after that i could not invoke any other application ( even
> ps -ef is also giving segmentation fault.)

Looks like your module corrupts the kernel.

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Hi Alan,

Thankyou for your response.

But the same module is working fine and kernel is also fine if i use NFS
and insert the module.
Any further info ?

--Rajesh

On Wed, 15 May 2002, Alan Cox wrote:

> > But when i build RAMDISK image and insert the module, insmod is
> > doing fine. But after that i could not invoke any other application ( even
> > ps -ef is also giving segmentation fault.)
> 
> Looks like your module corrupts the kernel.
> 


From owner-linux-mips@oss.sgi.com Wed May 15 06:08:50 2002
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Subject: Re: RAMDISK problem on 79s334A board.
To: rajeshbv@intotoinc.com (Venkata Rajesh Bikkina)
Date: Wed, 15 May 2002 14:28:59 +0100 (BST)
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> But the same module is working fine and kernel is also fine if i use NFS
> and insert the module.
> Any further info ?

Not really. The fact it works with NFS and not ramdisk may simply be that
in one case it corrupts memory that is used, and the other it corrupts
memory that isnt

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$B"#A49q$NM%NI?M:`>R2p2q<R(B
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--------------000503080306050607030009
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Linus,

I found this bug in 2.4 kernel. I have verified that the bug exists on MIPS 
SMP and PPC SMP, but not on i386 SMP.  See the detailed explanation inside the 
patch.

2.5 sched.c has been re-written quite a bit and does not have this problem.


http://linux.junsun.net/patches/generic/submitted/020515-2.4.18-smp-sched-typo.patch

Jun


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Gcc will optimizie out the whole 'if' branch on platforms where
cycles_t is not unsigned long long (such as MIPS, PPC).

The symptom for this bug is not fatal - perhaps that is ther reason
why nobody has found it so far.  Higher priority process will be delayed
to start its execution.  One of my tests shows on a heavy-loaded system 
the delay is about 5 to 6 jiffies.  

Jun, 020515

diff -Nru link/kernel/sched.c.orig link/kernel/sched.c
--- link/kernel/sched.c.orig	Fri Dec 21 09:42:04 2001
+++ link/kernel/sched.c	Wed May 15 12:38:12 2002
@@ -282,7 +282,7 @@
 				target_tsk = tsk;
 			}
 		} else {
-			if (oldest_idle == -1ULL) {
+			if (oldest_idle == (cycles_t)-1) {
 				int prio = preemption_goodness(tsk, p, cpu);
 
 				if (prio > max_prio) {

--------------000503080306050607030009--


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Date: Wed, 15 May 2002 15:42:28 -0500
From: Ken Aaker <kenaaker@silverbacksystems.com>
Organization: Silverback Systems
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Subject: Mangled struct hd_driveid with MIPSEB.
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I've just run across an interesting problem building a big-endian MIPS 
kernel against the kernel source from the cvs tree. When the drive 
identity record is presented to the ide_fix_driveid() function in 
include/asm-mips/ide.h, it looks like its been byteswapped in 16 bit 
chunks. Needless to say, this causes a certain amount of confusion.  I 
tried following the process back to the point where the data is read in, 
but I failed to find anything that seemed to be explicitly swapping the 
code. The older kernel that I have 2.4.3 works Ok, so it's something 
that's happened recently.  Here's a little bit of debug information that 
I collected.. I messed around with the ide_fix_driveid function till I 
got the system to work, but I'm be embarassed to see that code escape 
into the wild.

This is a dump of the id record before the call to ide_fix_driveid() in 
the 2.4.3 kernel.
0000: 7a42ff3f 00001000 00e15802 3f001000   "zB.?......X.?..."
0010: 00000e00 4457572d 41435441 34343430   "....DWW.ACTA4440"
0020: 33340034 00000000 03000010 28003630   "34.4..........60"
0030: 302e4734 36304457 20434457 30334530   "0.G460DW.CDW03E0"
0040: 2d423030 50433046 20202020 20202020   ".B00PC0F........"
0050: 20202020 20202020 20202020 20201080   "................"
0060: 0000002f 01408002 00000700 ff3f1000   ".....@.......?.."
0070: 3f0010fc fb000001 80ac7e03 00000704   "?.........~....."
0080: 03007800 78007800 78000000 00000000   "..x.x.x.x......."
0090: 00000000 00000000 00000000 00000000   "................"
00a0: 3e000000 6b34014b 00406934 01080040   ">...k4.K.@i4...@"
00b0: 3f000000 00000000 00004b60 fe800000   "?.........K`...."
00c0: 00000000 00000000 00000000 00000000   "................"
00d0: 00000000 00000000 00000000 00000000   "................"
00e0: 00000000 00000000 00000000 00000000   "................"
00f0: 00000000 00000000 00000000 00000000   "................"
0100: 01000000 00000000 00003300 00000000   "..........3....."
0110: 00000000 00000000 00000000 00000000   "................"
0120: 00000000 00000000 00000000 00000000   "................"
0130: 00000000 00000000 00000000 00001f00   "................"
0140: 00000000 00000000 00000000 00000000   "................"
0150: 00000000 00000000 00000000 00000000   "................"
0160: 00000000 00000000 00000000 00000000   "................"
0170: 00000000 00000000 00000000 00000000   "................"
0180: 00000000 00000000 00000000 00000000   "................"
0190: 00000000 00000000 00000000 00000000   "................"
01a0: 00000000 00000000 00000000 00000000   "................"
01b0: 00000000 00000000 00000000 00000000   "................"
01c0: 00000000 00000000 00000000 00000000   "................"
01d0: 00000000 00000000 00000000 00000000   "................"
01e0: 00000000 00000000 00000000 00000000   "................"
01f0: 00000000 00000000 00000000 0000a56e   "...............n"

This is a dump of the id record before the call to ide_fix_drived() in 
the 2.4.18 kernel from cvs.

0000: 427a3fff 00000010 e1000258 003f0010   "Bz?........X.?.."
0010: 0000000e 57442d57 43414154 34343034   "....WD.WCAAT4404"
0020: 34333400 00000000 00031000 00283036   "434...........06"
0030: 2e303447 30365744 43205744 33303045   ".04G06WDC.WD300E"
0040: 422d3030 43504630 20202020 20202020   "B.00CPF0........"
0050: 20202020 20202020 20202020 20208010   "................"
0060: 00002f00 40010280 00000007 3fff0010   "....@.......?..."
0070: 003ffc10 00fb0100 ac80037e 00000407   ".?.........~...."
0080: 00030078 00780078 00780000 00000000   "...x.x.x.x......"
0090: 00000000 00000000 00000000 00000000   "................"
00a0: 003e0000 346b4b01 40003469 08014000   ".>..4kK.@.4i..@."
00b0: 003f0000 00000000 0000604b 80fe0000   ".?........`K...."
00c0: 00000000 00000000 00000000 00000000   "................"
00d0: 00000000 00000000 00000000 00000000   "................"
00e0: 00000000 00000000 00000000 00000000   "................"
00f0: 00000000 00000000 00000000 00000000   "................"
0100: 00010000 00000000 00000033 00000000   "...........3...."
0110: 00000000 00000000 00000000 00000000   "................"
0120: 00000000 00000000 00000000 00000000   "................"
0130: 00000000 00000000 00000000 0000001f   "................"
0140: 00000000 00000000 00000000 00000000   "................"
0150: 00000000 00000000 00000000 00000000   "................"
0160: 00000000 00000000 00000000 00000000   "................"
0170: 00000000 00000000 00000000 00000000   "................"
0180: 00000000 00000000 00000000 00000000   "................"
0190: 00000000 00000000 00000000 00000000   "................"
01a0: 00000000 00000000 00000000 00000000   "................"
01b0: 00000000 00000000 00000000 00000000   "................"
01c0: 00000000 00000000 00000000 00000000   "................"
01d0: 00000000 00000000 00000000 00000000   "................"
01e0: 00000000 00000000 00000000 00000000   "................"
01f0: 00000000 00000000 00000000 00006ea5   "..............n."



-- 
work -> kenaaker@silverbacksystems.com	(507) 289-6910 ext 1
home -> kenaaker@screaminet.com



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From: "Matthew Dharm" <mdharm@momenco.com>
To: "Linux-MIPS" <linux-mips@oss.sgi.com>
Subject: MIPS 64?
Date: Wed, 15 May 2002 14:34:47 -0700
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So... I'm looking at porting Linux to a system with 1.5GiB of RAM.
That kinda blows the 32-bit MIPS port option right out of the water...

What does it take to do a 64-bit port?  The first problem I see is the
boot loader -- do I have to be in 64-bit mode when the kernel starts,
or can I start in 32-bit mode and then transfer to 64-bit mode?

I looked in the arch/mips64/ directory, but I don't see much for
specific boards there, but there are references to the Malta
boards....

Matt

--
Matthew D. Dharm                            Senior Software Designer
Momentum Computer Inc.                      1815 Aston Ave.  Suite 107
(760) 431-8663 X-115                        Carlsbad, CA 92008-7310
Momentum Works For You                      www.momenco.com


From owner-linux-mips@oss.sgi.com Wed May 15 14:48:37 2002
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Date: Wed, 15 May 2002 17:48:18 -0400
From: Daniel Jacobowitz <dan@debian.org>
To: Matthew Dharm <mdharm@momenco.com>
Cc: Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: MIPS 64?
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On Wed, May 15, 2002 at 02:34:47PM -0700, Matthew Dharm wrote:
> So... I'm looking at porting Linux to a system with 1.5GiB of RAM.
> That kinda blows the 32-bit MIPS port option right out of the water...

Not unless you count bits differently than I do... 32-bit is 4 GiB.  Is
there any reason MIPS has special problems in this area?

> 
> What does it take to do a 64-bit port?  The first problem I see is the
> boot loader -- do I have to be in 64-bit mode when the kernel starts,
> or can I start in 32-bit mode and then transfer to 64-bit mode?
> 
> I looked in the arch/mips64/ directory, but I don't see much for
> specific boards there, but there are references to the Malta
> boards....
> 
> Matt
> 
> --
> Matthew D. Dharm                            Senior Software Designer
> Momentum Computer Inc.                      1815 Aston Ave.  Suite 107
> (760) 431-8663 X-115                        Carlsbad, CA 92008-7310
> Momentum Works For You                      www.momenco.com
> 
> 

-- 
Daniel Jacobowitz                           Carnegie Mellon University
MontaVista Software                         Debian GNU/Linux Developer

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Subject: Re: MIPS 64?
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Since traditionally the mips kernel could only manage RAM reachable by
Kseg you were limited to 512MB, right?  But now the High Memory stuff is
stable enough that you can reach any RAM that's physically addressable
in 32-bits.  And after that, there's the 64bit-physical-address
extension which allows you to reach physical pages that need > 32-bits
to address.

Kip

Daniel Jacobowitz wrote:
> 
> On Wed, May 15, 2002 at 02:34:47PM -0700, Matthew Dharm wrote:
> > So... I'm looking at porting Linux to a system with 1.5GiB of RAM.
> > That kinda blows the 32-bit MIPS port option right out of the water...
> 
> Not unless you count bits differently than I do... 32-bit is 4 GiB.  Is
> there any reason MIPS has special problems in this area?
> 
> >
> > What does it take to do a 64-bit port?  The first problem I see is the
> > boot loader -- do I have to be in 64-bit mode when the kernel starts,
> > or can I start in 32-bit mode and then transfer to 64-bit mode?
> >
> > I looked in the arch/mips64/ directory, but I don't see much for
> > specific boards there, but there are references to the Malta
> > boards....
> >
> > Matt
> >
> > --
> > Matthew D. Dharm                            Senior Software Designer
> > Momentum Computer Inc.                      1815 Aston Ave.  Suite 107
> > (760) 431-8663 X-115                        Carlsbad, CA 92008-7310
> > Momentum Works For You                      www.momenco.com
> >
> >
> 
> --
> Daniel Jacobowitz                           Carnegie Mellon University
> MontaVista Software                         Debian GNU/Linux Developer


From owner-linux-mips@oss.sgi.com Wed May 15 15:01:31 2002
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Daniel Jacobowitz wrote:

> On Wed, May 15, 2002 at 02:34:47PM -0700, Matthew Dharm wrote:
> 
>>So... I'm looking at porting Linux to a system with 1.5GiB of RAM.
>>That kinda blows the 32-bit MIPS port option right out of the water...
>>
> 
> Not unless you count bits differently than I do... 32-bit is 4 GiB.  Is
> there any reason MIPS has special problems in this area?
> 


MIPS has lower 2GB fixed for user space.  Then you have kseg0, .5GB for cached 
physical address 0-0.5GB, and kseg1, 0.5GB uncached mapping of the same area. 
  You can map another 1GB of RAM into kseg2/3, but you will then have no space 
left for IO.

So you really can't do 1.5GB on 32 bit kernel.

It is interesting that PPC allows one to adjust user space size and kernel 
space size.  So on PPC you can get up to 2.5GB system RAM with 1GB user space.

Back to 64bit port, it seems to me much of the 32bit work we have done in the 
past a year or so needs to be moved over.  Or better yet, if we can clean up 
integer/long issues, we might be able to use 32bit kernel code straight for 
64bit kernel.


Jun



From owner-linux-mips@oss.sgi.com Wed May 15 15:08:42 2002
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From: "Matthew Dharm" <mdharm@momenco.com>
To: <kwalker@broadcom.com>
Cc: "Linux-MIPS" <linux-mips@oss.sgi.com>
Subject: RE: MIPS 64?
Date: Wed, 15 May 2002 15:08:05 -0700
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I don't suppose anyone has a primer or white paper on the High Memory
stuff?  i.e. Applications, requirements, or a quick HOWTO?

Matt

--
Matthew D. Dharm                            Senior Software Designer
Momentum Computer Inc.                      1815 Aston Ave.  Suite 107
(760) 431-8663 X-115                        Carlsbad, CA 92008-7310
Momentum Works For You                      www.momenco.com

> -----Original Message-----
> From: kwalker@broadcom.com [mailto:kwalker@broadcom.com]
> Sent: Wednesday, May 15, 2002 2:56 PM
> To: Matthew Dharm
> Cc: Linux-MIPS
> Subject: Re: MIPS 64?
>
>
>
> Since traditionally the mips kernel could only manage RAM
> reachable by
> Kseg you were limited to 512MB, right?  But now the High
> Memory stuff is
> stable enough that you can reach any RAM that's physically
> addressable
> in 32-bits.  And after that, there's the 64bit-physical-address
> extension which allows you to reach physical pages that
> need > 32-bits
> to address.
>
> Kip
>
> Daniel Jacobowitz wrote:
> >
> > On Wed, May 15, 2002 at 02:34:47PM -0700, Matthew Dharm wrote:
> > > So... I'm looking at porting Linux to a system with
> 1.5GiB of RAM.
> > > That kinda blows the 32-bit MIPS port option right out
> of the water...
> >
> > Not unless you count bits differently than I do... 32-bit
> is 4 GiB.  Is
> > there any reason MIPS has special problems in this area?
> >
> > >
> > > What does it take to do a 64-bit port?  The first
> problem I see is the
> > > boot loader -- do I have to be in 64-bit mode when the
> kernel starts,
> > > or can I start in 32-bit mode and then transfer to 64-bit mode?
> > >
> > > I looked in the arch/mips64/ directory, but I don't see much for
> > > specific boards there, but there are references to the Malta
> > > boards....
> > >
> > > Matt
> > >
> > > --
> > > Matthew D. Dharm                            Senior
> Software Designer
> > > Momentum Computer Inc.                      1815 Aston
> Ave.  Suite 107
> > > (760) 431-8663 X-115                        Carlsbad,
> CA 92008-7310
> > > Momentum Works For You                      www.momenco.com
> > >
> > >
> >
> > --
> > Daniel Jacobowitz                           Carnegie
> Mellon University
> > MontaVista Software                         Debian
> GNU/Linux Developer
>


From owner-linux-mips@oss.sgi.com Wed May 15 15:14:43 2002
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Matthew Dharm wrote:
> 
> I don't suppose anyone has a primer or white paper on the High Memory
> stuff?  i.e. Applications, requirements, or a quick HOWTO?

Well, the CONFIG option is at the bottom of the Machine Selection menu. 
With a fairly recent 2.4 or 2.5 kernel, it should build at work. 
Basically, if your firmware/boot code conveys info about regions above
physical address 0x1fffffff, the kernel will allocate "struct page"
entries for it, and add them to the pool of allocatable memory.  The
kernel gets at them by mapping them into Kseg2/Kseg3 temporarily.

turn it on, see what happens!  I haven't looked for a primer.

Kip


From owner-linux-mips@oss.sgi.com Wed May 15 15:17:16 2002
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From: "Matthew Dharm" <mdharm@momenco.com>
To: "Jun Sun" <jsun@mvista.com>, "Daniel Jacobowitz" <dan@debian.org>
Cc: "Linux-MIPS" <linux-mips@oss.sgi.com>
Subject: RE: MIPS 64?
Date: Wed, 15 May 2002 15:16:29 -0700
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I personally think it's long overdue that we really invest some
time/effort in the 64-bit version.  I mean, anything past 0.5 GiB is
really a hack on 32-bit....

I, for one, am willing to lend a pair of hands to this... but I need
to know what needs doing, first.

Could someone give me an overview of how you're supposed to do a
handoff between a 32-bit loader and a 64-bit app?  I'm guessing there
has to be a way to do it, but what I do know about the 64-bit stuff
doesn't show me how this is accomplished (I have visions of UX bits
floating in my head...)

Matt

--
Matthew D. Dharm                            Senior Software Designer
Momentum Computer Inc.                      1815 Aston Ave.  Suite 107
(760) 431-8663 X-115                        Carlsbad, CA 92008-7310
Momentum Works For You                      www.momenco.com

> -----Original Message-----
> From: owner-linux-mips@oss.sgi.com
> [mailto:owner-linux-mips@oss.sgi.com]On Behalf Of Jun Sun
> Sent: Wednesday, May 15, 2002 3:00 PM
> To: Daniel Jacobowitz
> Cc: Matthew Dharm; Linux-MIPS
> Subject: Re: MIPS 64?
>
>
> Daniel Jacobowitz wrote:
>
> > On Wed, May 15, 2002 at 02:34:47PM -0700, Matthew Dharm wrote:
> >
> >>So... I'm looking at porting Linux to a system with 1.5GiB of RAM.
> >>That kinda blows the 32-bit MIPS port option right out of
> the water...
> >>
> >
> > Not unless you count bits differently than I do... 32-bit
> is 4 GiB.  Is
> > there any reason MIPS has special problems in this area?
> >
>
>
> MIPS has lower 2GB fixed for user space.  Then you have
> kseg0, .5GB for cached
> physical address 0-0.5GB, and kseg1, 0.5GB uncached mapping
> of the same area.
>   You can map another 1GB of RAM into kseg2/3, but you will
> then have no space
> left for IO.
>
> So you really can't do 1.5GB on 32 bit kernel.
>
> It is interesting that PPC allows one to adjust user space
> size and kernel
> space size.  So on PPC you can get up to 2.5GB system RAM
> with 1GB user space.
>
> Back to 64bit port, it seems to me much of the 32bit work
> we have done in the
> past a year or so needs to be moved over.  Or better yet,
> if we can clean up
> integer/long issues, we might be able to use 32bit kernel
> code straight for
> 64bit kernel.
>
>
> Jun
>
>


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From: "Matthew Dharm" <mdharm@momenco.com>
To: "Kip Walker" <kwalker@broadcom.com>
Cc: "Linux-MIPS" <linux-mips@oss.sgi.com>
Subject: RE: MIPS 64?
Date: Wed, 15 May 2002 15:26:08 -0700
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Right....

So, how should my boot code convey that info?  With more
add_memory_region() calls?  Is that really all I need?

Matt

--
Matthew D. Dharm                            Senior Software Designer
Momentum Computer Inc.                      1815 Aston Ave.  Suite 107
(760) 431-8663 X-115                        Carlsbad, CA 92008-7310
Momentum Works For You                      www.momenco.com

> -----Original Message-----
> From: owner-linux-mips@oss.sgi.com
> [mailto:owner-linux-mips@oss.sgi.com]On Behalf Of Kip Walker
> Sent: Wednesday, May 15, 2002 3:15 PM
> To: Matthew Dharm
> Cc: Linux-MIPS
> Subject: Re: MIPS 64?
>
>
> Matthew Dharm wrote:
> >
> > I don't suppose anyone has a primer or white paper on the
> High Memory
> > stuff?  i.e. Applications, requirements, or a quick HOWTO?
>
> Well, the CONFIG option is at the bottom of the Machine
> Selection menu.
> With a fairly recent 2.4 or 2.5 kernel, it should build at work.
> Basically, if your firmware/boot code conveys info about
> regions above
> physical address 0x1fffffff, the kernel will allocate "struct page"
> entries for it, and add them to the pool of allocatable memory.  The
> kernel gets at them by mapping them into Kseg2/Kseg3 temporarily.
>
> turn it on, see what happens!  I haven't looked for a primer.
>
> Kip
>


From owner-linux-mips@oss.sgi.com Wed May 15 15:28:41 2002
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To: "Matthew Dharm" <mdharm@momenco.com>
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Subject: Re: MIPS 64?
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Yes... in my environment, I have firmware calls to find out what
physical memory exists, then I call add_memory_region as necessary.  See
arch/mips/sibyte/swarm/setup.c if you're interested.  Nothing too
interesting about it.

Kip

Matthew Dharm wrote:
> 
> Right....
> 
> So, how should my boot code convey that info?  With more
> add_memory_region() calls?  Is that really all I need?
> 
> Matt
> 
> --
> Matthew D. Dharm                            Senior Software Designer
> Momentum Computer Inc.                      1815 Aston Ave.  Suite 107
> (760) 431-8663 X-115                        Carlsbad, CA 92008-7310
> Momentum Works For You                      www.momenco.com
> 
> > -----Original Message-----
> > From: owner-linux-mips@oss.sgi.com
> > [mailto:owner-linux-mips@oss.sgi.com]On Behalf Of Kip Walker
> > Sent: Wednesday, May 15, 2002 3:15 PM
> > To: Matthew Dharm
> > Cc: Linux-MIPS
> > Subject: Re: MIPS 64?
> >
> >
> > Matthew Dharm wrote:
> > >
> > > I don't suppose anyone has a primer or white paper on the
> > High Memory
> > > stuff?  i.e. Applications, requirements, or a quick HOWTO?
> >
> > Well, the CONFIG option is at the bottom of the Machine
> > Selection menu.
> > With a fairly recent 2.4 or 2.5 kernel, it should build at work.
> > Basically, if your firmware/boot code conveys info about
> > regions above
> > physical address 0x1fffffff, the kernel will allocate "struct page"
> > entries for it, and add them to the pool of allocatable memory.  The
> > kernel gets at them by mapping them into Kseg2/Kseg3 temporarily.
> >
> > turn it on, see what happens!  I haven't looked for a primer.
> >
> > Kip
> >


From owner-linux-mips@oss.sgi.com Wed May 15 15:51:50 2002
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From: "Luke A. Guest" <laguest@nebulas.demon.co.uk>
To: linux-mips@oss.sgi.com
Subject: Indigo2 status
Date: Wed, 15 May 2002 23:53:31 +0100
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Hi,

I was just wondering about the I2 graphic board situtation. AFAIK, there is 
currently no working code for them (although someon just posted a patch for 
ARC PROM console).

I was wondering whether it is actually possible to write the necessary 
drivers, i.e. Are there people in SGI that are capable of giving the 
information necessary, considering that there are no documents available?

Thanks,
Luke.

From owner-linux-mips@oss.sgi.com Wed May 15 16:38:34 2002
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To: "Luke A. Guest" <laguest@nebulas.demon.co.uk>
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On Wed, May 15, 2002 at 11:53:31PM +0100, Luke A. Guest wrote:
> drivers, i.e. Are there people in SGI that are capable of giving the=20
> information necessary, considering that there are no documents available?

As long as nobody knows whats going on in Hard/Software noone can sue you
over patent or copyright violation.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From owner-linux-mips@oss.sgi.com Wed May 15 20:30:02 2002
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Date: Wed, 15 May 2002 23:28:18 -0400
From: Dan Malek <dan@embeddededge.com>
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Subject: Re: MIPS 64?
References: <NEBBLJGMNKKEEMNLHGAIOEPPCGAA.mdharm@momenco.com> <20020515214818.GA1991@nevyn.them.org> <3CE2DA46.3070402@mvista.com>
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Jun Sun wrote:

> So you really can't do 1.5GB on 32 bit kernel.
> 
> It is interesting that PPC allows one to adjust user space size and 
> kernel space size.  So on PPC you can get up to 2.5GB system RAM with 
> 1GB user space.

Don't be confusing virtual/physical addressing.  The highmem stuff allows
access to larger physical address space by providing "windows" through
the virtual space.  The memory space configuration on PPC was done before
highmem was working properly, but it has remained as an embedded configuration
option.  When using highmem, you obviously can't map all of the physical
memory at once, so your applications and drivers have to coordinate what
is mapped at a single instance.  The PPC configuration option gives us a
little flexibility to allow a little more kernel mapping for drivers when
it is necessary (or to work around weird I/O mapping problems).

Thanks.


	-- Dan


From owner-linux-mips@oss.sgi.com Wed May 15 23:54:03 2002
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Message-ID: <3CE3578C.CF29A2D6@mips.com>
Date: Thu, 16 May 2002 08:54:04 +0200
From: Carsten Langgaard <carstenl@mips.com>
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To: Ken Aaker <kenaaker@silverbacksystems.com>
CC: linux-mips@oss.sgi.com
Subject: Re: Mangled struct hd_driveid with MIPSEB.
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I send Ralf a fix a couple of weeks ago, which introduced the byteswapping,
which really is necessary.
This fix is probably only necessary for bigendian systems with large IDE
disks (>8GB), which support LBA mode.
I send this patch over a year ago. I discovered that when I ran on a disk,
which was larger than 8GB, it was only treated as 8GB.
The problem with the fix is, it is not backward compatible. After the fix
I needed to reinstall my bigendian system.
As I told Ralf, this fix will be a pain for everyone, but I guess we need
the fix eventually.

If you don't want to reinstall your system then get rid of the code in the
"ifdef __MIPSEB__" statements in include/asm-mips/ide.h

/Carsten


Ken Aaker wrote:

> I've just run across an interesting problem building a big-endian MIPS
> kernel against the kernel source from the cvs tree. When the drive
> identity record is presented to the ide_fix_driveid() function in
> include/asm-mips/ide.h, it looks like its been byteswapped in 16 bit
> chunks. Needless to say, this causes a certain amount of confusion.  I
> tried following the process back to the point where the data is read in,
> but I failed to find anything that seemed to be explicitly swapping the
> code. The older kernel that I have 2.4.3 works Ok, so it's something
> that's happened recently.  Here's a little bit of debug information that
> I collected.. I messed around with the ide_fix_driveid function till I
> got the system to work, but I'm be embarassed to see that code escape
> into the wild.
>
> This is a dump of the id record before the call to ide_fix_driveid() in
> the 2.4.3 kernel.
> 0000: 7a42ff3f 00001000 00e15802 3f001000   "zB.?......X.?..."
> 0010: 00000e00 4457572d 41435441 34343430   "....DWW.ACTA4440"
> 0020: 33340034 00000000 03000010 28003630   "34.4..........60"
> 0030: 302e4734 36304457 20434457 30334530   "0.G460DW.CDW03E0"
> 0040: 2d423030 50433046 20202020 20202020   ".B00PC0F........"
> 0050: 20202020 20202020 20202020 20201080   "................"
> 0060: 0000002f 01408002 00000700 ff3f1000   ".....@.......?.."
> 0070: 3f0010fc fb000001 80ac7e03 00000704   "?.........~....."
> 0080: 03007800 78007800 78000000 00000000   "..x.x.x.x......."
> 0090: 00000000 00000000 00000000 00000000   "................"
> 00a0: 3e000000 6b34014b 00406934 01080040   ">...k4.K.@i4...@"
> 00b0: 3f000000 00000000 00004b60 fe800000   "?.........K`...."
> 00c0: 00000000 00000000 00000000 00000000   "................"
> 00d0: 00000000 00000000 00000000 00000000   "................"
> 00e0: 00000000 00000000 00000000 00000000   "................"
> 00f0: 00000000 00000000 00000000 00000000   "................"
> 0100: 01000000 00000000 00003300 00000000   "..........3....."
> 0110: 00000000 00000000 00000000 00000000   "................"
> 0120: 00000000 00000000 00000000 00000000   "................"
> 0130: 00000000 00000000 00000000 00001f00   "................"
> 0140: 00000000 00000000 00000000 00000000   "................"
> 0150: 00000000 00000000 00000000 00000000   "................"
> 0160: 00000000 00000000 00000000 00000000   "................"
> 0170: 00000000 00000000 00000000 00000000   "................"
> 0180: 00000000 00000000 00000000 00000000   "................"
> 0190: 00000000 00000000 00000000 00000000   "................"
> 01a0: 00000000 00000000 00000000 00000000   "................"
> 01b0: 00000000 00000000 00000000 00000000   "................"
> 01c0: 00000000 00000000 00000000 00000000   "................"
> 01d0: 00000000 00000000 00000000 00000000   "................"
> 01e0: 00000000 00000000 00000000 00000000   "................"
> 01f0: 00000000 00000000 00000000 0000a56e   "...............n"
>
> This is a dump of the id record before the call to ide_fix_drived() in
> the 2.4.18 kernel from cvs.
>
> 0000: 427a3fff 00000010 e1000258 003f0010   "Bz?........X.?.."
> 0010: 0000000e 57442d57 43414154 34343034   "....WD.WCAAT4404"
> 0020: 34333400 00000000 00031000 00283036   "434...........06"
> 0030: 2e303447 30365744 43205744 33303045   ".04G06WDC.WD300E"
> 0040: 422d3030 43504630 20202020 20202020   "B.00CPF0........"
> 0050: 20202020 20202020 20202020 20208010   "................"
> 0060: 00002f00 40010280 00000007 3fff0010   "....@.......?..."
> 0070: 003ffc10 00fb0100 ac80037e 00000407   ".?.........~...."
> 0080: 00030078 00780078 00780000 00000000   "...x.x.x.x......"
> 0090: 00000000 00000000 00000000 00000000   "................"
> 00a0: 003e0000 346b4b01 40003469 08014000   ".>..4kK.@.4i..@."
> 00b0: 003f0000 00000000 0000604b 80fe0000   ".?........`K...."
> 00c0: 00000000 00000000 00000000 00000000   "................"
> 00d0: 00000000 00000000 00000000 00000000   "................"
> 00e0: 00000000 00000000 00000000 00000000   "................"
> 00f0: 00000000 00000000 00000000 00000000   "................"
> 0100: 00010000 00000000 00000033 00000000   "...........3...."
> 0110: 00000000 00000000 00000000 00000000   "................"
> 0120: 00000000 00000000 00000000 00000000   "................"
> 0130: 00000000 00000000 00000000 0000001f   "................"
> 0140: 00000000 00000000 00000000 00000000   "................"
> 0150: 00000000 00000000 00000000 00000000   "................"
> 0160: 00000000 00000000 00000000 00000000   "................"
> 0170: 00000000 00000000 00000000 00000000   "................"
> 0180: 00000000 00000000 00000000 00000000   "................"
> 0190: 00000000 00000000 00000000 00000000   "................"
> 01a0: 00000000 00000000 00000000 00000000   "................"
> 01b0: 00000000 00000000 00000000 00000000   "................"
> 01c0: 00000000 00000000 00000000 00000000   "................"
> 01d0: 00000000 00000000 00000000 00000000   "................"
> 01e0: 00000000 00000000 00000000 00000000   "................"
> 01f0: 00000000 00000000 00000000 00006ea5   "..............n."
>
> --
> work -> kenaaker@silverbacksystems.com  (507) 289-6910 ext 1
> home -> kenaaker@screaminet.com

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Thu May 16 00:09:39 2002
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From: "Kevin D. Kissell" <kevink@mips.com>
To: "Jun Sun" <jsun@mvista.com>, "Daniel Jacobowitz" <dan@debian.org>
Cc: "Matthew Dharm" <mdharm@momenco.com>,
   "Linux-MIPS" <linux-mips@oss.sgi.com>
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Subject: Re: MIPS 64?
Date: Thu, 16 May 2002 09:15:40 +0200
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Jun Sun wrote:
> Daniel Jacobowitz wrote:
> 
> > On Wed, May 15, 2002 at 02:34:47PM -0700, Matthew Dharm wrote:
> > 
> >>So... I'm looking at porting Linux to a system with 1.5GiB of RAM.
> >>That kinda blows the 32-bit MIPS port option right out of the water...
> >>
> > 
> > Not unless you count bits differently than I do... 32-bit is 4 GiB.  Is
> > there any reason MIPS has special problems in this area?
> > 
> 
> 
> MIPS has lower 2GB fixed for user space.  Then you have kseg0, .5GB for cached 
> physical address 0-0.5GB, and kseg1, 0.5GB uncached mapping of the same area. 
>   You can map another 1GB of RAM into kseg2/3, but you will then have no space 
> left for IO.
> 
> So you really can't do 1.5GB on 32 bit kernel.

Is this to say that Linux cannot function unless all physical memory
on the system is mapped at all times into kernel space?  I would
have thought that (a) all that really needs to be mapped is all
memory used by the kernel itself, plus that of the currently active
process (which is mapped in the 2GB kuseg), and that (b) one 
could anyway manage kseg2 or 3 dynamically to provide a window 
into a larger physical memory, and that this window could be
used for any functions that need to do arbitrary phys-to-phys
copies.

I'm not sure what people's definition of a "64-bit kernel"
is around here, but to me, that's a kernel which supports
64-bit virtual addressing and 64-bit registers.  It strikes
me as being rather foolish to impose the overhead of all
that on people whose only real requirement is 2G of RAM
on a 32-bit CPU.  Particularly when many of the new
MIPS parts that could plausibly be connected to 2GB
RAM arrays, such as the Alchemy/AMD and MIPS 4K
parts, don't support 64-bit operation.  So running away
from the problem isn't really an option.

            Regards,

            Kevin K.


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Date: Thu, 16 May 2002 10:39:16 +0200 (MEST)
From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Carsten Langgaard <carstenl@mips.com>
cc: Ken Aaker <kenaaker@silverbacksystems.com>,
   Linux/MIPS Development <linux-mips@oss.sgi.com>
Subject: Re: Mangled struct hd_driveid with MIPSEB.
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On Thu, 16 May 2002, Carsten Langgaard wrote:
> I send Ralf a fix a couple of weeks ago, which introduced the byteswapping,
> which really is necessary.
> This fix is probably only necessary for bigendian systems with large IDE
> disks (>8GB), which support LBA mode.
> I send this patch over a year ago. I discovered that when I ran on a disk,
> which was larger than 8GB, it was only treated as 8GB.
> The problem with the fix is, it is not backward compatible. After the fix
> I needed to reinstall my bigendian system.
> As I told Ralf, this fix will be a pain for everyone, but I guess we need
> the fix eventually.

Why would you have to reinstall the system?
Isn't this just a problem with ide_fix_driveid() (new field for disks larger
than 8 GiB, which we don't byteswap yet)?

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


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Date: Thu, 16 May 2002 10:52:52 +0200
From: "Tommy S. Christensen" <tch@avanticore.com>
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To: Venkata Rajesh Bikkina <rajeshbv@intotoinc.com>
CC: Alan Cox <alan@lxorguk.ukuu.org.uk>, linux-mips@oss.sgi.com
Subject: Re: RAMDISK problem on 79s334A board.
References: <E177ypv-0001up-00@the-village.bc.nu>
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Alan Cox wrote:
> 
> > But the same module is working fine and kernel is also fine if i use NFS
> > and insert the module.
> > Any further info ?
> 
> Not really. The fact it works with NFS and not ramdisk may simply be that
> in one case it corrupts memory that is used, and the other it corrupts
> memory that isnt

Using a ramdisk increases the pressure on memory. So the difference could
be that one case hits the cache aliasing problem, the other doesn't.

Try this patch and see if it helps.

 -Tommy



Index: mm/vmalloc.c
===================================================================
RCS file: /cvs/linux/mm/vmalloc.c,v
retrieving revision 1.28
retrieving revision 1.28.2.1
diff -u -r1.28 -r1.28.2.1
--- mm/vmalloc.c        2001/10/19 01:25:06     1.28
+++ mm/vmalloc.c        2001/12/28 21:06:01     1.28.2.1
@@ -163,6 +163,7 @@
                ret = 0;
        } while (address && (address < end));
        spin_unlock(&init_mm.page_table_lock);
+       flush_cache_all();
        return ret;
 }

From owner-linux-mips@oss.sgi.com Thu May 16 03:07:42 2002
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Date: Thu, 16 May 2002 12:06:37 +0200
From: Carsten Langgaard <carstenl@mips.com>
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To: Geert Uytterhoeven <geert@linux-m68k.org>
CC: Ken Aaker <kenaaker@silverbacksystems.com>,
   Linux/MIPS Development <linux-mips@oss.sgi.com>
Subject: Re: Mangled struct hd_driveid with MIPSEB.
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Geert Uytterhoeven wrote:

> On Thu, 16 May 2002, Carsten Langgaard wrote:
> > I send Ralf a fix a couple of weeks ago, which introduced the byteswapping,
> > which really is necessary.
> > This fix is probably only necessary for bigendian systems with large IDE
> > disks (>8GB), which support LBA mode.
> > I send this patch over a year ago. I discovered that when I ran on a disk,
> > which was larger than 8GB, it was only treated as 8GB.
> > The problem with the fix is, it is not backward compatible. After the fix
> > I needed to reinstall my bigendian system.
> > As I told Ralf, this fix will be a pain for everyone, but I guess we need
> > the fix eventually.
>
> Why would you have to reinstall the system?
> Isn't this just a problem with ide_fix_driveid() (new field for disks larger
> than 8 GiB, which we don't byteswap yet)?

I'm trying to do things like other bigendian architectures. I can see your mail
address is linux-m68k and the fix is more or less stolen from the m68k part.

>
> Gr{oetje,eeting}s,
>
>                                                 Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                                             -- Linus Torvalds

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Thu May 16 03:28:03 2002
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Date: Thu, 16 May 2002 15:52:57 +0530 (IST)
From: Venkata Rajesh Bikkina <rajeshbv@intotoinc.com>
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To: "Tommy S. Christensen" <tch@avanticore.com>
cc: Alan Cox <alan@lxorguk.ukuu.org.uk>, linux-mips@oss.sgi.com
Subject: Re: RAMDISK problem on 79s334A board.
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Hi Tommy,

I am using 2.4.3 code and in that linux/mm/vmallo.c contains the following
code which is slightly different from the patch you gave.

        } while (address && (address < end));
        unlock_kernel();
        flush_tlb_all();
        return ret;

Can you please suggest how to modify this.

Regards,
--Rajesh

On Thu, 16 May 2002, Tommy S. Christensen wrote:

> Alan Cox wrote:
> > 
> > > But the same module is working fine and kernel is also fine if i use NFS
> > > and insert the module.
> > > Any further info ?
> > 
> > Not really. The fact it works with NFS and not ramdisk may simply be that
> > in one case it corrupts memory that is used, and the other it corrupts
> > memory that isnt
> 
> Using a ramdisk increases the pressure on memory. So the difference could
> be that one case hits the cache aliasing problem, the other doesn't.
> 
> Try this patch and see if it helps.
> 
>  -Tommy
> 
> 
> 
> Index: mm/vmalloc.c
> ===================================================================
> RCS file: /cvs/linux/mm/vmalloc.c,v
> retrieving revision 1.28
> retrieving revision 1.28.2.1
> diff -u -r1.28 -r1.28.2.1
> --- mm/vmalloc.c        2001/10/19 01:25:06     1.28
> +++ mm/vmalloc.c        2001/12/28 21:06:01     1.28.2.1
> @@ -163,6 +163,7 @@
>                 ret = 0;
>         } while (address && (address < end));
>         spin_unlock(&init_mm.page_table_lock);
> +       flush_cache_all();
>         return ret;
>  }
> 


From owner-linux-mips@oss.sgi.com Thu May 16 04:00:49 2002
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Date: Thu, 16 May 2002 12:57:41 +0200 (MEST)
From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Carsten Langgaard <carstenl@mips.com>
cc: Ken Aaker <kenaaker@silverbacksystems.com>,
   Linux/MIPS Development <linux-mips@oss.sgi.com>
Subject: Re: Mangled struct hd_driveid with MIPSEB.
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On Thu, 16 May 2002, Carsten Langgaard wrote:
> Geert Uytterhoeven wrote:
> > On Thu, 16 May 2002, Carsten Langgaard wrote:
> > > I send Ralf a fix a couple of weeks ago, which introduced the byteswapping,
> > > which really is necessary.
> > > This fix is probably only necessary for bigendian systems with large IDE
> > > disks (>8GB), which support LBA mode.
> > > I send this patch over a year ago. I discovered that when I ran on a disk,
> > > which was larger than 8GB, it was only treated as 8GB.
> > > The problem with the fix is, it is not backward compatible. After the fix
> > > I needed to reinstall my bigendian system.
> > > As I told Ralf, this fix will be a pain for everyone, but I guess we need
> > > the fix eventually.
> >
> > Why would you have to reinstall the system?
> > Isn't this just a problem with ide_fix_driveid() (new field for disks larger
> > than 8 GiB, which we don't byteswap yet)?
> 
> I'm trying to do things like other bigendian architectures. I can see your mail
> address is linux-m68k and the fix is more or less stolen from the m68k part.

However, I'm not sure anyone ever used a +8 GiB disk on Linux/m68k.

IIRC, LBA uses an extra field in the drive info struct, which was initially not
byteswapped. You can compare the MIPS/m68k ide_fix_driveid() with the version
on PPC, which most probably works correctly with +8 GiB disks.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From owner-linux-mips@oss.sgi.com Thu May 16 05:31:37 2002
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Date: Thu, 16 May 2002 14:30:45 +0200
From: "Tommy S. Christensen" <tch@avanticore.com>
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CC: linux-mips@oss.sgi.com
Subject: Re: RAMDISK problem on 79s334A board.
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Venkata Rajesh Bikkina wrote:
> 
> Hi Tommy,
> 
> I am using 2.4.3 code and in that linux/mm/vmallo.c contains the following
> code which is slightly different from the patch you gave.
> 
>         } while (address && (address < end));
>         unlock_kernel();
>         flush_tlb_all();
>         return ret;
> 
> Can you please suggest how to modify this.
> 
> Regards,
> --Rajesh
> 

2.4.3 is quite old, so upgrading the kernel would clearly be a good idea.

Anyway, if you want to try this fix then you should remove the call to
flush_cache_all() at the top of vmalloc_area_pages() and change the line
flush_tlb_all() to flush_cache_all().

 -Tommy

From owner-linux-mips@oss.sgi.com Thu May 16 07:33:55 2002
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Date: Thu, 16 May 2002 16:34:10 +0200
From: Guido Guenther <agx@sigxcpu.org>
To: ralf@gnu.org
Cc: linux-mips@oss.sgi.com
Subject: Re: howto pass ramdisk loaddress to kernel
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--KsGdsel6WgEHnImy
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On Tue, May 07, 2002 at 12:32:49PM +0200, Guido Guenther wrote:
> Hi,
> in order to get rid of some ip22 specific hacks in setup.c as well as
> addinitrd/elf2ecoff I've written a small tool that links kernel+initrd
> as type "binary" into the data segment of the bootloader. This file can
> then be fetched by the prom via tftp(or from a CD or whatever). The
> bootloader copies the kernel to its loaddress and puts the initrd just
> after the kernel.
> My question is now: how do i properly pass the initrd's memory address
> to the kernel? Choices are:
> 1) on the commandline: rd_start=0x...
> 2) a bootparameter block like on i386 or sparc in head.S
> 3) rely on the kernel to identify if a radisk has
>   been loaded by a magic number
Attached is a patch that implements (1). Arguments used are rd_start &
rd_size. Ralf, please apply if suitable.
 -- Guido

--KsGdsel6WgEHnImy
Content-Type: text/plain; charset=us-ascii
Content-Disposition: attachment; filename="ramdisk-cmdline-2002-05-09.diff"

Index: arch/mips/kernel/setup.c
===================================================================
RCS file: /cvs/linux/arch/mips/kernel/setup.c,v
retrieving revision 1.96.2.12
diff -u -u -r1.96.2.12 setup.c
--- arch/mips/kernel/setup.c	2002/02/15 21:05:48	1.96.2.12
+++ arch/mips/kernel/setup.c	2002/05/10 18:32:09
@@ -650,6 +650,38 @@
 	}
 }
 
+static inline void parse_rd_cmdline(unsigned long* rd_start, unsigned long* rd_end)
+{
+	char c = ' ', *to = command_line, *from = saved_command_line;
+	int len = 0;
+	unsigned long rd_size = 0;
+
+	for (;;) {
+		/*
+		 * "rd_start=0xNNNNNNNN" defines the memory address of an initrd
+		 * "rd_size=0xNN" it's size
+		 */
+		if (c == ' ' && !memcmp(from, "rd_start=", 9)) {
+			if (to != command_line)
+				to--;
+			(*rd_start) = memparse(from + 9, &from);
+		}
+		if (c == ' ' && !memcmp(from, "rd_size=", 8)) {
+			if (to != command_line)
+				to--;
+			rd_size = memparse(from + 8, &from);
+		}
+		c = *(from++);
+		if (!c)
+			break;
+		if (CL_SIZE <= ++len)
+			break;
+		*(to++) = c;
+	}
+	*to = '\0';
+	(*rd_end) = (*rd_start) + rd_size;
+}
+
 void __init setup_arch(char **cmdline_p)
 {
 	void atlas_setup(void);
@@ -674,10 +706,7 @@
 
 	unsigned long bootmap_size;
 	unsigned long start_pfn, max_pfn, max_low_pfn, first_usable_pfn;
-#ifdef CONFIG_BLK_DEV_INITRD
-	unsigned long tmp;
-	unsigned long* initrd_header;
-#endif
+	unsigned long end = &_end;
 
 	int i;
 
@@ -828,22 +857,18 @@
 #define MAXMEM_PFN	PFN_DOWN(MAXMEM)
 
 #ifdef CONFIG_BLK_DEV_INITRD
-	tmp = (((unsigned long)&_end + PAGE_SIZE-1) & PAGE_MASK) - 8; 
-	if (tmp < (unsigned long)&_end) 
-		tmp += PAGE_SIZE;
-	initrd_header = (unsigned long *)tmp;
-	if (initrd_header[0] == 0x494E5244) {
-		initrd_start = (unsigned long)&initrd_header[2];
-		initrd_end = initrd_start + initrd_header[1];
+	parse_rd_cmdline(&initrd_start, &initrd_end);
+	if(initrd_start && initrd_end)
+		end = initrd_end;
+	else {
+		initrd_start = initrd_end = 0;
 	}
-	start_pfn = PFN_UP(__pa((&_end)+(initrd_end - initrd_start) + PAGE_SIZE));
-#else
+#endif /* CONFIG_BLK_DEV_INITRD */
 	/*
 	 * Partially used pages are not usable - thus
 	 * we are rounding upwards.
 	 */
-	start_pfn = PFN_UP(__pa(&_end));
-#endif	/* CONFIG_BLK_DEV_INITRD */
+	start_pfn = PFN_UP(__pa(end));
 
 	/* Find the highest page frame number we have available.  */
 	max_pfn = 0;

--KsGdsel6WgEHnImy--

From owner-linux-mips@oss.sgi.com Thu May 16 08:06:41 2002
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Date: Thu, 16 May 2002 10:07:02 -0500
From: Ken Aaker <kaaker@silverbacksystems.com>
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The problem with the difference isn't that it's byte swapped, its that 
the byte swapping isn't respecting the data types inside the structure. 
It fixes all of the "short" entities, but it re-orders the fields that 
happen to be two chars next to each other, and the "shorts" that are 
part of the two "ints" for lba capacity and capacity values are in the 
wrong order, even though the bytes within the "shorts" are in the right 
order. So, when the fixup code in ide.h is run, the values are still wrong.


old ----
0070: 3f0010fc fb000001 80ac7e03 00000704   "?.........~....."
0080: 03007800 78007800 78000000 00000000   "..x.x.x.x......."
new---
0070: 003ffc10 00fb0100 ac80037e 00000407   ".?.........~...."
0080: 00030078 00780078 00780000 00000000   "...x.x.x.x......"

proper--- (after fix up).
0070: 003f00fb fc100001 037eac80 00000407   ".?.......~......"
0080: 00030078 00780078 00780000 00000000   "...x.x.x.x......"


Ken


From owner-linux-mips@oss.sgi.com Thu May 16 10:16:29 2002
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Date: Thu, 16 May 2002 10:13:30 -0700
From: Jun Sun <jsun@mvista.com>
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   Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: MIPS 64?
References: <NEBBLJGMNKKEEMNLHGAIOEPPCGAA.mdharm@momenco.com> <20020515214818.GA1991@nevyn.them.org> <3CE2DA46.3070402@mvista.com> <007a01c1fca9$86e14f70$10eca8c0@grendel>
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Kevin D. Kissell wrote:

> Jun Sun wrote:
> 
>>Daniel Jacobowitz wrote:
>>
>>
>>>On Wed, May 15, 2002 at 02:34:47PM -0700, Matthew Dharm wrote:
>>>
>>>
>>>>So... I'm looking at porting Linux to a system with 1.5GiB of RAM.
>>>>That kinda blows the 32-bit MIPS port option right out of the water...
>>>>
>>>>
>>>Not unless you count bits differently than I do... 32-bit is 4 GiB.  Is
>>>there any reason MIPS has special problems in this area?
>>>
>>>
>>
>>MIPS has lower 2GB fixed for user space.  Then you have kseg0, .5GB for cached 
>>physical address 0-0.5GB, and kseg1, 0.5GB uncached mapping of the same area. 
>>  You can map another 1GB of RAM into kseg2/3, but you will then have no space 
>>left for IO.
>>
>>So you really can't do 1.5GB on 32 bit kernel.
>>
> 
> Is this to say that Linux cannot function unless all physical memory
> on the system is mapped at all times into kernel space? I would
> have thought that (a) all that really needs to be mapped is all
> memory used by the kernel itself, plus that of the currently active
> process (which is mapped in the 2GB kuseg), and that (b) one 
> could anyway manage kseg2 or 3 dynamically to provide a window 
> into a larger physical memory, and that this window could be
> used for any functions that need to do arbitrary phys-to-phys
> copies.
> 


You are right - my above statement is a grossly simplified way of saying "You 
can't really have 1.5GB system RAM accessible to kernel at the same time on a 
32bit MIPS kernel".

There is nothing preventing you from having more physical RAM and use 
dynamically by using HIGHMEM support.

BTW, I have been under the impression that demand for larger system RAM mainly 
comes from large router/switches to store routing table.  Does anybody know on 
such systems whether the routing code runs in kernel or user space and whether 
  it requires all the memory space accessible at the same time or can live 
with dynamically managed memory space?

Jun


From owner-linux-mips@oss.sgi.com Fri May 17 05:40:47 2002
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Date: Fri, 17 May 2002 13:50:31 +0200
From: Carsten Langgaard <carstenl@mips.com>
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Subject: Hazard problem in tlb-r4k.c
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--------------8694013FE14C5535C2FAF4F3
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There seems to be a hazard problem in the local_flush_tlb_range function
in tlb-r4k.c, which the patch below will fix.
It could hit anyone, but it probably only a problem on CPUs, which
doesn't allow matching entries in the TLB.

/Carsten


--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
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Index: arch/mips/mm/tlb-r4k.c
===================================================================
RCS file: /cvs/linux/arch/mips/mm/tlb-r4k.c,v
retrieving revision 1.6.2.3
diff -u -r1.6.2.3 tlb-r4k.c
--- arch/mips/mm/tlb-r4k.c	2002/01/18 03:16:24	1.6.2.3
+++ arch/mips/mm/tlb-r4k.c	2002/05/17 11:36:58
@@ -119,12 +119,11 @@
 				idx = get_index();
 				set_entrylo0(0);
 				set_entrylo1(0);
-				set_entryhi(KSEG0);
 				if (idx < 0)
 					continue;
-				BARRIER;
 				/* Make sure all entries differ. */
 				set_entryhi(KSEG0+idx*0x2000);
+				BARRIER;
 				tlb_write_indexed();
 				BARRIER;
 			}

--------------8694013FE14C5535C2FAF4F3--


From owner-linux-mips@oss.sgi.com Fri May 17 07:04:13 2002
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Date: Fri, 17 May 2002 16:04:22 +0200 (CEST)
From: Kjeld Borch Egevang <kjelde@mips.com>
To: Mark Salter <msalter@redhat.com>
cc: linux-mips@oss.sgi.com
Subject: Re: math emulator patch
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I discovered that the fix (from last year) does not work for cvt.w.d of 
e.g. 0xc1e0000000000001. Here is a patch:

Index: dp_tint.c
===================================================================
RCS file: /cvs/linux/arch/mips/math-emu/dp_tint.c,v
retrieving revision 1.5
diff -u -r1.5 dp_tint.c
--- dp_tint.c   2001/12/02 14:21:29     1.5
+++ dp_tint.c   2002/05/17 13:58:03
@@ -49,10 +49,7 @@
        case IEEE754_CLASS_NORM:
                break;
        }
-       if (xe >= 31) {
-               /* look for valid corner case */
-               if (xe == 31 && xs && xm == DP_HIDDEN_BIT)
-                       return -2147483648;
+       if (xe > 31) {
                /* Set invalid. We will only use overflow for floating
                   point overflow */
                SETCX(IEEE754_INVALID_OPERATION);
@@ -98,7 +95,8 @@
                                xm++;
                        break;
                }
-               if ((xm >> 31) != 0) {
+               /* look for valid corner case 0x80000000 */
+               if ((xm >> 31) != 0 && (xs == 0 || xm != 0x80000000)) {
                        /* This can happen after rounding */
                        SETCX(IEEE754_INVALID_OPERATION);
                        return ieee754si_xcpt(ieee754si_indef(), "dp_tint", x);

/Kjeld


On Sat, 1 Dec 2001, Kjeld Borch Egevang wrote:

> Great. The same problem exists for sp_tlong.c and dp_tlong.c.
> 
> /Kjeld
> 
> On Thu, 29 Nov 2001, Mark Salter wrote:
> 
> > 
> > The following patch fixes the emulation of cvt.w.s and cvt.w.d for
> > values of -2147483648.
> > 
> > --Mark
> > 
> > 
> > Index: sp_tint.c
> > ===================================================================
> > RCS file: /cvs/linux/arch/mips/math-emu/sp_tint.c,v
> > retrieving revision 1.4
> > diff -u -p -5 -c -r1.4 sp_tint.c
> > cvs server: conflicting specifications of output style
> > *** sp_tint.c	2001/10/09 23:56:19	1.4
> > --- sp_tint.c	2001/11/29 19:14:58
> > *************** int ieee754sp_tint(ieee754sp x)
> > *** 48,57 ****
> > --- 48,60 ----
> >   	case IEEE754_CLASS_DNORM:
> >   	case IEEE754_CLASS_NORM:
> >   		break;
> >   	}
> >   	if (xe >= 31) {
> > + 		/* look for valid corner case */
> > + 		if (xe == 31 && xs && xm == SP_HIDDEN_BIT)
> > + 			return -2147483648;
> >   		/* Set invalid. We will only use overflow for floating
> >   		   point overflow */
> >   		SETCX(IEEE754_INVALID_OPERATION);
> >   		return ieee754si_xcpt(ieee754si_indef(), "sp_tint", x);
> >   	}
> > Index: dp_tint.c
> > ===================================================================
> > RCS file: /cvs/linux/arch/mips/math-emu/dp_tint.c,v
> > retrieving revision 1.4
> > diff -u -p -5 -c -r1.4 dp_tint.c
> > cvs server: conflicting specifications of output style
> > *** dp_tint.c	2001/10/09 23:56:18	1.4
> > --- dp_tint.c	2001/11/29 19:18:02
> > *************** int ieee754dp_tint(ieee754dp x)
> > *** 48,57 ****
> > --- 48,60 ----
> >   	case IEEE754_CLASS_DNORM:
> >   	case IEEE754_CLASS_NORM:
> >   		break;
> >   	}
> >   	if (xe >= 31) {
> > + 		/* look for valid corner case */
> > + 		if (xe == 31 && xs && xm == DP_HIDDEN_BIT)
> > + 			return -2147483648;
> >   		/* Set invalid. We will only use overflow for floating
> >   		   point overflow */
> >   		SETCX(IEEE754_INVALID_OPERATION);
> >   		return ieee754si_xcpt(ieee754si_indef(), "dp_tint", x);
> >   	}
> > 
> 
> 

-- 
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From owner-linux-mips@oss.sgi.com Fri May 17 20:05:15 2002
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Date: Fri, 17 May 2002 20:05:49 -0700 (PDT)
From: Michael Anburaj <michaelanburaj@yahoo.com>
Subject: cygwin for MIPS & ARM7
To: linux-mips@oss.sgi.com, linux-arm@lists.arm.linux.org.uk
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Hi,

I am trying to set-up cygwin tool chain (gcc, gdb,
gc++) on my Windows 98 for targets: ARM7 (EP7312) &
MIPS (ATLAS- 4Kc). This is get ecos running on these
platforms.

Is there free GNU tools (gcc,gdb, gc++) available for
these platforms on the net that can be used to build
ecos?
If so, please help me find them & install them &
sucessfuly build ecoa… This is just for serious hobby
purpose.

when responding cc to my ID: michaelanburaj@yahoo.com

Thanks a lot,
-Mike.


__________________________________________________
Do You Yahoo!?
LAUNCH - Your Yahoo! Music Experience
http://launch.yahoo.com

From owner-linux-mips@oss.sgi.com Fri May 17 23:36:21 2002
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Date: Fri, 17 May 2002 22:14:18 +0200
From: Eric LEBOEUF <eric.leboeuf@free.fr>
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Organization: MDS Forever
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Subject: Kernel snapshot ?
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Hello everybody,

I'm trying to get my indy to boot linux, but I've got some problem.

When I do compile my own kernel, it crash with this message:

----------------------------------------------------------------------

sda:<1>Unable to handle kernel paging request at virtual address 
00000000, epc == 880e7f3c, ra == 880e8120
Oops in fault.c:do_page_fault, line 205:
$0 : 00000000 1004cc00 bfbc0007 0000000b bfbc0003 bfbc0007 00000025 00000019
$8 : 88674a00 88596c80 00000001 886c25a0 00001000 00000001 00000050 00000000
$16: 00000000 bfbc0007 00000400 00000001 00000049 0000003a 1004cc00 88596c00
$24: 00000004 88596e18                   881a2000 881a3c88 00000001 880e8120
Hi : 00000000
Lo : 00000500
epc  : 880e7f3c    Not tainted
Status: 1004cc02
Cause : 0000000c
Proccess swapper (pid: 0, stackpage=881a2000)
Stack: bfbc0003 bfbc0007 00000001 88019c74 bfbc0003 bfbc0007 4748494a 
4b4c4d4e
        bfbc0003 bfbc0007 00000be0 0000003e bfbc0003 bfbc0007 881d654a 
00000002
        bfbc0007 88674a00 88596c80 00000001 880e8120 880e80f0 bfbc0003 
bfbc0007
        0000000c 0000003e 00000001 88596c80 bfbc0003 bfbc0007 88596c80 
00000080
        00000016 00000060 1004cc00 88596c80 00000001 8800b114 00000000 
00000000
        bfbc0003 ...
Call Trace: [<88019c74>] [<880e8120>] [<880e80f0>] [<8800b114>] 
[<880dee54>] [<880e86a4>]
[<880e9584>] [<8802386c>] [<880ddfe8>] [<880e7150>] [<880df1b4>] 
[<880def28>]
[<88018c90>] [<8800a48c>] [<88000d30>] [<880bd6fc>] [<8800b810>] 
[<880be218>]
[<880be200>] [<8800c024>] [<88005208>] [<880051dc>] [<8800280c>] 
[<88165480>]
[<88166dac>] [<880027d8>]

Code 00000000 0fa20034 90430000 <a2030000> 26100001 30c20080 1040ffe9 
8fbf0050 0a039ff8
Kernel panic: Aiee, killing interrupt handler!
In interrupt handler - not syncing

-----------------------------------------------------------------------

I did get a 2.4.1 kernel, which works, but do not have good support for 
scsi disks. How can I do to compile my how kernel ?

I've got the toolchain-20020423-1.i386.rpm on a RedHat 7.3

Thanks a lot !


Eric LEBOEUF



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Date: Sat, 18 May 2002 10:18:55 +0200
From: Florian Lohoff <flo@rfc822.org>
To: Eric LEBOEUF <eric.leboeuf@free.fr>
Cc: linux-mips@oss.sgi.com
Subject: Re: Kernel snapshot ?
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On Fri, May 17, 2002 at 10:14:18PM +0200, Eric LEBOEUF wrote:
> Hello everybody,
>=20
> I'm trying to get my indy to boot linux, but I've got some problem.
> When I do compile my own kernel, it crash with this message:

I guess you compiled HEAD from the oss.sgi.com cvs ? This is something
in the 2.5 area and not "ready to run(tm)" as at least the scsi driver
is broken and is known to oops on boot.

[ ... oops ... ]

> I did get a 2.4.1 kernel, which works, but do not have good support for=
=20
> scsi disks. How can I do to compile my how kernel ?

You need to get the linux_2_4 branch from the cvs - That one should
work.

Flo
PS: When sending in oopses please make shure you parse them through
    ksymoops with the correct System.map.
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From owner-linux-mips@oss.sgi.com Sat May 18 16:55:54 2002
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Date: Sun, 19 May 2002 01:56:23 +0200
From: Florian Zumbiehl <florz@gmx.de>
To: linux-mips@oss.sgi.com
Subject: SNI RM600
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Hi,

I last week had the pleasure to fiddle about a bit with an SNI RM600
(I hope it's not to my disadvantage to mention that it was at school,
but this fact might get important... ;-), though the pleasure was limited
a bit by the system installed on the machine being Reliant UNIX =;-)
So after all I thought it would be nice to install Linux (or some other
free OS, but Linux would be best for this environment I think) on this
machine.

After doing some research on the topic I came to the conclusion that
it wasn't a thing possible yet... :-/

As far as Woglinde (Henning Heinold or whatever name you know him under,
he pointed me to this ml) told me, the main problem in getting Linux
running on the RM600 is a lack of documentation - that's mostly all I
know. However I'd really like to get Linux running on the machine,
as I'd like to help with this - it's just that I currently don't have
much of a clue what to start with or whether it possibly is completely
pointless to try at all.

So, I'd appreciate quite much if you could just give me some hints on
what to read to get a clue or if you could tell me what the problems
are in getting Linux running on the RM600 and what you think it would
need to get around these problems, and possibly in which way I could
help you with this, or just whatever you think that it could be useful
for me ;-)

I'm sorry if this all has already been answered extensively - the
mailing list archive apparently isn't available atm, so I had no
chance to check it yet.

Also sorry if this mail looks a bit like I'm not totally clear
in my mind about what I'm writing about, actually that's just why
I'm doing so... ;-)

cyas, florz

From owner-linux-mips@oss.sgi.com Sun May 19 12:23:09 2002
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Date: Sun, 19 May 2002 12:23:37 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Matthew Dharm <mdharm@momenco.com>
Cc: Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: MIPS 64?
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On Wed, May 15, 2002 at 02:34:47PM -0700, Matthew Dharm wrote:

> So... I'm looking at porting Linux to a system with 1.5GiB of RAM.
> That kinda blows the 32-bit MIPS port option right out of the water...

Not really, there is still highmem though that certainly a sucky solution
as compared to a 64-bit kernel.

> What does it take to do a 64-bit port?  The first problem I see is the
> boot loader -- do I have to be in 64-bit mode when the kernel starts,
> or can I start in 32-bit mode and then transfer to 64-bit mode?

Same loader as before - the build procedure will result in a 32-bit kernel
binary which is loaded to the same old KSEG0 addresses.

> I looked in the arch/mips64/ directory, but I don't see much for
> specific boards there, but there are references to the Malta
> boards....

Exactly.  The aim is to support both kernels without replicating the board
support code.

  Ralf

From owner-linux-mips@oss.sgi.com Sun May 19 12:23:48 2002
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Date: Sun, 19 May 2002 12:24:19 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Daniel Jacobowitz <dan@debian.org>
Cc: Matthew Dharm <mdharm@momenco.com>, Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: MIPS 64?
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On Wed, May 15, 2002 at 05:48:18PM -0400, Daniel Jacobowitz wrote:

> On Wed, May 15, 2002 at 02:34:47PM -0700, Matthew Dharm wrote:
> > So... I'm looking at porting Linux to a system with 1.5GiB of RAM.
> > That kinda blows the 32-bit MIPS port option right out of the water...
> 
> Not unless you count bits differently than I do... 32-bit is 4 GiB.  Is
> there any reason MIPS has special problems in this area?

The basic assumption is that we can address all memory through KSEG0.

  Ralf

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From: Ralf Baechle <ralf@oss.sgi.com>
To: Matthew Dharm <mdharm@momenco.com>
Cc: kwalker@broadcom.com, Linux-MIPS <linux-mips@oss.sgi.com>
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On Wed, May 15, 2002 at 03:08:05PM -0700, Matthew Dharm wrote:

> I don't suppose anyone has a primer or white paper on the High Memory
> stuff?  i.e. Applications, requirements, or a quick HOWTO?

Same old technology as on Intel, so also the same old limitions ...

  Ralf

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Date: Sun, 19 May 2002 12:29:11 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Matthew Dharm <mdharm@momenco.com>
Cc: Kip Walker <kwalker@broadcom.com>, Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: MIPS 64?
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On Wed, May 15, 2002 at 03:26:08PM -0700, Matthew Dharm wrote:

> So, how should my boot code convey that info?  With more
> add_memory_region() calls?  Is that really all I need?

Yes.  At this time you just have to make sure you don't add_memory_region()
areas which aren't supported by your particular kernel configuration.  There
is also a second limit which is memory above physical address 4GB; if you
need that you have to enable CONFIG_64BIT_PHYS_ADDR as well.

  Ralf

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Date: Sun, 19 May 2002 12:30:59 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Jun Sun <jsun@mvista.com>
Cc: Daniel Jacobowitz <dan@debian.org>, Matthew Dharm <mdharm@momenco.com>,
   Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: MIPS 64?
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On Wed, May 15, 2002 at 02:59:34PM -0700, Jun Sun wrote:

> Back to 64bit port, it seems to me much of the 32bit work we have done in the 
> past a year or so needs to be moved over.  Or better yet, if we can clean up 
> integer/long issues, we might be able to use 32bit kernel code straight for 
> 64bit kernel.

Int vs. long was a very small issue as I discovered during porting for the
first 64-bit machines, the IP22 and IP27.

  Ralf

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From: Ralf Baechle <ralf@oss.sgi.com>
To: Matthew Dharm <mdharm@momenco.com>
Cc: Jun Sun <jsun@mvista.com>, Daniel Jacobowitz <dan@debian.org>,
   Linux-MIPS <linux-mips@oss.sgi.com>
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On Wed, May 15, 2002 at 03:16:29PM -0700, Matthew Dharm wrote:

> Could someone give me an overview of how you're supposed to do a
> handoff between a 32-bit loader and a 64-bit app?  I'm guessing there
> has to be a way to do it, but what I do know about the 64-bit stuff
> doesn't show me how this is accomplished (I have visions of UX bits
> floating in my head...)

If you're placing the kernel in KSEG0 like all other current targets are
doing then your 32-bit pointers are valid 64-bit pointers, no magic,
no thinking necessary.

  Ralf

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Date: Sun, 19 May 2002 12:41:03 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: "Kevin D. Kissell" <kevink@mips.com>
Cc: Jun Sun <jsun@mvista.com>, Daniel Jacobowitz <dan@debian.org>,
   Matthew Dharm <mdharm@momenco.com>, Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: MIPS 64?
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On Thu, May 16, 2002 at 09:15:40AM +0200, Kevin D. Kissell wrote:

> Is this to say that Linux cannot function unless all physical memory
> on the system is mapped at all times into kernel space?  I would
> have thought that (a) all that really needs to be mapped is all
> memory used by the kernel itself, plus that of the currently active
> process (which is mapped in the 2GB kuseg), and that (b) one 
> could anyway manage kseg2 or 3 dynamically to provide a window 
> into a larger physical memory, and that this window could be
> used for any functions that need to do arbitrary phys-to-phys
> copies.

Highmem is your dynamic 4MB window into all memory that's not low memory.
KSEG2/3 are currently mostly reserved for vmalloc / ioremap and these
4MB of highmem mapping space - a usage that's certainly wasteful.

As opposed to that all the permanently mapped kernel memory in Linux is
called lowmem.

> I'm not sure what people's definition of a "64-bit kernel"
> is around here, but to me, that's a kernel which supports
> 64-bit virtual addressing and 64-bit registers.  It strikes
> me as being rather foolish to impose the overhead of all
> that on people whose only real requirement is 2G of RAM
> on a 32-bit CPU.  Particularly when many of the new
> MIPS parts that could plausibly be connected to 2GB
> RAM arrays, such as the Alchemy/AMD and MIPS 4K
> parts, don't support 64-bit operation.  So running away
> from the problem isn't really an option.

Highmem doesn't come without a price either - in particular processes doing
heavy I/O will possibly as much as 40% performance penalty (numbers from
Intel systems) and for sanity's sake - 64-bit is keeping people from going
nuts :)

A solution that will use most of KSEG2/3 for mapping more lowmemory is in
the works but it turned out to be drastically more complex that originally
thought so will still take a bit.

  Ralf

From owner-linux-mips@oss.sgi.com Sun May 19 12:44:04 2002
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Date: Sun, 19 May 2002 12:44:35 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Jun Sun <jsun@mvista.com>
Cc: "Kevin D. Kissell" <kevink@mips.com>, Daniel Jacobowitz <dan@debian.org>,
   Matthew Dharm <mdharm@momenco.com>, Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: MIPS 64?
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On Thu, May 16, 2002 at 10:13:30AM -0700, Jun Sun wrote:

> BTW, I have been under the impression that demand for larger system RAM
> mainly comes from large router/switches to store routing table.  Does
> anybody know on such systems whether the routing code runs in kernel or
> user space and whether it requires all the memory space accessible at
> the same time or can live with dynamically managed memory space?

Kernel routing is more for the lower end systems; the highend systems use
hardware assisted routing / switching where software only handles the
boundary cases; such software might either live in user or in kernel space.

  Ralf

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Date: Sun, 19 May 2002 23:05:52 -0700
From: Matthew Dharm <mdharm@momenco.com>
To: Ralf Baechle <ralf@oss.sgi.com>
Cc: Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: MIPS 64?
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On Sun, May 19, 2002 at 12:23:37PM -0700, Ralf Baechle wrote:
> On Wed, May 15, 2002 at 02:34:47PM -0700, Matthew Dharm wrote:
> > What does it take to do a 64-bit port?  The first problem I see is the
> > boot loader -- do I have to be in 64-bit mode when the kernel starts,
> > or can I start in 32-bit mode and then transfer to 64-bit mode?
> 
> Same loader as before - the build procedure will result in a 32-bit kernel
> binary which is loaded to the same old KSEG0 addresses.

Call me a bit slow, but...

Are you saying that my 32-bit loader (which is designed to load a 32-bit
ELF file) will do exactly that... but this 32-bit ELF file has the magic in
it to switch to 64-bit internally?

Nice... Very nice.  I'm used to slick Open Source solutions, but I have to
admit that this is a pretty elegant one that solves a great many
problems...

Matt

-- 
Matthew Dharm                              Work: mdharm@momenco.com
Senior Software Designer, Momentum Computer


From owner-linux-mips@oss.sgi.com Mon May 20 03:05:42 2002
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Date: Mon, 20 May 2002 12:06:45 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Ralf Baechle <ralf@oss.sgi.com>
cc: Jun Sun <jsun@mvista.com>, Daniel Jacobowitz <dan@debian.org>,
   Matthew Dharm <mdharm@momenco.com>, Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: MIPS 64?
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On Sun, 19 May 2002, Ralf Baechle wrote:

> Int vs. long was a very small issue as I discovered during porting for the
> first 64-bit machines, the IP22 and IP27.

 Well, the surprise is going to happen in drivers, I'm afraid...

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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From: Greg Lindahl <lindahl@keyresearch.com>
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Subject: Re: MIPS 64?
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On Mon, May 20, 2002 at 12:06:45PM +0200, Maciej W. Rozycki wrote:

>  Well, the surprise is going to happen in drivers, I'm afraid...

Linux drivers as a whole are 64-bit clean; alpha's been around for a
long time. MIPS-only devices might be dirtier.

greg


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From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Greg Lindahl <lindahl@keyresearch.com>
cc: Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: MIPS 64?
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On Mon, 20 May 2002, Greg Lindahl wrote:

> >  Well, the surprise is going to happen in drivers, I'm afraid...
> 
> Linux drivers as a whole are 64-bit clean; alpha's been around for a
> long time. MIPS-only devices might be dirtier.

 Well, that is wishful thinking.  Obviously if a driver is actually used
on a 64-bit system, one can be moderately confident the driver is clean,
although there might still be corner cases.  Otherwise expect all kinds of
weirdness.  See e.g. the ISA stuff.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Mon May 20 10:42:10 2002
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From: "David D. McCoach" <ddm@wmi.com>
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Subject: 2.4.3 bss alignment bug
Date: Mon, 20 May 2002 13:43:21 -0400
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Does anyone know of a bug the cause an unaligned access in the kernel when
the alignment
of the bss segment os changed?

Thanks


From owner-linux-mips@oss.sgi.com Mon May 20 12:05:09 2002
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	Mon, 20 May 2002 12:05:52 -0700
Date: Mon, 20 May 2002 12:05:52 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc: Jun Sun <jsun@mvista.com>, Daniel Jacobowitz <dan@debian.org>,
   Matthew Dharm <mdharm@momenco.com>, Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: MIPS 64?
Message-ID: <20020520120552.C14066@dea.linux-mips.net>
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On Mon, May 20, 2002 at 12:06:45PM +0200, Maciej W. Rozycki wrote:

> > Int vs. long was a very small issue as I discovered during porting for the
> > first 64-bit machines, the IP22 and IP27.
> 
>  Well, the surprise is going to happen in drivers, I'm afraid...

That depends on how much people were thinking ahead when writing drivers.

  Ralf

From owner-linux-mips@oss.sgi.com Mon May 20 12:23:41 2002
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Date: Mon, 20 May 2002 12:24:18 -0700 (PDT)
From: Krishna Kondaka <krishna@Sanera.net>
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Hi,
	When I try to look at this mailing list archive at
	http://oss.sgi.com/mips/archive, I am getting "You don't have
	permission to access /mips/archive on this server" error. I
	was previously able to access this archive and only recently I
	am getting this error. Is there any other place where I can
	access the archive?

Thanks
Krishna Kondaka
Sanera Systems


From owner-linux-mips@oss.sgi.com Mon May 20 13:30:13 2002
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Date: Mon, 20 May 2002 13:30:56 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Matthew Dharm <mdharm@momenco.com>
Cc: Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: MIPS 64?
Message-ID: <20020520133056.D14066@dea.linux-mips.net>
References: <NEBBLJGMNKKEEMNLHGAIOEPPCGAA.mdharm@momenco.com> <20020519122336.A20670@dea.linux-mips.net> <20020519230552.A17175@momenco.com>
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On Sun, May 19, 2002 at 11:05:52PM -0700, Matthew Dharm wrote:

> > > What does it take to do a 64-bit port?  The first problem I see is the
> > > boot loader -- do I have to be in 64-bit mode when the kernel starts,
> > > or can I start in 32-bit mode and then transfer to 64-bit mode?
> > 
> > Same loader as before - the build procedure will result in a 32-bit kernel
> > binary which is loaded to the same old KSEG0 addresses.
> 
> Call me a bit slow, but...
> 
> Are you saying that my 32-bit loader (which is designed to load a 32-bit
> ELF file) will do exactly that... but this 32-bit ELF file has the magic in
> it to switch to 64-bit internally?
> 
> Nice... Very nice.  I'm used to slick Open Source solutions, but I have to
> admit that this is a pretty elegant one that solves a great many
> problems...

It's a fairly natural solution to the problem we had.  The scenario we had
to deal with was

 - a machine (SGI Origin 200/2000 aka IP27) where configurations are
   commonly way too large for a 32-bit kernel.
 - 64-bit MIPS/ELF support that was close to entierly unusable
 - fixing binutils fully would have taken a serious amount of time which
   we didn't have.

As it turned out gas is perfectly able to assemble the assembler code that
is generated for the N64 ABI by gcc into 32-bit ELF and linking that.
That code model still uses 64-bit pointers just all intra-kernel refernces
that were generated from la or dla macros get expanded into just the
two instruction sequence for 32-bit code, not the upto 7 instruction used
for 64-bit code.  Result: much less tools work necessary yet better code.

  Ralf

From owner-linux-mips@oss.sgi.com Mon May 20 17:13:43 2002
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Date: Mon, 20 May 2002 17:13:20 -0700
From: William Jhun <wjhun@ayrnetworks.com>
To: linux-mips@oss.sgi.com
Subject: [PATCH] arch/mips/kernel/irq.c: do_IRQ() return value
Message-ID: <20020520171320.J20837@ayrnetworks.com>
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Though a comment in arch/i386/kernel/irq.c: do_IRQ() clearly states:

         * 0 return value means that this irq is already being
         * handled by some other CPU. (or is disabled)

it seems that the function can only ever return (1). We wrote some low-level
interrupt handling code that depends on the correct value of this function.
Is the following patch what was initially desired? Clearly this code came
from (or vice-versa) arch/i386/kernel/irq.c. I've sent a patch out for that
version to linux-kernel.

Thanks,
William Jhun

Index: arch/mips/kernel/irq.c
===================================================================
RCS file: /cvs/linux/arch/mips/kernel/irq.c,v
retrieving revision 1.38.2.6
diff -c -r1.38.2.6 irq.c
*** arch/mips/kernel/irq.c	2002/05/15 20:41:13	1.38.2.6
--- arch/mips/kernel/irq.c	2002/05/21 00:10:11
***************
*** 488,494 ****
  
  	if (softirq_pending(cpu))
  		do_softirq();
! 	return 1;
  }
  
  /**
--- 488,494 ----
  
  	if (softirq_pending(cpu))
  		do_softirq();
! 	return (action != NULL);
  }
  
  /**

From owner-linux-mips@oss.sgi.com Mon May 20 18:42:21 2002
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Date: Mon, 20 May 2002 18:41:51 -0700
From: William Jhun <wjhun@ayrnetworks.com>
To: linux-mips@oss.sgi.com
Subject: [PATCH] arch/mips/kernel/irq_cpu.c interrupt safety?
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The mips_cpu_irq_*() routines in arch/mips/kernel/irq_cpu.c seem to not be
safe; {clear,set}_cp0_*() don't provide interrupt safety while changing the cp0
register. Is this not wrong? Is there a case where an interrupt handler may
change CP0 status? If so, the patch below (against linux_2_4) simply disables
interrupts during these operations.

Thanks,
Will

---
Index: arch/mips/kernel/irq_cpu.c
===================================================================
RCS file: /cvs/linux/arch/mips/kernel/irq_cpu.c,v
retrieving revision 1.2.2.2
diff -c -r1.2.2.2 irq_cpu.c
*** arch/mips/kernel/irq_cpu.c	2002/04/09 02:27:12	1.2.2.2
--- arch/mips/kernel/irq_cpu.c	2002/05/21 01:16:30
***************
*** 31,45 ****
  
  static void mips_cpu_irq_enable(unsigned int irq)
  {
  	clear_cp0_cause( 1 << (irq - mips_cpu_irq_base + 8));
  	set_cp0_status(1 << (irq - mips_cpu_irq_base + 8));
  }
  
! static void mips_cpu_irq_disable(unsigned int irq)
  {
  	clear_cp0_status(1 << (irq - mips_cpu_irq_base + 8));
  }
  
  static unsigned int mips_cpu_irq_startup(unsigned int irq)
  {
  	mips_cpu_irq_enable(irq);
--- 31,56 ----
  
  static void mips_cpu_irq_enable(unsigned int irq)
  {
+ 	unsigned long flags;
+ 	save_and_cli(flags);
  	clear_cp0_cause( 1 << (irq - mips_cpu_irq_base + 8));
  	set_cp0_status(1 << (irq - mips_cpu_irq_base + 8));
+ 	restore_flags(flags);
  }
  
! static void __mips_cpu_irq_disable(unsigned int irq)
  {
  	clear_cp0_status(1 << (irq - mips_cpu_irq_base + 8));
  }
  
+ static void mips_cpu_irq_disable(unsigned int irq)
+ {
+ 	unsigned long flags;
+ 	save_and_cli(flags);
+ 	__mips_cpu_irq_disable(irq);
+ 	restore_flags(flags);
+ }
+ 
  static unsigned int mips_cpu_irq_startup(unsigned int irq)
  {
  	mips_cpu_irq_enable(irq);
***************
*** 51,63 ****
  
  static void mips_cpu_irq_ack(unsigned int irq)
  {
! 	/* although we attemp to clear the IP bit in cause reigster, I think
  	 * usually it is cleared by device (irq source)
  	 */
  	clear_cp0_cause(1 << (irq - mips_cpu_irq_base + 8));
  
  	/* disable this interrupt - so that we safe proceed to the handler */
! 	mips_cpu_irq_disable(irq);
  }
  
  static void mips_cpu_irq_end(unsigned int irq)
--- 62,78 ----
  
  static void mips_cpu_irq_ack(unsigned int irq)
  {
! 	unsigned long flags;
! 	save_and_cli(flags);
! 
! 	/* although we attempt to clear the IP bit in cause register, I think
  	 * usually it is cleared by device (irq source)
  	 */
  	clear_cp0_cause(1 << (irq - mips_cpu_irq_base + 8));
  
  	/* disable this interrupt - so that we safe proceed to the handler */
! 	__mips_cpu_irq_disable(irq);
! 	restore_flags(flags);
  }
  
  static void mips_cpu_irq_end(unsigned int irq)


From owner-linux-mips@oss.sgi.com Mon May 20 21:56:20 2002
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Date: Fri, 17 May 2002 02:15:54 +0200 (CEST)
From: Vivien Chappelier <vivien.chappelier@enst-bretagne.fr>
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To: linux-mips@oss.sgi.com
Subject: [PATCH] experimental O2 framebuffer driver
Message-ID: <Pine.LNX.4.21.0205170206240.25304-400000@melkor>
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Hi,

	Here are two patch for testing framebuffer support on O2.
	linux-O2-console.diff just adds dummy console/keyboard so that
virtual consoles can be compiled.
	linux-O2-fb.diff is an experimental O2 framebuffer driver based on
the sgivwfb driver. It currently supports 8 bit modes, except 800x600
(I tested 640x480,1024x768,1280x1024,1600x1200 @ 60Hz). 16 bit and 32 bit
modes have wrong colors, but the pixels are in the right place ;)
	Feel free to test... You'll probably need all other patches I've
sent to the list some time ago to get O2 booting.

	I've also included a patch needed to get the mips64 kernel compile
on r4k with the new icache functions, that I've just sent to Ralf too for
integration.
	Patches are against CVS/HEAD.

regards,
Vivien.

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--279724308-1159884594-1021594554=:25304--

From owner-linux-mips@oss.sgi.com Tue May 21 01:11:42 2002
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Date: Tue, 21 May 2002 10:12:14 +0200
From: Carsten Langgaard <carstenl@mips.com>
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To: Ken Aaker <kaaker@silverbacksystems.com>
CC: linux-mips@oss.sgi.com
Subject: Re: Mangled struct hd_driveid with MIPSEB.
References: <3CE2C834.2010302@silverbacksystems.com> <3CE3578C.CF29A2D6@mips.com> <3CE3CB16.1040503@silverbacksystems.com>
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I just noticed that Ralf hadn't merged in the full IDE patch I send, so that's
why it doesn't work for you.
Ralf has just checked in the rest yesterday, so try check out the latest
sources and see if that helps.

/Carsten


Ken Aaker wrote:

> The problem with the difference isn't that it's byte swapped, its that
> the byte swapping isn't respecting the data types inside the structure.
> It fixes all of the "short" entities, but it re-orders the fields that
> happen to be two chars next to each other, and the "shorts" that are
> part of the two "ints" for lba capacity and capacity values are in the
> wrong order, even though the bytes within the "shorts" are in the right
> order. So, when the fixup code in ide.h is run, the values are still wrong.
>
> old ----
> 0070: 3f0010fc fb000001 80ac7e03 00000704   "?.........~....."
> 0080: 03007800 78007800 78000000 00000000   "..x.x.x.x......."
> new---
> 0070: 003ffc10 00fb0100 ac80037e 00000407   ".?.........~...."
> 0080: 00030078 00780078 00780000 00000000   "...x.x.x.x......"
>
> proper--- (after fix up).
> 0070: 003f00fb fc100001 037eac80 00000407   ".?.......~......"
> 0080: 00030078 00780078 00780000 00000000   "...x.x.x.x......"
>
> Ken

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Tue May 21 09:49:37 2002
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Cc: Linux-MIPS <linux-mips@oss.sgi.com>
Subject: Re: MIPS 64?
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On Mon, May 20, 2002 at 08:57:44AM -0700, Greg Lindahl wrote:
> On Mon, May 20, 2002 at 12:06:45PM +0200, Maciej W. Rozycki wrote:
>=20
> >  Well, the surprise is going to happen in drivers, I'm afraid...
>=20
> Linux drivers as a whole are 64-bit clean; alpha's been around for a
> long time. MIPS-only devices might be dirtier.

Not really true - I just stumbled over the cyclades multiport driver
which says to work on alpha for a long time - But it doesnt on
Sparc64 due to the porters misunderstanding on typedefs for the=20
driver internals. (Alpha and i386 are happy with char irqs e.g.).

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From owner-linux-mips@oss.sgi.com Tue May 21 09:59:33 2002
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On Tue, May 21, 2002 at 06:47:30PM +0200, Florian Lohoff wrote:
> On Mon, May 20, 2002 at 08:57:44AM -0700, Greg Lindahl wrote:
> > On Mon, May 20, 2002 at 12:06:45PM +0200, Maciej W. Rozycki wrote:
> > 
> > >  Well, the surprise is going to happen in drivers, I'm afraid...
> > 
> > Linux drivers as a whole are 64-bit clean; alpha's been around for a
> > long time. MIPS-only devices might be dirtier.
> 
> Not really true - I just stumbled over the cyclades multiport driver
> which says to work on alpha for a long time - But it doesnt on
> Sparc64 due to the porters misunderstanding on typedefs for the 
> driver internals. (Alpha and i386 are happy with char irqs e.g.).

I must say I find this entire discussion bewildering: one example does
not mean that Linux drivers are not "as a whole" 64-bit clean.

Another poster thought that things like ISA and Turbochannel devices
were a counter-example. Well, no.

greg


From owner-linux-mips@oss.sgi.com Wed May 22 00:48:47 2002
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From: Carsten Langgaard <carstenl@mips.com>
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Subject: Does anyone have a 64-bit kernel running ?
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After fixing a lot of stuff, I finally got a 64-bit kernel up and run on
the Malta board.
But there are still a lot of things that doesn't work.
E.g. the read_rtc routine fails, because a "long" is 64-bit in the
kernel and 32-bit in the user application (I run on o32 compiled
userland).
If I replace all "longs" in the read_rtc routine with "integers" it
works fine, but then I will probably break things, once we got a n64
compiled userland.
NFS fails because of a checksum errors in some UDP packages.

Does anyone have any experience in the 64-bit kernel ?

/Carsten

--
_    _ ____  ___   Carsten Langgaard   Mailto:carstenl@mips.com
|\  /|||___)(___   MIPS Denmark        Direct: +45 4486 5527
| \/ |||    ____)  Lautrupvang 4B      Switch: +45 4486 5555
  TECHNOLOGIES     2750 Ballerup       Fax...: +45 4486 5556
                   Denmark             http://www.mips.com




From owner-linux-mips@oss.sgi.com Thu May 23 14:29:30 2002
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From: "Robert Rusek" <rrusek@teknuts.com>
To: <linux-mips@oss.sgi.com>
Subject: Executing IRIX binary ?
Date: Wed, 22 May 2002 16:01:07 -0700
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Is there anyway to run/execute irix 5/6 binaries in linux mips on an
Indy?  Good old Microsoft does not provide the source for it's frontpage
extensions, but they do provide a binary for IRIX.
 
Thanks
Rob.

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<DIV><SPAN class=3D363205922-22052002><FONT face=3D"Comic Sans MS" =
color=3D#008000=20
size=3D2>Is there anyway to run/execute irix 5/6 binaries in linux mips =
on an=20
Indy?&nbsp; Good old Microsoft does not provide the source for it's =
frontpage=20
extensions, but they do provide a binary for IRIX.</FONT></SPAN></DIV>
<DIV><SPAN class=3D363205922-22052002><FONT face=3D"Comic Sans MS" =
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<DIV><SPAN class=3D363205922-22052002><FONT face=3D"Comic Sans MS" =
color=3D#008000=20
size=3D2>Thanks</FONT></SPAN></DIV>
<DIV><SPAN class=3D363205922-22052002><FONT face=3D"Comic Sans MS" =
color=3D#008000=20
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From owner-linux-mips@oss.sgi.com Thu May 23 16:59:49 2002
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Date: Thu, 23 May 2002 16:59:27 -0700
From: William Jhun <wjhun@ayrnetworks.com>
To: linux-mips@oss.sgi.com
Subject: Re: Please disregard; was: [PATCH] arch/mips/kernel/irq_cpu.c interrupt safety?
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Please disregard this, I jumped the gun on this one. These routines are
only ever called from arch/mips/kernel/irq.c, which always safely
calls these routines under the irq_desc's spinlock (or in the case of
ack(), do_IRQ() is already invoked with interrupts turned off).

I'll be sure to grep a little more carefully next time. ;o)

Will

On Mon, May 20, 2002 at 06:41:51PM -0700, William Jhun wrote:
> The mips_cpu_irq_*() routines in arch/mips/kernel/irq_cpu.c seem to not be
> safe; {clear,set}_cp0_*() don't provide interrupt safety while changing the cp0
> register. Is this not wrong? Is there a case where an interrupt handler may
> change CP0 status? If so, the patch below (against linux_2_4) simply disables
> interrupts during these operations.
> 
> Thanks,
> Will

From owner-linux-mips@oss.sgi.com Fri May 24 05:03:08 2002
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Subject: Re: Executing IRIX binary ?
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From: hakon@ping.uio.no (Håkon Eriksen)
Date: 24 May 2002 14:04:01 +0200
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"Robert Rusek" <rrusek@teknuts.com> writes:

> Is there anyway to run/execute irix 5/6 binaries in linux mips on an
> Indy?  Good old Microsoft does not provide the source for it's frontpage
> extensions, but they do provide a binary for IRIX.

If FrontPage extensions is what you want, there are several ways of
getting this to run on linux. Microsoft may not supply the source, but
they do show you how to install it on Apache.
<URL:http://support.microsoft.com/default.aspx?scid=kb;EN-US;q202198> 
If this is not what you're looking for, try google.

-- 
 - håkon

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Date: Fri, 24 May 2002 18:16:09 -0400
From: Alexandr Andreev <andreev@niisi.msk.ru>
Organization: niisi
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Subject: 3 questions about linux-2.4.18 and R3000
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Hi, list.
I have three little questions with linux-2.4.18 on my machine.

My configuration is:
MIPS R3000, linux-2.4.18 kernel from CVS,
egcs-mips-linux-1.1.2-4 (egcs-2.91.66) and binutils-mips-linux-2.8.1-2

1. When i use MIPS specific arch_get_unmapped_area() function, my kernel
  hangs. It looks like this:
  ...
  Freeing unused kernel memory: 108k freed
  do_page_fault() #2: sending SIGSEGV to init for illegal read access 
from       
  0fb65330 (epc == 0fb65330, ra == 0fb851dc)
  ... and so on. Last message is printed infinitely.

  So, i have to give up HAVE_ARCH_UNMAPPED_AREA feature, and to use
  common arch_get_unmapped_area() routine.

2. There is a strange code in the local_flush_tlb_page() function
  (tlb-r3k.c and tlb-r4k.c):
     ...
         if (!vma || vma->vm_mm->context != 0) {
               unsigned long flags;
               int oldpid, newpid, idx;
  #ifdef DEBUG_TLB
               printk("[tlbpage<%lu,0x%08lx>]", vma->vm_mm->context, page);
  #endif
               newpid = (vma->vm_mm->context & 0xfc0);
                         ^^^^^
  Hmm... the kernel will crash if vma ==0. I guess that this code must look
  like this:

         if (vma && vma->vm_mm->context !=0) {
 
  Is any patches required?

3. I have some problems, when i try to compile latest kernels with my egcs
  and binutils, such as problems with "__INIT" and "__FINI" assembler 
macroses:

  # mips-linux-gcc -D__ASSEMBLY__ -D__KERNEL__ -I include -G 0
   -mno-abicalls -fno-pic -mcpu=r3000 -mips1 -pipe -c entry.S -o entry.o
  entry.S: Assembler messages:
  entry.S:179: Error: .previous without corresponding .section; ignored

  ... and ".macro" assembler command usage:

  # mips-linux-gcc -D__ASSEMBLY__ -D__KERNEL__ -I include -G 0 
   -mno-abicalls -fno-pic -mcpu=r3000 -mips1 -pipe -c head.S -o head.o
  head.S: Assembler messages:
  head.S:224: Error: .size expression too complicated to fix up
  head.S:224: Error: .size expression too complicated to fix up
  head.S:224: Error: .size expression too complicated to fix up
  head.S:224: Error: .size expression too complicated to fix up
  make[1]: *** [head.o] Error 1

  I know that my binutils are obsolete and so, I tried to use some newer
   binutils (2.9.5-1, 2.9.5-3), but my kernel crashed :(. Please, can 
you answer
   me, what egcs & binutils are suitable for linux-2.4.18 and MIPS R3000
   compliant?

  Any help will be appriciated.


From owner-linux-mips@oss.sgi.com Fri May 24 14:29:11 2002
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Subject: Re: 3 questions about linux-2.4.18 and R3000
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Alexandr Andreev wrote:

> Hi, list.
> I have three little questions with linux-2.4.18 on my machine.
> 
> My configuration is:
> MIPS R3000, linux-2.4.18 kernel from CVS,
> egcs-mips-linux-1.1.2-4 (egcs-2.91.66) and binutils-mips-linux-2.8.1-2
> 
> 1. When i use MIPS specific arch_get_unmapped_area() function, my kernel
>  hangs. It looks like this:
>  ...
>  Freeing unused kernel memory: 108k freed
>  do_page_fault() #2: sending SIGSEGV to init for illegal read access 
> from        0fb65330 (epc == 0fb65330, ra == 0fb851dc)
>  ... and so on. Last message is printed infinitely.
> 
>  So, i have to give up HAVE_ARCH_UNMAPPED_AREA feature, and to use
>  common arch_get_unmapped_area() routine.
> 


I took a look of the arch_get_unmapped_area(),  and it looks fine to me.

Can you try the following changes and let me know what happens?

1) change COLOUR_ALIGN
#define COLOUR_ALIGN(addr,pgoff) 	addr

2) I don't understand why we need color alignment if file is not NULL.  (Can 
someone explain?).  So you can try to remove that condition:

diff -Nru ./arch/mips/kernel/syscall.c.orig ./arch/mips/kernel/syscall.c
--- ./arch/mips/kernel/syscall.c.orig   Sat May 11 00:05:34 2002
+++ ./arch/mips/kernel/syscall.c        Fri May 24 13:54:47 2002
@@ -77,7 +77,7 @@
         if (len > TASK_SIZE)
                 return -ENOMEM;
         do_color_align = 0;
-       if (filp || (flags & MAP_SHARED))
+       if (flags & MAP_SHARED)
                 do_color_align = 1;
         if (addr) {
                 if (do_color_align)



> 2. There is a strange code in the local_flush_tlb_page() function
>  (tlb-r3k.c and tlb-r4k.c):
>     ...
>         if (!vma || vma->vm_mm->context != 0) {
>               unsigned long flags;
>               int oldpid, newpid, idx;
>  #ifdef DEBUG_TLB
>               printk("[tlbpage<%lu,0x%08lx>]", vma->vm_mm->context, page);
>  #endif
>               newpid = (vma->vm_mm->context & 0xfc0);
>                         ^^^^^
>  Hmm... the kernel will crash if vma ==0. I guess that this code must look
>  like this:
> 
>         if (vma && vma->vm_mm->context !=0) {
> 
>  Is any patches required?
> 


I think you just found a bug.  The fix looks good to me.


> 3. I have some problems, when i try to compile latest kernels with my egcs
>  and binutils, such as problems with "__INIT" and "__FINI" assembler 
> macroses:
> 
>  # mips-linux-gcc -D__ASSEMBLY__ -D__KERNEL__ -I include -G 0
>   -mno-abicalls -fno-pic -mcpu=r3000 -mips1 -pipe -c entry.S -o entry.o
>  entry.S: Assembler messages:
>  entry.S:179: Error: .previous without corresponding .section; ignored
> 
>  ... and ".macro" assembler command usage:
> 
>  # mips-linux-gcc -D__ASSEMBLY__ -D__KERNEL__ -I include -G 0   
> -mno-abicalls -fno-pic -mcpu=r3000 -mips1 -pipe -c head.S -o head.o
>  head.S: Assembler messages:
>  head.S:224: Error: .size expression too complicated to fix up
>  head.S:224: Error: .size expression too complicated to fix up
>  head.S:224: Error: .size expression too complicated to fix up
>  head.S:224: Error: .size expression too complicated to fix up
>  make[1]: *** [head.o] Error 1
> 
>  I know that my binutils are obsolete and so, I tried to use some newer
>   binutils (2.9.5-1, 2.9.5-3), but my kernel crashed :(. Please, can you 
> answer
>   me, what egcs & binutils are suitable for linux-2.4.18 and MIPS R3000
>   compliant?
>


We have been using gcc 2.9.5 and binutils 2.10.x for R3000 CPUs for quite a 
while with no problems.  It seems newer gcc and binutiles are fine too.

Jun


From owner-linux-mips@oss.sgi.com Fri May 24 17:05:55 2002
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Date: Sat, 25 May 2002 09:06:52 +0900
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From: Kunihiko IMAI <kimai@laser5.co.jp>
To: linux-mips <linux-mips@oss.sgi.com>
Subject: fail to boot with MTD root fs
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Hi,

I'm using Pb1500 evaluation board and met somewhat serious problem.
The problem is that failing to mount FlashROM filesystem as root fs
and go into infinite loop without any message.  Does anyone have a
good (or better) solution?

I'm using SGI kernel source tree, linux-2.4.18 of linux_2_4 branch.

When booting with nfs root, and using MTD FlashROM fs, it works well.

I traced code from init/main.c with printk.  It reached at schedule()
and go into infinite loop.  I also used kernel gdb, but fail to trace.
It may be sensible with timing or interrupt.  So printk trace may be
fake result, too.

Some month ago, I ported 2.4.16 kernel to L-Card+, a small VR4181
board.  At this time, it can boot with FlashROM root fs.  It works
well.

I compared 2.4.16 and 2.4.18 code.  And I found a difference at
mount_root().

at 2.4.18:

        for (p = fs_names; *p; p += strlen(p)+1) {
                struct file_system_type * fs_type = get_fs_type(p);
                if (!fs_type)
                        continue;
                atomic_inc(&bdev->bd_count);
                retval = blkdev_get(bdev, mode, 0, BDEV_FS); ///// <-
				/// go into infinite loop at this line
                if (retval)
                        goto Eio;
                sb = read_super(ROOT_DEV, bdev, fs_type,
                                root_mountflags, root_mount_data);
                put_filesystem(fs_type);
                if (sb) {
                        blkdev_put(bdev, BDEV_FS);
                        goto mount_it;
                }
        }
        panic("VFS: Unable to mount root fs on %s", kdevname(ROOT_DEV));


at 2.4.16:

        for (p = fs_names; *p; p += strlen(p)+1) {
                struct file_system_type * fs_type = get_fs_type(p);
                if (!fs_type)
                        continue;
                sb = read_super(ROOT_DEV, bdev, fs_type,
                                root_mountflags, root_mount_data);
                if (sb) 
                        goto mount_it;
                put_filesystem(fs_type);
        }
        panic("VFS: Unable to mount root fs on %s", kdevname(ROOT_DEV));


Reverting this part as 2.4.16, then it can boot.  But I'm afraid that
this reverting causes another problem...

Thanks.
_._. __._  _ . ... _  .___ ._. _____ _... ._ _._ _.._. .____  _ . ... _

                                                          Kunihiko IMAI

From owner-linux-mips@oss.sgi.com Fri May 24 19:02:26 2002
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Date: Fri, 24 May 2002 19:03:22 -0700
From: "H . J . Lu" <hjl@lucon.org>
To: Eric Christopher <echristo@redhat.com>
Cc: cgd@broadcom.com, linux-mips@oss.sgi.com
Subject: Re: linux.h patch for mips
Message-ID: <20020524190322.C10735@lucon.org>
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I will leave it to the Linux mips people. Any comments?


H.J.
---
On Fri, May 24, 2002 at 03:11:23PM -0700, Eric Christopher wrote:
> Hey, wanted to run this by you.
> 
> I've noticed a tendency for the linux kernel people to test
> _MIPS_ISA_MIPSXX when writing defines for 32 v. 64 bit code in the asm
> headers (and other places). Personally I'd prefer they check something
> else like -D__mips_fpr=32/64, but it's not something I have time to fix
> in the kernel right now (and for gpr I'd have to define something new,
> which wouldn't be hard).
> 
> Thought I'd check with you and see if you had any other ideas how better
> to do that kind of interface?
> 
> -eric
> 
> ps. I'm checking the following patch in momentarily to fix a problem I
> noticed.
> 
> -- 
> I will not carve gods
> 
> Index: linux.h
> ===================================================================
> RCS file: /cvs/gcc/gcc/gcc/config/mips/linux.h,v
> retrieving revision 1.44
> diff -u -p -w -r1.44 linux.h
> --- linux.h	20 May 2002 17:11:53 -0000	1.44
> +++ linux.h	24 May 2002 21:56:01 -0000
> @@ -155,6 +155,8 @@ void FN ()							\
>  %{mips2: -D_MIPS_ISA=_MIPS_ISA_MIPS2} \
>  %{mips3: -D_MIPS_ISA=_MIPS_ISA_MIPS3} \
>  %{mips4: -D_MIPS_ISA=_MIPS_ISA_MIPS4} \
> +%{mips32: -D_MIPS_ISA=_MIPS_ISA_MIPS32} \
> +%{mips64: -D_MIPS_ISA=_MIPS_ISA_MIPS64} \
>  %{!mips*: -D_MIPS_ISA=_MIPS_ISA_MIPS1} \
>  %{mabi=32: -D_MIPS_SIM=_MIPS_SIM_ABI32}	\
>  %{mabi=n32: -D_ABIN32=2 -D_MIPS_SIM=_ABIN32} \

From owner-linux-mips@oss.sgi.com Sat May 25 00:26:17 2002
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Date: Sat, 25 May 2002 00:27:23 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Robert Rusek <rrusek@teknuts.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: Executing IRIX binary ?
Message-ID: <20020525002723.A27302@dea.linux-mips.net>
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On Wed, May 22, 2002 at 04:01:07PM -0700, Robert Rusek wrote:

> Is there anyway to run/execute irix 5/6 binaries in linux mips on an
> Indy?  Good old Microsoft does not provide the source for it's frontpage
> extensions, but they do provide a binary for IRIX.

We have IRIX5 binary compatibility code in the kernel but I don't have
any reports about it's status ever since I integrated those patch in about
May '97.

  Ralf

From owner-linux-mips@oss.sgi.com Sat May 25 06:57:06 2002
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Date: Sat, 25 May 2002 08:57:36 -0500
From: "Steven J. Hill" <sjhill@realitydiluted.com>
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To: linux-mips@oss.sgi.com
Subject: Removal of unneeded cache routines for NEC 5432...
Content-Type: multipart/mixed;
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This is a multi-part message in MIME format.
--------------020609040304070502060603
Content-Type: text/plain; charset=us-ascii; format=flowed
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This patch removes to unused cache routines. Please apply.

-Steve

--------------020609040304070502060603
Content-Type: text/plain;
 name="mips-5432remove.diff"
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 filename="mips-5432remove.diff"

diff -urN -X cvs-exc.txt mipslinux-2.4.18-xfs/arch/mips/mm/c-r5432.c settop/arch/mips/mm/c-r5432.c
--- mipslinux-2.4.18-xfs/arch/mips/mm/c-r5432.c	Fri Nov 30 07:28:06 2001
+++ settop/arch/mips/mm/c-r5432.c	Wed Jan 30 11:09:47 2002
@@ -42,34 +42,6 @@
 /* -------------------------------------------------------------------- */
 /* #include <asm/r4kcache.h> */
 
-static inline void flush_icache_line_indexed(unsigned long addr)
-{
-	__asm__ __volatile__(
-		".set noreorder\n\t"
-		".set mips3\n\t"
-		"cache %1, (%0)\n\t"
-		"cache %1, 1(%0)\n\t"
-		".set mips0\n\t"
-		".set reorder"
-		:
-		: "r" (addr),
-		  "i" (Index_Invalidate_I));
-}
-
-static inline void flush_dcache_line_indexed(unsigned long addr)
-{
-	__asm__ __volatile__(
-		".set noreorder\n\t"
-		".set mips3\n\t"
-		"cache %1, (%0)\n\t"
-		"cache %1, 1(%0)\n\t"
-		".set mips0\n\t"
-		".set reorder"
-		:
-		: "r" (addr),
-		  "i" (Index_Writeback_Inv_D));
-}
-
 static inline void flush_icache_line(unsigned long addr)
 {
 	__asm__ __volatile__(

--------------020609040304070502060603--


From owner-linux-mips@oss.sgi.com Sat May 25 10:52:47 2002
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Date: Sat, 25 May 2002 12:53:10 -0500
From: "Steven J. Hill" <sjhill@realitydiluted.com>
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MIME-Version: 1.0
To: Kunihiko IMAI <kimai@laser5.co.jp>
CC: linux-mips <linux-mips@oss.sgi.com>
Subject: Re: fail to boot with MTD root fs
References: <m3off5drab.wl@kimai.laser5.co.jp>
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Kunihiko IMAI wrote:
> Hi,
> 
> I'm using Pb1500 evaluation board and met somewhat serious problem.
> The problem is that failing to mount FlashROM filesystem as root fs
> and go into infinite loop without any message.  Does anyone have a
> good (or better) solution?
> 
> I'm using SGI kernel source tree, linux-2.4.18 of linux_2_4 branch.
> 
> When booting with nfs root, and using MTD FlashROM fs, it works well.
> 
There was a bug in 2.4.18 with respect to the MTD code and using flash
as a root filesystem. It had to do with the MTD block devices. Make
the changes below and things will work again.

-Steve

Index: mtdblock.c
===================================================================
RCS file: /data/cvs/settop/drivers/mtd/mtdblock.c,v
retrieving revision 1.6
diff -u -r1.6 mtdblock.c
--- mtdblock.c  9 May 2002 13:35:40 -0000       1.6
+++ mtdblock.c  25 May 2002 16:52:14 -0000
@@ -371,8 +371,6 @@
         if (inode == NULL)
                 release_return(-ENODEV);

-       invalidate_device(inode->i_rdev, 1);
-
         dev = MINOR(inode->i_rdev);
         mtdblk = mtdblks[dev];

Index: mtdblock_ro.c
===================================================================
RCS file: /data/cvs/settop/drivers/mtd/mtdblock_ro.c,v
retrieving revision 1.2
diff -u -r1.2 mtdblock_ro.c
--- mtdblock_ro.c       3 Jan 2002 17:19:58 -0000       1.2
+++ mtdblock_ro.c       25 May 2002 16:53:01 -0000
@@ -79,8 +79,6 @@
         if (inode == NULL)
                 release_return(-ENODEV);

-       invalidate_device(inode->i_rdev, 1);
-
         dev = MINOR(inode->i_rdev);
         mtd = __get_mtd_device(NULL, dev);


From owner-linux-mips@oss.sgi.com Sat May 25 11:13:16 2002
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Date: Sat, 25 May 2002 20:14:04 +0200
To: "H . J . Lu" <hjl@lucon.org>
Cc: Eric Christopher <echristo@redhat.com>, cgd@broadcom.com,
   linux-mips@oss.sgi.com
Subject: Re: linux.h patch for mips
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H . J . Lu wrote:
> I will leave it to the Linux mips people. Any comments?
> 
> 
> H.J.
> ---
> On Fri, May 24, 2002 at 03:11:23PM -0700, Eric Christopher wrote:
> > Hey, wanted to run this by you.
> > 
> > I've noticed a tendency for the linux kernel people to test
> > _MIPS_ISA_MIPSXX when writing defines for 32 v. 64 bit code in the asm
> > headers (and other places). Personally I'd prefer they check something
> > else like -D__mips_fpr=32/64, but it's not something I have time to fix
> > in the kernel right now (and for gpr I'd have to define something new,
> > which wouldn't be hard).
> > 
> > Thought I'd check with you and see if you had any other ideas how better
> > to do that kind of interface?
> > 
> > -eric
> > 
> > ps. I'm checking the following patch in momentarily to fix a problem I
> > noticed.
> > 
> > -- 
> > I will not carve gods
> > 
> > Index: linux.h
> > ===================================================================
> > RCS file: /cvs/gcc/gcc/gcc/config/mips/linux.h,v
> > retrieving revision 1.44
> > diff -u -p -w -r1.44 linux.h
> > --- linux.h	20 May 2002 17:11:53 -0000	1.44
> > +++ linux.h	24 May 2002 21:56:01 -0000
> > @@ -155,6 +155,8 @@ void FN ()							\
> >  %{mips2: -D_MIPS_ISA=_MIPS_ISA_MIPS2} \
> >  %{mips3: -D_MIPS_ISA=_MIPS_ISA_MIPS3} \
> >  %{mips4: -D_MIPS_ISA=_MIPS_ISA_MIPS4} \

At least for completeness there should be also _MIPS_ISA_MIPS5
(the -mips5 swich would cause _MIPS_ISA_MIPS1 otherwise).

> > +%{mips32: -D_MIPS_ISA=_MIPS_ISA_MIPS32} \
> > +%{mips64: -D_MIPS_ISA=_MIPS_ISA_MIPS64} \
> >  %{!mips*: -D_MIPS_ISA=_MIPS_ISA_MIPS1} \
> >  %{mabi=32: -D_MIPS_SIM=_MIPS_SIM_ABI32}	\
> >  %{mabi=n32: -D_ABIN32=2 -D_MIPS_SIM=_ABIN32} \

From owner-linux-mips@oss.sgi.com Sat May 25 12:05:17 2002
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From: "robru" <robru@teknuts.com>
To: "'Ralf Baechle'" <ralf@oss.sgi.com>
Cc: <linux-mips@oss.sgi.com>
Subject: RE: Executing IRIX binary ?
Date: Sat, 25 May 2002 12:06:29 -0700
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Ralf,

How can I find out if I compiled my kernel with the compatibility code?

Thanks,
Robert.

      -----Original Message-----
      From: owner-linux-mips@oss.sgi.com 
      [mailto:owner-linux-mips@oss.sgi.com] On Behalf Of Ralf Baechle
      Sent: Saturday, May 25, 2002 12:27 AM
      To: Robert Rusek
      Cc: linux-mips@oss.sgi.com
      Subject: Re: Executing IRIX binary ?
      
      
      On Wed, May 22, 2002 at 04:01:07PM -0700, Robert Rusek wrote:
      
      > Is there anyway to run/execute irix 5/6 binaries in 
      linux mips on an 
      > Indy?  Good old Microsoft does not provide the source for it's 
      > frontpage extensions, but they do provide a binary for IRIX.
      
      We have IRIX5 binary compatibility code in the kernel but 
      I don't have any reports about it's status ever since I 
      integrated those patch in about May '97.
      
        Ralf
      



From owner-linux-mips@oss.sgi.com Sat May 25 12:12:54 2002
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Message-ID: <3CEFE253.4090107@realitydiluted.com>
Date: Sat, 25 May 2002 14:13:23 -0500
From: "Steven J. Hill" <sjhill@realitydiluted.com>
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To: robru <robru@teknuts.com>
CC: linux-mips@oss.sgi.com
Subject: Re: Executing IRIX binary ?
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robru wrote:
> 
> How can I find out if I compiled my kernel with the compatibility code?
> 
I don't mean to be critical, but read the code. If you look in the
'arch/mips/config.in' file you will find:

if [ "$CONFIG_CPU_LITTLE_ENDIAN" = "n" ]; then
    bool 'Include IRIX binary compatibility' CONFIG_BINFMT_IRIX
    bool 'Include forward keyboard' CONFIG_FORWARD_KEYBOARD
fi

at around line #522. You have to be a big endian machine since IRIX is
itself a big endian operating system. This option is under the menu
'General setup'.

-S


From owner-linux-mips@oss.sgi.com Sat May 25 12:42:43 2002
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To: Robert Rusek <robru@teknuts.com>
CC: linux-mips@oss.sgi.com
Subject: Re: Executing IRIX binary ?
References: <000701c20420$cc5ce5e0$0a01a8c0@sohotower>
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Robert Rusek wrote:
> 
> Thamk you for your reply, but I meant if I did not have the original
> source.  Is there anyway to tell from the binary?
> 
If your kernel hasn't been stripped, you could use 'nm' or 'readelf'
and look for 'irix' symbols. The second option is to try a SGI
system call number and see if the kernel tells you if that is a
valid system call or not.

-S


From owner-linux-mips@oss.sgi.com Sat May 25 13:18:52 2002
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Date: Sat, 25 May 2002 13:18:06 -0700
From: William Jhun <wjhun@ayrnetworks.com>
To: linux-mips@oss.sgi.com
Cc: ralf@oss.sgi.com, davem@redhat.com
Subject: [PATCH] include/asm-mips/pci.h: More optimal cache behavior, added "prep" routines
Message-ID: <20020525131806.A4073@ayrnetworks.com>
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This patch (against latest linux_2_4 oss tree) makes several
optimizations for pci_map_*() and pci_dma_sync_*() routines, as well as
adds an extention to the interface that allows a driver to prepare a
buffer for a DMA transfer after having intercepted it with
pci_dma_sync_*().

These calls, pci_dma_prep_{sg,single}, are useful in cases where one
wants to reuse a buffer for DMAing to a device without having to
unmap/map it again. They essentially should do what pci_map_*() should
do except for setting up the mapping itself. (On other architectures,
this might involve something like copying to a bounce buffer or the
like...)

When preparing a buffer for a DMA transfer, we've found it's more
optimal to only do a wback_inv if the direction is not known
(PCIDMA_BIDIRECTIONAL), only a wback if transfer is to the device
(PCIDMA_TO_DEVICE), and only an invalidate if from the device
(PCIDMA_FROM_DEVICE). Such a modification has made a small (yet
significant) improvement for one of our network drivers during a packet
forwarding rate test.

The other modification is to only invalidate on a pci_dma_sync_*() if
the direction is from the device or bidirectional. Since this call is
only supposed to insure that the CPU views exactly what has been DMAed
in, there is no reason to write-back (or do anything if the direction is
PCIDMA_TO_DEVICE).

If I'm not mistaken, it seems that this call should actually do nothing
to invalidate caches, but instead a pci_dma_prep_{sync,single} call with
PCIDMA_FROM_DEVICE should do the invalidate. This would eliminate the
extra invalidate that happens when a driver calls pci_dma_sync_*() after
just having DMAed into a just mapped buffer. It would also clear up the
abstraction of who "owns" the device; there would be an explicit call
for each transition i.e. (FROM_DEVICE operation)

	pci_map_single()      - device now owns the buffer [invalidate]
	[DMA]
	pci_dma_sync_single() - driver now owns it         [no invalidate]
	[driver touches buffer]
	pci_dma_prep_single() - device owns it once again  [invalidate]
	[DMA] ...

rather than an implicit change from driver->device, i.e.

	pci_map_single()      - device now owns the buffer [invalidate]
	[DMA]
	pci_dma_sync_single() - driver now owns it [unneeded invalidate]
	[driver touches buffer]
	[driver now gives bus address back to the device,
	 and the device implicitly owns it once again]
	[DMA] ...

However, such a change would require change lots of existing drivers and
breaking others. So I'll veer away from that. :o)

Thanks,
William

---
Index: include/asm-mips/pci.h
===================================================================
RCS file: /cvs/linux/include/asm-mips/pci.h,v
retrieving revision 1.24.2.1
diff -u -r1.24.2.1 pci.h
--- include/asm-mips/pci.h	2002/02/26 06:00:25	1.24.2.1
+++ include/asm-mips/pci.h	2002/05/25 20:10:20
@@ -79,7 +79,40 @@
 extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
 				void *vaddr, dma_addr_t dma_handle);
 
+#ifdef CONFIG_NONCOHERENT_IO
+/*
+ * Prepare buffer for DMA transfer
+ */
+static inline void prep_buffer(void *ptr, size_t size, int direction)
+{
+        switch(direction) {
+        case PCI_DMA_TODEVICE:
+                dma_cache_wback((unsigned long)ptr, size);
+                break;
+        case PCI_DMA_FROMDEVICE:
+                dma_cache_inv((unsigned long)ptr, size);
+                break;
+        case PCI_DMA_BIDIRECTIONAL:
+                dma_cache_wback_inv((unsigned long)ptr, size);
+                break;
+        }
+}
+
 /*
+ * Prepare buffer for CPU access after DMA transfer
+ */
+static inline void sync_buffer(void *ptr, size_t size, int direction)
+{
+        switch(direction) {
+        case PCI_DMA_FROMDEVICE:
+        case PCI_DMA_BIDIRECTIONAL:
+                dma_cache_inv((unsigned long)ptr, size);
+                break;
+        }
+}
+#endif
+
+/*
  * Map a single buffer of the indicated size for DMA in streaming mode.
  * The 32-bit bus address to use is returned.
  *
@@ -93,7 +126,7 @@
 		BUG();
 
 #ifdef CONFIG_NONCOHERENT_IO
-	dma_cache_wback_inv((unsigned long)ptr, size);
+	prep_buffer(ptr, size, direction);
 #endif
 
 	return virt_to_bus(ptr);
@@ -132,7 +165,7 @@
 	addr = (unsigned long) page_address(page);
 	addr += offset;
 #ifdef CONFIG_NONCOHERENT_IO
-	dma_cache_wback_inv(addr, size);
+	prep_buffer((void*)addr, size, direction);
 #endif
 
 	return virt_to_bus((void *)addr);
@@ -183,7 +216,7 @@
 #ifdef CONFIG_NONCOHERENT_IO
 	/* Make sure that gcc doesn't leave the empty loop body.  */
 	for (i = 0; i < nents; i++, sg++)
-		dma_cache_wback_inv((unsigned long)sg->address, sg->length);
+		prep_buffer(sg->address, sg->length, direction);
 #endif
 
 	return nents;
@@ -221,7 +254,7 @@
 		BUG();
 
 #ifdef CONFIG_NONCOHERENT_IO
-	dma_cache_wback_inv((unsigned long)bus_to_virt(dma_handle), size);
+	sync_buffer(bus_to_virt(dma_handle), size, direction);
 #endif
 }
 
@@ -245,8 +278,52 @@
 
 	/* Make sure that gcc doesn't leave the empty loop body.  */
 #ifdef CONFIG_NONCOHERENT_IO
+	for (i = 0; i < nelems; i++, sg++)
+		sync_buffer(sg->address, sg->length, direction);
+#endif
+
+}
+
+/*
+ * Prepare buffer for a DMA transfer after driver temporarily
+ * re-claimed it with pci_dma_sync_*().
+ *
+ * In essence, this "returns" the buffer to the PCI device.
+ */
+static inline void pci_dma_prep_single(struct pci_dev *hwdev,
+				       dma_addr_t dma_handle,
+				       size_t size, int direction)
+{
+	if (direction == PCI_DMA_NONE)
+		BUG();
+
+#ifdef CONFIG_NONCOHERENT_IO
+	prep_buffer(bus_to_virt(dma_handle), size, direction);
+#endif
+}
+
+/*
+ * Prepare buffer for a DMA transfer after driver temporarily
+ * re-claimed it with pci_dma_sync_*().
+ *
+ * The same as pci_dma_prep_single but for a scatter-gather list,
+ * same rules and usage.
+ */
+static inline void pci_dma_prep_sg(struct pci_dev *hwdev,
+				   struct scatterlist *sg,
+				   int nelems, int direction)
+{
+#ifdef CONFIG_NONCOHERENT_IO
+	int i;
+#endif
+
+	if (direction == PCI_DMA_NONE)
+		BUG();
+
+	/* Make sure that gcc doesn't leave the empty loop body.  */
+#ifdef CONFIG_NONCOHERENT_IO
 	for (i = 0; i < nelems; i++, sg++)
-		dma_cache_wback_inv((unsigned long)sg->address, sg->length);
+		prep_buffer(sg->address, sg->length, direction);
 #endif
 }
 

From owner-linux-mips@oss.sgi.com Sat May 25 15:03:34 2002
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Date: Sat, 25 May 2002 15:03:02 -0700
From: William Jhun <wjhun@ayrnetworks.com>
To: linux-mips@oss.sgi.com
Cc: ralf@oss.sgi.com, davem@redhat.com
Subject: Re: [PATCH] include/asm-mips/pci.h: More optimal cache behavior, added "prep" routines
Message-ID: <20020525150302.A8264@ayrnetworks.com>
References: <20020525131806.A4073@ayrnetworks.com>
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On Sat, May 25, 2002 at 01:18:06PM -0700, William Jhun wrote:
> When preparing a buffer for a DMA transfer, we've found it's more
> optimal to only do a wback_inv if the direction is not known
> (PCIDMA_BIDIRECTIONAL), only a wback if transfer is to the device
> (PCIDMA_TO_DEVICE), and only an invalidate if from the device
> (PCIDMA_FROM_DEVICE). Such a modification has made a small (yet
> significant) improvement for one of our network drivers during a packet
> forwarding rate test.

*sigh*. On the platform we were testing on, we used our own cache code
(rm7k with tertiary cache support) which has been well-tested for over a
year now. In these routines, we implement dma_cache_wback and only do
invalidates (no flush) for dma_cache_wback_inv. Now that I'm looking
around in cache support for other MIPS CPUs, I see that all the _wback
calls are not implemented and that many (or all?) of the _inv calls also
flush the caches.

The patch below leaves the existing funtions alone and just adds the two
pci_dma_prep_{sg,single}() calls.

My question is: why are these dma_cache_wback calls not implemented? And
how come dma_cache_inv is treated the same as dma_cache_wback_inv? Are
we doing something wrong by implementing these calls in our cache code
as they are described?

Thanks,
Will

---
Index: include/asm-mips/pci.h
===================================================================
RCS file: /cvs/linux/include/asm-mips/pci.h,v
retrieving revision 1.24.2.1
diff -u -r1.24.2.1 pci.h
--- include/asm-mips/pci.h	2002/02/26 06:00:25	1.24.2.1
+++ include/asm-mips/pci.h	2002/05/25 22:01:53
@@ -250,6 +250,49 @@
 #endif
 }
 
+/*
+ * Prepare buffer for a DMA transfer after driver temporarily
+ * re-claimed it with pci_dma_sync_*().
+ *
+ * In essence, this "returns" the buffer to the PCI device.
+ */
+static inline void pci_dma_prep_single(struct pci_dev *hwdev,
+				       dma_addr_t dma_handle,
+				       size_t size, int direction)
+{
+	if (direction == PCI_DMA_NONE)
+		BUG();
+
+#ifdef CONFIG_NONCOHERENT_IO
+	dma_cache_wback_inv((unsigned long)bus_to_virt(dma_handle), size);
+#endif
+}
+
+/*
+ * Prepare buffer for a DMA transfer after driver temporarily
+ * re-claimed it with pci_dma_sync_*().
+ *
+ * The same as pci_dma_prep_single but for a scatter-gather list,
+ * same rules and usage.
+ */
+static inline void pci_dma_prep_sg(struct pci_dev *hwdev,
+				   struct scatterlist *sg,
+				   int nelems, int direction)
+{
+#ifdef CONFIG_NONCOHERENT_IO
+	int i;
+#endif
+
+	if (direction == PCI_DMA_NONE)
+		BUG();
+
+	/* Make sure that gcc doesn't leave the empty loop body.  */
+#ifdef CONFIG_NONCOHERENT_IO
+	for (i = 0; i < nelems; i++, sg++)
+		dma_cache_wback_inv((unsigned long)sg->address, sg->length);
+#endif
+}
+
 /* Return whether the given PCI device DMA address mask can
  * be supported properly.  For example, if your device can
  * only drive the low 24-bits during PCI bus mastering, then

From owner-linux-mips@oss.sgi.com Sat May 25 15:43:17 2002
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Date: Sat, 25 May 2002 15:44:26 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: robru <robru@teknuts.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: Executing IRIX binary ?
Message-ID: <20020525154426.A2481@dea.linux-mips.net>
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In-Reply-To: <000701c2041f$4d2ae7f0$0a01a8c0@sohotower>; from robru@teknuts.com on Sat, May 25, 2002 at 12:06:29PM -0700
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On Sat, May 25, 2002 at 12:06:29PM -0700, robru wrote:

> How can I find out if I compiled my kernel with the compatibility code?

Make sure you have CONFIG_BINFMT_IRIX set in the kernel configuration.

You'll also need to install IRIX libraries.

  Ralf

From owner-linux-mips@oss.sgi.com Sun May 26 09:33:30 2002
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From: "Robert Rusek" <robru@teknuts.com>
To: "'Ralf Baechle'" <ralf@oss.sgi.com>
Cc: <linux-mips@oss.sgi.com>
Subject: RE: Executing IRIX binary ?
Date: Sun, 26 May 2002 09:34:50 -0700
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This may be a stupid question but which IRIX libraries?  All of them?
When I try to execute a IRIX biniary I get the following:

bash: ./owsadm: No such file or directory

Do I need to something special?

Thanks,
Robert.

      -----Original Message-----
      From: owner-linux-mips@oss.sgi.com 
      [mailto:owner-linux-mips@oss.sgi.com] On Behalf Of Ralf Baechle
      Sent: Saturday, May 25, 2002 3:44 PM
      To: robru
      Cc: linux-mips@oss.sgi.com
      Subject: Re: Executing IRIX binary ?
      
      
      On Sat, May 25, 2002 at 12:06:29PM -0700, robru wrote:
      
      > How can I find out if I compiled my kernel with the 
      compatibility 
      > code?
      
      Make sure you have CONFIG_BINFMT_IRIX set in the kernel 
      configuration.
      
      You'll also need to install IRIX libraries.
      
        Ralf
      



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Subject: Re: linux.h patch for mips
From: Eric Christopher <echristo@redhat.com>
To: Thiemo Seufer <ica2_ts@csv.ica.uni-stuttgart.de>
Cc: "H . J . Lu" <hjl@lucon.org>, cgd@broadcom.com, linux-mips@oss.sgi.com
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> 
> At least for completeness there should be also _MIPS_ISA_MIPS5
> (the -mips5 swich would cause _MIPS_ISA_MIPS1 otherwise).

Rather irrelevent since mips5 really isn't supported in gcc, but ok. I
was more concerned with the kernel issues and how checks for processor
features was being done. Requiring -mipsX for anything isn't a good idea
(what if you want to compile for something that is not a particular
architecture, e.g. -march=r4600). 

-eric

-- 
I will not carve gods


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Date: Sun, 26 May 2002 20:29:59 +0200
To: Eric Christopher <echristo@redhat.com>
Cc: "H . J . Lu" <hjl@lucon.org>, cgd@broadcom.com, linux-mips@oss.sgi.com
Subject: Re: linux.h patch for mips
Message-ID: <20020526182959.GA15299@rembrandt.csv.ica.uni-stuttgart.de>
References: <1022278283.25829.46.camel@ghostwheel.cygnus.com> <20020524190322.C10735@lucon.org> <20020525181404.GI21557@rembrandt.csv.ica.uni-stuttgart.de> <1022436056.29700.3.camel@ghostwheel.cygnus.com>
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From: Thiemo Seufer <ica2_ts@csv.ica.uni-stuttgart.de>
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Eric Christopher wrote:
> 
> > 
> > At least for completeness there should be also _MIPS_ISA_MIPS5
> > (the -mips5 swich would cause _MIPS_ISA_MIPS1 otherwise).
> 
> Rather irrelevent since mips5 really isn't supported in gcc, but ok. I
> was more concerned with the kernel issues and how checks for processor
> features was being done. Requiring -mipsX for anything isn't a good idea
> (what if you want to compile for something that is not a particular
> architecture, e.g. -march=r4600). 

That's why my private patch for mips64-linux has:

  %{mips1:-D_MIPS_ISA=_MIPS_ISA_MIPS1} \
  %{mips2:-D_MIPS_ISA=_MIPS_ISA_MIPS2} \
  %{mips32:-D_MIPS_ISA=_MIPS_ISA_MIPS32} \
  %{mips3:-D_MIPS_ISA=_MIPS_ISA_MIPS3} \
  %{mips4:-D_MIPS_ISA=_MIPS_ISA_MIPS4} \
  %{mips5:-D_MIPS_ISA=_MIPS_ISA_MIPS5} \
  %{mips64:-D_MIPS_ISA=_MIPS_ISA_MIPS64} \
  %{!mips*: \
    %{mabi=32|mabi=o32|!mabi*:-D_MIPS_ISA=_MIPS_ISA_MIPS1} \
    %{mabi=n32|mabi=64|mabi=n64:-D_MIPS_ISA=_MIPS_ISA_MIPS3}} \


Thiemo

From owner-linux-mips@oss.sgi.com Sun May 26 21:58:03 2002
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Date: Mon, 27 May 2002 13:59:18 +0900
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From: Kunihiko IMAI <kimai@laser5.co.jp>
To: linux-mips <linux-mips@oss.sgi.com>
Subject: Re: fail to boot with MTD root fs
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Hi,

Thank you for your advice.
I followed your advice to fix the code.  It goes well, boot with flash
ROM root fs.

Thank you.
_._. __._  _ . ... _  .___ ._. _____ _... ._ _._ _.._. .____  _ . ... _

                                                          Kunihiko IMAI

From owner-linux-mips@oss.sgi.com Sun May 26 23:56:14 2002
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Subject: Re: linux.h patch for mips
From: Eric Christopher <echristo@redhat.com>
To: Thiemo Seufer <ica2_ts@csv.ica.uni-stuttgart.de>
Cc: "H . J . Lu" <hjl@lucon.org>, cgd@broadcom.com, linux-mips@oss.sgi.com
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> That's why my private patch for mips64-linux has:
> 
>   %{mips1:-D_MIPS_ISA=_MIPS_ISA_MIPS1} \
>   %{mips2:-D_MIPS_ISA=_MIPS_ISA_MIPS2} \
>   %{mips32:-D_MIPS_ISA=_MIPS_ISA_MIPS32} \
>   %{mips3:-D_MIPS_ISA=_MIPS_ISA_MIPS3} \
>   %{mips4:-D_MIPS_ISA=_MIPS_ISA_MIPS4} \
>   %{mips5:-D_MIPS_ISA=_MIPS_ISA_MIPS5} \
>   %{mips64:-D_MIPS_ISA=_MIPS_ISA_MIPS64} \
>   %{!mips*: \
>     %{mabi=32|mabi=o32|!mabi*:-D_MIPS_ISA=_MIPS_ISA_MIPS1} \
>     %{mabi=n32|mabi=64|mabi=n64:-D_MIPS_ISA=_MIPS_ISA_MIPS3}} \

Not a bad start. There's more that needs to be done, I may end up having
to submit kernel patches to make everything agree. Do people use a cvs
server or ...

-eric

-- 
I will not carve gods


From owner-linux-mips@oss.sgi.com Mon May 27 02:42:47 2002
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Message-ID: <019401c20563$e7f6af40$10eca8c0@grendel>
From: "Kevin D. Kissell" <kevink@mips.com>
To: <linux-mips@oss.sgi.com>
Subject: PCI Graphics/Video Card for Malta Board?
Date: Mon, 27 May 2002 11:49:57 +0200
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I'd like to get a video-capable graphics card up
and running on a MIPS Malta board (therefore
PCI), ideally something mainstream like ATI.
Does anyone on the list have any positive or
negative recommendations in terms of cards
and particularly in terms of the degree to which
the drivers (and PCI set-up) have been ported
to MIPS/Linux?  I'll do what I must, but I hate
re-inventing the wheel.

            Regards,

            Kevin K.  


From owner-linux-mips@oss.sgi.com Mon May 27 06:12:01 2002
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To: Jun Sun <jsun@mvista.com>
CC: linux-mips@oss.sgi.com
Subject: Re: 3 questions about linux-2.4.18 and R3000
References: <3CEEBBA9.5070809@niisi.msk.ru> <3CEEAC5F.6010802@mvista.com>
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--------------090100080205070303000804
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Jun Sun wrote:

> I took a look of the arch_get_unmapped_area(),  and it looks fine to me.
>
> Can you try the following changes and let me know what happens?
>
> 1) change COLOUR_ALIGN
> #define COLOUR_ALIGN(addr,pgoff)     addr

OK, It works for me.

>
> We have been using gcc 2.9.5 and binutils 2.10.x for R3000 CPUs for 
> quite a  while with no problems.  It seems newer gcc and binutiles are 
> fine too.
>
I understand, but is there any __official__ recommended versions of these
utils? http://oss.sgi.com/mips/mips-howto.html is out-of-date :(



--------------090100080205070303000804
Content-Type: text/plain;
 name="patch"
Content-Transfer-Encoding: 7bit
Content-Disposition: inline;
 filename="patch"

diff -pru linux_2_4_18_orig/arch/mips/mm/tlb-r3k.c linux_2_4_18/arch/mips/mm/tlb-r3k.c
--- linux_2_4_18_orig/arch/mips/mm/tlb-r3k.c	Fri Apr 26 07:50:07 2002
+++ linux_2_4_18/arch/mips/mm/tlb-r3k.c	Mon May 27 16:36:14 2002
@@ -118,7 +118,7 @@ void local_flush_tlb_range(struct mm_str
 
 void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 {
-	if (!vma || vma->vm_mm->context != 0) {
+	if (vma && vma->vm_mm->context) {
 		unsigned long flags;
 		int oldpid, newpid, idx;
 
diff -pru linux_2_4_18_orig/arch/mips/mm/tlb-r4k.c linux_2_4_18/arch/mips/mm/tlb-r4k.c
--- linux_2_4_18_orig/arch/mips/mm/tlb-r4k.c	Fri Apr 26 07:50:07 2002
+++ linux_2_4_18/arch/mips/mm/tlb-r4k.c	Mon May 27 16:31:45 2002
@@ -140,7 +140,7 @@ void local_flush_tlb_range(struct mm_str
 
 void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 {
-	if (!vma || vma->vm_mm->context != 0) {
+	if (vma && vma->vm_mm->context) {
 		unsigned long flags;
 		int oldpid, newpid, idx;
 

--------------090100080205070303000804--


From owner-linux-mips@oss.sgi.com Mon May 27 06:25:04 2002
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Date: Mon, 27 May 2002 08:25:46 -0500
From: "Steven J. Hill" <sjhill@realitydiluted.com>
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CC: linux-mips@oss.sgi.com
Subject: Re: PCI Graphics/Video Card for Malta Board?
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Kevin D. Kissell wrote:
 >
> I'd like to get a video-capable graphics card up
> and running on a MIPS Malta board (therefore
> PCI), ideally something mainstream like ATI.
> Does anyone on the list have any positive or
> negative recommendations in terms of cards
> and particularly in terms of the degree to which
> the drivers (and PCI set-up) have been ported
> to MIPS/Linux?  I'll do what I must, but I hate
> re-inventing the wheel.
> 
I can think of two things. First, a lot of graphics cards
rely on BIOS calls to be set up before the operating system
even boots. Second, I would stick to graphics cards that
have framebuffer support in the kernel as you stand at least
half a chance that those cards don't rely so heavily on a
peecee bios. Just my $.02.

-Steve


From owner-linux-mips@oss.sgi.com Mon May 27 06:37:26 2002
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Date: Mon, 27 May 2002 15:37:27 +0200 (MEST)
From: Geert Uytterhoeven <geert@linux-m68k.org>
To: "Steven J. Hill" <sjhill@realitydiluted.com>
cc: "Kevin D. Kissell" <kevink@mips.com>,
   Linux/MIPS Development <linux-mips@oss.sgi.com>
Subject: Re: PCI Graphics/Video Card for Malta Board?
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On Mon, 27 May 2002, Steven J. Hill wrote:
> Kevin D. Kissell wrote:
> > I'd like to get a video-capable graphics card up
> > and running on a MIPS Malta board (therefore
> > PCI), ideally something mainstream like ATI.
> > Does anyone on the list have any positive or
> > negative recommendations in terms of cards
> > and particularly in terms of the degree to which
> > the drivers (and PCI set-up) have been ported
> > to MIPS/Linux?  I'll do what I must, but I hate
> > re-inventing the wheel.
> > 
> I can think of two things. First, a lot of graphics cards
> rely on BIOS calls to be set up before the operating system
> even boots. Second, I would stick to graphics cards that
> have framebuffer support in the kernel as you stand at least
> half a chance that those cards don't rely so heavily on a
> peecee bios. Just my $.02.

Even then, most frame buffer device drivers rely on the firmware (PC BIOS or
SPARC/PPC Open Firmware) having set up the video card.

One of the exceptions is matroxfb, which is able to initialize older Matrox
cards. This should cover all their PCI cards (Matrox didn't release any new PCI
cards during the last few years).

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From owner-linux-mips@oss.sgi.com Mon May 27 07:01:49 2002
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Cc: "Linux/MIPS Development" <linux-mips@oss.sgi.com>
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Subject: Re: PCI Graphics/Video Card for Malta Board?
Date: Mon, 27 May 2002 16:09:14 +0200
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> One of the exceptions is matroxfb, which is able to initialize older Matrox
> cards. This should cover all their PCI cards (Matrox didn't release any new PCI
> cards during the last few years).

They still sell/support the G450PCI, which has TV output support,
and a flat-panel transmitter, and which might do the job for me.
Can anyone confirm that the matroxfb support works for it?

            Kevin K.


From owner-linux-mips@oss.sgi.com Mon May 27 07:13:48 2002
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Date: Mon, 27 May 2002 22:13:37 +0800
From: "Zhang Fuxin" <fxzhang@ict.ac.cn>
To: Geert Uytterhoeven <geert@linux-m68k.org>
CC: "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Subject: Re: Re: PCI Graphics/Video Card for Malta Board?
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hi,

======= 2002-05-27 15:37:00 you wrote£º=======

>On Mon, 27 May 2002, Steven J. Hill wrote:
>> Kevin D. Kissell wrote:
>> > I'd like to get a video-capable graphics card up
>> I can think of two things. First, a lot of graphics cards
>> rely on BIOS calls to be set up before the operating system
>> even boots. Second, I would stick to graphics cards that
>> have framebuffer support in the kernel as you stand at least
>> half a chance that those cards don't rely so heavily on a
>> peecee bios. Just my $.02.
>
>Even then, most frame buffer device drivers rely on the firmware (PC BIOS or
>SPARC/PPC Open Firmware) having set up the video card.
i have made vesa frame buffer & vga text console work for a pile of cards with 
x86emu code i posted days ago.but i think he want video-capable,that may leave
few candidates
>
>One of the exceptions is matroxfb, which is able to initialize older Matrox
>cards. This should cover all their PCI cards (Matrox didn't release any new PCI
>cards during the last few years).
It is expensive now:) I bought two G450pci last year,they are hard to find.
>
>Gr{oetje,eeting}s,
>
>						Geert
>
>--
>Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
>In personal conversations with technical people, I call myself a hacker. But
>when I'm talking to journalists I just say "programmer" or something like that.
>							    -- Linus Torvalds

= = = = = = = = = = = = = = = = = = = =
			

Best Regards
---------------------------------------
Zhang Fuxin
System Architecture Lab
Institute of Computing Technology
Chinese Academy of Sciences,China
http://www.ict.ac.cn
 
			¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡2002-05-27





From owner-linux-mips@oss.sgi.com Mon May 27 07:14:15 2002
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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: "Kevin D. Kissell" <kevink@mips.com>
cc: "Steven J. Hill" <sjhill@realitydiluted.com>,
   Linux/MIPS Development <linux-mips@oss.sgi.com>
Subject: Re: PCI Graphics/Video Card for Malta Board?
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On Mon, 27 May 2002, Kevin D. Kissell wrote:
> > One of the exceptions is matroxfb, which is able to initialize older Matrox
> > cards. This should cover all their PCI cards (Matrox didn't release any new PCI
> > cards during the last few years).
> 
> They still sell/support the G450PCI, which has TV output support,
> and a flat-panel transmitter, and which might do the job for me.

Oh, I didn't know they made PCI cards after the G200 (which was hard to get in
its PCI variant). In fact they responded negatively when we (the PPC guys,
thinking about designing our own PPC motherboards) asked them if they intended
to release other PCI chips after the G200, for platforms that lacked AGP
support.

BTW, the FAQ on Matrox' website says:

|  1. What happens if I use the Millennium G450 PCI in a system with a
|  non-Intel chipset?
|
|     1. The G450 PCI does not support bus-mastering with non-Intel chipsets.
|     While this lowers performance on synthetic benchmarks, it does not hinder
|     the everyday usability of the card. Additionally, the Millennium G450 PCI
|     does not support OpenGL acceleration (primarily used for 3D gaming) or
|     DVDMax with non-Intel chipsets.

> Can anyone confirm that the matroxfb support works for it?

I'm not sure matroxfb support full initialization of the '450. You best ask
Petr Vandrovec.

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From owner-linux-mips@oss.sgi.com Mon May 27 13:31:12 2002
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From: "Robert Rusek" <robru@teknuts.com>
To: "'Ralf Baechle'" <ralf@oss.sgi.com>
Cc: <linux-mips@oss.sgi.com>
Subject: RE: Executing IRIX binary ?
Date: Mon, 27 May 2002 13:32:43 -0700
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Ralf,

Looks like I have the kernal compiled with the IRIX binary support.  How
do I go about executing the binaries?  When I try to execute it tells me
that the file is not found.

Thanks in advance,
Robert.

      -----Original Message-----
      From: owner-linux-mips@oss.sgi.com 
      [mailto:owner-linux-mips@oss.sgi.com] On Behalf Of Ralf Baechle
      Sent: Saturday, May 25, 2002 3:44 PM
      To: robru
      Cc: linux-mips@oss.sgi.com
      Subject: Re: Executing IRIX binary ?
      
      
      On Sat, May 25, 2002 at 12:06:29PM -0700, robru wrote:
      
      > How can I find out if I compiled my kernel with the 
      compatibility 
      > code?
      
      Make sure you have CONFIG_BINFMT_IRIX set in the kernel 
      configuration.
      
      You'll also need to install IRIX libraries.
      
        Ralf
      



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On Mon, May 27, 2002 at 01:32:43PM -0700, Robert Rusek wrote:
> Ralf,
>=20
> Looks like I have the kernal compiled with the IRIX binary support.  How
> do I go about executing the binaries?  When I try to execute it tells me
> that the file is not found.

Are you shure you have the dynamic loader + libc + other libs of IRIX
installed in your system ?

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From owner-linux-mips@oss.sgi.com Mon May 27 14:56:47 2002
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To: <flo@rfc822.org>
Cc: "'Ralf Baechle'" <ralf@oss.sgi.com>, <linux-mips@oss.sgi.com>
Subject: RE: Executing IRIX binary ?
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I have IRIX binary support turned on in the kernel.  I can copy over my
IRIX libs from my old IRIX partition (I just do not know which ones).  I
don't think I have the dynamic loader?  How would I check to see if I
have it?  If not where would I get it?  Sorry about all these newbie
questions it is just that I need to be able to run the IRIX version of
fronpage server extensions since MS does not provide the open source.

Thanks,
Robert.

      -----Original Message-----
      From: flo@rfc822.org [mailto:flo@rfc822.org] 
      Sent: Monday, May 27, 2002 2:15 PM
      To: Robert Rusek
      Cc: 'Ralf Baechle'; linux-mips@oss.sgi.com
      Subject: Re: Executing IRIX binary ?
      
      
      On Mon, May 27, 2002 at 01:32:43PM -0700, Robert Rusek wrote:
      > Ralf,
      > 
      > Looks like I have the kernal compiled with the IRIX 
      binary support.  
      > How do I go about executing the binaries?  When I try 
      to execute it 
      > tells me that the file is not found.
      
      Are you shure you have the dynamic loader + libc + other 
      libs of IRIX installed in your system ?
      
      Flo
      -- 
      Florian Lohoff                  flo@rfc822.org            
       +49-5201-669912
                              Heisenberg may have been here.
      



From owner-linux-mips@oss.sgi.com Mon May 27 23:45:12 2002
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From: Ralf Baechle <ralf@oss.sgi.com>
To: Robert Rusek <robru@teknuts.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: Executing IRIX binary ?
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On Mon, May 27, 2002 at 01:32:43PM -0700, Robert Rusek wrote:

> Looks like I have the kernal compiled with the IRIX binary support.  How
> do I go about executing the binaries?  When I try to execute it tells me
> that the file is not found.

The file it didn't find is the dynamic linker /usr/lib/libc.so.1.  You
have to install this file and others in special magic places.  Also the
kernel contains broken code to distinguish IRIX and Linux executables
which you'd have to fix first before the code has any chance of working.

  Ralf

From owner-linux-mips@oss.sgi.com Mon May 27 23:58:30 2002
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Subject: Updated 7.1 installation images 
To: linux-mips@oss.sgi.com (user alias)
Date: Tue, 28 May 2002 08:59:41 +0200 (MET DST)
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We have just updated our MIPS RedHat 7.1 installation images for our
development boards on ftp.mips.com.

All the latest packages from H.J.'s 7.1 miniport are there, as well as new
2.4.18 kernels.

/Hartvig


>From ftp.mips.com:

ftp> pwd
257 "/pub/linux/mips/installation/redhat7.1/02.00" is current directory.

ftp> dir
200 PORT command successful.
150 Opening ASCII mode data connection for /bin/ls.
total 748399
-r--r--r--   1 9618     40          13612 May 27 23:27 INSTALL
-r--r--r--   1 9618     40       383148032 May 27 23:32 MIPS_RedHat7.1_Release-02.00.iso
-r--r--r--   1 9618     40       382801920 May 27 23:29 MIPS_RedHat7.1_Release-02.00.tar
-r--r--r--   1 9618     40            585 May 27 23:27 README
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Date: Tue, 28 May 2002 17:26:09 +0900 (JST)
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To: linux-mips@oss.sgi.com
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Subject: Magic numbers about stack layout (again)
From: Atsushi Nemoto <nemoto@toshiba-tops.co.jp>
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>>>>> On Mon, 27 May 2002 23:11:56 -0700, Ralf Baechle <ralf@oss.sgi.com> said:
ralf> Modified files:
ralf> 	include/asm-mips: Tag: linux_2_4 processor.h 

ralf> Log message:
ralf> 	Daily fix of get_wchan(), bloddy piece of shit ...

I posted this message (and a patch) 9 month ago.  How about this?

>>>>> On Wed, 22 Aug 2001 14:45:47 +0900 (JST), Atsushi Nemoto <nemoto@toshiba-tops.co.jp> said:
nemoto> There are some magic constant numbers about stack layout in
nemoto> thread_saved_pc() and get_wchan() function.

nemoto> I made a patch to eliminate these magic numbers.  This patch analyzes
nemoto> some functions prologue codes in heuristic way at run-time.  "ps -l"
nemoto> (and "MAGIC SYSRQ" feature) works fine with this patch.

Unfortunately, binutils 2.9.5 generates wrong codes with this patch.
I think this is a bug of the binutils.  Newer binutils (I tested 2.12
and 2.12.1) or binutils 2.8.1 seems fine.

---
Atsushi Nemoto

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diff -ur linux.sgi/arch/mips/kernel/process.c linux/arch/mips/kernel/process.c
--- linux.sgi/arch/mips/kernel/process.c	Sun Aug  5 23:39:09 2001
+++ linux/arch/mips/kernel/process.c	Wed Aug 22 14:14:29 2001
@@ -19,6 +19,7 @@
 #include <linux/sys.h>
 #include <linux/user.h>
 #include <linux/a.out.h>
+#include <linux/init.h>
 
 #include <asm/bootinfo.h>
 #include <asm/cpu.h>
@@ -31,6 +32,7 @@
 #include <asm/io.h>
 #include <asm/elf.h>
 #include <asm/isadep.h>
+#include <asm/inst.h>
 
 void cpu_idle(void)
 {
@@ -196,6 +198,59 @@
 #define first_sched	((unsigned long) scheduling_functions_start_here)
 #define last_sched	((unsigned long) scheduling_functions_end_here)
 
+struct mips_frame_info schedule_frame;
+static struct mips_frame_info schedule_timeout_frame;
+static struct mips_frame_info sleep_on_frame;
+static struct mips_frame_info sleep_on_timeout_frame;
+static int mips_frame_info_initialized;
+static int __init get_frame_info(struct mips_frame_info *info, void *func)
+{
+	int i;
+	union mips_instruction *ip = (union mips_instruction *)func;
+	info->pc_offset = -1;
+	info->frame_offset = -1;
+	for (i = 0; i < 128; i++, ip++) {
+		/* if jal, jalr, jr, stop. */
+		if (ip->j_format.opcode == jal_op ||
+		    (ip->r_format.opcode == spec_op &&
+		     (ip->r_format.func == jalr_op ||
+		      ip->r_format.func == jr_op)))
+			break;
+		if (ip->i_format.opcode == sw_op &&
+		    ip->i_format.rs == 29) {
+			/* sw $ra, offset($sp) */
+			if (ip->i_format.rt == 31) {
+				if (info->pc_offset != -1)
+					break;
+				info->pc_offset =
+					ip->i_format.simmediate / sizeof(long);
+			}
+			/* sw $s8, offset($sp) */
+			if (ip->i_format.rt == 30) {
+				if (info->frame_offset != -1)
+					break;
+				info->frame_offset =
+					ip->i_format.simmediate / sizeof(long);
+			}
+		}
+	}
+	if (info->pc_offset == -1 || info->frame_offset == -1) {
+		printk("Can't analize prologue code at %p\n", func);
+		info->pc_offset = -1;
+		info->frame_offset = -1;
+		return -1;
+	}
+	return 0;
+}
+void __init frame_info_init(void)
+{
+	mips_frame_info_initialized =
+		!get_frame_info(&schedule_frame, schedule) &&
+		!get_frame_info(&schedule_timeout_frame, schedule_timeout) &&
+		!get_frame_info(&sleep_on_frame, sleep_on) &&
+		!get_frame_info(&sleep_on_timeout_frame, sleep_on_timeout);
+}
+
 /* get_wchan - a maintenance nightmare ...  */
 unsigned long get_wchan(struct task_struct *p)
 {
@@ -204,6 +259,8 @@
 	if (!p || p == current || p->state == TASK_RUNNING)
 		return 0;
 
+	if (!mips_frame_info_initialized)
+		return 0;
 	pc = thread_saved_pc(&p->thread);
 	if (pc < first_sched || pc >= last_sched) {
 		return pc;
@@ -220,23 +277,24 @@
 	goto schedule_timeout_caller;
 
 schedule_caller:
-	frame = ((unsigned long *)p->thread.reg30)[9];
-	pc    = ((unsigned long *)frame)[11];
+	/* schedule_timeout called by interruptible_sleep_on or sleep_on */
+	frame = ((unsigned long *)p->thread.reg30)[schedule_frame.frame_offset];
+	pc    = ((unsigned long *)frame)[sleep_on_frame.pc_offset];
 	return pc;
 
 schedule_timeout_caller:
 	/* Must be schedule_timeout ...  */
-	pc    = ((unsigned long *)p->thread.reg30)[10];
-	frame = ((unsigned long *)p->thread.reg30)[9];
+	pc    = ((unsigned long *)p->thread.reg30)[schedule_frame.pc_offset];
+	frame = ((unsigned long *)p->thread.reg30)[schedule_frame.frame_offset];
 
 	/* The schedule_timeout frame ...  */
-	pc    = ((unsigned long *)frame)[14];
-	frame = ((unsigned long *)frame)[13];
+	pc    = ((unsigned long *)frame)[schedule_timeout_frame.pc_offset];
+	frame = ((unsigned long *)frame)[schedule_timeout_frame.frame_offset];
 
 	if (pc >= first_sched && pc < last_sched) {
 		/* schedule_timeout called by interruptible_sleep_on_timeout */
-		pc    = ((unsigned long *)frame)[11];
-		frame = ((unsigned long *)frame)[10];
+		pc    = ((unsigned long *)frame)[sleep_on_timeout_frame.pc_offset];
+		frame = ((unsigned long *)frame)[sleep_on_timeout_frame.frame_offset];
 	}
 
 	return pc;
diff -ur linux.sgi/arch/mips/kernel/setup.c linux/arch/mips/kernel/setup.c
--- linux.sgi/arch/mips/kernel/setup.c	Sun Aug  5 23:39:15 2001
+++ linux/arch/mips/kernel/setup.c	Wed Aug 22 14:26:19 2001
@@ -518,12 +518,14 @@
 	void malta_setup(void);
 	void momenco_ocelot_setup(void);
 	void nino_setup(void);
+	void frame_info_init(void);
 
 	unsigned long bootmap_size;
 	unsigned long start_pfn, max_pfn, first_usable_pfn;
 
 	int i;
 
+	frame_info_init();
 #ifdef CONFIG_BLK_DEV_FD
 	fd_ops = &no_fd_ops;
 #endif
diff -ur linux.sgi/include/asm-mips/processor.h linux/include/asm-mips/processor.h
--- linux.sgi/include/asm-mips/processor.h	Sun Aug  5 23:41:29 2001
+++ linux/include/asm-mips/processor.h	Wed Aug 22 14:14:59 2001
@@ -217,6 +217,11 @@
 #define copy_segments(p, mm) do { } while(0)
 #define release_segments(mm) do { } while(0)
 
+struct mips_frame_info {
+	int frame_offset;
+	int pc_offset;
+};
+extern struct mips_frame_info schedule_frame;
 /*
  * Return saved PC of a blocked thread.
  */
@@ -228,7 +233,9 @@
 	if (t->reg31 == (unsigned long) ret_from_fork)
 		return t->reg31;
 
-	return ((unsigned long *)t->reg29)[10];
+	if (schedule_frame.pc_offset < 0)
+		return 0;
+	return ((unsigned long *)t->reg29)[schedule_frame.pc_offset];
 }
 
 /*

----Next_Part(Tue_May_28_17:26:09_2002_727)----

From owner-linux-mips@oss.sgi.com Tue May 28 09:51:33 2002
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Date: Tue, 28 May 2002 09:49:47 -0700
From: Jun Sun <jsun@mvista.com>
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To: William Jhun <wjhun@ayrnetworks.com>
CC: linux-mips@oss.sgi.com, ralf@oss.sgi.com, davem@redhat.com
Subject: Re: [PATCH] include/asm-mips/pci.h: More optimal cache behavior, added "prep" routines
References: <20020525131806.A4073@ayrnetworks.com> <20020525150302.A8264@ayrnetworks.com>
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William Jhun wrote:

> On Sat, May 25, 2002 at 01:18:06PM -0700, William Jhun wrote:
> 
>>When preparing a buffer for a DMA transfer, we've found it's more
>>optimal to only do a wback_inv if the direction is not known
>>(PCIDMA_BIDIRECTIONAL), only a wback if transfer is to the device
>>(PCIDMA_TO_DEVICE), and only an invalidate if from the device
>>(PCIDMA_FROM_DEVICE). Such a modification has made a small (yet
>>significant) improvement for one of our network drivers during a packet
>>forwarding rate test.
>>
> 
> *sigh*. On the platform we were testing on, we used our own cache code
> (rm7k with tertiary cache support) which has been well-tested for over a
> year now. In these routines, we implement dma_cache_wback and only do
> invalidates (no flush) for dma_cache_wback_inv. Now that I'm looking
> around in cache support for other MIPS CPUs, I see that all the _wback
> calls are not implemented and that many (or all?) of the _inv calls also
> flush the caches.
> 
> The patch below leaves the existing funtions alone and just adds the two
> pci_dma_prep_{sg,single}() calls.
> 
> My question is: why are these dma_cache_wback calls not implemented? And
> how come dma_cache_inv is treated the same as dma_cache_wback_inv? Are
> we doing something wrong by implementing these calls in our cache code
> as they are described?
> 


   In theory cache_wback and cache_inv are doing different things.  In 
practice, however, since the call must be made *before* dma transfer starts so 
the effects are same.  Of course, _inv() version is more efficient if it is 
implemented.

Jun



From owner-linux-mips@oss.sgi.com Tue May 28 10:00:02 2002
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Date: Tue, 28 May 2002 09:58:19 -0700
From: Jun Sun <jsun@mvista.com>
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To: Geert Uytterhoeven <geert@linux-m68k.org>
CC: "Steven J. Hill" <sjhill@realitydiluted.com>,
   "Kevin D. Kissell" <kevink@mips.com>,
   Linux/MIPS Development <linux-mips@oss.sgi.com>
Subject: Re: PCI Graphics/Video Card for Malta Board?
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Geert Uytterhoeven wrote:

> On Mon, 27 May 2002, Steven J. Hill wrote:
> 
>>Kevin D. Kissell wrote:
>>
>>>I'd like to get a video-capable graphics card up
>>>and running on a MIPS Malta board (therefore
>>>PCI), ideally something mainstream like ATI.
>>>Does anyone on the list have any positive or
>>>negative recommendations in terms of cards
>>>and particularly in terms of the degree to which
>>>the drivers (and PCI set-up) have been ported
>>>to MIPS/Linux?  I'll do what I must, but I hate
>>>re-inventing the wheel.
>>>
>>>
>>I can think of two things. First, a lot of graphics cards
>>rely on BIOS calls to be set up before the operating system
>>even boots. Second, I would stick to graphics cards that
>>have framebuffer support in the kernel as you stand at least
>>half a chance that those cards don't rely so heavily on a
>>peecee bios. Just my $.02.
>>
> 
> Even then, most frame buffer device drivers rely on the firmware (PC BIOS or
> SPARC/PPC Open Firmware) having set up the video card.
> 
> One of the exceptions is matroxfb, 


Steve Longerbeam has a fb driver with BIOS init for ATI Xpert98 card, which 
you can still buy.  Dan Malek also wrote a driver for MQ200.  If you ask 
around, I am sure you can the patch somewhere.

For a while, I also had 3dfx voodoo3 working.  Not sure about its status now. 
  You can find the patch at http://www.medex.hu/~danthe/tdfx/.

Jun


From owner-linux-mips@oss.sgi.com Tue May 28 10:18:05 2002
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To: Alexandr Andreev <andreev@niisi.msk.ru>
CC: linux-mips@oss.sgi.com
Subject: Re: 3 questions about linux-2.4.18 and R3000
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Alexandr Andreev wrote:

> Jun Sun wrote:
> 
>> I took a look of the arch_get_unmapped_area(),  and it looks fine to me.
>>
>> Can you try the following changes and let me know what happens?
>>
>> 1) change COLOUR_ALIGN
>> #define COLOUR_ALIGN(addr,pgoff)     addr
> 
> 
> OK, It works for me.
> 


That indicate the logic of function works.

So the problems might lie on something else:

1) some caller pass in non-zero addr but does not check the return addr and 
assume the addr remains the same.

2) given the reported toolchain, I will double-check to see if COLOUR_ALIGN() 
is compiled correctly.  It is mildly complex.


I would be also interested to know if removing filp condition would solve your 
problem.  Nobody has explained why this condition is needed for doing 
COLOUR_ALIGN().


>>
>> We have been using gcc 2.9.5 and binutils 2.10.x for R3000 CPUs for 
>> quite a  while with no problems.  It seems newer gcc and binutiles are 
>> fine too.
>>
> I understand, but is there any __official__ recommended versions of these
> utils? http://oss.sgi.com/mips/mips-howto.html is out-of-date :(
> 


Who are the "officiers" to decide on __official__ versions? :-)  If you are 
really uncomfortable with non-official stuff, you might want to consider 
paying some vendor and I am sure you will be given an "official" version.

Jun


From owner-linux-mips@oss.sgi.com Tue May 28 10:36:27 2002
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From: "Kevin D. Kissell" <kevink@mips.com>
To: "Jun Sun" <jsun@mvista.com>, "Geert Uytterhoeven" <geert@linux-m68k.org>
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Subject: Re: PCI Graphics/Video Card for Malta Board?
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From: "Jun Sun" <jsun@mvista.com>
> Geert Uytterhoeven wrote:
> 
> > On Mon, 27 May 2002, Steven J. Hill wrote:
> > 
> >>Kevin D. Kissell wrote:
> >>
> >>>I'd like to get a video-capable graphics card up
> >>>and running on a MIPS Malta board (therefore
> >>>PCI), ideally something mainstream like ATI.
> >>>Does anyone on the list have any positive or
> >>>negative recommendations in terms of cards
> >>>and particularly in terms of the degree to which
> >>>the drivers (and PCI set-up) have been ported
> >>>to MIPS/Linux?  I'll do what I must, but I hate
> >>>re-inventing the wheel.
> >>>
> >>>
> >>I can think of two things. First, a lot of graphics cards
> >>rely on BIOS calls to be set up before the operating system
> >>even boots. Second, I would stick to graphics cards that
> >>have framebuffer support in the kernel as you stand at least
> >>half a chance that those cards don't rely so heavily on a
> >>peecee bios. Just my $.02.
> >>
> > 
> > Even then, most frame buffer device drivers rely on the firmware (PC BIOS or
> > SPARC/PPC Open Firmware) having set up the video card.
> > 
> > One of the exceptions is matroxfb, 
> 
> 
> Steve Longerbeam has a fb driver with BIOS init for ATI Xpert98 card, which 
> you can still buy.

Yeah, but it's a pretty wimpy card (8MB) and has no TV output.
  
> Dan Malek also wrote a driver for MQ200.  

Which is essentially a handheld/webphone graphics chip,
for which the documentation is only available under NDA.
Not terribly useful for me, thanks.

> If you ask  around, I am sure you can the patch somewhere.

I *am* asking around - that's why I started this thread.

> 
> For a while, I also had 3dfx voodoo3 working.  Not sure about its status now. 
>   You can find the patch at http://www.medex.hu/~danthe/tdfx/.

3dfx, in case you hadn't heard, folded some time ago.

So it sounds like the Matrox G450 PCI is really the only
game in town...

            Kevin K.


From owner-linux-mips@oss.sgi.com Tue May 28 15:19:10 2002
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Date: Tue, 28 May 2002 18:19:31 -0400
From: Dan Malek <dan@embeddededge.com>
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CC: Jun Sun <jsun@mvista.com>, Geert Uytterhoeven <geert@linux-m68k.org>,
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 <linux-mips@oss.sgi.com>
Subject: Re: PCI Graphics/Video Card for Malta Board?
References: <Pine.GSO.4.21.0205271534430.15706-100000@vervain.sonytel.be> <3CF3B72B.4020600@mvista.com> <01da01c2066f$3ed63f40$10eca8c0@grendel>
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Kevin D. Kissell wrote:

>>Dan Malek also wrote a driver for MQ200.  

I can't really take credit for that :-).  It was a bunch of code
from various places I just turned into a driver.

> I *am* asking around - that's why I started this thread.

Look at some of the stuff from Epson.  You may find something there.

> So it sounds like the Matrox G450 PCI is really the only
> game in town...

It very well may be the only option.  I've been working with
"standard" graphic cards/chips for embedded devices for quite
some time.  The latest technology is always quite secret, seldom
even available under NDA.  Most of the cards I have used come
from the $5 cardboard box in one of the electronic salvage yards in
Silicon Valley.  Something so old they will tell you about the
registers on the board :-)


	-- Dan


From owner-linux-mips@oss.sgi.com Tue May 28 15:51:13 2002
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Subject: Re: PCI Graphics/Video Card for Malta Board?
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: Dan Malek <dan@embeddededge.com>
Cc: "Kevin D. Kissell" <kevink@mips.com>, Jun Sun <jsun@mvista.com>,
   Geert
	Uytterhoeven <geert@linux-m68k.org>,
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	 <linux-mips@oss.sgi.com>
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	<3CF40273.1000801@embeddededge.com>
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Old S3 cards are very easy to configure. 3Dfx Voodoo 2 is great as we
have full code to configure it -and- it can do 3D. Alas no utah-glx
support so you can't do X with 3d on it right now.



From owner-linux-mips@oss.sgi.com Wed May 29 01:18:30 2002
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Date: Wed, 29 May 2002 10:17:48 +0200 (MEST)
From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Alan Cox <alan@lxorguk.ukuu.org.uk>
cc: Dan Malek <dan@embeddededge.com>, "Kevin D. Kissell" <kevink@mips.com>,
   Jun Sun <jsun@mvista.com>, "Steven J. Hill" <sjhill@realitydiluted.com>,
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Subject: Re: PCI Graphics/Video Card for Malta Board?
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On 29 May 2002, Alan Cox wrote:
> Old S3 cards are very easy to configure. 3Dfx Voodoo 2 is great as we

<sarcastic>
I guess that's why we still don't have working frame buffer devices for them?
There are at least 3 frame buffer devices for the Trio floating around the net,
but none of them work on my cards.
</sarcastic>

Of course I'm part of the problem myself, since I never got anything out of the
Vision968 and Trio64V+ in my PPC box. Except by emulating the BIOS code and
using vga16fb...

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds


From owner-linux-mips@oss.sgi.com Wed May 29 03:16:00 2002
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Date: Wed, 29 May 2002 12:17:17 +0200
From: Brian Murphy <brian@murphy.dk>
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Hi,
    I have a port of linux-mips to the Lasat (later Eicon) platform(s) -
based on vr4300, vr5000 and vr4120 chips. I would very much like
to have the code incorporated in the CVS at OSS. How do I go
about this?

/Brian


From owner-linux-mips@oss.sgi.com Wed May 29 03:45:42 2002
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Date: Wed, 29 May 2002 12:46:57 +0200
From: Brian Murphy <brian@murphy.dk>
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Subject: pcnet32.c bug?
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If I don't apply the following patch to pcnet32.c then the network 
connection
on my vr5000 box is extremely jerky. It also seems quite sensible to have a
dma sync operation here.

any comments?

/Brian

--------------070203020806000606040209
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--- drivers/net/pcnet32.c	19 Mar 2002 16:40:55 -0000	1.1.1.1.2.1.2.6
+++ drivers/net/pcnet32.c	29 May 2002 09:57:33 -0000	1.13.4.2
@@ -1343,6 +1351,10 @@
 		if (!rx_in_place) {
 		    skb_reserve(skb,2); /* 16 byte align */
 		    skb_put(skb,pkt_len);	/* Make room */
+                    pci_dma_sync_single(lp->pci_dev, 
+				    lp->rx_skbuff[entry]->tail, 
+				    pkt_len,
+				    PCI_DMA_FROMDEVICE);
 		    eth_copy_and_sum(skb,
 				     (unsigned char *)(lp->rx_skbuff[entry]->tail),
 				     pkt_len,0);

--------------070203020806000606040209--


From owner-linux-mips@oss.sgi.com Wed May 29 04:45:58 2002
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Subject: Re: PCI Graphics/Video Card for Malta Board?
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Dan Malek <dan@embeddededge.com>, "Kevin D. Kissell" <kevink@mips.com>,
   Jun Sun <jsun@mvista.com>, "Steven J. Hill" <sjhill@realitydiluted.com>,
   Linux/MIPS Development
	 <linux-mips@oss.sgi.com>
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On Wed, 2002-05-29 at 09:17, Geert Uytterhoeven wrote:
> On 29 May 2002, Alan Cox wrote:
> > Old S3 cards are very easy to configure. 3Dfx Voodoo 2 is great as we

> Of course I'm part of the problem myself, since I never got anything out of the
> Vision968 and Trio64V+ in my PPC box. Except by emulating the BIOS code and
> using vga16fb...

I've had no problem with Russell King's ARM code. And for the 3dfx
voodoo2 (UKP 9 off ebay) none at all. The voodoo seems to have always
been designed to be totally soft configured and as its not a primary
video card the bios/firmware all leaves it alone


From owner-linux-mips@oss.sgi.com Wed May 29 05:32:04 2002
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Date: Wed, 29 May 2002 14:33:16 +0200
From: Brian Murphy <brian@murphy.dk>
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Subject: ioremap?
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In three files/drivers I have had problems with physical addresses not 
being ioremapped.
I include my patch to fix things up and request comments. How come 
others don't have similar
problems?

/Brian

--------------060405030301000005000902
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--- drivers/ide/ide-dma.c	2001/10/19 01:24:24	1.9
+++ drivers/ide/ide-dma.c	2002/05/29 11:49:14
@@ -741,7 +741,8 @@
 	if (hwif->mate && hwif->mate->dma_base) {
 		dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
 	} else {
-		dma_base = pci_resource_start(dev, 4);
+		dma_base = ioremap(pci_resource_start(dev, 4), 
+				pci_resource_len(dev, 4));
 		if (!dma_base) {
 			printk("%s: dma_base is invalid (0x%04lx)\n", name, dma_base);
 			dma_base = 0;
--- drivers/ide/ide-pci.c	2001/11/19 13:53:59	1.20
+++ drivers/ide/ide-pci.c	2002/05/29 11:49:15
@@ -716,8 +716,10 @@
 		if (IDE_PCI_DEVID_EQ(d->devid, DEVID_HPT366) && (port) && (class_rev < 0x03))
 			return;
 		if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE || (dev->class & (port ? 4 : 1)) != 0) {
-			ctl  = dev->resource[(2*port)+1].start;
-			base = dev->resource[2*port].start;
+			ctl = ioremap(pci_resource_start(dev, (2*port)+1), 
+			              pci_resource_len(dev, (2*port)+1));
+			base = ioremap(pci_resource_start(dev, 2*port), 
+			              pci_resource_len(dev, 2*port));
 			if (!(ctl & PCI_BASE_ADDRESS_IO_MASK) ||
 			    !(base & PCI_BASE_ADDRESS_IO_MASK)) {
 				printk("%s: IO baseregs (BIOS) are reported as MEM, report to <andre@linux-ide.org>.\n", d->name);
--- drivers/net/pcnet32.c	2002/02/26 05:59:35	1.33.2.1
+++ drivers/net/pcnet32.c	2002/05/29 11:49:18
@@ -494,7 +494,8 @@
     }
     pci_set_master(pdev);
 
-    ioaddr = pci_resource_start (pdev, 0);
+    ioaddr = ioremap(pci_resource_start (pdev, 0),
+		    pci_resource_len (pdev, 0));
     printk(KERN_INFO "    ioaddr=%#08lx  resource_flags=%#08lx\n", ioaddr, pci_resource_flags (pdev, 0));
     if (!ioaddr) {
         printk (KERN_ERR "no PCI IO resources, aborting\n");


--------------060405030301000005000902--


From owner-linux-mips@oss.sgi.com Wed May 29 07:42:57 2002
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From: Kevin Paul Herbert <kph@ayrnetworks.com>
Subject: Re: pcnet32.c bug?
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Yes, this fix is correct... I made the same patch locally... sorry we 
haven't submited it yet... turns out we've dropeed this one from our 
own latest sources; thanks for the reminder. :-)

Note that there is another problem with cache line invalidation and 
the use of pci_dma_sync_single(), where one can get stale entries in 
the cache when the buffer is next re-used for DMA.

My co-worker Will Jhun <mailto:wjhun@ayrnetworks.com> just sent 
e-mail on the subject of problems with the cache invalidation 
routines last Saturday, with Message-ID: 
<20020525131806.A4073@ayrnetworks.com>

Kevin

At 12:46 PM +0200 5/29/02, Brian Murphy wrote:
>If I don't apply the following patch to pcnet32.c then the network connection
>on my vr5000 box is extremely jerky. It also seems quite sensible to have a
>dma sync operation here.
>
>any comments?
>
>/Brian
>
>
>--- drivers/net/pcnet32.c	19 Mar 2002 16:40:55 -0000	1.1.1.1.2.1.2.6
>+++ drivers/net/pcnet32.c	29 May 2002 09:57:33 -0000	1.13.4.2
>@@ -1343,6 +1351,10 @@
>  		if (!rx_in_place) {
>  		    skb_reserve(skb,2); /* 16 byte align */
>  		    skb_put(skb,pkt_len);	/* Make room */
>+                    pci_dma_sync_single(lp->pci_dev,
>+				    lp->rx_skbuff[entry]->tail,
>+				    pkt_len,
>+				    PCI_DMA_FROMDEVICE);
>  		    eth_copy_and_sum(skb,
>  				     (unsigned char 
>*)(lp->rx_skbuff[entry]->tail),
>  				     pkt_len,0);


-- 

From owner-linux-mips@oss.sgi.com Wed May 29 09:08:34 2002
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Message-ID: <009701c2072b$2b1e2820$4c00a8c0@prefect>
From: "Bradley D. LaRonde" <brad@ltc.com>
To: "Brian Murphy" <brian@murphy.dk>, "linux-mips" <linux-mips@oss.sgi.com>
References: <3CF4CA8C.9040802@murphy.dk>
Subject: Re: ioremap?
Date: Wed, 29 May 2002 12:09:10 -0400
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Looks like those are for io (inb, outb, etc.) not mem (readb, writeb, etc.).
io addresses shouldn't be ioremapped.

Regards,
Brad

----- Original Message -----
From: "Brian Murphy" <brian@murphy.dk>
To: "linux-mips" <linux-mips@oss.sgi.com>
Sent: Wednesday, May 29, 2002 8:33 AM
Subject: ioremap?


> In three files/drivers I have had problems with physical addresses not
> being ioremapped.
> I include my patch to fix things up and request comments. How come
> others don't have similar
> problems?
>
> /Brian
>


----------------------------------------------------------------------------
----


> --- drivers/ide/ide-dma.c 2001/10/19 01:24:24 1.9
> +++ drivers/ide/ide-dma.c 2002/05/29 11:49:14
> @@ -741,7 +741,8 @@
>   if (hwif->mate && hwif->mate->dma_base) {
>   dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
>   } else {
> - dma_base = pci_resource_start(dev, 4);
> + dma_base = ioremap(pci_resource_start(dev, 4),
> + pci_resource_len(dev, 4));
>   if (!dma_base) {
>   printk("%s: dma_base is invalid (0x%04lx)\n", name, dma_base);
>   dma_base = 0;
> --- drivers/ide/ide-pci.c 2001/11/19 13:53:59 1.20
> +++ drivers/ide/ide-pci.c 2002/05/29 11:49:15
> @@ -716,8 +716,10 @@
>   if (IDE_PCI_DEVID_EQ(d->devid, DEVID_HPT366) && (port) && (class_rev <
0x03))
>   return;
>   if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE || (dev->class & (port ?
4 : 1)) != 0) {
> - ctl  = dev->resource[(2*port)+1].start;
> - base = dev->resource[2*port].start;
> + ctl = ioremap(pci_resource_start(dev, (2*port)+1),
> +               pci_resource_len(dev, (2*port)+1));
> + base = ioremap(pci_resource_start(dev, 2*port),
> +               pci_resource_len(dev, 2*port));
>   if (!(ctl & PCI_BASE_ADDRESS_IO_MASK) ||
>       !(base & PCI_BASE_ADDRESS_IO_MASK)) {
>   printk("%s: IO baseregs (BIOS) are reported as MEM, report to
<andre@linux-ide.org>.\n", d->name);
> --- drivers/net/pcnet32.c 2002/02/26 05:59:35 1.33.2.1
> +++ drivers/net/pcnet32.c 2002/05/29 11:49:18
> @@ -494,7 +494,8 @@
>      }
>      pci_set_master(pdev);
>
> -    ioaddr = pci_resource_start (pdev, 0);
> +    ioaddr = ioremap(pci_resource_start (pdev, 0),
> +     pci_resource_len (pdev, 0));
>      printk(KERN_INFO "    ioaddr=%#08lx  resource_flags=%#08lx\n",
ioaddr, pci_resource_flags (pdev, 0));
>      if (!ioaddr) {
>          printk (KERN_ERR "no PCI IO resources, aborting\n");
>
>


From owner-linux-mips@oss.sgi.com Wed May 29 09:13:23 2002
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Jun Sun wrote:

>
> I would be also interested to know if removing filp condition would 
> solve your problem.  Nobody has explained why this condition is needed 
> for doing COLOUR_ALIGN().
>
Removing of filp condition solves the problem too. So, as I understand, I
need to remove filp condition instead of fix COLOUR_ALIGN(), isn't it?
And what about that patch of local_flush_tlb_page(), will anybody apply it
to CVS?




From owner-linux-mips@oss.sgi.com Wed May 29 09:49:32 2002
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Subject: __flush_cache_all() miscellany
From: "Justin Carlson" <justinca@cs.cmu.edu>
To: linux-mips@oss.sgi.com
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Looking at the cache routines, I've noticed that there's been a
relatively recent introduction of a __flush_cache_all() routine. 
Looking at oss.sgi.com's cvs logs, I see this comment:

>Introduce __flush_cache_all() which flushes the cache no matter if
>this operation is necessary from the mm point of view or not.

Some questions:

Which caches does this apply to?  It looks like the current
implementations assume L1 only.

Would anyone have a problem with renaming this function?  To me, at
least, it's rather confusing to have all of:

flush_cache_all()
_flush_cache_all()
__flush_cache_all()
___flush_cache_all()

defined, especially when the latter two mean something significantly
different from the former two.  I'd prefer calling the new one
{_}force_flush_l1_caches() or somesuch.

In a related note, one of the few places this routine is called is the
kgdb stub routines (in arch/mips/kernel/gdb-stub.c):

void set_async_breakpoint(unsigned int epc)
{
	int cpu = smp_processor_id();

	async_bp[cpu].addr = epc;
	async_bp[cpu].val  = *(unsigned *)epc;
	*(unsigned *)epc = BP;
	__flush_cache_all();
}

Shouldn't that be a flush_icache_range() call anyways?

Thanks,
  Justin



From owner-linux-mips@oss.sgi.com Wed May 29 10:04:11 2002
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Subject: Re: ioremap?
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Bradley D. LaRonde wrote:

>Looks like those are for io (inb, outb, etc.) not mem (readb, writeb, etc.).
>io addresses shouldn't be ioremapped.
>
O.K.  I have now used set_io_port_base to set the base address to KSEG1.
What should be ioremapped then?

/Brian



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To: Shiyi Ma <syma@avanticorp.com>
Cc: linux-gcc@vger.kernel.org, Kenneth Albanowski <kjahds@kjahds.com>,
   Mat Hostetter <mat@lcs.mit.edu>,
   Andy Dougherty <doughera@lafcol.lafayette.edu>,
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Subject: The Linux binutils 2.12.90.0.9 is released.
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This is the beta release of binutils 2.12.90.0.9 for Linux, which is
based on binutils 2002 0526 in CVS on sourecs.redhat.com plus various
changes. It is purely for Linux.

The Linux/mips support is added. You have to use

# rpm --target=[mips|mipsel] -ta binutils-xx.xx.xx.xx.xx.tar.gz

to build it. Or you can read mips/README in the source tree to apply
the mips patches and build it by hand.

FYI, the binutils man pages now are generated from the texinfo files
during the build. As the result, those man pages may be changed for
each build even if you only have done

# ..../configure ...
# make

That means you may have many failures on the man pages when you apply
the binutils diffs next time. Those failures can be safely ignored.
You should remove all those man pages from your source tree by

# find -name *.1 | xargs rm -f
# find -name *.1.rej | xargs rm -f
# find -name *.man | xargs rm -f
# find -name *.man.rej | xargs rm -f

I am planning to make the public release soon. Please test it as much
as you can.

Please report any bugs related to binutils 2.12.90.0.9 to hjl@lucon.org.

For arm-linux targets, there are some important differences in behaviour 
between these tools and binutils 2.9.1.0.x.  The linker emulation name has 
changed from elf32arm{26} to armelf_linux{26}.  Also, the "-p" flag must be 
passed with the linker when working with object files (or static libraries) 
created using older versions of the assembler.  If this flag is omitted the 
linker will silently generate bad output when given old input files.

To get the correct behaviour from gcc, amend the *link section of your specs 
file as follows:

*link:
%{h*} %{version:-v}    %{b} %{Wl,*:%*}    %{static:-Bstatic}    %{shared:-shared}    %{symbolic:-Bsymbolic}    %{rdynamic:-export-dynamic}    %{!dynamic-linker: -dynamic-linker /lib/ld-linux.so.2}    -X    %{mbig-endian:-EB} %{mapcs-26:-m armelf_linux26} %{!mapcs-26:-m armelf_linux} -p


Changes from binutils 2.12.90.0.7:

1. Update from binutils 2002 0526.
2. Support "-z muldefs".

Changes from binutils 2.12.90.0.4:

1. Update from binutils 2002 0423.
2. ELF EH frame bug fix.
3. MIPS ELF visibility bug fix.

Changes from binutils 2.12.90.0.3:

1. Update from binutils 2002 0408.
2. Bug fixes for ELF/sparc.
3. Bug fixes for ELF/CRIS.

Changes from binutils 2.12.90.0.1:

1. Update from binutils 2002 0323.
2. Fix linking a.out relocatable files with ELF.
3. Fix a PPC altivec assembler bug.

Changes from binutils 2.11.93.0.2:

1. Update from binutils 2002 0307.
2. Add the .preinit_array/.init_array/.fini_array support.
3. Fix eh_frame.
4. Turn on combreloc by default.
5. Enable gprof for Linux/mips.

Changes from binutils 2.11.92.0.12.3:

1. Update from binutils 2002 0207.
2. Fix a weak symbol alpha linker bug for glibc.
3. More support for gcc 3.1.

Changes from binutils 2.11.92.0.12:

1. Fix a regression in 2.11.92.0.12 when linking with none-ELF object
files.

Changes from binutils 2.11.92.0.10:

1. Update from binutils 2001 1121.
2. Fix a linker symbol version bug for common symbols.
3. Update handling relocations against the discarded sections. You may
need to apply the kernel patch enclosed here to your kernel source. If
you still see things like

drivers/char/char.o(.data+0x46b4): undefined reference to `local symbols in discarded section .text.exit'

in the final kernel link, that means you have compiled a driver into
the kernel which has a reference to the symbol in a discarded section.
Kernel 2.4.17 or above should work fine.

4. Support "-march=xxx -mipsN" for mips gas if they are compatible.

Changes from binutils 2.11.92.0.7:

1. Update from binutils 2001 1021.
2. Fix the ELF/PPC linker.
3. Fix the ELF/cris linker.
4. Fix ELF strip.

Changes from binutils 2.11.92.0.5:

1. Update from binutils 2001 1016.
2. Fix all breakages introduced in 2.11.92.0.12.

Changes from binutils 2.11.90.0.31:

1. Update from binutils 2001 1005.
2. Support gcc 3.1 for ia64.
3. Support prelink for ELF/PPC.
4. Fix an ELF/x86 linker bug for Oracle.
5. Fix a weak symbol bug.
6. Support locale.

Changes from binutils 2.11.90.0.29:

1. Update from binutils 2001 0830.
2. Fix a mips linker bug.

Changes from binutils 2.11.90.0.27:

1. Update from binutils 2001 0827.
2. Fix an alpha assembler bug.
3. Fix an ia64 linker bug.
4. Fix a mips linker bug.
5. Support `-z combreloc|nocombreloc' in linker.

Changes from binutils 2.11.90.0.25:

1. Update from binutils 2001 0810.
2. Fix an x86 linker bug.

Changes from binutils 2.11.90.0.24:

1. Update from binutils 2001 0726.
2. Fix an x86 assembler bug.
3. "make check" in the windres test in binutils may call uudecode. We
are working on it.
4. "make check" fails the windres test in binutils if the i386/pe
is enabled in bfd. Fixed in the next release.
5. "make check" has 2 failures in the ld-selective test in ld on
Linux/alpha. They should be marked xfail. Fixed in the next release.

Changes from binutils 2.11.90.0.23:

1. Update from binutils 2001 0714.
2. Fix Sparc/ElF for Linux/sparc.
3. Fix Alpha/ELF for gcc 3.0.

Changes from binutils 2.11.90.0.19:

1. Update from binutils 2001 0706.
2. Fix objcopy/strip broken by accident.
3. Avoid COPY relocs on ia32.
4. Fix the ia64 assembler.
5. This release may not work on Linux/sparc due to the unaligned
relocation changes, which are not handled by all versions of glibc.
The current glibc in CVS on sourceware should be ok. The last known
working binutils for Linux/sparc is 2.11.90.0.8. We are working on it.

Changes from binutils 2.11.90.0.15:

1. Update from binutils 2001 0620.
2. Fix a static linking the PIC object files on ia32.
3. Add the verion script support for --export-dynamic. It can be used
to selectively export dynamic symbols from the executables.

Changes from binutils 2.11.90.0.8:

1. Update from binutils 2001 0610.
2. Fix a gas bug for gcc 3.0.

Changes from binutils 2.11.90.0.7:

1. Update from binutils 2001 0512.
2. Fix some P/III SSE 2 assembler bugs.
3. Fix DT_NEEDED and symbol version bugs.
4. Support hidden versioned symbols in DSOs.

Changes from binutils 2.11.90.0.6:

1. Update from binutils 2001 0427.
2. Fix the -Bsymbolic bug introduced in binutils 2.11.90.0.5.

Changes from binutils 2.11.90.0.5:

1. Update from binutils 2001 0425.
2. Update "ld --multilib-dir PATH".

Changes from binutils 2.11.90.0.4:

1. Update from binutils 2001 0414.
2. Fix an ia64 assembler bug.
3. Change Linux/MIPS to use the SVR4 MIPS ABI instead of the IRIX ABI.
since there are no supports for the IRIX ABI in glibc. The current
Linux/MIPS targets are elf64-tradlittlemips for little endian MIPS
instead of elf32-littlemips and elf64-tradbigmips for big endian MIPS
instead of elf32-bigmips. Glibc, gcc and kernel may have to be modified
for this change. 

Changes from binutils 2.11.90.0.1:

1. Update from binutils 2001 0401.
2. Fix a gas bug for the gcc from the CVS main trunk. It involves some
changes in gas. I compiled kernel 2.2.18, gcc and glibc under
Linux/ia32. The resulting binaries work fine. 
3. Fix the linker core dump on unsupported ELF binaries.

Changes from binutils 2.10.91.0.4:

1. Update from binutils 2001 0309.

Changes from binutils 2.10.91.0.2:

1. Update from binutils 2001 0223.
2. More ia64 bug fixes.

Changes from binutils 2.10.1.0.7:

1. Update from binutils 2001 0215.
2. More ia64 bug fixes. Support EFI and "ld -relax" on ia64.
3. Fix a weak definition, -Bsymbolic, non-PIC bug for ia32.

Changes from binutils 2.10.1.0.4:

1. Update from binutils 2001 0206.
2. Enable the IA64 support.
3. Now you need to use

# ld --oformat TARGET

instead of

# ld -oformat TARGET

The Linux kernel build may be affected. BTW

# ld --oformat TARGET

should work with all previous releases of binutils.

Changes from binutils 2.10.1.0.2:

1. Update from binutils 2000 1221.

Changes from binutils 2.10.0.33:

1. Update from binutils 2000 1119.
2. It has some symbol versioning related updates.

Changes from binutils 2.10.0.32:

1. Update from binutils 2000 1018.
2. A proper ELF/PPC visibility fix.
3. m68k-a.out is supposed to be fixed.

Changes from binutils 2.10.0.31:

1. Update from binutils 2000 1014.
2. An ELF/PPC weak symbol bug fix.
3. A new linkonce section name approach.
4. m68k-a.out is still broken. To be fixed.

Changes from binutils 2.10.0.29:

1. Update from binutils 2000 1011.
2. Back out the linkonce section name change so that C++ will work.
A different approach is being worked on.
3. m68k-a.out is known to be broken. To be fixed.

Changes from binutils 2.10.0.26:

1. Update from binutils 2000 1008.

Changes from binutils 2.10.0.24:

1. Update from binutils 2000 0907.

Changes from binutils 2.10.0.18:

1. Update from binutils 2000 0823. Fix DT_RPATH/DT_RUNPATH handling.
Fix the ELF/ia32 DSO not compiled with PIC.
2. Try to fix the ELF visibility bug on PPC with glibc 2.2.

Changes from binutils 2.10.0.12:

1. Update from binutils 2000 0720.
2. Fix the DT_NEEDED link bug.
3. Add the new DT_XXXX dynamic tags. Glibc 2.2 will use them at least
on libpthread.so.

Changes from binutils 2.10.0.9:

1. Update from binutils 2000 0701. Fix the parallel build in ld when PE
is enabled.

Changes from binutils 2.9.5.0.46:

1. Update from binutils 2000 0617. The demangler support for the new
g++ ABI. Minor fix for the ELF visibility. Fix linking non-ELF
relocatable object files under ELF with symbol versioning.
2. Support for linking PE relocatable object files under ia32/ELF.

Changes from binutils 2.9.5.0.42:

1. Update from binutils 2000 0604. The ELF visibility attribuite should
work correctly now.
2. The ia32 assembler has changed the way it assembles the "jmp"
instructions to the global symbols. The old assembler will optimize the
jump to the global symbol defined in the same source file so that no
relocation will be used. The new assembler will use relocation for
global jumps. It will mainly affect PIC asm code. The segment like

	.globl  __setjmp
__setjmp:
	...
	jmp __sigsetjmp
	...
	.globl __sigsetjmp
__sigsetjmp:

is no longer PIC safe since "jmp __sigsetjmp" jumps to a global symbol
and relocation will be used. Instead, it can be changed to

	.globl  __setjmp
__setjmp:
	...
	jmp sigsetjmp
	...
	.globl __sigsetjmp
__sigsetjmp:
sigsetjmp:

so that "jmp sigsetjmp" jumps to a local symbol and the new assembler
will optimize out the relocation.

Changes from binutils 2.9.5.0.41:

1. Update from binutils 2000 0512.
2. Add testsuite for ELF visibility.

Changes from binutils 2.9.5.0.37:

1. Update from binutils 2000 0502.
2. Support STV_HIDDEN and STV_INTERNAL.

Changes from binutils 2.9.5.0.35:

1. Update from binutils 2000 0418.
2. Fix an ld demangle style option bug.

Changes from binutils 2.9.5.0.34:

1. Update from binutils 2000 0412. Fix a relocation bug which affects
the Linux kernel compilation.
2. An ELF/PPC linker script update.

Changes from binutils 2.9.5.0.33:

1. Update from binutils 2000 0404. Fix the bug report bug.

Changes from binutils 2.9.5.0.32:

1. Update from binutils 2000 0403. Fix the 16bit ia32 assembler bug.

Changes from binutils 2.9.5.0.31:

1. Update from binutils 2000 0331. Fix the Linux/ARM assembler bug.
2. Fix a Debian assembler security bug.

Changes from binutils 2.9.5.0.29:

1. Update from binutils 2000 0319.
2. An ELF/alpha bug is fixed.

Changes from binutils 2.9.5.0.27:

1. Update from binutils 2000 0301.
2. A demangler bug is fixed.
3. A better fix for undefined symbols with -Bsymbolic when building
shared library.

Changes from binutils 2.9.5.0.24:

1. Update from binutils 2000 0204.
2. Added -taso to linker on alpha.
3. Fixed a -shared -Bsymbolic bug when PIC is not used.

Changes from binutils 2.9.5.0.22:

1. Update from binutils 2000 0113.
2. A symbol version bug is fixed.
3. A -Bsymbolic bug is fixed.

Changes from binutils 2.9.5.0.21:

1. Update from binutils 1999 1202.
2. Remove a MIPS/ELF change.
3. Enable SOM for HPPA.

Changes from binutils 2.9.5.0.19:

1. Update from binutils 1999 1122. An ia32 gas bug is fixed.

Changes from binutils 2.9.5.0.16:

1. Update from binutils 1999 1104.
2. i370 is changed to use EM_S370 and ELFOSABI_LINUX. Update readelf.
3. Fix Compaq's demangler support.

Changes from binutils 2.9.5.0.14:

1. Update from binutils 1999 1012. A gas bug which affects Linux 2.3.21
is fixed.
2. i370 update.
3. The new demangler code. You should use "--style=xxx" to select the
demnangle style instead of "--lang=xxx".

Changes from binutils 2.9.5.0.13:

1. Update from binutils 1999 0925.
2. Fix a -s and linker script bug.

Changes from binutils 2.9.5.0.12:

1. Update from binutils 1999 0922.
2. i370 update.

Changes from binutils 2.9.5.0.11:

1. Update from binutils 1999 0910. It fixed a PIC linker bug on ix86
   and sparc introduced in the last release.
2. i370 update.

Changes from binutils 2.9.5.0.10:

1. Update from binutils 1999 0906. It fixed a PIC linker bug on ix86
   and sparc.
2. Remove elf/hppa since it is WIP.

Changes from binutils 2.9.5.0.8:

1. Update from binutils 1999 0831. It allows spaces around '(' and ')'
   in x86 FP register names.

Changes from binutils 2.9.5.0.7:

1. Update from binutils 1999 0821.
2. Some MIPS changes.

Changes from binutils 2.9.5.0.6:

1. Update from binutils 1999 0813.
2. i370 update.

Changes from binutils 2.9.5.0.5:

1. Update from binutils 1999 0809. An ELF/Sparc ld bug is fixed.

Changes from binutils 2.9.5.0.4:

1. Update from binutils 1999 0806. A Solaris/Sparc gas bug is fixed.
2. Remove mips gas patches from binutils 2.9.1.0.25.

Changes from binutils 2.9.5.0.3:

1. Update from binutils 1999 0801.
2. Support for real mode x86 gcc.

Changes from binutils 2.9.4.0.8:

1. Update from binutils 1999 0719. A libc 5 related bug fix.
2. Fix a typo in mips gas.

Changes from binutils 2.9.4.0.7:

1. Update from binutils 1999 0710. A weak symbol bug

http://egcs.cygnus.com/ml/egcs-bugs/1999-07/msg00129.html

is fixed.

Changes from binutils 2.9.4.0.6:

1. Update from binutils 1999 0626.

Changes from binutils 2.9.4.0.5:

1. Update from binutils 1999 0620.
2. Remove my fwait fix and use the one in cvs.
3. Use "--only-section=section" instead of "--extract-section=section".
   for objcopy.

Changes from binutils 2.9.4.0.4:

1. Update from binutils 1999 0612.
2. Remove various temporary fixes of mine since those bugs are fixed
   now.

Changes from binutils 2.9.4.0.3:

1. Update from binutils 1999 0611.
2. Remove my ELF/Alpha bfd changes.
3. Use the local symbol copy fix in binutils 1999 0611.

Changes from binutils 2.9.4.0.2:

1. Update from binutils 1999 0607.
2. Remove my Sparc hacks.
3. Fix local symbol copy.

Changes from binutils 2.9.4.0.1:

1. Update from binutils 1999 0606.
2. Restore relocation overflow checking in binutils 2.9.1.0.25 so that
   Linux kernel can build.
3. Fix i370 for the new gas.

Changes from binutils 1999 0605:

1. Fix a -Bsymbolic bug for Linux/alpha.
2. Add ELF/i370.
3. Fix 8/16-bit relocations for i386.
4. Add --redefine-sym=old_form=new_form to objcopy.
5. Add "-j section" for objcopy.
6. Fix i386 disassembler for fwait.
7. Fix a Sparc asm bug.
8. Add Ada demangle support.
9. Fix MIPS/ELF bugs.
10. Add some vxworks suppport.
11. Fix a.out assembler.

The file list:

1. binutils-2.12.90.0.9.tar.gz. Source code.
2. binutils-2.12.90.0.7-2.12.90.0.9.diff.gz. Patch against the
   previous beta source code.
3. binutils-2.12.90.0.9-1.i386.rpm. IA-32 binary RPM for RedHat 7.3.

There is no separate source rpm. You can do

# rpm -ta binutils-2.12.90.0.9.tar.gz

to create both binary and source rpms.

The primary sites for the beta Linux binutils are:

1. http://ftp.kernel.org/pub/linux/devel/binutils/

Thanks.


H.J. Lu
hjl@lucon.org
04/29/2002

From owner-linux-mips@oss.sgi.com Wed May 29 11:41:49 2002
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From: "Bradley D. LaRonde" <brad@ltc.com>
To: "Brian Murphy" <brian@murphy.dk>
Cc: "linux-mips" <linux-mips@oss.sgi.com>
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Subject: Re: ioremap?
Date: Wed, 29 May 2002 13:25:45 -0400
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----- Original Message -----
From: "Brian Murphy" <brian@murphy.dk>
Cc: "linux-mips" <linux-mips@oss.sgi.com>
Sent: Wednesday, May 29, 2002 1:05 PM
Subject: Re: ioremap?


> Bradley D. LaRonde wrote:
>
> >Looks like those are for io (inb, outb, etc.) not mem (readb, writeb,
etc.).
> >io addresses shouldn't be ioremapped.
> >
> O.K.  I have now used set_io_port_base to set the base address to KSEG1.
> What should be ioremapped then?

Any address passed to readb, writeb, etc.  For example, a PCI mem resource
address.

Regards,
Brad


From owner-linux-mips@oss.sgi.com Wed May 29 12:26:19 2002
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Subject: Re: __flush_cache_all() miscellany
From: "Justin Carlson" <justinca@cs.cmu.edu>
To: linux-mips@oss.sgi.com
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 charset=us-ascii
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Here's a patch against cvs that does the rename.  Unless anyone has
objections, Ralf, could  you apply this?

While doing this, I've noticed that the whole mips tree is horribly
inconsistent in terms of the cache flushing syscalls (sys_cacheflush and
sys_sysmips->CACHE_FLUSH).  

Here's what the different ports appear to flush given one of these
syscall:

andes:  l1 and l2
lexra:  l1 icache
mips32: l1 icache/dcache
r3k:    l1 icache
r4k:    l1 icache/dcache
r5432:  l1 icache/dcache
r5900:  l1 icache/dcache
rm7k:   l1 icache/dcache
sb1:    l1 icache/dcache
sr7100: l1 and l2
tx39:   l1 icache
tx49:   li icache/dcache

Some of these are blatantly wrong with respect to the cacheflush
syscall; it defines flags for flushing the icache, dcache, or both.  In
the latter two cases, the lexra, r3k, and tx39 are not doing what was
requested.  I doubt this matters for any significant userspace app, but
it would be nice to at least be consistent.

As for the sysmips system call, I've  not been able to dig up the
semantics.  (Actually, I don't really see why we have both ways of
flushing the cache at all...some historical cruft?).  Anyone have a
helpful pointer to docs on the subject?

Thanks,
  Justin


--=-Xa1GCNyIzk6j4NZOBlXP
Content-Disposition: attachment; 
 filename=rename___flush_cache_all.patch
Content-Transfer-Encoding: quoted-printable
Content-Type: text/plain; 
 charset=iso-8859-1; 
 name=rename___flush_cache_all.patch

? rename___flush_cache_all.patch
Index: arch/mips/kernel/gdb-stub.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/gdb-stub.c,v
retrieving revision 1.7
diff -u -r1.7 gdb-stub.c
--- arch/mips/kernel/gdb-stub.c	9 May 2002 17:22:34 -0000	1.7
+++ arch/mips/kernel/gdb-stub.c	29 May 2002 19:00:41 -0000
@@ -578,7 +578,7 @@
 	async_bp.addr =3D epc;
 	async_bp.val  =3D *(unsigned *)epc;
 	*(unsigned *)epc =3D BP;
-	__flush_cache_all();
+	force_flush_cache_all();
 }
=20
=20
@@ -805,7 +805,7 @@
 			 * NB: We flush both caches, just to be sure...
 			 */
=20
-			__flush_cache_all();
+			force_flush_cache_all();
 			return;
 			/* NOTREACHED */
 			break;
@@ -834,7 +834,7 @@
 			 * use breakpoints and continue, instead.
 			 */
 			single_step(regs);
-			__flush_cache_all();
+			force_flush_cache_all();
 			return;
 			/* NOTREACHED */
=20
Index: arch/mips/kernel/sysmips.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/sysmips.c,v
retrieving revision 1.10
diff -u -r1.10 sysmips.c
--- arch/mips/kernel/sysmips.c	26 Nov 2001 19:18:13 -0000	1.10
+++ arch/mips/kernel/sysmips.c	29 May 2002 19:00:41 -0000
@@ -84,7 +84,7 @@
 		goto out;
=20
 	case FLUSH_CACHE:
-		__flush_cache_all();
+		force_flush_cache_all();
 		retval =3D 0;
 		goto out;
=20
Index: arch/mips/mm/c-andes.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-andes.c,v
retrieving revision 1.4
diff -u -r1.4 c-andes.c
--- arch/mips/mm/c-andes.c	19 Feb 2002 17:43:02 -0000	1.4
+++ arch/mips/mm/c-andes.c	29 May 2002 19:00:41 -0000
@@ -70,7 +70,7 @@
 	}
 }
=20
-static void andes___flush_cache_all(void)
+static void andes_force_flush_cache_all(void)
 {
 	andes_flush_cache_l1();
 	andes_flush_cache_l2();
@@ -105,7 +105,7 @@
 	_copy_page =3D andes_copy_page;
=20
 	_flush_cache_all =3D andes_flush_cache_all;
-	___flush_cache_all =3D andes___flush_cache_all;
+	_force_flush_cache_all =3D andes_force_flush_cache_all;
 	_flush_cache_mm =3D andes_flush_cache_mm;
 	_flush_cache_page =3D andes_flush_cache_page;
 	_flush_page_to_ram =3D andes_flush_page_to_ram;
Index: arch/mips/mm/c-lexra.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-lexra.c,v
retrieving revision 1.1
diff -u -r1.1 c-lexra.c
--- arch/mips/mm/c-lexra.c	9 May 2002 17:22:35 -0000	1.1
+++ arch/mips/mm/c-lexra.c	29 May 2002 19:00:42 -0000
@@ -282,7 +282,7 @@
 	dcache_size =3D 1024 * 2;
=20
 	_flush_cache_all =3D lx_flush_cache_all;
-	___flush_cache_all =3D lx_flush_cache_all;=20
+	_force_flush_cache_all =3D lx_flush_cache_all;=20
 	_flush_cache_mm =3D lx_flush_cache_mm;
 	_flush_cache_range =3D lx_flush_cache_range;
 	_flush_cache_page =3D lx_flush_cache_page;
Index: arch/mips/mm/c-mips32.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-mips32.c,v
retrieving revision 1.4
diff -u -r1.4 c-mips32.c
--- arch/mips/mm/c-mips32.c	28 Jan 2002 23:15:25 -0000	1.4
+++ arch/mips/mm/c-mips32.c	29 May 2002 19:00:42 -0000
@@ -590,7 +590,7 @@
 	_clear_page =3D (void *)mips32_clear_page_dc;
 	_copy_page =3D (void *)mips32_copy_page_dc;
 	_flush_cache_all =3D mips32_flush_cache_all_pc;
-	___flush_cache_all =3D mips32_flush_cache_all_pc;
+	_force_flush_cache_all =3D mips32_flush_cache_all_pc;
 	_flush_cache_mm =3D mips32_flush_cache_mm_pc;
 	_flush_cache_range =3D mips32_flush_cache_range_pc;
 	_flush_cache_page =3D mips32_flush_cache_page_pc;
@@ -606,7 +606,7 @@
 static void __init setup_scache_funcs(void)
 {
         _flush_cache_all =3D mips32_flush_cache_all_sc;
-        ___flush_cache_all =3D mips32_flush_cache_all_sc;
+        _force_flush_cache_all =3D mips32_flush_cache_all_sc;
 	_flush_cache_mm =3D mips32_flush_cache_mm_sc;
 	_flush_cache_range =3D mips32_flush_cache_range_sc;
 	_flush_cache_page =3D mips32_flush_cache_page_sc;
@@ -666,5 +666,5 @@
 	_flush_cache_sigtramp =3D mips32_flush_cache_sigtramp;
 	_flush_icache_range =3D mips32_flush_icache_range;	/* Ouch */
=20
-	__flush_cache_all();
+	force_flush_cache_all();
 }
Index: arch/mips/mm/c-r3k.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-r3k.c,v
retrieving revision 1.6
diff -u -r1.6 c-r3k.c
--- arch/mips/mm/c-r3k.c	19 Feb 2002 17:37:17 -0000	1.6
+++ arch/mips/mm/c-r3k.c	29 May 2002 19:00:42 -0000
@@ -240,7 +240,7 @@
 {
 }
 =20
-static inline void r3k___flush_cache_all(void)
+static inline void r3k_force_flush_cache_all(void)
 {
 	r3k_flush_icache_range(KSEG0, KSEG0 + icache_size);
 }
@@ -328,7 +328,7 @@
 	r3k_probe_cache();
=20
 	_flush_cache_all =3D r3k_flush_cache_all;
-	___flush_cache_all =3D r3k___flush_cache_all;
+	_force_flush_cache_all =3D r3k_force_flush_cache_all;
 	_flush_cache_mm =3D r3k_flush_cache_mm;
 	_flush_cache_range =3D r3k_flush_cache_range;
 	_flush_cache_page =3D r3k_flush_cache_page;
Index: arch/mips/mm/c-r4k.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-r4k.c,v
retrieving revision 1.9
diff -u -r1.9 c-r4k.c
--- arch/mips/mm/c-r4k.c	28 May 2002 21:03:31 -0000	1.9
+++ arch/mips/mm/c-r4k.c	29 May 2002 19:00:42 -0000
@@ -1362,7 +1362,7 @@
 		_flush_cache_page =3D r4k_flush_cache_page_d32i32;
 		break;
 	}
-	___flush_cache_all =3D _flush_cache_all;
+	_force_flush_cache_all =3D _flush_cache_all;
=20
 	_flush_icache_page =3D r4k_flush_icache_page_p;
 #ifdef CONFIG_NONCOHERENT_IO
@@ -1448,7 +1448,7 @@
 		_copy_page =3D r4k_copy_page_s128;
 		break;
 	}
-	___flush_cache_all =3D _flush_cache_all;
+	_force_flush_cache_all =3D _flush_cache_all;
 	_flush_icache_page =3D r4k_flush_icache_page_s;
 #ifdef CONFIG_NONCOHERENT_IO
 	_dma_cache_wback_inv =3D r4k_dma_cache_wback_inv_sc;
@@ -1504,5 +1504,5 @@
 		_flush_cache_sigtramp =3D r4600v20k_flush_cache_sigtramp;
 	}
=20
-	__flush_cache_all();
+	force_flush_cache_all();
 }
Index: arch/mips/mm/c-r5432.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-r5432.c,v
retrieving revision 1.6
diff -u -r1.6 c-r5432.c
--- arch/mips/mm/c-r5432.c	30 Nov 2001 18:34:09 -0000	1.6
+++ arch/mips/mm/c-r5432.c	29 May 2002 19:00:42 -0000
@@ -463,7 +463,7 @@
 	_clear_page =3D r5432_clear_page_d32;
 	_copy_page =3D r5432_copy_page_d32;
 	_flush_cache_all =3D r5432_flush_cache_all_d32i32;
-	___flush_cache_all =3D r5432_flush_cache_all_d32i32;
+	_force_flush_cache_all =3D r5432_flush_cache_all_d32i32;
 	_flush_page_to_ram =3D r5432_flush_page_to_ram_d32;
 	_flush_cache_mm =3D r5432_flush_cache_mm_d32i32;
 	_flush_cache_range =3D r5432_flush_cache_range_d32i32;
@@ -476,5 +476,5 @@
 	_flush_cache_sigtramp =3D r5432_flush_cache_sigtramp;
 	_flush_icache_range =3D r5432_flush_icache_range;	/* Ouch */
=20
-	__flush_cache_all();
+	force_flush_cache_all();
 }
Index: arch/mips/mm/c-r5900.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-r5900.c,v
retrieving revision 1.2
diff -u -r1.2 c-r5900.c
--- arch/mips/mm/c-r5900.c	27 Nov 2001 17:53:47 -0000	1.2
+++ arch/mips/mm/c-r5900.c	29 May 2002 19:00:42 -0000
@@ -307,7 +307,7 @@
 	_flush_cache_range =3D r5900_flush_cache_range_d64i64;
 	_flush_cache_page =3D r5900_flush_cache_page_d64i64;
=20
-	___flush_cache_all =3D _flush_cache_all;
+	_force_flush_cache_all =3D _flush_cache_all;
 	_flush_icache_range =3D r5900_flush_icache_range_i64;
 	_flush_icache_page =3D r5900_flush_icache_page_i64; /* FIXME */
=20
Index: arch/mips/mm/c-rm7k.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-rm7k.c,v
retrieving revision 1.5
diff -u -r1.5 c-rm7k.c
--- arch/mips/mm/c-rm7k.c	21 Apr 2002 20:01:13 -0000	1.5
+++ arch/mips/mm/c-rm7k.c	29 May 2002 19:00:42 -0000
@@ -66,7 +66,7 @@
 		  "i" (Page_Invalidate_T));
 }
=20
-static void __flush_cache_all_d32i32(void)
+static void force_flush_cache_all_d32i32(void)
 {
 	blast_dcache32();
 	blast_icache32();
@@ -105,7 +105,7 @@
 	/*
 	 * FIXME: This is overdoing things and harms performance.
 	 */
-	__flush_cache_all_d32i32();
+	force_flush_cache_all_d32i32();
 }
=20
 static void rm7k_flush_icache_page(struct vm_area_struct *vma,
@@ -116,7 +116,7 @@
 	 * temporary mapping and use hit_invalidate operation to flush out
 	 * the line from the cache.
 	 */
-	__flush_cache_all_d32i32();
+	force_flush_cache_all_d32i32();
 }
=20
=20
@@ -331,7 +331,7 @@
 	_copy_page =3D rm7k_copy_page;
=20
 	_flush_cache_all =3D rm7k_flush_cache_all_d32i32;
-	___flush_cache_all =3D __flush_cache_all_d32i32;
+	_force_flush_cache_all =3D force_flush_cache_all_d32i32;
 	_flush_cache_mm =3D rm7k_flush_cache_mm_d32i32;
 	_flush_cache_range =3D rm7k_flush_cache_range_d32i32;
 	_flush_cache_page =3D rm7k_flush_cache_page_d32i32;
@@ -344,5 +344,5 @@
 	_dma_cache_wback =3D rm7k_dma_cache_wback;
 	_dma_cache_inv =3D rm7k_dma_cache_inv;
=20
-	__flush_cache_all_d32i32();
+	force_flush_cache_all_d32i32();
 }
Index: arch/mips/mm/c-sb1.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-sb1.c,v
retrieving revision 1.14
diff -u -r1.14 c-sb1.c
--- arch/mips/mm/c-sb1.c	21 Apr 2002 20:01:13 -0000	1.14
+++ arch/mips/mm/c-sb1.c	29 May 2002 19:00:42 -0000
@@ -74,7 +74,7 @@
 {
 }
=20
-static void local_sb1___flush_cache_all(void)
+static void local_sb1_force_flush_cache_all(void)
 {
 	/*
 	 * Haven't worried too much about speed here; given that we're flushing
@@ -126,17 +126,17 @@
 }
=20
 #ifdef CONFIG_SMP
-extern void sb1___flush_cache_all_ipi(void *ignored);
-asm("sb1___flush_cache_all_ipi =3D local_sb1___flush_cache_all");
+extern void sb1_force_flush_cache_all_ipi(void *ignored);
+asm("sb1_force_flush_cache_all_ipi =3D local_sb1_force_flush_cache_all");
=20
-static void sb1___flush_cache_all(void)
+static void sb1_force_flush_cache_all(void)
 {
-	smp_call_function(sb1___flush_cache_all_ipi, 0, 1, 1);
-	local_sb1___flush_cache_all();
+	smp_call_function(sb1_force_flush_cache_all_ipi, 0, 1, 1);
+	local_sb1_force_flush_cache_all();
 }
 #else
-extern void sb1___flush_cache_all(void);
-asm("sb1___flush_cache_all =3D local_sb1___flush_cache_all");
+extern void sb1_force_flush_cache_all(void);
+asm("sb1_force_flush_cache_all =3D local_sb1_force_flush_cache_all");
 #endif
=20
=20
@@ -257,7 +257,7 @@
 	 * conservatively flush the entire caches on all processors
 	 * (ouch).
 	 */
-	sb1___flush_cache_all();
+	sb1_force_flush_cache_all();
 }
=20
 static inline void protected_flush_icache_line(unsigned long addr)
@@ -506,7 +506,7 @@
 	_copy_page =3D sb1_copy_page;
=20
 	_flush_cache_all =3D sb1_flush_cache_all;
-	___flush_cache_all =3D sb1___flush_cache_all;
+	_force_flush_cache_all =3D sb1_force_flush_cache_all;
 	_flush_cache_mm =3D (void (*)(struct mm_struct *))sb1_nop;
 	_flush_cache_range =3D (void *) sb1_nop;
 	_flush_page_to_ram =3D sb1_flush_page_to_ram;
Index: arch/mips/mm/c-sr7100.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-sr7100.c,v
retrieving revision 1.1
diff -u -r1.1 c-sr7100.c
--- arch/mips/mm/c-sr7100.c	19 Jan 2002 21:17:35 -0000	1.1
+++ arch/mips/mm/c-sr7100.c	29 May 2002 19:00:42 -0000
@@ -419,7 +419,7 @@
 static void __init setup_scache_funcs(void)
 {
         _flush_cache_all =3D sr7100_flush_cache_all_pc;
-        ___flush_cache_all =3D sr7100_nuke_caches;
+        _force_flush_cache_all =3D sr7100_nuke_caches;
 	_flush_cache_mm =3D sr7100_flush_cache_mm_pc;
 	_flush_cache_range =3D sr7100_flush_cache_range_pc;
 	_flush_cache_page =3D sr7100_flush_cache_page_pc;
Index: arch/mips/mm/c-tx39.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-tx39.c,v
retrieving revision 1.5
diff -u -r1.5 c-tx39.c
--- arch/mips/mm/c-tx39.c	30 Nov 2001 18:34:09 -0000	1.5
+++ arch/mips/mm/c-tx39.c	29 May 2002 19:00:43 -0000
@@ -286,7 +286,7 @@
 	case CPU_TX3912:
 		/* TX39/H core (writethru direct-map cache) */
 		_flush_cache_all	=3D tx39h_flush_icache_all;
-		___flush_cache_all	=3D tx39h_flush_icache_all;
+		_force_flush_cache_all	=3D tx39h_flush_icache_all;
 		_flush_cache_mm		=3D (void *) tx39h_flush_icache_all;
 		_flush_cache_range	=3D (void *) tx39h_flush_icache_all;
 		_flush_cache_page	=3D (void *) tx39h_flush_icache_all;
@@ -308,7 +308,7 @@
 		/* board-dependent init code may set WBON */
=20
 		_flush_cache_all =3D tx39_flush_cache_all;
-		___flush_cache_all =3D tx39_flush_cache_all;
+		_force_flush_cache_all =3D tx39_flush_cache_all;
 		_flush_cache_mm =3D tx39_flush_cache_mm;
 		_flush_cache_range =3D tx39_flush_cache_range;
 		_flush_cache_page =3D tx39_flush_cache_page;
Index: arch/mips/mm/c-tx49.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-tx49.c,v
retrieving revision 1.3
diff -u -r1.3 c-tx49.c
--- arch/mips/mm/c-tx49.c	30 Nov 2001 18:34:09 -0000	1.3
+++ arch/mips/mm/c-tx49.c	29 May 2002 19:00:43 -0000
@@ -423,7 +423,7 @@
 		_flush_cache_page =3D r49_flush_cache_page_d32i32;
 		break;
 	}
-	___flush_cache_all =3D _flush_cache_all;
+	_force_flush_cache_all =3D _flush_cache_all;
=20
 	_flush_icache_page =3D r4k_flush_icache_page;
=20
@@ -434,5 +434,5 @@
 	_flush_cache_sigtramp =3D r4k_flush_cache_sigtramp;
 	_flush_icache_range =3D r4k_flush_icache_range;	/* Ouch */
=20
-	__flush_cache_all();
+	force_flush_cache_all();
 }
Index: arch/mips/mm/init.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/init.c,v
retrieving revision 1.6
diff -u -r1.6 init.c
--- arch/mips/mm/init.c	18 Mar 2002 22:48:17 -0000	1.6
+++ arch/mips/mm/init.c	29 May 2002 19:00:43 -0000
@@ -49,7 +49,7 @@
 asmlinkage int sys_cacheflush(void *addr, int bytes, int cache)
 {
 	/* This should flush more selectivly ...  */
-	__flush_cache_all();
+	force_flush_cache_all();
=20
 	return 0;
 }
Index: arch/mips/mm/loadmmu.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/loadmmu.c,v
retrieving revision 1.13
diff -u -r1.13 loadmmu.c
--- arch/mips/mm/loadmmu.c	9 May 2002 17:22:35 -0000	1.13
+++ arch/mips/mm/loadmmu.c	29 May 2002 19:00:43 -0000
@@ -24,7 +24,7 @@
=20
 /* Cache operations. */
 void (*_flush_cache_all)(void);
-void (*___flush_cache_all)(void);
+void (*_force_flush_cache_all)(void);
 void (*_flush_cache_mm)(struct mm_struct *mm);
 void (*_flush_cache_range)(struct mm_struct *mm, unsigned long start,
 			  unsigned long end);
Index: arch/mips64/mm/c-sb1.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips64/mm/c-sb1.c,v
retrieving revision 1.6
diff -u -r1.6 c-sb1.c
--- arch/mips64/mm/c-sb1.c	24 Apr 2002 17:30:19 -0000	1.6
+++ arch/mips64/mm/c-sb1.c	29 May 2002 19:00:43 -0000
@@ -111,24 +111,24 @@
 		  "r" (KSEG0), "i" (Index_Invalidate_I));
 }
=20
-static void local_sb1___flush_cache_all(void)
+static void local_sb1_force_flush_cache_all(void)
 {
 	local_sb1___flush_dcache_all();
 	local_sb1___flush_icache_all();
 }
=20
 #ifdef CONFIG_SMP
-extern void sb1___flush_cache_all_ipi(void *ignored);
-asm("sb1___flush_cache_all_ipi =3D local_sb1___flush_cache_all");
+extern void sb1_force_flush_cache_all_ipi(void *ignored);
+asm("sb1_force_flush_cache_all_ipi =3D local_sb1_force_flush_cache_all");
=20
-static void sb1___flush_cache_all(void)
+static void sb1_force_flush_cache_all(void)
 {
-	smp_call_function(sb1___flush_cache_all_ipi, 0, 1, 1);
-	local_sb1___flush_cache_all();
+	smp_call_function(sb1_force_flush_cache_all_ipi, 0, 1, 1);
+	local_sb1_force_flush_cache_all();
 }
 #else
-extern void sb1___flush_cache_all(void);
-asm("sb1___flush_cache_all =3D local_sb1___flush_cache_all");
+extern void sb1_force_flush_cache_all(void);
+asm("sb1_force_flush_cache_all =3D local_sb1_force_flush_cache_all");
 #endif
=20
=20
@@ -256,7 +256,7 @@
 	 *
 	 * Bumping the ASID may well be cheaper, need to experiment ...
 	 */
-	sb1___flush_cache_all();
+	sb1_force_flush_cache_all();
 }
=20
 static inline void protected_flush_icache_line(unsigned long addr)
@@ -505,7 +505,7 @@
 	_copy_page =3D sb1_copy_page;
=20
 	_flush_cache_all =3D sb1_flush_cache_all;
-	___flush_cache_all =3D sb1___flush_cache_all;
+	_force_flush_cache_all =3D sb1_force_flush_cache_all;
 	_flush_cache_mm =3D (void (*)(struct mm_struct *))sb1_nop;
 	_flush_cache_range =3D (void *) sb1_nop;
 	_flush_page_to_ram =3D sb1_flush_page_to_ram;
Index: arch/mips64/mm/loadmmu.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/arch/mips64/mm/loadmmu.c,v
retrieving revision 1.6
diff -u -r1.6 loadmmu.c
--- arch/mips64/mm/loadmmu.c	19 Feb 2002 17:43:02 -0000	1.6
+++ arch/mips64/mm/loadmmu.c	29 May 2002 19:00:43 -0000
@@ -25,7 +25,7 @@
=20
 /* Cache operations. */
 void (*_flush_cache_all)(void);
-void (*___flush_cache_all)(void);
+void (*_force_flush_cache_all)(void);
 void (*_flush_cache_mm)(struct mm_struct *mm);
 void (*_flush_cache_range)(struct mm_struct *mm, unsigned long start,
                            unsigned long end);
Index: include/asm-mips/pgtable.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/pgtable.h,v
retrieving revision 1.17
diff -u -r1.17 pgtable.h
--- include/asm-mips/pgtable.h	21 Apr 2002 20:34:31 -0000	1.17
+++ include/asm-mips/pgtable.h	29 May 2002 19:00:44 -0000
@@ -33,7 +33,7 @@
  *  - flush_icache_all() flush the entire instruction cache
  */
 extern void (*_flush_cache_all)(void);
-extern void (*___flush_cache_all)(void);
+extern void (*_force_flush_cache_all)(void);
 extern void (*_flush_cache_mm)(struct mm_struct *mm);
 extern void (*_flush_cache_range)(struct mm_struct *mm, unsigned long star=
t,
 	unsigned long end);
@@ -49,7 +49,7 @@
 #define flush_dcache_page(page)			do { } while (0)
=20
 #define flush_cache_all()		_flush_cache_all()
-#define __flush_cache_all()		___flush_cache_all()
+#define force_flush_cache_all()		_force_flush_cache_all()
 #define flush_cache_mm(mm)		_flush_cache_mm(mm)
 #define flush_cache_range(mm,start,end)	_flush_cache_range(mm,start,end)
 #define flush_cache_page(vma,page)	_flush_cache_page(vma, page)
Index: include/asm-mips64/pgtable.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/pgtable.h,v
retrieving revision 1.14
diff -u -r1.14 pgtable.h
--- include/asm-mips64/pgtable.h	28 May 2002 20:25:38 -0000	1.14
+++ include/asm-mips64/pgtable.h	29 May 2002 19:00:44 -0000
@@ -28,7 +28,7 @@
  *  - flush_page_to_ram(page) write back kernel page to ram
  */
 extern void (*_flush_cache_all)(void);
-extern void (*___flush_cache_all)(void);
+extern void (*_force_flush_cache_all)(void);
 extern void (*_flush_cache_mm)(struct mm_struct *mm);
 extern void (*_flush_cache_range)(struct mm_struct *mm, unsigned long star=
t,
 	unsigned long end);
@@ -47,7 +47,7 @@
=20
=20
 #define flush_cache_all()		_flush_cache_all()
-#define __flush_cache_all()		___flush_cache_all()
+#define force_flush_cache_all()		_force_flush_cache_all()
 #define flush_dcache_page(page)		do { } while (0)
=20
 #ifdef CONFIG_CPU_R10000

--=-Xa1GCNyIzk6j4NZOBlXP--


From owner-linux-mips@oss.sgi.com Wed May 29 12:48:29 2002
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Date: Wed, 29 May 2002 21:50:10 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Justin Carlson <justinca@cs.cmu.edu>
cc: linux-mips@oss.sgi.com, ralf@oss.sgi.com
Subject: Re: __flush_cache_all() miscellany
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On 29 May 2002, Justin Carlson wrote:

> Here's a patch against cvs that does the rename.  Unless anyone has
> objections, Ralf, could  you apply this?

 That looks fine to me.  I'd keep the leading double underscore, though --
it acts as a warning sign the function is internal and low-level and thus
it should not be used without an appropriate justification.

> While doing this, I've noticed that the whole mips tree is horribly
> inconsistent in terms of the cache flushing syscalls (sys_cacheflush and
> sys_sysmips->CACHE_FLUSH).  

 Ugh, it's not the only place of inconsistency...

> Here's what the different ports appear to flush given one of these
> syscall:
> 
> andes:  l1 and l2
> lexra:  l1 icache
> mips32: l1 icache/dcache
> r3k:    l1 icache
> r4k:    l1 icache/dcache
> r5432:  l1 icache/dcache
> r5900:  l1 icache/dcache
> rm7k:   l1 icache/dcache
> sb1:    l1 icache/dcache
> sr7100: l1 and l2
> tx39:   l1 icache
> tx49:   li icache/dcache
> 
> Some of these are blatantly wrong with respect to the cacheflush
> syscall; it defines flags for flushing the icache, dcache, or both.  In
> the latter two cases, the lexra, r3k, and tx39 are not doing what was
> requested.  I doubt this matters for any significant userspace app, but
> it would be nice to at least be consistent.

 Well, at least r3k uses WT for dcache, so it really doesn't matter unless
what you want to achieve is to hit performance.  I suspect this is also
the case for the others that ignore dcache flushes.  The L1 vs L2 issue
should be investigated where applicable. 

 This reminds me to check ld.so (and libdl) for missing sys_cacheflush()
invocations as well...

> As for the sysmips system call, I've  not been able to dig up the
> semantics.  (Actually, I don't really see why we have both ways of
> flushing the cache at all...some historical cruft?).  Anyone have a
> helpful pointer to docs on the subject?

 It's compatibility crap, like the whole sysmips() stuff, I am afraid. 
Use sys_cacheflush() normally. 

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Wed May 29 12:52:46 2002
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From: Karsten Merker <karsten@excalibur.cologne.de>
To: Brian Murphy <brian@murphy.dk>
Cc: linux-mips <linux-mips@oss.sgi.com>
Subject: Re: New platforms
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On Wed, May 29, 2002 at 12:17:17PM +0200, Brian Murphy wrote:

>     I have a port of linux-mips to the Lasat (later Eicon) platform(s) -
> based on vr4300, vr5000 and vr4120 chips. I would very much like
> to have the code incorporated in the CVS at OSS. How do I go
> about this?

Usually by splitting your patches into small chunks (one patch for
one feature) and submitting them to Ralf Baechle (ralf@gnu.org) and/or 
to this list.

Regards,
Karsten
-- 
#include <standard_disclaimer>
Nach Paragraph 28 Abs. 3 Bundesdatenschutzgesetz widerspreche ich der Nutzung
oder Uebermittlung meiner Daten fuer Werbezwecke oder fuer die Markt- oder
Meinungsforschung.

From owner-linux-mips@oss.sgi.com Wed May 29 13:09:43 2002
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Dear Sir,

we are searching for used formwork 1 000 sqm modular, typ PERI TRIO or DOKA FRAMAX

Please send usoffer with list price pictures and location.

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> Hi,
>     I have a port of linux-mips to the Lasat (later Eicon) platform(s) -
> based on vr4300, vr5000 and vr4120 chips. I would very much like
> to have the code incorporated in the CVS at OSS. How do I go
> about this?

Please at a look at the Linux MIPS project at sourceforge. We already have
several VR chipsets supported. 

http://linux-mips.sf.net


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Subject: Re: __flush_cache_all() miscellany
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cc: linux-mips@oss.sgi.com, ralf@oss.sgi.com
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On Wed, 2002-05-29 at 12:50, Maciej W. Rozycki wrote:
> On 29 May 2002, Justin Carlson wrote:
> 
> > Here's a patch against cvs that does the rename.  Unless anyone has
> > objections, Ralf, could  you apply this?
> 
>  That looks fine to me.  I'd keep the leading double underscore, though --
> it acts as a warning sign the function is internal and low-level and thus
> it should not be used without an appropriate justification.
> 

Yes, you're right, it's not a standard function to have.  But I'm
already wondering if this is not the right thing to do.  See below.

>  Well, at least r3k uses WT for dcache, so it really doesn't matter unless
> what you want to achieve is to hit performance.  I suspect this is also
> the case for the others that ignore dcache flushes.  The L1 vs L2 issue
> should be investigated where applicable. 

Are the general semantics of the thing just broken, then?  We already
ignore the arguments to sys_cacheflush; would redefining the syscall to
mean "flush the caches in such a way that I won't get stale instructions
from this address range" actually break any current programs? 
(Evidently not, if several ports are already doing it that way)...

More to the point, does __flush_cache_all() serve any useful purpose at
all, or can it just be replaced with appropriate invocations of
flush_icache_range()?   Other than internal use for the individual port
cache routines, it's *only* used in the syscalls and the gdb stub. 

I'd like to hear the rationale for __flush_cache_all() from the original
author; it appears to have shown up in CVS a little more than a year
ago, but I don't know who sent the patch to Ralf.  Ralf, do you
remember?

Thanks,
  Justin




From owner-linux-mips@oss.sgi.com Wed May 29 13:56:01 2002
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From: "Kevin D. Kissell" <kevink@mips.com>
To: "Justin Carlson" <justinca@cs.cmu.edu>, <linux-mips@oss.sgi.com>
Cc: <ralf@oss.sgi.com>
References: <1022691053.7644.16.camel@ldt-sj3-022.sj.broadcom.com> <1022700389.7644.155.camel@ldt-sj3-022.sj.broadcom.com>
Subject: Re: __flush_cache_all() miscellany
Date: Wed, 29 May 2002 23:03:20 +0200
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> While doing this, I've noticed that the whole mips tree is horribly
> inconsistent in terms of the cache flushing syscalls (sys_cacheflush and
> sys_sysmips->CACHE_FLUSH).  
> 
> Here's what the different ports appear to flush given one of these
> syscall:
> 
> andes:  l1 and l2
> lexra:  l1 icache
> mips32: l1 icache/dcache
> r3k:    l1 icache
> r4k:    l1 icache/dcache
> r5432:  l1 icache/dcache
> r5900:  l1 icache/dcache
> rm7k:   l1 icache/dcache
> sb1:    l1 icache/dcache
> sr7100: l1 and l2
> tx39:   l1 icache
> tx49:   li icache/dcache
> 
> Some of these are blatantly wrong with respect to the cacheflush
> syscall; it defines flags for flushing the icache, dcache, or both.  In
> the latter two cases, the lexra, r3k, and tx39 are not doing what was
> requested.  I doubt this matters for any significant userspace app, but
> it would be nice to at least be consistent.
> 
> As for the sysmips system call, I've  not been able to dig up the
> semantics.  (Actually, I don't really see why we have both ways of
> flushing the cache at all...some historical cruft?).  Anyone have a
> helpful pointer to docs on the subject?

I agree that things need to be straightened out a bit here,
or at least better documented, but things may not be as bad 
as you think, depending on the actual use of the system calls.  
Specifically, if what one is worried about is ensuring that a 
modification to memory gets picked up by the instruction 
stream, as in setting/clearing a breakpoint or executing a JIT,
one does not need to flush the dcache *if* the dcache
is write-through in the first place - as it is for most if
not all of the processors you list above as flushing the
icache only.  (As a parenthetical note, future MIPS
processors won't need a system call to deal with 
instruction stream modifications, but we need to deal
with the here-and-now).

While trampolines, breakpointing and JITing are the main 
uses of user-mode cache manipulation (drivers are a whole 
'nother story), we really should have distinct capabilities for 
I-stream modification and for explicit synchronizations of 
the data storage hierarchy, for non-coherent multiprocessors
and user-manipulated DMA buffers.  As to whether
those capabilities should be distinguished by system
call (sysmips vs. cacheflush) or by parameter to the
same system call, I don't have enough data to form
an opinion at this point.

            Kevin K.


From owner-linux-mips@oss.sgi.com Wed May 29 13:58:39 2002
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Date: Wed, 29 May 2002 23:00:21 +0200 (MET DST)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Justin Carlson <justinca@cs.cmu.edu>
cc: linux-mips@oss.sgi.com, ralf@oss.sgi.com
Subject: Re: __flush_cache_all() miscellany
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On 29 May 2002, Justin Carlson wrote:

> Are the general semantics of the thing just broken, then?  We already
> ignore the arguments to sys_cacheflush; would redefining the syscall to
> mean "flush the caches in such a way that I won't get stale instructions
> from this address range" actually break any current programs? 
> (Evidently not, if several ports are already doing it that way)...

 You mean removing the DCACHE operation?  The overlying _flush_cache() 
library function is specified by the MIPS ABI supplement, so we shouldn't
really redefine it.  Also a reasonable use for it may exist -- a userland
program touching hardware directly (say X11) may want to use cached
accesses for performance reasons (e.g. because cache can do prefetches on
reads).

 I guess the intent for the ICACHE operation is to assure ICACHE vs DCACHE
coherency and the intent for the DCACHE operation is to assure DCACHE vs
RAM coherency.  If the operations do not work in this way for a given
backend, then there is a bug in it. 

> More to the point, does __flush_cache_all() serve any useful purpose at
> all, or can it just be replaced with appropriate invocations of
> flush_icache_range()?   Other than internal use for the individual port
> cache routines, it's *only* used in the syscalls and the gdb stub. 

 It does serve a useful purpose.  Or at least it should.  This reminds me
of adding flushing of WB caches at a system shutdown.  The function should
remain at least for this purpose. 

 If there are places you are absolutely sure flush_icache_range() would
suffice, feel free to replace the call.  There are not many
__flush_cache_all() invocations.

> I'd like to hear the rationale for __flush_cache_all() from the original
> author; it appears to have shown up in CVS a little more than a year
> ago, but I don't know who sent the patch to Ralf.  Ralf, do you
> remember?

 I converted a few flush_cache_all() invocations to __flush_cache_all() 
where appropriate late last year, but the function is a bit older.  I
think you might dig the linux-kernel list archives for a discussion on the
semantics of flush_cache_all() (it's a nop for many MIPS CPUs) and
friends.  The short description in Documentation/cachetlb.txt is a bit
insufficient, I'm afraid. 

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


From owner-linux-mips@oss.sgi.com Wed May 29 14:06:51 2002
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Date: Wed, 29 May 2002 14:07:59 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Justin Carlson <justinca@cs.cmu.edu>
Cc: linux-mips@oss.sgi.com
Subject: Re: __flush_cache_all() miscellany
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In-Reply-To: <1022691053.7644.16.camel@ldt-sj3-022.sj.broadcom.com>; from justinca@cs.cmu.edu on Wed, May 29, 2002 at 09:50:52AM -0700
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On Wed, May 29, 2002 at 09:50:52AM -0700, Justin Carlson wrote:

> Looking at the cache routines, I've noticed that there's been a
> relatively recent introduction of a __flush_cache_all() routine. 
> Looking at oss.sgi.com's cvs logs, I see this comment:
> 
> >Introduce __flush_cache_all() which flushes the cache no matter if
> >this operation is necessary from the mm point of view or not.
> 
> Some questions:
> 
> Which caches does this apply to?  It looks like the current
> implementations assume L1 only.

The operation got introduced for the R10000 where we only need to flush
the caches during initialization or the (unlikely on Origin) case of

> Would anyone have a problem with renaming this function?  To me, at
> least, it's rather confusing to have all of:

No.  You may have noticed that I already introduced a bunch of local_*()
functions for the TLB stuff for the same reason - the old functions had
poor names.  The common Linux conventions to use extra underscores for a
more basic version of a function (like get_user vs __get_user etc.) is
frequently not expressive enough.

> flush_cache_all()
> _flush_cache_all()
> __flush_cache_all()
> ___flush_cache_all()

Odd number of underscores means it's a pointer ;)

> defined, especially when the latter two mean something significantly
> different from the former two.  I'd prefer calling the new one
> {_}force_flush_l1_caches() or somesuch.

Ok.

> In a related note, one of the few places this routine is called is the
> kgdb stub routines (in arch/mips/kernel/gdb-stub.c):
> 
> void set_async_breakpoint(unsigned int epc)
> {
> 	int cpu = smp_processor_id();
> 
> 	async_bp[cpu].addr = epc;
> 	async_bp[cpu].val  = *(unsigned *)epc;
> 	*(unsigned *)epc = BP;
> 	__flush_cache_all();
> }
> 
> Shouldn't that be a flush_icache_range() call anyways?

Yes.

  Ralf

From owner-linux-mips@oss.sgi.com Wed May 29 14:08:47 2002
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Date: Wed, 29 May 2002 14:09:59 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: Justin Carlson <justinca@cs.cmu.edu>
Cc: linux-mips@oss.sgi.com
Subject: Re: __flush_cache_all() miscellany
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On Wed, May 29, 2002 at 12:26:29PM -0700, Justin Carlson wrote:

> Here's a patch against cvs that does the rename.  Unless anyone has
> objections, Ralf, could  you apply this?
> 
> While doing this, I've noticed that the whole mips tree is horribly
> inconsistent in terms of the cache flushing syscalls (sys_cacheflush and
> sys_sysmips->CACHE_FLUSH).  

These are compacrapability syscalls inherited from Risc/OS and IRIX.  Even
gcc generated trampoline code expects to have these available.

  Ralf

From owner-linux-mips@oss.sgi.com Wed May 29 14:27:44 2002
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Date: Wed, 29 May 2002 14:28:55 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: "Kevin D. Kissell" <kevink@mips.com>
Cc: Justin Carlson <justinca@cs.cmu.edu>, linux-mips@oss.sgi.com
Subject: Re: __flush_cache_all() miscellany
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On Wed, May 29, 2002 at 11:03:20PM +0200, Kevin D. Kissell wrote:

> While trampolines, breakpointing and JITing are the main 
> uses of user-mode cache manipulation (drivers are a whole 
> 'nother story), we really should have distinct capabilities for 
> I-stream modification and for explicit synchronizations of 
> the data storage hierarchy, for non-coherent multiprocessors
> and user-manipulated DMA buffers.  As to whether
> those capabilities should be distinguished by system
> call (sysmips vs. cacheflush) or by parameter to the
> same system call, I don't have enough data to form
> an opinion at this point.

It should clearly be cacheflush(2); sysmips(2) is too coarse, too ugly
interface.  Another thing we'll still have to implement is the
cachectl(2) syscall; for certain systems and applications fine control
of the caching mode use for a memory mapping may result in major performance
improvments.

  Ralf

From owner-linux-mips@oss.sgi.com Wed May 29 14:31:59 2002
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Date: Wed, 29 May 2002 14:33:05 -0700
From: Ralf Baechle <ralf@oss.sgi.com>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc: Justin Carlson <justinca@cs.cmu.edu>, linux-mips@oss.sgi.com
Subject: Re: __flush_cache_all() miscellany
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On Wed, May 29, 2002 at 11:00:21PM +0200, Maciej W. Rozycki wrote:

>  I converted a few flush_cache_all() invocations to __flush_cache_all() 
> where appropriate late last year, but the function is a bit older.  I
> think you might dig the linux-kernel list archives for a discussion on the
> semantics of flush_cache_all() (it's a nop for many MIPS CPUs) and
> friends.  The short description in Documentation/cachetlb.txt is a bit
> insufficient, I'm afraid. 

I don't like that function very much; it's sort of a shotgun approach
to flushing caches in a part of the kernel that's not too performance
relevant.  The whole interface sucks, should be replaced by something
more finegrained.

  Ralf

From owner-linux-mips@oss.sgi.com Wed May 29 14:45:11 2002
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From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Ralf Baechle <ralf@oss.sgi.com>
cc: Justin Carlson <justinca@cs.cmu.edu>, linux-mips@oss.sgi.com
Subject: Re: __flush_cache_all() miscellany
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On Wed, 29 May 2002, Ralf Baechle wrote:

> >  I converted a few flush_cache_all() invocations to __flush_cache_all() 
> > where appropriate late last year, but the function is a bit older.  I
> > think you might dig the linux-kernel list archives for a discussion on the
> > semantics of flush_cache_all() (it's a nop for many MIPS CPUs) and
> > friends.  The short description in Documentation/cachetlb.txt is a bit
> > insufficient, I'm afraid. 
> 
> I don't like that function very much; it's sort of a shotgun approach
> to flushing caches in a part of the kernel that's not too performance
> relevant.  The whole interface sucks, should be replaced by something
> more finegrained.

 Well, I suspect the API might be somewhat influenced by SPARC's oddities. 
;-) 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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From: Ralf Baechle <ralf@oss.sgi.com>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc: Justin Carlson <justinca@cs.cmu.edu>, linux-mips@oss.sgi.com
Subject: Re: __flush_cache_all() miscellany
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On Wed, May 29, 2002 at 11:46:58PM +0200, Maciej W. Rozycki wrote:

> > >  I converted a few flush_cache_all() invocations to __flush_cache_all() 
> > > where appropriate late last year, but the function is a bit older.  I
> > > think you might dig the linux-kernel list archives for a discussion on the
> > > semantics of flush_cache_all() (it's a nop for many MIPS CPUs) and
> > > friends.  The short description in Documentation/cachetlb.txt is a bit
> > > insufficient, I'm afraid. 
> > 
> > I don't like that function very much; it's sort of a shotgun approach
> > to flushing caches in a part of the kernel that's not too performance
> > relevant.  The whole interface sucks, should be replaced by something
> > more finegrained.
> 
>  Well, I suspect the API might be somewhat influenced by SPARC's oddities. 
> ;-) 

Historically that's certainly true.

As a general complaint about the style of interfaces of the cache stuff -
they're too low level.  Frequently we just don't know enough about the
situation to optimize the flush operation.

  Ralf

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Subject: Re: __flush_cache_all() miscellany
From: "Justin Carlson" <justinca@cs.cmu.edu>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
cc: linux-mips@oss.sgi.com, ralf@oss.sgi.com
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On Wed, 2002-05-29 at 14:00, Maciej W. Rozycki wrote:
> On 29 May 2002, Justin Carlson wrote:
> 
> > Are the general semantics of the thing just broken, then?  We already
> > ignore the arguments to sys_cacheflush; would redefining the syscall to
> > mean "flush the caches in such a way that I won't get stale instructions
> > from this address range" actually break any current programs? 
> > (Evidently not, if several ports are already doing it that way)...
> 
>  You mean removing the DCACHE operation?  The overlying _flush_cache() 
> library function is specified by the MIPS ABI supplement, so we shouldn't
> really redefine it.  Also a reasonable use for it may exist -- a userland
> program touching hardware directly (say X11) may want to use cached
> accesses for performance reasons (e.g. because cache can do prefetches on
> reads).

This is true;  I hadn't thought about the cases of userland touching
hardware directly.  Of course, I think these cases should be hunted down
and eliminated (go framebuffer device!), but alas, if that ever really
happens, it's not going to be soon.

> 
>  I guess the intent for the ICACHE operation is to assure ICACHE vs DCACHE
> coherency and the intent for the DCACHE operation is to assure DCACHE vs
> RAM coherency.  If the operations do not work in this way for a given
> backend, then there is a bug in it. 

We may theoretically need these capabilities, but, given that several of
the ports already get this wrong and no loud screaming has been heard, I
wonder about the real need.

Assuming we do need these capabilities in the syscall (and, really, it's
pretty easy to make them right), I'm actually more wondering about the
need for the __flush_cache_all() in the first place.  The gdb stubs can
use the defined interface without a problem (and, indeed, more
efficiently.  What they're doing now is overkill).  That leaves the
syscalls, which, if implemented properly, should also use the normal
interface.

I'm still looking for a reason for the existence of __flush_cache_all().


>  I converted a few flush_cache_all() invocations to __flush_cache_all() 
> where appropriate late last year, but the function is a bit older.  I
> think you might dig the linux-kernel list archives for a discussion on the
> semantics of flush_cache_all() (it's a nop for many MIPS CPUs) and
> friends.  The short description in Documentation/cachetlb.txt is a bit
> insufficient, I'm afraid. 

Woefully insufficient.  :)  I'm going to have a stab at editing that
file when I feel like I have a complete understanding.  Don't hold your
breath.  :)

-Justin



From owner-linux-mips@oss.sgi.com Wed May 29 16:26:44 2002
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Subject: Re: __flush_cache_all() miscellany
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Justin Carlson wrote:

 
> I'm still looking for a reason for the existence of __flush_cache_all().
> 


It is needed by kgdb where gdb client may modify several instructions before a 
'c' command is issued.  In that case, you cannot use flush_icache_range 
because you don't know the range.  It is probably not safe either as the data 
cache may not be written back yet

Does flush_icache_range() mandates write-back of dcache in the same range?  If 
it does, you might be able to get away with flush_icache_range(ICACHE_BEGIN, 
ICACHE_END).

Like someone else has pointed out, __flush_cache_all() is introduced to ensure 
i-cache/d-cache consistency.  I remember it was shortly introduced after we 
had the first cache-coherent system where flush_cache_all() is a null function.

Jun



From owner-linux-mips@oss.sgi.com Thu May 30 02:47:17 2002
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On Wed, May 29, 2002 at 01:16:53PM -0700, James Simmons wrote:
> > Hi,
> >     I have a port of linux-mips to the Lasat (later Eicon) platform(s) -
> > based on vr4300, vr5000 and vr4120 chips. I would very much like
> > to have the code incorporated in the CVS at OSS. How do I go
> > about this?
>=20
> Please at a look at the Linux MIPS project at sourceforge. We already have
> several VR chipsets supported.=20

The Eicons are not anything really embedded rather than Cobalt RaQ like.

Flo
PS: I dont like this split up tree - Currently Ralf is the one=20
feeding mainstream so please stop this diversification of the trees
as the normal user gets completely confused which makes linux mips
a VERY BAD target and does not help any popularity for the mips targets.
We had the linux-vr desaster before which helped nothing but in
the end bound developer efforts which were useless in the end.
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From owner-linux-mips@oss.sgi.com Thu May 30 04:00:23 2002
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Subject: returns corrupt value from shmctl();
From: Takeshi Aihana <takeshi_aihana@montavista.co.jp>
To: linux-mips <linux-mips@oss.sgi.com>
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Hello all,

I have a problem now about return the segment size of shared memory from
shmctl() func.

First of step was to start apache_1.3.24 on kernel-2.4.17/pb1000.
However it could not be started because it might be currput segment size
from shmctl() called in apache.
So that I tried to test with shmctl() on (A)kernel-2.4.17/pb1000 and
(B)kernel-2.4.9/x86 as the follows. 
(B) was just returned correct segment size, but (A)'s segment size was 0
(of cause memory on pb1000 was left).

This code is
-----------------------------------8<---------------------------------------
-----------------------------------8<---------------------------------------
 HOST: kernel-2.4.9/RH-7.2 on x86.
 





From owner-linux-mips@oss.sgi.com Thu May 30 04:10:13 2002
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Subject: (Re-Send) shmctl() returns corrupt value on pb1000.
From: Takeshi Aihana <takeshi_aihana@montavista.co.jp>
To: linux-mips <linux-mips@oss.sgi.com>
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Date: 30 May 2002 20:10:16 +0900
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# Sorry, please ignore previous mail I send.

Hello all,

I have a problem now about return the segment size of shared memory from
shmctl() func.

First of step was to start apache_1.3.24 on kernel-2.4.17/pb1000.
However it could not be started because it might be currput segment size
from shmctl() called in apache.
So that I tried to test with shmctl() on
(A)kernel-2.4.17/pb1000/gcc-2.95.3 and (B)kernel-2.4.9/x86/gcc-2.95.3 as
the follows. 
(B) was just returned correct segment size, but (A)'s segment size was 0
(of cause memory on pb1000 was left).

This simple code is follows, and `gcc -o test test.c`.
-----------------------------------8<---------------------------------------
#include <stdio.h>
#include <sys/ipc.h>
#include <sys/shm.h>

int main (void) {
  int shm_id;

  struct shmid_ds ds;
  shm_id = shmget(IPC_PRIVATE, 123, IPC_CREAT|0666);

  if (shm_id < 0) {
    perror ("shmget");
    return 1;
  }

  if (shmctl(shm_id, IPC_STAT, &ds)) {
    perror ("shmctl");
    exit (1);
  }
  printf( "shm_segsz = %d\n", ds.shm_segsz);
}

-----------------------------------8<---------------------------------------

Then each results are,
 x86(kernel-2.4.9/RH-7.2/gcc-2.95.3) : shm_segsz = 123
 pb1000(kernel-2.4.17/gcc-2.95.3)    : shm_segsz = 0

This value of pb1000 could not be expected for me.

So if you have any adivices that should be add option to compile on
pb1000, or if you have been faced similar to this, 
please let me knows.

Thank you for your helps.
Regards.

---
(TAKESHI - MontaVista Software Japan)








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To: takeshi_aihana@montavista.co.jp
Cc: linux-mips@oss.sgi.com
Subject: Re: (Re-Send) shmctl() returns corrupt value on pb1000.
From: Atsushi Nemoto <nemoto@toshiba-tops.co.jp>
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>>>>> On 30 May 2002 20:10:16 +0900, Takeshi Aihana <takeshi_aihana@montavista.co.jp> said:
takeshi_aihana> I have a problem now about return the segment size of
takeshi_aihana> shared memory from shmctl() func.

What version of libc are you using?  It seems your kernel headers and
libc headers are inconsistent.

Please look structures in libc's /usr/include/bits/{ipc,sem,shm,msg}.h
and kernel's include/asm-mips/{ipc,sem,shm,msg}buf.h carefully.

---
Atsushi Nemoto

From owner-linux-mips@oss.sgi.com Thu May 30 06:02:50 2002
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Subject: Re: (Re-Send) shmctl() returns corrupt value on pb1000.
From: Takeshi Aihana <takeshi_aihana@montavista.co.jp>
To: linux-mips@oss.sgi.com
In-Reply-To: <20020530.211902.102583216.nemoto@toshiba-tops.co.jp>
References: <1022757017.1045.47.camel@aihana> 
	<20020530.211902.102583216.nemoto@toshiba-tops.co.jp>
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Hello,

> >>>>> On 30 May 2002 20:10:16 +0900, Takeshi Aihana <takeshi_aihana@montavista.co.jp> said:
> takeshi_aihana> I have a problem now about return the segment size of
> takeshi_aihana> shared memory from shmctl() func.
> 
> What version of libc are you using?  It seems your kernel headers and
> libc headers are inconsistent.

(A) The version of glibc on x86 is 2.2.4/kernel-2.4.9.
(B) The version of glibc on pb1000 is 2.2.3/kernel-2.4.17.

Is there any inconsistents on those conditions?
Should be update to 2.2.4 on pb1000?

> Please look structures in libc's /usr/include/bits/{ipc,sem,shm,msg}.h
> and kernel's include/asm-mips/{ipc,sem,shm,msg}buf.h carefully.

OK. I will do carefully. 
It looks like to not any diffs I should observe on both files, now.

Thank you for your help.

---
(TAKESHI - MontaVista Software Japan)



From owner-linux-mips@oss.sgi.com Thu May 30 08:46:49 2002
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Date: Thu, 30 May 2002 23:47:26 +0800
From: "Zhang Fuxin" <fxzhang@ict.ac.cn>
To: Kevin Paul Herbert <kph@ayrnetworks.com>
CC: "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Subject: Re: Re: pcnet32.c bug?
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hi,
>>--- drivers/net/pcnet32.c	19 Mar 2002 16:40:55 -0000	1.1.1.1.2.1.2.6
>>+++ drivers/net/pcnet32.c	29 May 2002 09:57:33 -0000	1.13.4.2
>>@@ -1343,6 +1351,10 @@
>>  		if (!rx_in_place) {
>>  		    skb_reserve(skb,2); /* 16 byte align */
>>  		    skb_put(skb,pkt_len);	/* Make room */
>>+                    pci_dma_sync_single(lp->pci_dev,
>>+				    lp->rx_skbuff[entry]->tail,
>>+				    pkt_len,
>>+				    PCI_DMA_FROMDEVICE);
>>  		    eth_copy_and_sum(skb,
>>  				     (unsigned char 
>>*)(lp->rx_skbuff[entry]->tail),
>>  				     pkt_len,0);

Because many mips ports do wback_inv for pci_dma_sync_single,how can
this help?
I think it just mean to invalidate cache contents the cpu has for this
buffer,and thus cpu can be sure to read data dmaed to memory by the device
And now we are doing write back,won't that be overwriting the buffer with 
stale data in cache?

so,the problem is,can we use wback_inv instead of inv in pci_dma_sync_single
when the direction is FROMDEVICE? I don't think so,but that would mean many
current drivers are broken...

i guess the fact that current driver are working is because no mips machine
has big enough cache to survive the data to the point of the buffer's reuse.

Correct solution should be something like Will Jhun's proposal? 

that is:
  each transition i.e. (FROM_DEVICE operation)
	pci_map_single()      - device now owns the buffer [invalidate]
	[DMA]
	pci_dma_sync_single() - driver now owns it         [no invalidate]
	[driver touches buffer]
	pci_dma_prep_single() - device owns it once again  [invalidate]
	[DMA] ...

I hope i am totally wrong:)

BTW: i am struggling with eepro100 driver these days,and now i have
got an NAPI version of it running. The rx ring often got messed up
with the old pci_dma_sync_xx logic,before i change it.



>
>Note that there is another problem with cache line invalidation and 
>the use of pci_dma_sync_single(), where one can get stale entries in 
>the cache when the buffer is next re-used for DMA.
>
>My co-worker Will Jhun <mailto:wjhun@ayrnetworks.com> just sent 
>e-mail on the subject of problems with the cache invalidation 
>routines last Saturday, with Message-ID: 
><20020525131806.A4073@ayrnetworks.com>
>
>Kevin




               



>
>
>-- 

= = = = = = = = = = = = = = = = = = = =
			

Best Regards
---------------------------------------
Zhang Fuxin
System Architecture Lab
Institute of Computing Technology
Chinese Academy of Sciences,China
http://www.ict.ac.cn
 
			¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡2002-05-30




From owner-linux-mips@oss.sgi.com Thu May 30 09:45:42 2002
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Date: Thu, 30 May 2002 09:45:05 -0700
From: William Jhun <wjhun@ayrnetworks.com>
To: Brian Murphy <brian@murphy.dk>
Cc: linux-mips <linux-mips@oss.sgi.com>
Subject: Re: pcnet32.c bug?
Message-ID: <20020530094505.B22531@ayrnetworks.com>
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On Wed, May 29, 2002 at 12:46:57PM +0200, Brian Murphy wrote:
> If I don't apply the following patch to pcnet32.c then the network 
> connection
> on my vr5000 box is extremely jerky. It also seems quite sensible to have a
> dma sync operation here.

Yes, that should be there by all means. We had to add that exact same
line to get our pcnet32 working on MIPS.

Thanks,
William

From owner-linux-mips@oss.sgi.com Thu May 30 10:37:59 2002
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Date: Thu, 30 May 2002 10:37:33 -0700
From: William Jhun <wjhun@ayrnetworks.com>
To: Zhang Fuxin <fxzhang@ict.ac.cn>
Cc: Kevin Paul Herbert <kph@ayrnetworks.com>,
   "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Subject: Re: Re: pcnet32.c bug?
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On Thu, May 30, 2002 at 11:47:26PM +0800, Zhang Fuxin wrote:
> I think it just mean to invalidate cache contents the cpu has for this
> buffer,and thus cpu can be sure to read data dmaed to memory by the device
> And now we are doing write back,won't that be overwriting the buffer with 
> stale data in cache?
> 
> so,the problem is,can we use wback_inv instead of inv in pci_dma_sync_single
> when the direction is FROMDEVICE? I don't think so,but that would mean many
> current drivers are broken...

If I understand this correctly, a writeback means only modified
cachelines (i.e. data cache lines with a dirty bit, like 'W', set) will
be written back to main memory.  Since the driver never actually writes
to any of these buffers (and their contents are invalidated on the
pci_map_single()), nothing should ever be written back to main memory.
If this were not the case, you would surely see packet corruption as the
stale cachelines from a re-used buffer would be written back. I tend not
to think that it's just coincidence and that MIPS caches tend to be
small...

So, writeback-invalidate is not incorrect, but it's not efficient for
all platforms. Ralf explained to me that some CPUs cannot do indexed
invalidates separately from writebacks.

I think all three (dma_cache_wback, dma_cache_wback_inv,
dma_cache_inv) of these calls should be implemented for all CPUs and
default to dma_cache_wback_inv() if not available. I can come up with a
patch if people agree (that wback_inv is a suitable replacement for
either _inv or _wback; MIPS-specific code than can be written to use
whatever is most optimal if present on that architecture...

Thanks,
Will

From owner-linux-mips@oss.sgi.com Thu May 30 10:47:32 2002
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From: "Siders, Keith" <keith_siders@toshibatv.com>
To: "Linux-Mips (E-mail)" <linux-mips@oss.sgi.com>
Subject: system() function
Date: Thu, 30 May 2002 11:01:30 -0500
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I was planning to use system() to invoke a shell and launch a script.
However it appears that this causes the parent process to terminate. A note
in Linux Programming Bible (Goerzen, 2000) says to never invoke a shell or
use the system() function. Having looked at fork() and exec(), these will
require obscene amounts of memory and overhead (for an embedded box). I've
also looked at vfork() and execve(), which looks like it will do what I
want. So do I do the vfork()/execve() pair, or is there a better way? And
would sigaction() handling be the way to pass progress information from the
child back to the parent process?

Keith Siders
Software Engineer
 Toshiba America Consumer Products, Inc.
Advanced Television Technology Center
801 Royal Parkway, Suite 100
Nashville, Tennessee 37214
Phone: (615) 257-4050
Fax:   (615) 453-7880


From owner-linux-mips@oss.sgi.com Thu May 30 10:53:31 2002
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From: "David Christensen" <dpchrist@holgerdanske.com>
To: <linux-mips@oss.sgi.com>
Subject: cross-compiler for MIPS_RedHat7.1_Release-01.00 on Atlas/4Kc using RH7.3-i386 host
Date: Thu, 30 May 2002 10:54:55 -0700
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linux-mips@oss.sgi.com:

I have downloaded ftp://ftp.mips.com/pub/linux/mips/installation/redhat7
.1/01.00/MIPS_RedHat7.1_Release-01.00.iso, burned a CD, and followed the
instructions provided on the CD (/linux/installation/README) to install
Linux (little-endian) on a MIPS Atlas/4Kc board with a SCSI disk.  I
would now like to recompile the kernel to experiment with sound.  I have
posted to this mailing list before and was informed that I need a cross-
compiler, available on oss.sgi.com.  My host is Red Hat Linux-i386 7.3.


Following the instructions provided in Chapter 10 of the Linux/MIPS
HOWTO (http://oss.sgi.com/mips/mips-howto.html), I have located these
files:

    ftp://oss.sgi.com/pub/linux/mips/crossdev/i386-linux/mipsel-linux/
        binutils-mipsel-linux-2.8.1-2.i386.rpm

    ftp://oss.sgi.com/pub/linux/mips/crossdev/i386-linux/mipsel-linux/
        egcs-mipsel-linux-1.1.2-4.i386.rpm

    ftp://oss.sgi.com/pub/linux/mips/glibc/mipsel-linux/
        glibc-2.0.6-5lm.mipsel.rpm


I am unable to find:

    glibc-crypt-2.0.6.tar.gz

    glibc-localedata-2.0.6.tar.gz

    glibc-linuxthreads-2.0.6.tar.gz


Does anybody have any comments or suggestions?


TIA,

David Christensen
dpchrist@holgerdanske.com



From owner-linux-mips@oss.sgi.com Thu May 30 11:40:34 2002
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Subject: Re: system() function
From: "Justin Carlson" <justinca@cs.cmu.edu>
To: "Siders, Keith" <keith_siders@toshibatv.com>
cc: "Linux-Mips (E-mail)" <linux-mips@oss.sgi.com>
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On Thu, 2002-05-30 at 09:01, Siders, Keith wrote:
> I was planning to use system() to invoke a shell and launch a script.
> However it appears that this causes the parent process to terminate. A note
> in Linux Programming Bible (Goerzen, 2000) says to never invoke a shell or
> use the system() function. Having looked at fork() and exec(), these will
> require obscene amounts of memory and overhead (for an embedded box).

I'm not sure that fork() qualifies as an "obscene amount of overhead". 
That may have been true before copy-on-write, but the only thing vfork()
saves you with respect to fork() is page table construction, which is
not particularly memory or processor intensive.

> I've
> also looked at vfork() and execve(), which looks like it will do what I
> want. So do I do the vfork()/execve() pair, or is there a better way? And
> would sigaction() handling be the way to pass progress information from the
> child back to the parent process?

As a personal preference, I dislike vfork() since it's pretty
nonstandard in its behaviour on linux.  Generally, though, it sounds
like maybe you'd benefit from a copy  of Kernighan & Pike's _The Unix
Programming Environment_.  There are more ways to do interprocess
communication than you can shake a stick at, and which one is "right"
for you depends largely on your specific application.  Signals is a
reasonable way (though if you vfork() you won't be able to handle
signals in your parent concurrent with the child running...).  There are
also named pipes, shared memory, SysV messaging...

-Justin



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Subject: Cache flushing, take 2
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I've taken a second look at the cache flushing, and think maybe this is
a better way to fix what I see as the major problems.

Attached is a patch which does the following:

* Removes __flush_cache_all()
* Adds writeback_inv_dcache_all() and writeback_inv_dcache_range().
  these functions force the flushing of the dcache, as opposed to the
  flush_cache_* functions, which only flush if needed for coherence.
* Adds better documentation to the function declarations in pgtable.h
* Fixes up gdb-stub.c to use this interface
* Actually implements the more agressive semantics for the cacheflush 
  system call
* Fixes up the old sysmips system call to use this interface

I've only implemented the actual new routines for the sb1; I'd like to
solicit some feedback as to what other people think of this approach
before taking the plunge to other implementations.  Note this patch is
not tested beyond compilability; if people like this approach I'll flesh
it out and resubmit something tested.

Comments?

-Justin


--=-OIpXZaCsihiMHNAFriFG
Content-Disposition: attachment; 
 filename=cacheflush.patch
Content-Transfer-Encoding: quoted-printable
Content-Type: text/plain; 
 charset=iso-8859-1; 
 name=cacheflush.patch

? cacheflush.patch
Index: arch/mips/kernel/gdb-stub.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvs/linux/arch/mips/kernel/gdb-stub.c,v
retrieving revision 1.16
diff -u -r1.16 gdb-stub.c
--- arch/mips/kernel/gdb-stub.c	2002/05/29 22:40:04	1.16
+++ arch/mips/kernel/gdb-stub.c	2002/05/30 19:13:10
@@ -575,7 +575,7 @@
 	async_bp.addr =3D epc;
 	async_bp.val  =3D *(unsigned *)epc;
 	*(unsigned *)epc =3D BP;
-	__flush_cache_all();
+	flush_icache_range(epc, epc + 4);
 }
=20
=20
@@ -799,10 +799,8 @@
 			 * has no way of knowing that a data ref to some location
 			 * may have changed something that is in the instruction
 			 * cache.
-			 * NB: We flush both caches, just to be sure...
 			 */
-
-			__flush_cache_all();
+			flush_icache_all();
 			return;
 			/* NOTREACHED */
 			break;
@@ -831,7 +829,7 @@
 			 * use breakpoints and continue, instead.
 			 */
 			single_step(regs);
-			__flush_cache_all();
+			flush_icache_all();
 			return;
 			/* NOTREACHED */
=20
Index: arch/mips/kernel/sysmips.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvs/linux/arch/mips/kernel/sysmips.c,v
retrieving revision 1.21
diff -u -r1.21 sysmips.c
--- arch/mips/kernel/sysmips.c	2002/05/29 18:36:28	1.21
+++ arch/mips/kernel/sysmips.c	2002/05/30 19:13:10
@@ -83,7 +83,8 @@
 		goto out;
=20
 	case FLUSH_CACHE:
-		__flush_cache_all();
+		flush_icache_all();
+		writeback_inv_dcache_all();
 		retval =3D 0;
 		goto out;
=20
Index: arch/mips/mm/c-sb1.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvs/linux/arch/mips/mm/c-sb1.c,v
retrieving revision 1.19
diff -u -r1.19 c-sb1.c
--- arch/mips/mm/c-sb1.c	2002/05/29 22:40:05	1.19
+++ arch/mips/mm/c-sb1.c	2002/05/30 19:13:10
@@ -74,72 +74,6 @@
 {
 }
=20
-static void local_sb1___flush_cache_all(void)
-{
-	/*
-	 * Haven't worried too much about speed here; given that we're flushing
-	 * the icache, the time to invalidate is dwarfed by the time it's going
-	 * to take to refill it.  Register usage:
-	 *=20
-	 * $1 - moving cache index
-	 * $2 - set count
-	 */
-	__asm__ __volatile__ (
-		".set push                  \n"
-		".set noreorder             \n"
-		".set noat                  \n"
-		".set mips4                 \n"
-		"     move   $1, %2         \n" /* Start at index 0 */
-		"1:   cache  %3, 0($1)      \n" /* WB/Invalidate this index */
-		"     addiu  %1, %1, -1     \n" /* Decrement loop count */
-		"     bnez   %1, 1b         \n" /* loop test */
-		"      addu   $1, $1, %0    \n" /* Next address */
-		".set pop                   \n"
-		:
-		: "r" (dcache_line_size), "r" (dcache_sets * dcache_assoc),
-		  "r" (KSEG0), "i" (Index_Writeback_Inv_D));
-
-	__asm__ __volatile__ (
-		".set push                  \n"
-		".set noreorder             \n"
-		".set mips2                 \n"
-		"sync                       \n"
-#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS		/* Bug 1384 */		=09
-		"sync                       \n"
-#endif
-		".set pop                   \n");
-
-	__asm__ __volatile__ (
-		".set push                  \n"
-		".set noreorder             \n"
-		".set noat                  \n"
-		".set mips4                 \n"
-		"     move   $1, %2         \n" /* Start at index 0 */
-		"1:   cache  %3, 0($1)       \n" /* Invalidate this index */
-		"     addiu  %1, %1, -1     \n" /* Decrement loop count */
-		"     bnez   %1, 1b         \n" /* loop test */
-		"      addu   $1, $1, %0    \n" /* Next address */
-		".set pop                   \n"
-		:
-		: "r" (icache_line_size), "r" (icache_sets * icache_assoc),
-		  "r" (KSEG0), "i" (Index_Invalidate_I));
-}
-
-#ifdef CONFIG_SMP
-extern void sb1___flush_cache_all_ipi(void *ignored);
-asm("sb1___flush_cache_all_ipi =3D local_sb1___flush_cache_all");
-
-static void sb1___flush_cache_all(void)
-{
-	smp_call_function(sb1___flush_cache_all_ipi, 0, 1, 1);
-	local_sb1___flush_cache_all();
-}
-#else
-extern void sb1___flush_cache_all(void);
-asm("sb1___flush_cache_all =3D local_sb1___flush_cache_all");
-#endif
-
-
 /*
  * When flushing a range in the icache, we have to first writeback
  * the dcache for the same range, so new ifetches will see any
@@ -216,33 +150,129 @@
 }
=20
 #ifdef CONFIG_SMP
-struct flush_icache_range_args {
+
+struct flush_cache_range_args {
 	unsigned long start;
 	unsigned long end;
 };
=20
 static void sb1_flush_icache_range_ipi(void *info)
 {
-	struct flush_icache_range_args *args =3D info;
+	struct flush_cache_range_args *args =3D info;
=20
 	local_sb1_flush_icache_range(args->start, args->end);
 }
=20
-void sb1_flush_icache_range(unsigned long start, unsigned long end)
+void smp_sb1_flush_icache_range(unsigned long start, unsigned long end)
 {
-	struct flush_icache_range_args args;
+	struct flush_cache_range_args args;
=20
 	args.start =3D start;
 	args.end =3D end;
 	smp_call_function(sb1_flush_icache_range_ipi, &args, 1, 1);
 	local_sb1_flush_icache_range(start, end);
 }
-#else
-void sb1_flush_icache_range(unsigned long start, unsigned long end);
-asm("sb1_flush_icache_range =3D local_sb1_flush_icache_range");
 #endif
=20
 /*
+ * Writeback and invalidate a range of addresses.
+ */
+static void local_sb1_writeback_inv_dcache_range(unsigned long start, unsi=
gned long end)
+{
+#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
+	unsigned long flags;
+	local_irq_save(flags);
+#endif
+
+	__asm__ __volatile__ (
+		".set push                  \n"
+		".set noreorder             \n"
+		".set noat                  \n"
+		".set mips4                 \n"
+		"     move   $1, %0         \n"=20
+		"1:                         \n"
+#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
+		".align 3                   \n"
+		"     lw     $0,   0($1)    \n" /* Bug 1370, 1368            */
+		"     sync                  \n"
+#endif
+		"     cache  %3, 0($1)      \n" /* Hit-WB{,-inval} this address */
+		"     bne    $1, %1, 1b     \n" /* loop test */
+		"      addu  $1, $1, %2     \n" /* next line */
+		"     sync                  \n"
+		".set pop                   \n"
+		:
+		: "r" (start  & ~(dcache_line_size - 1)),
+		  "r" ((end - 1) & ~(dcache_line_size - 1)),
+		  "r" (dcache_line_size),
+		  "i" (Hit_Writeback_Inv_D)
+		);
+#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
+	local_irq_restore(flags);
+#endif
+}
+
+
+#ifdef CONFIG_SMP
+
+static void sb1_writeback_inv_dcache_range_ipi(void *info)
+{
+	struct flush_cache_range_args *args =3D info;
+
+	local_sb1_writeback_inv_dcache_range(args->start, args->end);
+}
+
+void smp_sb1_writeback_inv_dcache_range(unsigned long start, unsigned long=
 end)
+{
+	struct flush_cache_range_args args;
+
+	args.start =3D start;
+	args.end =3D end;
+	smp_call_function(sb1_writeback_inv_dcache_range_ipi, &args, 1, 1);
+	local_sb1_flush_icache_range(start, end);
+}
+
+#endif
+
+/*
+ * Writeback and invalidate the entire dcache
+ */
+static void local_sb1_writeback_inv_dcache_all(void)
+{
+	/*
+	 * Register usage:
+	 *=20
+	 * $1 - moving cache index
+	 * $2 - set count
+	 */
+	__asm__ __volatile__ (
+		".set push                  \n"
+		".set noreorder             \n"
+		".set noat                  \n"
+		".set mips4                 \n"
+		"     move   $1, %2         \n" /* Start at index 0 */
+		"1:   cache  %3, 0($1)      \n" /* Invalidate this index */
+		"     addiu  %1, %1, -1     \n" /* Decrement loop count */
+		"     bnez   %1, 1b         \n" /* loop test */
+		"      addu   $1, $1, %0    \n" /* Next address */
+		".set pop                   \n"
+		:
+		: "r" (dcache_line_size), "r" (dcache_sets * dcache_assoc),
+		  "r" (KSEG0), "i" (Index_Writeback_Inv_D));
+}
+
+
+#ifdef CONFIG_SMP
+
+void smp_sb1_writeback_inv_dcache_all(void)
+{
+	smp_call_function((void (*)(void *))local_sb1_writeback_inv_dcache_all, 0=
, 1, 1);
+	local_sb1_writeback_inv_dcache_all();
+}
+
+#endif
+
+/*
  * If there's no context yet, or the page isn't executable, no icache flus=
h
  * is needed
  */
@@ -257,7 +287,7 @@
 	 * conservatively flush the entire caches on all processors
 	 * (ouch).
 	 */
-	sb1___flush_cache_all();
+	flush_icache_all();
 }
=20
 static inline void protected_flush_icache_line(unsigned long addr)
@@ -345,7 +375,7 @@
 	protected_flush_icache_line(iaddr);
 }
=20
-static void sb1_flush_cache_sigtramp(unsigned long addr)
+static void smp_sb1_flush_cache_sigtramp(unsigned long addr)
 {
 	unsigned long tmp;
=20
@@ -359,10 +389,6 @@
=20
 	smp_call_function(sb1_flush_cache_sigtramp_ipi, (void *) addr, 1, 1);
 }
-
-#else
-void sb1_flush_cache_sigtramp(unsigned long addr);
-asm("sb1_flush_cache_sigtramp =3D local_sb1_flush_cache_sigtramp");
 #endif
=20
 static void sb1_flush_icache_all(void)
@@ -506,17 +532,26 @@
 	_copy_page =3D sb1_copy_page;
=20
 	_flush_cache_all =3D sb1_flush_cache_all;
-	___flush_cache_all =3D sb1___flush_cache_all;
 	_flush_cache_mm =3D (void (*)(struct mm_struct *))sb1_nop;
 	_flush_cache_range =3D (void *) sb1_nop;
 	_flush_page_to_ram =3D sb1_flush_page_to_ram;
 	_flush_icache_page =3D sb1_flush_icache_page;
-	_flush_icache_range =3D sb1_flush_icache_range;
+
+#ifdef CONFIG_SMP
+	_writeback_inv_dcache_range =3D smp_sb1_writeback_inv_dcache_range;
+	_writeback_inv_dcache_all   =3D smp_sb1_writeback_inv_dcache_all;
+	_flush_icache_range         =3D smp_sb1_flush_icache_range;
+	_flush_cache_sigtramp       =3D smp_sb1_flush_cache_sigtramp;
+#else
+	_writeback_inv_dcache_range =3D local_sb1_writeback_inv_dcache_range;
+	_writeback_inv_dcache_all   =3D local_sb1_writeback_inv_dcache_all;
+	_flush_icache_range         =3D local_sb1_flush_icache_range;
+	_flush_cache_sigtramp       =3D local_sb1_flush_cache_sigtramp;=09
+#endif
=20
 	/* None of these are needed for the sb1 */
 	_flush_cache_page =3D (void *) sb1_nop;
=20
-	_flush_cache_sigtramp =3D sb1_flush_cache_sigtramp;
 	_flush_icache_all =3D sb1_flush_icache_all;
=20
 	change_cp0_config(CONF_CM_CMASK, CONF_CM_CACHABLE_COW);
Index: arch/mips/mm/init.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvs/linux/arch/mips/mm/init.c,v
retrieving revision 1.43
diff -u -r1.43 init.c
--- arch/mips/mm/init.c	2002/03/15 03:14:31	1.43
+++ arch/mips/mm/init.c	2002/05/30 19:13:10
@@ -37,6 +37,7 @@
 #include <asm/pgalloc.h>
 #include <asm/mmu_context.h>
 #include <asm/tlb.h>
+#include <asm/uaccess.h>
=20
 mmu_gather_t mmu_gathers[NR_CPUS];
 unsigned long highstart_pfn, highend_pfn;
@@ -48,8 +49,21 @@
=20
 asmlinkage int sys_cacheflush(void *addr, int bytes, int cache)
 {
-	/* This should flush more selectivly ...  */
-	__flush_cache_all();
+	if (cache & ~(ICACHE | DCACHE)) {
+		return -EINVAL;
+	}
+=09
+	if (verify_area(VERIFY_READ, addr, bytes)) {
+		return -EFAULT;
+	}
+
+	if (cache & DCACHE) {
+		writeback_inv_dcache_range((unsigned long)addr, (unsigned long)addr + by=
tes);
+	}=20
+
+	if (cache & ICACHE) {
+		flush_icache_range((unsigned long)addr, ((unsigned long)addr) + bytes);
+	}
=20
 	return 0;
 }
Index: arch/mips/mm/loadmmu.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvs/linux/arch/mips/mm/loadmmu.c,v
retrieving revision 1.45
diff -u -r1.45 loadmmu.c
--- arch/mips/mm/loadmmu.c	2001/11/29 04:47:24	1.45
+++ arch/mips/mm/loadmmu.c	2002/05/30 19:13:10
@@ -24,7 +24,6 @@
=20
 /* Cache operations. */
 void (*_flush_cache_all)(void);
-void (*___flush_cache_all)(void);
 void (*_flush_cache_mm)(struct mm_struct *mm);
 void (*_flush_cache_range)(struct mm_struct *mm, unsigned long start,
 			  unsigned long end);
@@ -35,6 +34,8 @@
=20
 void (*_flush_page_to_ram)(struct page * page);
 void (*_flush_icache_all)(void);
+void (*_writeback_inv_dcache_range)(unsigned long start, unsigned long end=
);
+void (*_writeback_inv_dcache_all)  (void);
=20
 #ifdef CONFIG_NONCOHERENT_IO
=20
Index: include/asm-mips/pgtable.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /cvs/linux/include/asm-mips/pgtable.h,v
retrieving revision 1.74
diff -u -r1.74 pgtable.h
--- include/asm-mips/pgtable.h	2002/05/28 09:58:58	1.74
+++ include/asm-mips/pgtable.h	2002/05/30 19:13:22
@@ -17,49 +17,70 @@
 #include <asm/cachectl.h>
 #include <asm/fixmap.h>
=20
-/* Cache flushing:
+/* Generic cache flushing.  See Documentation/cachetlb for more specific d=
etails
  *
- *  - flush_cache_all() flushes entire cache
- *  - flush_cache_mm(mm) flushes the specified mm context's cache lines
- *  - flush_cache_page(mm, vmaddr) flushes a single page
- *  - flush_cache_range(mm, start, end) flushes a range of pages
- *  - flush_page_to_ram(page) write back kernel page to ram
- *  - flush_icache_range(start, end) flush a range of instructions
+ * Note that none of these routines check access permissions.  Any needed
+ * checking should be done by the caller.
  *
- *  - flush_cache_sigtramp() flush signal trampoline
- *  - flush_icache_all() flush the entire instruction cache
+ *  - flush_cache_all      Writeback & inval all virtually mapped cached d=
ata
+ *                           & ensure all writes are visible to the system=
.
+ *  - flush_cache_mm       Same as above, but only for a specific mm conte=
xt
+ *  - flush_cache_page     Same as above, but for a single page
+ *  - flush_cache_range    Same as above, for a range of addresses
+ *  - flush_page_to_ram    Clear all virtual mappings of this physical pag=
e
+ *  - flush_icache_range   An istream modification may have occurred; ensu=
re=20
+ *                           that all data stores before this point are vi=
sible=20
+ *                           for new instruction fetches for the given ran=
ge.
+ *  - flush_icache_page    Same as above, but for a specific page
  */
-extern void (*_flush_cache_all)(void);
-extern void (*___flush_cache_all)(void);
-extern void (*_flush_cache_mm)(struct mm_struct *mm);
-extern void (*_flush_cache_range)(struct mm_struct *mm, unsigned long star=
t,
-				 unsigned long end);
-extern void (*_flush_cache_page)(struct vm_area_struct *vma, unsigned long=
 page);
-extern void (*_flush_page_to_ram)(struct page * page);
+
+/*
+ * Mips-specific cache flushing. =20
+ *  - flush_icache_all           Same as flush_icache_range, for all memor=
y=20
+ *  - writeback_inv_dcache_all   Force writeback and invalidation of the f=
irst
+ *                               level dcache.
+ *  - writeback_inv_dcache_range Same as above, but for a specific virtual=
 range
+ *  - flush_cache_sigtramp       Flush signal trampoline
+ */
+
+extern void (*_flush_cache_all)   (void);
+extern void (*_flush_cache_mm)    (struct mm_struct *mm);
+extern void (*_flush_cache_page)  (struct vm_area_struct *vma,=20
+				   unsigned long page);
+extern void (*_flush_cache_range) (struct mm_struct *mm, unsigned long sta=
rt,
+				   unsigned long end);
+extern void (*_flush_page_to_ram) (struct page * page);
 extern void (*_flush_icache_range)(unsigned long start, unsigned long end)=
;
-extern void (*_flush_icache_page)(struct vm_area_struct *vma,
-                                  struct page *page);
-extern void (*_flush_cache_sigtramp)(unsigned long addr);
-extern void (*_flush_icache_all)(void);
+extern void (*_flush_icache_page) (struct vm_area_struct *vma,
+				   struct page *page);
+
+extern void (*_flush_icache_all)          (void);
+extern void (*_writeback_inv_dcache_all)  (void);
+extern void (*_writeback_inv_dcache_range)(unsigned long start,=20
+					   unsigned long end);
+extern void (*_flush_cache_sigtramp)      (unsigned long addr);
+
=20
 #define flush_dcache_page(page)			do { } while (0)
=20
 #define flush_cache_all()		_flush_cache_all()
-#define __flush_cache_all()		___flush_cache_all()
 #define flush_cache_mm(mm)		_flush_cache_mm(mm)
-#define flush_cache_range(mm,start,end)	_flush_cache_range(mm,start,end)
 #define flush_cache_page(vma,page)	_flush_cache_page(vma, page)
+#define flush_cache_range(mm,start,end)	_flush_cache_range(mm,start,end)
 #define flush_page_to_ram(page)		_flush_page_to_ram(page)
-
 #define flush_icache_range(start, end)	_flush_icache_range(start,end)
 #define flush_icache_page(vma, page) 	_flush_icache_page(vma, page)
+
+
=20
-#define flush_cache_sigtramp(addr)	_flush_cache_sigtramp(addr)
 #ifdef CONFIG_VTAG_ICACHE
-#define flush_icache_all()		_flush_icache_all()
+#define flush_icache_all()	    	       _flush_icache_all()
 #else
-#define flush_icache_all()		do { } while(0)
+#define flush_icache_all()		       do { } while(0)
 #endif
+#define writeback_inv_dcache_all()             _writeback_inv_dcache_all()
+#define writeback_inv_dcache_range(start, end) _writeback_inv_dcache_range=
(start, end)
+#define flush_cache_sigtramp(addr)	       _flush_cache_sigtramp(addr)
=20
 /*
  * - add_wired_entry() add a fixed TLB entry, and move wired register

--=-OIpXZaCsihiMHNAFriFG--


From owner-linux-mips@oss.sgi.com Thu May 30 12:30:43 2002
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From: "David Christensen" <dpchrist@holgerdanske.com>
To: <linux-mips@oss.sgi.com>
References: <001601c20803$339e4650$0b01a8c0@w2k30g>
Subject: Re: cross-compiler for MIPS_RedHat7.1_Release-01.00 on Atlas/4Kc using RH7.3-i386 host
Date: Thu, 30 May 2002 12:32:29 -0700
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linux-mips@oss.sgi.com:

I tried installing the three packages anyway.  binutils and egcs
installed fine.  They contain files and directories with "mips-linux",
etc., in their names, so they don't conflict with my native i386
installation:

    root@r7320g:~# rpm -ihv binutils-mipsel-linux-2.8.1-2.i386.rpm
    Preparing...                ########################################
### [100%]
       1:binutils-mipsel-linux  ########################################
### [100%]

    root@r7320g:~# rpm -ihv egcs-mipsel-linux-1.1.2-4.i386.rpm
    Preparing...                ########################################
### [100%]
       1:egcs-mipsel-linux      ########################################
### [100%]


But glibc has problems:

    root@r7320g:~# rpm -ihv glibc-2.0.6-5lm.mipsel.rpm
    error: failed dependencies:
            glibc < 2.2.5 conflicts with glibc-common-2.2.5-34
            glibc < 2.1.90 conflicts with db1-1.85-8
            glibc < 2.1.90 conflicts with db2-2.4.14-10
            glibc < 2.1.90 conflicts with gnome-libs-1.4.1.2.90-14


Looking at the contents:

    root@r7320g:~# rpm -q -l -p glibc-2.0.6-5lm.mipsel.rpm | head
    /etc/nsswitch.conf
    /etc/rpc
    /lib/ld-2.0.6.so
    /lib/ld.so.1
    /lib/libBrokenLocale-2.0.6.so
    /lib/libBrokenLocale.so.1
    /lib/libc-2.0.6.so
    /lib/libc.so.6
    /lib/libcrypt-2.0.6.so
    /lib/libcrypt.so.1


It contains files that would break my native i386 installation:

    root@r7320g:~# ls -1 /etc/nsswitch.conf /etc/rpc /lib/ld*
    /etc/nsswitch.conf
    /etc/rpc
    /lib/ld-2.2.5.so
    /lib/ld-linux.so.2


Any comments or suggestions?


TIA,

David Christensen
dpchrist@holgerdanske.com








From owner-linux-mips@oss.sgi.com Thu May 30 12:31:18 2002
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Subject: Function pointers and #defines
From: "Justin Carlson" <justinca@cs.cmu.edu>
To: linux-mips@oss.sgi.com
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A fair number of places in the headers, we have stuff like this:

void (*_some_fn)(int arg1, int arg2);
#define some_fn(arg1, arg2) _some_fn(arg1, arg2)

Why do we do this, as opposed to:

void (*some_fn)(int arg1, int arg2);

Both syntaxes result in being able to say

some_fn(1, 2);

but the latter is both clearer and shorter.  Is there some deep,
mystical C reason that we use the former, or did someone do it that way
a long time ago and no one has changed it?

-Justin



From owner-linux-mips@oss.sgi.com Thu May 30 12:34:58 2002
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From: Hartvig Ekner <hartvige@mips.com>
Message-Id: <200205301936.g4UJaBG04915@coplin09.mips.com>
Subject: Re: cross-compiler for MIPS_RedHat7.1_Release-01.00 on Atlas/4Kc using RH7.3-i386 host
To: dpchrist@holgerdanske.com (David Christensen)
Date: Thu, 30 May 2002 21:36:10 +0200 (CEST)
Cc: linux-mips@oss.sgi.com
In-Reply-To: <no.id> from "David Christensen" at May 30, 2002 10:54:55 AM
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Hi David,

David Christensen writes:
> 
> linux-mips@oss.sgi.com:
> 
> I have downloaded ftp://ftp.mips.com/pub/linux/mips/installation/redhat7
> .1/01.00/MIPS_RedHat7.1_Release-01.00.iso, burned a CD, and followed the
> instructions provided on the CD (/linux/installation/README) to install
> Linux (little-endian) on a MIPS Atlas/4Kc board with a SCSI disk.

Note that you can install the Release-02.00 (with all the latest RPMs
from H.J.) as well on an Atlas, you'll just have to use the 2.4.3 install
kernel from the 01.00 CD image you downloaded, and everything else from 
the new release.


> would now like to recompile the kernel to experiment with sound.  I have
> posted to this mailing list before and was informed that I need a cross-
> compiler, available on oss.sgi.com.  My host is Red Hat Linux-i386 7.3.

For kernel cross compilation we use the following binary RPM's (LE shown only):

        binutils-mipsel-linux-2.9.5-3
        egcs-mipsel-linux-1.1.2-4

They can be found on:

        ftp://oss.sgi.com/pub/linux/mips/crossdev/i386-linux/mipsel-linux/


/Hartvig

From owner-linux-mips@oss.sgi.com Thu May 30 12:57:16 2002
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Subject: Re: Function pointers and #defines
From: "Justin Carlson" <justinca@cs.cmu.edu>
To: "Daniel Jacobowitz" <dan@debian.org>
cc: linux-mips@oss.sgi.com
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 <20020530195052.GA10587@branoic.them.org>
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On Thu, 2002-05-30 at 12:50, Daniel Jacobowitz wrote:
> > but the latter is both clearer and shorter.  Is there some deep,
> > mystical C reason that we use the former, or did someone do it that way
> > a long time ago and no one has changed it?
> 
> At a guess, this prevents taking the address of the function
> unintentionally...

But if you're writing code in such a way that the compiler type checking
doesn't flag this, you deserve what you get.  (IMHO, of course.  :)

-Justin


From owner-linux-mips@oss.sgi.com Thu May 30 12:59:39 2002
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Date: Thu, 30 May 2002 15:50:52 -0400
From: Daniel Jacobowitz <dan@debian.org>
To: Justin Carlson <justinca@cs.cmu.edu>
Cc: linux-mips@oss.sgi.com
Subject: Re: Function pointers and #defines
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On Thu, May 30, 2002 at 12:32:47PM -0700, Justin Carlson wrote:
> A fair number of places in the headers, we have stuff like this:
> 
> void (*_some_fn)(int arg1, int arg2);
> #define some_fn(arg1, arg2) _some_fn(arg1, arg2)
> 
> Why do we do this, as opposed to:
> 
> void (*some_fn)(int arg1, int arg2);
> 
> Both syntaxes result in being able to say
> 
> some_fn(1, 2);
> 
> but the latter is both clearer and shorter.  Is there some deep,
> mystical C reason that we use the former, or did someone do it that way
> a long time ago and no one has changed it?

At a guess, this prevents taking the address of the function
unintentionally...

-- 
Daniel Jacobowitz                           Carnegie Mellon University
MontaVista Software                         Debian GNU/Linux Developer

From owner-linux-mips@oss.sgi.com Thu May 30 13:21:58 2002
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From: "David Christensen" <dpchrist@holgerdanske.com>
To: <linux-mips@oss.sgi.com>
Cc: "Hartvig Ekner" <hartvige@mips.com>
References: <200205301936.g4UJaBG04915@coplin09.mips.com>
Subject: Re: cross-compiler for MIPS_RedHat7.1_Release-01.00 on Atlas/4Kc using RH7.3-i386 host
Date: Thu, 30 May 2002 13:06:43 -0700
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linux-mips@oss.sgi.com & Hartvig:

Hartvig Ekner wrote:
> Note that you can install the Release-02.00 (with all the latest RPMs
> from H.J.) as well on an Atlas, you'll just have to use the 2.4.3
> install kernel from the 01.00 CD image you downloaded, and everything
> else from the new release.

I'll keep that in mind for my next install.


> For kernel cross compilation we use the following binary RPM's (LE
> shown only):
>
>        binutils-mipsel-linux-2.9.5-3
>        egcs-mipsel-linux-1.1.2-4

I'll try what I've already installed and see what happens.  If it fails,
I'll upgrade binutils and try again.


Thank you for your help.  :-)


David






From owner-linux-mips@oss.sgi.com Thu May 30 14:07:38 2002
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From: "David Christensen" <dpchrist@holgerdanske.com>
To: <linux-mips@oss.sgi.com>
Cc: "Hartvig Ekner" <hartvige@mips.com>
Subject: Re: cross-compiler for MIPS_RedHat7.1_Release-01.00 on Atlas/4Kc using RH7.3-i386 host
Date: Thu, 30 May 2002 14:09:21 -0700
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linux-mips@oss.sgi.com & Hartvig:

>>        binutils-mipsel-linux-2.9.5-3
>>        egcs-mipsel-linux-1.1.2-4
> I'll try what I've already installed and see what happens.

It works!  :-)


David Christensen
dpchrist@holgerdanske.com




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Message-ID: <023001c2081f$95a397d0$10eca8c0@grendel>
From: "Kevin D. Kissell" <kevink@mips.com>
To: "Daniel Jacobowitz" <dan@debian.org>,
   "Justin Carlson" <justinca@cs.cmu.edu>
Cc: <linux-mips@oss.sgi.com>
References: <1022787167.14210.472.camel@ldt-sj3-022.sj.broadcom.com> <20020530195052.GA10587@branoic.them.org>
Subject: Re: Function pointers and #defines
Date: Thu, 30 May 2002 23:18:44 +0200
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From: "Daniel Jacobowitz" <dan@debian.org>
> On Thu, May 30, 2002 at 12:32:47PM -0700, Justin Carlson wrote:
> > A fair number of places in the headers, we have stuff like this:
> > 
> > void (*_some_fn)(int arg1, int arg2);
> > #define some_fn(arg1, arg2) _some_fn(arg1, arg2)
> > 
> > Why do we do this, as opposed to:
> > 
> > void (*some_fn)(int arg1, int arg2);
> > 
> > Both syntaxes result in being able to say
> > 
> > some_fn(1, 2);
> > 
> > but the latter is both clearer and shorter.  Is there some deep,
> > mystical C reason that we use the former, or did someone do it that way
> > a long time ago and no one has changed it?
> 
> At a guess, this prevents taking the address of the function
> unintentionally...

More likely, some ancient early version of the code was
written with a single global function, some_fn(), and it
was easier to override it with a pointer indirection in
the header than to hunt down and change all invocations.
Sometimes that's good software engineering.  Sometimes
it's just laziness...

            Kevin K.


From owner-linux-mips@oss.sgi.com Thu May 30 14:12:06 2002
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From: Muthukumar Ratty <muthu5@sbcglobal.net>
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To: David Christensen <dpchrist@holgerdanske.com>
cc: <linux-mips@oss.sgi.com>, Hartvig Ekner <hartvige@mips.com>
Subject: Re: cross-compiler for MIPS_RedHat7.1_Release-01.00 on Atlas/4Kc
 using RH7.3-i386 host
In-Reply-To: <007401c20817$f2277f60$0b01a8c0@w2k30g>
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On Thu, 30 May 2002, David Christensen wrote:

> linux-mips@oss.sgi.com & Hartvig:
>
> Hartvig Ekner wrote:
> > from H.J.) as well on an Atlas, you'll just have to use the 2.4.3
> > install kernel from the 01.00 CD image you downloaded, and everything
> > else from the new release.

Is there any latest kernel (2.5.xx) available for MIPS/Atlas?

>
> >
> >        binutils-mipsel-linux-2.9.5-3
> >        egcs-mipsel-linux-1.1.2-4
>

I played around with some cross-compilers and what I understood is

1. Algorithmics sde4 is not matured enough to compile 2.4.xx kernels (As
Dominic Sweetman mentioned in his reply to my help mail). He said sde5
will do but I dint get a chance to try this. Any update from anyone used it?

2. I followed BradLaRondes write up - Building a Modern Mips Tool chain (I
dont have the link irght now, but you can google it). It compiles the
kernel and Applications. But it requires kernel header lying around from previous
builds. So if you are just starting, then you may wanna grab the header
from somewhere. But the problem with this toolchain is: I was not able to
build Yamon SREC using this.

3. I also tried Steve Hills toolchain located at
ftp://ftp.cotw.com/Linux/MIPS/toolchain/experimental
It is complete and I can build kernel and applications with it. Again I
couldnt build Yamon SREC with it.

BTW you may need to do slight changes, like changing target from
little-mips to tradlittle-mips etc. Its simple but if you get stuck, post
it here and someone will help you.

All the best,
Muthu

> I'll try what I've already installed and see what happens.  If it fails,
> I'll upgrade binutils and try again.
>
>
> Thank you for your help.  :-)
>
>
> David
>
>
>
>
>





From owner-linux-mips@oss.sgi.com Thu May 30 14:24:59 2002
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From: Hartvig Ekner <hartvige@mips.com>
Message-Id: <200205302125.g4ULPgq05186@coplin09.mips.com>
Subject: Re: cross-compiler for MIPS_RedHat7.1_Release-01.00 on Atlas/4Kc
To: muthu5@sbcglobal.net (Muthukumar Ratty)
Date: Thu, 30 May 2002 23:25:42 +0200 (CEST)
Cc: dpchrist@holgerdanske.com (David Christensen), linux-mips@oss.sgi.com,
   hartvige@mips.com (Hartvig Ekner)
In-Reply-To: <Pine.LNX.4.33.0205301346530.4760-100000@Muruga.localdomain> from "Muthukumar Ratty" at May 30, 2002 02:05:17 PM
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Hi,

Muthukumar Ratty writes:
> 
> On Thu, 30 May 2002, David Christensen wrote:
> 
> > linux-mips@oss.sgi.com & Hartvig:
> >
> > Hartvig Ekner wrote:
> > > from H.J.) as well on an Atlas, you'll just have to use the 2.4.3
> > > install kernel from the 01.00 CD image you downloaded, and everything
> > > else from the new release.
> 
> Is there any latest kernel (2.5.xx) available for MIPS/Atlas?

No. Not from us anyway. Internally, we use the Linux systems heavily for
processor testing, so we tend to stay away from the bleeding edge (==
too  many problems and SW bugs). That is also why we haven't switched
to 2.4.18 until now.

That being said, there are probably many others who compile & use 2.5
kernels for MIPS.

> I played around with some cross-compilers and what I understood is
> 
> 1. Algorithmics sde4 is not matured enough to compile 2.4.xx kernels (As
> Dominic Sweetman mentioned in his reply to my help mail). He said sde5
> will do but I dint get a chance to try this. Any update from anyone used it?

We're using a beta of it - and there are known issues being worked on,
both compiling userland natively and kernel cross compiles.
You'll have to ask Dom when he expects final 5.0 to go out the door.

/Hartvig

From owner-linux-mips@oss.sgi.com Thu May 30 14:57:21 2002
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Subject: Re: system() function
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: "Siders, Keith" <keith_siders@toshibatv.com>
Cc: "Linux-Mips (E-mail)" <linux-mips@oss.sgi.com>
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On Thu, 2002-05-30 at 17:01, Siders, Keith wrote:
> I was planning to use system() to invoke a shell and launch a script.

You can do that yes

> However it appears that this causes the parent process to terminate. A note

No it doesn't

> in Linux Programming Bible (Goerzen, 2000) says to never invoke a shell or
> use the system() function. Having looked at fork() and exec(), these will
> require obscene amounts of memory and overhead (for an embedded box). I've

Nope.

> also looked at vfork() and execve(), which looks like it will do what I
> want. So do I do the vfork()/execve() pair, or is there a better way? And
> would sigaction() handling be the way to pass progress information from the
> child back to the parent process?

system is actually implemented using either vfork/execve or fork/execve
to run your command through the shell. It works great but you do need to
remember its going via the shell so things like "*" will be expanded.

fork creates a copy on write clone of the process (ie the program data
is not actually copied unless either task writes to it), so it generally
uses very little ram indeed, especially when one of them exec's
something


From owner-linux-mips@oss.sgi.com Thu May 30 15:14:58 2002
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> PS: I dont like this split up tree - Currently Ralf is the one 
> feeding mainstream so please stop this diversification of the trees
> as the normal user gets completely confused which makes linux mips
> a VERY BAD target and does not help any popularity for the mips targets.
> We had the linux-vr desaster before which helped nothing but in
> the end bound developer efforts which were useless in the end.

True. The problem is the slow migration to Linus tree and the slow
migration into the OSS tree. Here is a suggestion, how about using the BK
tree at bkbits.net. There is a mips tree there but it has never been used. 
The question is who is the admin of that tree so we can have access ? 




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-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

On Thu, 30 May 2002, James Simmons wrote:
>
> > PS: I dont like this split up tree - Currently Ralf is the one
> > feeding mainstream so please stop this diversification of the trees
> > as the normal user gets completely confused which makes linux mips
> > a VERY BAD target and does not help any popularity for the mips targets.
> > We had the linux-vr desaster before which helped nothing but in
> > the end bound developer efforts which were useless in the end.
>
> True. The problem is the slow migration to Linus tree and the slow
> migration into the OSS tree.
You can always pos your patches to the list, and whatever didn't make it
into the tree, can be picked up from there by interested parties.

> Here is a suggestion, how about using the BK
> tree at bkbits.net. There is a mips tree there but it has never been used.
> The question is who is the admin of that tree so we can have access ?
Are you saing "let's make yet another tree"? Ugh...

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From owner-linux-mips@oss.sgi.com Thu May 30 17:21:27 2002
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From: "David Christensen" <dpchrist@holgerdanske.com>
To: <linux-mips@oss.sgi.com>
Cc: "Muthukumar Ratty" <muthu5@sbcglobal.net>
References: <Pine.LNX.4.33.0205301346530.4760-100000@Muruga.localdomain>
Subject: Re: cross-compiler for MIPS_RedHat7.1_Release-01.00 on Atlas/4Kc using RH7.3-i386 host
Date: Thu, 30 May 2002 17:23:11 -0700
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linux-mips@oss.sgi.com & Muthukumar:

Muthukumar Ratty wrote:
> BTW you may need to do slight changes, like changing target from
> little-mips to tradlittle-mips etc. Its simple but if you get stuck,
> post it here and someone will help you.

So far, no problems.  :-)


Thank you for your reply.


David Christensen
dpchrist@holgerdanske.com



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To: William Jhun <wjhun@ayrnetworks.com>
CC: "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Subject: Re: Re: Re: pcnet32.c bug?
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hi,
>> 
>> so,the problem is,can we use wback_inv instead of inv in pci_dma_sync_single
>> when the direction is FROMDEVICE? I don't think so,but that would mean many
>> current drivers are broken...
>
>If I understand this correctly, a writeback means only modified
>cachelines (i.e. data cache lines with a dirty bit, like 'W', set) will
>be written back to main memory.  Since the driver never actually writes
>to any of these buffers (and their contents are invalidated on the
>pci_map_single()), nothing should ever be written back to main memory.
>If this were not the case, you would surely see packet corruption as the
>stale cachelines from a re-used buffer would be written back. I tend not
>to think that it's just coincidence and that MIPS caches tend to be
>small...
Oh,yes,thank you.
>
>So, writeback-invalidate is not incorrect, but it's not efficient for
>all platforms. Ralf explained to me that some CPUs cannot do indexed
>invalidates separately from writebacks.
>
>I think all three (dma_cache_wback, dma_cache_wback_inv,
>dma_cache_inv) of these calls should be implemented for all CPUs and
>default to dma_cache_wback_inv() if not available. I can come up with a
>patch if people agree (that wback_inv is a suitable replacement for
>either _inv or _wback; MIPS-specific code than can be written to use
>whatever is most optimal if present on that architecture...
Why not? We have many different c-xxx.c for caches anyway.
>
>Thanks,
>Will

= = = = = = = = = = = = = = = = = = = =
			

Best Regards
---------------------------------------
Zhang Fuxin
System Architecture Lab
Institute of Computing Technology
Chinese Academy of Sciences,China
http://www.ict.ac.cn
 
			¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡2002-05-31





From owner-linux-mips@oss.sgi.com Thu May 30 17:57:32 2002
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On Wed, May 29, 2002 at 02:07:59PM -0700, Ralf Baechle wrote:
> > 
> > Which caches does this apply to?  It looks like the current
> > implementations assume L1 only.
> 
> The operation got introduced for the R10000 where we only need to flush
> the caches during initialization or the (unlikely on Origin) case of

Which case?

Thanks,

Florian

From owner-linux-mips@oss.sgi.com Thu May 30 19:27:28 2002
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Date: Fri, 31 May 2002 11:28:47 +0900 (JST)
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To: takeshi_aihana@montavista.co.jp
Cc: linux-mips@oss.sgi.com
Subject: Re: (Re-Send) shmctl() returns corrupt value on pb1000.
From: Atsushi Nemoto <nemoto@toshiba-tops.co.jp>
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>>>>> On 30 May 2002 22:02:57 +0900, Takeshi Aihana <takeshi_aihana@montavista.co.jp> said:
takeshi_aihana> (B) The version of glibc on pb1000 is 2.2.3/kernel-2.4.17.

takeshi_aihana> Is there any inconsistents on those conditions?

AFAIK, Yes.  For example, look struct ipc_perm in bits/ipc.h and
struct ipc64_perm in asm-mips/ipcbuf.h (not struct ipc_perm in
linux/ipc.h which is obsolete).

takeshi_aihana> Should be update to 2.2.4 on pb1000?

If you can.  Please do not forget rebuilding all applications which
including these headers.  If you want to stay in 2.2.3, you will have
to modify your kernel headers according to the libc headers.

---
Atsushi Nemoto

From owner-linux-mips@oss.sgi.com Thu May 30 20:22:44 2002
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Date: Thu, 30 May 2002 20:24:04 -0700
From: "H . J . Lu" <hjl@lucon.org>
To: linux-mips@oss.sgi.com
Subject: Announce RedHat 7.3 for mips/mipsel
Message-ID: <20020530202404.A13170@lucon.org>
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My mini-port of RedHat 7.3 is at

ftp://oss.sgi.com/pub/linux/mips/redhat/7.3/

It has both mips (big endian) and mipsel (little endian) binary rpms.
You should be able to put a small RedHat 7.3 on the mips/mipsel box and
compile the rest of RedHat 7.3 yourselves.

Here are something you should know:

1. The cross compiler hosted on RedHat 7.3/x86 is provided as the
toolchain rpm. The binary rpms for the mips and mipsel cross compilers
are included. This toolchain is a combination of gcc, binutils, gdb and
glibc. It is packaged for the cross compiling. It allows you to cross
compile to RedHat 7.3/mips/mipsel from a RedHat 7.3/x86 host.
2. You have to find a way to put those rpms on your machine. I use
network boot and NFS root to do it.
3. baseline.tar.bz2 contains the cross build tree. You may need to
install i386 rpm binary included here to rebuild mips/mipsel rpms on
an x86 host. The "installer" directory has a simple installer, which
can be used to prepare NFS root and install RedHat 7.3/mips/mipsel on
a hard drive.
4. Since everything is cross compiled from x86, which is little endian,
many data files for mips, which is big endian, are either missing or
wrong. To get those data files for mips, you have to rebuild/install
the folowing rpms:

cracklib
glibc

natively on Linux/mips.
5. You should build/install perl rpm natively on your newly installed
mips/mipsel box.

Thanks.


H.J.

From owner-linux-mips@oss.sgi.com Fri May 31 02:13:10 2002
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   linux-mips@oss.sgi.com
Subject: Re: Function pointers and #defines
References: <1022787167.14210.472.camel@ldt-sj3-022.sj.broadcom.com> <20020530195052.GA10587@branoic.them.org> <023001c2081f$95a397d0$10eca8c0@grendel>
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"Kevin D. Kissell" wrote:
> 
> From: "Daniel Jacobowitz" <dan@debian.org>
> > On Thu, May 30, 2002 at 12:32:47PM -0700, Justin Carlson wrote:
> > > A fair number of places in the headers, we have stuff like this:
> > >
> > > void (*_some_fn)(int arg1, int arg2);
> > > #define some_fn(arg1, arg2) _some_fn(arg1, arg2)
> > >
> > > Why do we do this, as opposed to:
> > >
> > > void (*some_fn)(int arg1, int arg2);
> > >
> > > Both syntaxes result in being able to say
> > >
> > > some_fn(1, 2);
> > >
> > > but the latter is both clearer and shorter.  Is there some deep,
> > > mystical C reason that we use the former, or did someone do it that way
> > > a long time ago and no one has changed it?
> >
> > At a guess, this prevents taking the address of the function
> > unintentionally...
> 
> More likely, some ancient early version of the code was
> written with a single global function, some_fn(), and it
> was easier to override it with a pointer indirection in
> the header than to hunt down and change all invocations.
> Sometimes that's good software engineering.  Sometimes
> it's just laziness...
> 
>             Kevin K.

Just remove the declaration, compile, and look at the code generated.
So, #define is just a safety belt.

Regards,
Gleb.

From owner-linux-mips@oss.sgi.com Fri May 31 02:19:06 2002
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On Thu, May 30, 2002 at 03:16:10PM -0700, James Simmons wrote:
> > PS: I dont like this split up tree - Currently Ralf is the one=20
> > feeding mainstream so please stop this diversification of the trees
> > as the normal user gets completely confused which makes linux mips
> > a VERY BAD target and does not help any popularity for the mips targets.
> > We had the linux-vr desaster before which helped nothing but in
> > the end bound developer efforts which were useless in the end.
>=20
> True. The problem is the slow migration to Linus tree and the slow
> migration into the OSS tree. Here is a suggestion, how about using the BK
> tree at bkbits.net. There is a mips tree there but it has never been used=
..=20
> The question is who is the admin of that tree so we can have access ?=20

Bitkeeper is evil non free software i will hopfully never be required
to use.

If the migration is to slow help Ralf - Ralf is handing out CVS access
to those he trusts developing in the correct direction. I also think
that there are ways to split up feeding back the stuff. Generating
one another tree wont help a lot.

Flo
--=20
Florian Lohoff                  flo@rfc822.org             +49-5201-669912
                        Heisenberg may have been here.

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From owner-linux-mips@oss.sgi.com Fri May 31 02:42:54 2002
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To: Jun Sun <jsun@mvista.com>
CC: Alexandr Andreev <andreev@niisi.msk.ru>, linux-mips@oss.sgi.com,
   Ralf Baechle <ralf@oss.sgi.com>
Subject: Re: 3 questions about linux-2.4.18 and R3000
References: <3CEEBBA9.5070809@niisi.msk.ru> <3CEEAC5F.6010802@mvista.com> <3CF2A17D.6050207@niisi.msk.ru> <3CF3BB4B.504@mvista.com>
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Jun Sun wrote:
> >>
> >> We have been using gcc 2.9.5 and binutils 2.10.x for R3000 CPUs for
> >> quite a  while with no problems.  It seems newer gcc and binutiles are
> >> fine too.
> >>
> > I understand, but is there any __official__ recommended versions of these
> > utils? http://oss.sgi.com/mips/mips-howto.html is out-of-date :(
> >
> 
> Who are the "officiers" to decide on __official__ versions? :-)  If you are
> really uncomfortable with non-official stuff, you might want to consider
> paying some vendor and I am sure you will be given an "official" version.

"Official" means "if I report a bug w/o a patch in this list, I don't
get a message which requests to change the tools". 

I think, Ralf is the "officier" who decides what the right toolchain is.
Now, last toolchain Ralf announced was 

- binutils

Date:            Fri, 1 Dec 2000 03:06:19 +0100
From:            Ralf Baechle <ralf@oss.sgi.com>
To:            linux-mips@oss.sgi.com, linux-mips@fnet.fr

Binutils were buggy handling a cases involving empty object files.  I've
uploaded fixed binutils 2.8.1 cross-linker packages to oss.sgi.com; 
I'll
upload fixed binutils 2.9.5 binaries (mips64 only) later.  The
worarounds
for this bug have been removed from the CVS archive that is updating is
required for building a current 2.4 kernel.

  Ralf


- compiler

Subject:            New crosscompilers
Date:            Wed, 18 Apr 2001 18:42:07 -0300
From:            Ralf Baechle <ralf@oss.sgi.com>
To:            linux-mips@oss.sgi.com, linux-mips@fnet.fr

I've uploaded new egcs 1.1.2 based crosscompiler to oss.sgi.com into
/pub/linux/mips/crossdev/.  The only change for version 1.1.2-4 affects
mips64-linux and mips64el-linux targets where asking for alignments
larger than 8 bytes was ignored with a warning message.  This did
possibly result in some performance penalty for mips64 kernels.

  Ralf


The faq does mention this toolchain still.

Ralf, are you going to announce new toolchain given the lastest kernel
can't be compiled with old one? Or shall we change back the sources?

Regards,
Gleb.

From owner-linux-mips@oss.sgi.com Fri May 31 11:39:00 2002
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Date: Fri, 31 May 2002 11:40:29 -0700 (PDT)
From: James Simmons <jsimmons@transvirtual.com>
To: linux-mips-kernel@lists.sourceforge.net
cc: linux-mips <linux-mips@oss.sgi.com>
Subject: TX 3912 framebuffer device
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Can the video mode of this device be switched at run time or is it a
static mode. I'm porting it to the new fbdev api and I want to get it
right.

   . ---
   |o_o |
   |:_/ |   Give Micro$oft the Bird!!!!
  //   \ \  Use Linux!!!!
 (|     | )
 /'\_   _/`\
 \___)=(___/




From owner-linux-mips@oss.sgi.com Fri May 31 11:41:08 2002
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Subject: Re: [Fwd: Current state of MIPS16 support?]
From: Eric Christopher <echristo@redhat.com>
To: Dominic Sweetman <dom@algor.co.uk>
Cc: Johannes Stezenbach <js@convergence.de>, gcc@gcc.gnu.org,
   linux-mips@oss.sgi.com, sde@algor.co.uk
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	<15566.28397.770794.272735@gladsmuir.algor.co.uk>
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Date: 31 May 2002 11:40:29 -0700
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<I'm not sure if I ever sent this, so I apologize if you received it
twice>

Dominic, 

> > I have not looked at the Algorithmics code because I don't have
> > copyright on it...
> 
> We do publish our sources on our web server.  Not only are they GPL
> but we have a copyright assignment to the FSF in place (which I know
> was sent to Jim Wilson of Cygnus, albeit in 1993...)
> 
It's great that your changes do get out in one form or another. I'm
personally uncertain as to the nature of copyright and how it would
affect if I looked at your code and put it into the mainline sources -
so I haven't :) 

> We're operating from a baseline which was a Cygnus/RedHat "2.96"
> release made to MIPS Technologies in late 2000.  A snapshot from a
> contract which had run into some kind of dissension, it had some new
> MIPS16 support but it was very buggy (the regular 32-bit MIPS code
> generator, too).  It has some nice features, though, like the "Haifa"
> scheduler and the DFA extensions to machine descriptions for
> superscalar CPUs.
> 
I don't remember any new mips16 support, however, I do remember that the
work was quite old (more than 2 years now). MIPS32 support is quite a
bit better now, and with the acceptance of Vlad's DFA scheduler into
mainline the scheduling descriptions will be following shortly. 

> It's true we have not contributed patches lately.  We don't really
> have the resouces; our success rate used to be very low, and since
> we're not working around the developing 3.x sources the prospects seem
> even dimmer.
> 
The backend has changed a bit in the time, however, it hasn't changed so
much that the patches would be that difficult for you to bring forward.
I encourage you to reconsider contributing them. 

> We're working (with funding from MIPS Technologies) on building a
> toolchain which:
> 
> o Can build Linux kernel, libraries and applications alike;
> 
> o Is substantially more efficient than other GCC versions when
>   producing MIPS application ("MIPS/ABI", PIC) code;
> 
> o Will produce ugly-but-correct PIC code for MIPS16 functions, so
>   MIPS16 can be tested in a standard Linux environment;
> 
> o Operates to a known and documented ABI (even the forgotten details,
>   like gprof...)
> 
> (The modesty of those ambitions should be measured against the reality
> of today's Linux/MIPS...)
I'm not certain what you are actually fixing here as I've not seen any
descriptions of problems here. I'd love to fix any problems that you've
had reported in the mainline sources so that everyone can get the
benefit of the work you are doing. 


> It would be even more valuable if we could ensure that MIPS becomes a
> "first-class" architecture for the evolving GCC - but the latter
> surely is a big commitment for the core GCC group.
> 
I'm putting in a lot of effort to cleaning up the MIPS port and am
committed to the architecture. 

> It's a pity that the different priorities of various funders and
> developers mean that there is no baseline toolkit for Linux/MIPS, so
> that such resources as are available are frequently used to re-invent
> the wheel.
> 
> Anyone got any ideas how to make it better?
> 
The problem as I see it is that no one wants/cares to contribute their
changes back that they make, or at least file bug reports against the
problems that they have. Almost 90% of the bug reports I see are against
IRIX. People have to "re-invent the wheel" because the changes never
make it back into the official sources - everyone has their own one
offs. If we fix this then the work that all of the disparate groups are
doing will at least go toward a common goal. 

-eric 

-- 
A fire drill does not demand
a fire.


From owner-linux-mips@oss.sgi.com Fri May 31 12:16:32 2002
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Date: Fri, 31 May 2002 12:17:41 -0700 (PDT)
From: James Simmons <jsimmons@transvirtual.com>
To: Ilya <ilya@theIlya.com>
cc: Florian Lohoff <flo@rfc822.org>, Brian Murphy <brian@murphy.dk>,
   linux-mips <linux-mips@oss.sgi.com>
Subject: Re: New platforms
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> > True. The problem is the slow migration to Linus tree and the slow
> > migration into the OSS tree.
> You can always pos your patches to the list, and whatever didn't make it
> into the tree, can be picked up from there by interested parties.

Now that I have time I plan to do that.

> > Here is a suggestion, how about using the BK
> > tree at bkbits.net. There is a mips tree there but it has never been used.
> > The question is who is the admin of that tree so we can have access ?
> Are you saing "let's make yet another tree"? Ugh...

No. I'm talking about having a BK tree to use to sync up to Linus with.
This way the OSS and SF tree and push into the BK tree and have no issues.



From owner-linux-mips@oss.sgi.com Fri May 31 12:41:21 2002
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Date: Fri, 31 May 2002 12:42:45 -0700
From: Steve Longerbeam <stevel@mvista.com>
Organization: MontaVista Software
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To: James Simmons <jsimmons@transvirtual.com>
CC: linux-mips-kernel@lists.sourceforge.net,
   linux-mips <linux-mips@oss.sgi.com>
Subject: Re: [Linux-mips-kernel]TX 3912 framebuffer device
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Hi James,

There's also a few fb drivers that Pete and I wrote that exist in
the linux-mips tree, and need porting to the new fbdev api. Are you
planning to do these also? These are au1100fb.c, epson1356fb.c, and
it8181fb.c.

Steve

James Simmons wrote:

>Can the video mode of this device be switched at run time or is it a
>static mode. I'm porting it to the new fbdev api and I want to get it
>right.
>
>   . ---
>   |o_o |
>   |:_/ |   Give Micro$oft the Bird!!!!
>  //   \ \  Use Linux!!!!
> (|     | )
> /'\_   _/`\
> \___)=(___/
>
>
>
>
>_______________________________________________________________
>
>Don't miss the 2002 Sprint PCS Application Developer's Conference
>August 25-28 in Las Vegas -- http://devcon.sprintpcs.com/adp/index.cfm
>
>_______________________________________________
>Linux-mips-kernel mailing list
>Linux-mips-kernel@lists.sourceforge.net
>https://lists.sourceforge.net/lists/listinfo/linux-mips-kernel
>

-- 
Steve Longerbeam
MontaVista Software, Inc.
office:408-328-9008, fax:408-328-9204
http://www.mvista.com




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From: James Simmons <jsimmons@transvirtual.com>
To: Steve Longerbeam <stevel@mvista.com>
cc: linux-mips-kernel@lists.sourceforge.net,
   linux-mips <linux-mips@oss.sgi.com>
Subject: Re: [Linux-mips-kernel]TX 3912 framebuffer device
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> Hi James,
>
> There's also a few fb drivers that Pete and I wrote that exist in
> the linux-mips tree, and need porting to the new fbdev api. Are you
> planning to do these also? These are au1100fb.c, epson1356fb.c, and
> it8181fb.c.

Yes!!! With some help of course.



From owner-linux-mips@oss.sgi.com Fri May 31 13:18:29 2002
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From: James Simmons <jsimmons@transvirtual.com>
To: "Kevin D. Kissell" <kevink@mips.com>
cc: Jun Sun <jsun@mvista.com>, Geert Uytterhoeven <geert@linux-m68k.org>,
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Subject: Re: PCI Graphics/Video Card for Malta Board?
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> > Dan Malek also wrote a driver for MQ200.
>
> Which is essentially a handheld/webphone graphics chip,
> for which the documentation is only available under NDA.
> Not terribly useful for me, thanks.

I have docs on this chipset. I forgot where I got them. I plan to work on
a driver for that chipset since I have a board with it on it.



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Date: Fri, 31 May 2002 13:24:08 -0700 (PDT)
From: James Simmons <jsimmons@transvirtual.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
cc: Alan Cox <alan@lxorguk.ukuu.org.uk>, Dan Malek <dan@embeddededge.com>,
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Subject: Re: PCI Graphics/Video Card for Malta Board?
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> <sarcastic>
> I guess that's why we still don't have working frame buffer devices for them?
> There are at least 3 frame buffer devices for the Trio floating around the net,
> but none of them work on my cards.
> </sarcastic>

I have started a operation to find all the MIA framebuffer drivers that
have been posted. I really like to track those S3 drivers down.



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From: James Simmons <jsimmons@transvirtual.com>
To: Alan Cox <alan@lxorguk.ukuu.org.uk>
cc: Geert Uytterhoeven <geert@linux-m68k.org>,
   Dan Malek <dan@embeddededge.com>, "Kevin D. Kissell" <kevink@mips.com>,
   Jun Sun <jsun@mvista.com>, "Steven J. Hill" <sjhill@realitydiluted.com>,
   Linux/MIPS Development <linux-mips@oss.sgi.com>
Subject: Re: PCI Graphics/Video Card for Malta Board?
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> I've had no problem with Russell King's ARM code.

The problem with older S3 cards is that they have so many different
RAMDACS and often 3rd party PLLs.

> And for the 3dfx
> voodoo2 (UKP 9 off ebay) none at all. The voodoo seems to have always
> been designed to be totally soft configured and as its not a primary
> video card the bios/firmware all leaves it alone

Yeap!! I was reading in the docs how to get voodoo cards to be multihead
freindly :-)


From owner-linux-mips@oss.sgi.com Fri May 31 14:42:39 2002
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Subject: Re: [Fwd: Current state of MIPS16 support?]
To: echristo@redhat.com (Eric Christopher)
Date: Fri, 31 May 2002 14:44:04 -0700 (PDT)
Cc: dom@algor.co.uk (Dominic Sweetman),
   js@convergence.de (Johannes Stezenbach), gcc@gcc.gnu.org,
   linux-mips@oss.sgi.com, sde@algor.co.uk
In-Reply-To: <1022870431.3668.19.camel@ghostwheel.cygnus.com> from "Eric Christopher" at May 31, 2002 11:40:29 AM
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> > > I have not looked at the Algorithmics code because I don't have
> > > copyright on it...

Dominic wrote:
> > We do publish our sources on our web server.  Not only are they GPL
> > but we have a copyright assignment to the FSF in place (which I know
> > was sent to Jim Wilson of Cygnus, albeit in 1993...)

Eric Christopher wrote:
> It's great that your changes do get out in one form or another. I'm
> personally uncertain as to the nature of copyright and how it would
> affect if I looked at your code and put it into the mainline sources -
> so I haven't :) 

Whose name and what company name would be on the copyright assignment?
We can check with the FSF list to see if it's on file.  Meanwhile it
should not go in.


From owner-linux-mips@oss.sgi.com Fri May 31 15:21:54 2002
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Date: Fri, 31 May 2002 15:22:41 -0700
From: Raymond Lo <lo@broadon.com>
Organization: BroadOn Communications
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Subject: virtual coherency issues with 4Kc ? 
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I'm evaluting the MIPS 4Kc core.   One thing I'm trying to find out is 
how does linux deal with virtual aliasing in the cache for 4Kc.  

The cache of 4Kc is virtually-indexed and it has no hardware support to 
suppress virtual aliasing.   The cachetlb.txt under linux/Documentation 
indicates that two things need to be done in software to handle virtual 
aliasing in D-cache.

The first is to handle virtual aliasing in user address spaces.  Shared 
pages are mmaped at virtual addresses that are multiples of the cache 
size.   That has already been taked care of in  include/asm-mips/shmparam.h.

The second is to handle virtual aliasing between kernel virtual address 
space and user virtual address space by providing a number of functions 
to flush the cache at various points in the kernel.   The old interface 
is flush_page_to_ram.   The new ones are
  copy_user_page,
  clear_user_page,
  flush_dcache_page.

I'm surprised to find out that flush_dcache_page is a macro defined to 
be  do {} while (0) in linux/asm-mips/pgtable.h.  The source code I 
looked is the web CVS on oss.sgi.com and 2.4.18.

Apparently the necessary flushing hasn't been done from the mm and fs 
code for any MIPS port.  I know this is not necessary for R4000 with 
virtual coherency execptions.     I don't understand why it can be 
skipped for 4Kc.   Can anybody shine some light on the subject?

 -Raymond

 
P.S.   The link http://oss.sgi.com/mips/archive/ is stale.  




From owner-linux-mips@oss.sgi.com Fri May 31 16:59:51 2002
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From: "Kevin D. Kissell" <kevink@mips.com>
To: "Raymond Lo" <lo@broadon.com>, <linux-mips@oss.sgi.com>
References: <3CF7F7B1.50300@broadon.com>
Subject: Re: virtual coherency issues with 4Kc ? 
Date: Sat, 1 Jun 2002 02:07:32 +0200
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Note that the cache organization of the 4Kc is configurable.
Virtual aliasing problems should only be possible if the cache
"way" size exceeds the page size used (4KB for Linux). A
maxed-out 4Kc can create a virtual coherency problem, 
but a 4Kc with e.g. 4-way set associative 16KB caches
should be exempt.  Since the cache configuration of a 4Kc
can be determined at boot time by the kernel, by reading
the config registers, those annoying cache flushes should
only really happen if the cache configuration is "at risk".

            Kevin K.

----- Original Message ----- 
From: "Raymond Lo" <lo@broadon.com>
To: <linux-mips@oss.sgi.com>
Sent: Saturday, June 01, 2002 12:22 AM
Subject: virtual coherency issues with 4Kc ? 


> I'm evaluting the MIPS 4Kc core.   One thing I'm trying to find out is 
> how does linux deal with virtual aliasing in the cache for 4Kc.  
> 
> The cache of 4Kc is virtually-indexed and it has no hardware support to 
> suppress virtual aliasing.   The cachetlb.txt under linux/Documentation 
> indicates that two things need to be done in software to handle virtual 
> aliasing in D-cache.
> 
> The first is to handle virtual aliasing in user address spaces.  Shared 
> pages are mmaped at virtual addresses that are multiples of the cache 
> size.   That has already been taked care of in  include/asm-mips/shmparam.h.
> 
> The second is to handle virtual aliasing between kernel virtual address 
> space and user virtual address space by providing a number of functions 
> to flush the cache at various points in the kernel.   The old interface 
> is flush_page_to_ram.   The new ones are
>   copy_user_page,
>   clear_user_page,
>   flush_dcache_page.
> 
> I'm surprised to find out that flush_dcache_page is a macro defined to 
> be  do {} while (0) in linux/asm-mips/pgtable.h.  The source code I 
> looked is the web CVS on oss.sgi.com and 2.4.18.
> 
> Apparently the necessary flushing hasn't been done from the mm and fs 
> code for any MIPS port.  I know this is not necessary for R4000 with 
> virtual coherency execptions.     I don't understand why it can be 
> skipped for 4Kc.   Can anybody shine some light on the subject?
> 
>  -Raymond
> 
>  
> P.S.   The link http://oss.sgi.com/mips/archive/ is stale.  
> 
> 
> 
> 


