From chamakmann@yahoo.co.in Thu Jan 2 03:57:13 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jan 2003 03:57:13 +0000 (GMT) Received: from web8204.mail.in.yahoo.com ([IPv6:::ffff:203.199.70.124]:15908 "HELO web8204.mail.in.yahoo.com") by linux-mips.org with SMTP id ; Thu, 2 Jan 2003 03:57:13 +0000 Message-ID: <20030102035704.91069.qmail@web8204.mail.in.yahoo.com> Received: from [203.145.184.209] by web8204.mail.in.yahoo.com via HTTP; Thu, 02 Jan 2003 03:57:04 GMT Date: Thu, 2 Jan 2003 03:57:04 +0000 (GMT) From: =?iso-8859-1?q?chamak=20man?= Subject: System Call in MIPS To: linux-mips@linux-mips.org MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1075 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: chamakmann@yahoo.co.in Precedence: bulk X-list: linux-mips Hi, I am finding problems in adding a new system call for MIPS kernel. Where can i get information on it. with regards, sumanth.g ________________________________________________________________________ Missed your favourite TV serial last night? Try the new, Yahoo! TV. visit http://in.tv.yahoo.com From ralf@linux-mips.org Thu Jan 2 11:05:39 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jan 2003 11:05:39 +0000 (GMT) Received: from p508B5BAC.dip.t-dialin.net ([IPv6:::ffff:80.139.91.172]:35296 "EHLO dea.linux-mips.net") by linux-mips.org with ESMTP id ; Thu, 2 Jan 2003 11:05:39 +0000 Received: (from ralf@localhost) by dea.linux-mips.net (8.11.6/8.11.6) id h02B5Su14781; Thu, 2 Jan 2003 12:05:28 +0100 Date: Thu, 2 Jan 2003 12:05:28 +0100 From: Ralf Baechle To: chamak man Cc: linux-mips@linux-mips.org Subject: Re: System Call in MIPS Message-ID: <20030102120528.A7401@linux-mips.org> References: <20030102035704.91069.qmail@web8204.mail.in.yahoo.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5.1i In-Reply-To: <20030102035704.91069.qmail@web8204.mail.in.yahoo.com>; from chamakmann@yahoo.co.in on Thu, Jan 02, 2003 at 03:57:04AM +0000 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1076 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, Jan 02, 2003 at 03:57:04AM +0000, chamak man wrote: > I am finding problems in adding a new system call > for MIPS kernel. Where can i get information on it. See include include/asm-mips/unistd.h and arch/mips/kernel/scall_o32.S. In general adding new syscalls is considered a bad idea you may want to look into using ioctl, sysctl(2) or procfs. Ralf From nmckee@telogy.com Thu Jan 2 15:44:15 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jan 2003 15:44:16 +0000 (GMT) Received: from [IPv6:::ffff:209.116.120.7] ([IPv6:::ffff:209.116.120.7]:2320 "EHLO tnint11.telogy.design.ti.com") by linux-mips.org with ESMTP id ; Thu, 2 Jan 2003 15:44:15 +0000 Received: by tnint11.telogy.design.ti.com with Internet Mail Service (5.5.2653.19) id ; Thu, 2 Jan 2003 10:42:06 -0500 Message-ID: <37A3C2F21006D611995100B0D0F9B73CBFE3E1@tnint11.telogy.design.ti.com> From: "Zajerko-McKee, Nick" To: 'chamak man' , linux-mips@linux-mips.org Subject: RE: System Call in MIPS Date: Thu, 2 Jan 2003 10:42:05 -0500 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.5.2653.19) Content-Type: text/plain; charset="iso-8859-1" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1077 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: nmckee@telogy.com Precedence: bulk X-list: linux-mips One thing to check is if unistd.h matches whats in the syscall table. In 2.4.17 I was working with, there were more entries in the defines than in the table so when I added my calls they went to never never land... -----Original Message----- From: chamak man [mailto:chamakmann@yahoo.co.in] Sent: Wednesday, January 01, 2003 10:57 PM To: linux-mips@linux-mips.org Subject: System Call in MIPS Hi, I am finding problems in adding a new system call for MIPS kernel. Where can i get information on it. with regards, sumanth.g ________________________________________________________________________ Missed your favourite TV serial last night? Try the new, Yahoo! TV. visit http://in.tv.yahoo.com From quintela@mandrakesoft.com Thu Jan 2 19:26:11 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jan 2003 19:26:12 +0000 (GMT) Received: from cm19173.red.mundo-r.com ([IPv6:::ffff:213.60.19.173]:56001 "EHLO demo.mitica") by linux-mips.org with ESMTP id ; Thu, 2 Jan 2003 19:26:11 +0000 Received: by demo.mitica (Postfix, from userid 501) id C6E35D657; Thu, 2 Jan 2003 20:33:30 +0100 (CET) To: Ralf Baechle , mipslist Subject: [PATCH]: fix possible buffer overflow problem in promlib X-Url: http://people.mandrakesoft.com/~quintela From: Juan Quintela Date: 02 Jan 2003 20:33:30 +0100 Message-ID: Lines: 72 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1078 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: quintela@mandrakesoft.com Precedence: bulk X-list: linux-mips Hi as the issue about prom.h is still not clear, please aply the trivial part. 32 and 64 bits patch. Later, Juan. Index: arch/mips64/lib/promlib.c =================================================================== RCS file: /home/cvs/linux/arch/mips64/lib/promlib.c,v retrieving revision 1.1.2.1 diff -u -r1.1.2.1 promlib.c --- arch/mips64/lib/promlib.c 28 Sep 2002 22:28:38 -0000 1.1.2.1 +++ arch/mips64/lib/promlib.c 20 Dec 2002 19:10:45 -0000 @@ -1,13 +1,19 @@ + + +#include + #include +#define BUFSIZE 1024 + void prom_printf(char *fmt, ...) { va_list args; - char ppbuf[1024]; + char ppbuf[BUFSIZE]; char *bptr; va_start(args, fmt); - vsprintf(ppbuf, fmt, args); + vsnprintf(ppbuf, BUFSIZE, fmt, args); bptr = ppbuf; Index: arch/mips/lib/promlib.c =================================================================== RCS file: /home/cvs/linux/arch/mips/lib/promlib.c,v retrieving revision 1.1.2.1 diff -u -r1.1.2.1 promlib.c --- arch/mips/lib/promlib.c 28 Sep 2002 22:28:38 -0000 1.1.2.1 +++ arch/mips/lib/promlib.c 20 Dec 2002 19:10:43 -0000 @@ -1,13 +1,19 @@ + + +#include + #include +#define BUFSIZE 1024 + void prom_printf(char *fmt, ...) { va_list args; - char ppbuf[1024]; + char ppbuf[BUFSIZE]; char *bptr; va_start(args, fmt); - vsprintf(ppbuf, fmt, args); + vsnprintf(ppbuf, BUFSIZE, fmt, args); bptr = ppbuf; -- In theory, practice and theory are the same, but in practice they are different -- Larry McVoy From Geert.Uytterhoeven@sonycom.com Thu Jan 2 19:51:16 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 02 Jan 2003 19:51:16 +0000 (GMT) Received: from mail2.sonytel.be ([IPv6:::ffff:195.0.45.172]:10672 "EHLO mail.sonytel.be") by linux-mips.org with ESMTP id ; Thu, 2 Jan 2003 19:51:16 +0000 Received: from vervain.sonytel.be (mail.sonytel.be [10.17.0.27]) by mail.sonytel.be (8.9.0/8.8.6) with ESMTP id UAA07041; Thu, 2 Jan 2003 20:47:50 +0100 (MET) Date: Thu, 2 Jan 2003 20:47:49 +0100 (MET) From: Geert Uytterhoeven To: Juan Quintela cc: Ralf Baechle , mipslist Subject: Re: [PATCH]: fix possible buffer overflow problem in promlib In-Reply-To: Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1079 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: geert@linux-m68k.org Precedence: bulk X-list: linux-mips On 2 Jan 2003, Juan Quintela wrote: > as the issue about prom.h is still not clear, please aply the > trivial part. > void prom_printf(char *fmt, ...) > { > va_list args; > - char ppbuf[1024]; > + char ppbuf[BUFSIZE]; What about making ppbuf static, to reduce stack usage? Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds From ppopov@mvista.com Fri Jan 3 10:27:47 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jan 2003 10:27:48 +0000 (GMT) Received: from gateway-1237.mvista.com ([IPv6:::ffff:12.44.186.158]:20206 "EHLO av.mvista.com") by linux-mips.org with ESMTP id ; Fri, 3 Jan 2003 10:27:47 +0000 Received: from localhost (av [127.0.0.1]) by av.mvista.com (8.9.3/8.9.3) with ESMTP id CAA26202 for ; Fri, 3 Jan 2003 02:27:26 -0800 Subject: unaligned handler problem From: Pete Popov To: linux-mips Content-Type: text/plain Organization: MontaVista Software Message-Id: <1041589762.18883.4.camel@adsl.pacbell.net> Mime-Version: 1.0 X-Mailer: Ximian Evolution 1.2.1 Date: 03 Jan 2003 02:29:22 -0800 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1080 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ppopov@mvista.com Precedence: bulk X-list: linux-mips The changes betwen rev 1.23 and 1.24 in unaligned.c, to replace check_axs() with verify_area(), causes any unaligned access from within a kernel module to crash. access_ok() returns -EFAULT as the __access_mask is 0xffffffff so __access_ok evaluates to > 0. It's too late for me to look into it any further but perhaps the problem will be obvious to someone else. I'm not sure what get_fs() should return in this case (again, the access is from within a kernel module) but it returns 0xffffffff. Pete From ralf@linux-mips.org Fri Jan 3 12:54:44 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jan 2003 12:54:45 +0000 (GMT) Received: from p508B705C.dip.t-dialin.net ([IPv6:::ffff:80.139.112.92]:45186 "EHLO dea.linux-mips.net") by linux-mips.org with ESMTP id ; Fri, 3 Jan 2003 12:54:44 +0000 Received: (from ralf@localhost) by dea.linux-mips.net (8.11.6/8.11.6) id h03CsNN07917; Fri, 3 Jan 2003 13:54:23 +0100 Date: Fri, 3 Jan 2003 13:54:23 +0100 From: Ralf Baechle To: Geert Uytterhoeven Cc: Juan Quintela , mipslist Subject: Re: [PATCH]: fix possible buffer overflow problem in promlib Message-ID: <20030103135422.A7796@linux-mips.org> References:

Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5.1i In-Reply-To: ; from geert@linux-m68k.org on Thu, Jan 02, 2003 at 08:47:49PM +0100 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1081 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Thu, Jan 02, 2003 at 08:47:49PM +0100, Geert Uytterhoeven wrote: > On 2 Jan 2003, Juan Quintela wrote: > > as the issue about prom.h is still not clear, please aply the > > trivial part. > > > void prom_printf(char *fmt, ...) > > { > > va_list args; > > - char ppbuf[1024]; > > + char ppbuf[BUFSIZE]; > > What about making ppbuf static, to reduce stack usage? By the time when prom_printf() is called stack overflow is not really a consideration anymore, something fatal has happened before. prom_printf() is our own variant of early_print() so eventually should be replaced by that anyway. Ralf From ralf@linux-mips.org Fri Jan 3 13:46:19 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jan 2003 13:46:20 +0000 (GMT) Received: from p508B705C.dip.t-dialin.net ([IPv6:::ffff:80.139.112.92]:14723 "EHLO dea.linux-mips.net") by linux-mips.org with ESMTP id ; Fri, 3 Jan 2003 13:46:19 +0000 Received: (from ralf@localhost) by dea.linux-mips.net (8.11.6/8.11.6) id h03DkFE08978; Fri, 3 Jan 2003 14:46:15 +0100 Date: Fri, 3 Jan 2003 14:46:15 +0100 From: Ralf Baechle To: Pete Popov Cc: linux-mips Subject: Re: unaligned handler problem Message-ID: <20030103144615.A8482@linux-mips.org> References: <1041589762.18883.4.camel@adsl.pacbell.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5.1i In-Reply-To: <1041589762.18883.4.camel@adsl.pacbell.net>; from ppopov@mvista.com on Fri, Jan 03, 2003 at 02:29:22AM -0800 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1082 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Fri, Jan 03, 2003 at 02:29:22AM -0800, Pete Popov wrote: > The changes betwen rev 1.23 and 1.24 in unaligned.c, to replace > check_axs() with verify_area(), causes any unaligned access from within > a kernel module to crash. access_ok() returns -EFAULT as the > __access_mask is 0xffffffff so __access_ok evaluates to > 0. It's too > late for me to look into it any further but perhaps the problem will be > obvious to someone else. I'm not sure what get_fs() should return in > this case (again, the access is from within a kernel module) but it > returns 0xffffffff. The address error handler should do something like: mm_segment_t seg; seg = get_fs(); if (!user_mode(regs)) set_fs(KERNEL_DS); ... usual unaligned stuff goes here ... set_fs(seg); Ralf From ica2_ts@csv.ica.uni-stuttgart.de Fri Jan 3 14:30:00 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jan 2003 14:30:01 +0000 (GMT) Received: from iris1.csv.ica.uni-stuttgart.de ([IPv6:::ffff:129.69.118.2]:56655 "EHLO iris1.csv.ica.uni-stuttgart.de") by linux-mips.org with ESMTP id ; Fri, 3 Jan 2003 14:30:00 +0000 Received: from rembrandt.csv.ica.uni-stuttgart.de ([129.69.118.42]) by iris1.csv.ica.uni-stuttgart.de with esmtp (Exim 3.36 #2) id 18USpg-000fgY-00; Fri, 03 Jan 2003 15:29:56 +0100 Received: from ica2_ts by rembrandt.csv.ica.uni-stuttgart.de with local (Exim 3.35 #1 (Debian)) id 18USpg-0006ej-00; Fri, 03 Jan 2003 15:29:56 +0100 Date: Fri, 3 Jan 2003 15:29:56 +0100 To: Ralf Baechle Cc: Geert Uytterhoeven , Juan Quintela , mipslist Subject: Re: [PATCH]: fix possible buffer overflow problem in promlib Message-ID: <20030103142956.GI31256@rembrandt.csv.ica.uni-stuttgart.de> References:

<20030103135422.A7796@linux-mips.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20030103135422.A7796@linux-mips.org> User-Agent: Mutt/1.4i From: Thiemo Seufer Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1083 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ica2_ts@csv.ica.uni-stuttgart.de Precedence: bulk X-list: linux-mips Ralf Baechle wrote: > On Thu, Jan 02, 2003 at 08:47:49PM +0100, Geert Uytterhoeven wrote: > > > On 2 Jan 2003, Juan Quintela wrote: > > > as the issue about prom.h is still not clear, please aply the > > > trivial part. > > > > > void prom_printf(char *fmt, ...) > > > { > > > va_list args; > > > - char ppbuf[1024]; > > > + char ppbuf[BUFSIZE]; > > > > What about making ppbuf static, to reduce stack usage? > > By the time when prom_printf() is called stack overflow is not really a > consideration anymore, something fatal has happened before. I don't think printing e.g. "LINUX started..." indicates something fatal. :-) Thiemo From ralf@linux-mips.org Fri Jan 3 15:48:40 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jan 2003 15:48:41 +0000 (GMT) Received: from p508B6E6D.dip.t-dialin.net ([IPv6:::ffff:80.139.110.109]:22661 "EHLO dea.linux-mips.net") by linux-mips.org with ESMTP id ; Fri, 3 Jan 2003 15:48:40 +0000 Received: (from ralf@localhost) by dea.linux-mips.net (8.11.6/8.11.6) id h03FmWx11578; Fri, 3 Jan 2003 16:48:32 +0100 Date: Fri, 3 Jan 2003 16:48:32 +0100 From: Ralf Baechle To: Thiemo Seufer Cc: Geert Uytterhoeven , Juan Quintela , mipslist Subject: Re: [PATCH]: fix possible buffer overflow problem in promlib Message-ID: <20030103164832.A11536@linux-mips.org> References:

<20030103135422.A7796@linux-mips.org> <20030103142956.GI31256@rembrandt.csv.ica.uni-stuttgart.de> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5.1i In-Reply-To: <20030103142956.GI31256@rembrandt.csv.ica.uni-stuttgart.de>; from ica2_ts@csv.ica.uni-stuttgart.de on Fri, Jan 03, 2003 at 03:29:56PM +0100 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1084 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Fri, Jan 03, 2003 at 03:29:56PM +0100, Thiemo Seufer wrote: > > > What about making ppbuf static, to reduce stack usage? > > > > By the time when prom_printf() is called stack overflow is not really a > > consideration anymore, something fatal has happened before. > > I don't think printing e.g. "LINUX started..." indicates something fatal. :-) So use printk :-) Ralf From ica2_ts@csv.ica.uni-stuttgart.de Fri Jan 3 15:58:34 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jan 2003 15:58:35 +0000 (GMT) Received: from iris1.csv.ica.uni-stuttgart.de ([IPv6:::ffff:129.69.118.2]:6992 "EHLO iris1.csv.ica.uni-stuttgart.de") by linux-mips.org with ESMTP id ; Fri, 3 Jan 2003 15:58:34 +0000 Received: from rembrandt.csv.ica.uni-stuttgart.de ([129.69.118.42]) by iris1.csv.ica.uni-stuttgart.de with esmtp (Exim 3.36 #2) id 18UUDR-000fsd-00; Fri, 03 Jan 2003 16:58:33 +0100 Received: from ica2_ts by rembrandt.csv.ica.uni-stuttgart.de with local (Exim 3.35 #1 (Debian)) id 18UUDQ-0006nX-00; Fri, 03 Jan 2003 16:58:32 +0100 Date: Fri, 3 Jan 2003 16:58:32 +0100 To: Ralf Baechle Cc: Geert Uytterhoeven , Juan Quintela , mipslist Subject: Re: [PATCH]: fix possible buffer overflow problem in promlib Message-ID: <20030103155832.GN31256@rembrandt.csv.ica.uni-stuttgart.de> References:

<20030103135422.A7796@linux-mips.org> <20030103142956.GI31256@rembrandt.csv.ica.uni-stuttgart.de> <20030103164832.A11536@linux-mips.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20030103164832.A11536@linux-mips.org> User-Agent: Mutt/1.4i From: Thiemo Seufer Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1085 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ica2_ts@csv.ica.uni-stuttgart.de Precedence: bulk X-list: linux-mips Ralf Baechle wrote: > On Fri, Jan 03, 2003 at 03:29:56PM +0100, Thiemo Seufer wrote: > > > > > What about making ppbuf static, to reduce stack usage? > > > > > > By the time when prom_printf() is called stack overflow is not really a > > > consideration anymore, something fatal has happened before. > > > > I don't think printing e.g. "LINUX started..." indicates something fatal. :-) > > So use printk :-) printk might not be ready at that time. I grepped the example from arch/mips/mips-boards/generic/init.c, and there are some more occurences in arch/mips which seem to be non-fatal. Thiemo From cwu@deltartp.com Fri Jan 3 21:10:49 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jan 2003 21:10:50 +0000 (GMT) Received: from 216-166-237-83.clec.madisonriver.net ([IPv6:::ffff:216.166.237.83]:44037 "EHLO dpr338") by linux-mips.org with ESMTP id ; Fri, 3 Jan 2003 21:10:49 +0000 Received: from dprn03.deltartp.com ([216.166.210.181]) by 216.166.237.83 with InterScan Messaging Security Suite; Fri, 03 Jan 2003 16:16:56 -0800 Received: by dprn03.deltartp.com with Internet Mail Service (5.5.2653.19) id ; Fri, 3 Jan 2003 15:52:35 -0500 Message-ID: From: Chien-Lung Wu To: "'linux-mips@linux-mips.org'" Subject: glibc-2.2.5 configuration error (cross-compiler) Date: Fri, 3 Jan 2003 15:52:29 -0500 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.5.2653.19) Content-Type: text/plain; charset="iso-8859-1" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1086 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: cwu@deltartp.com Precedence: bulk X-list: linux-mips Hi, I try to build a cross-compiler for mips-linux for mips target (idt32332). I followed the instruction of Bradley D. LaRonde (thanks) http://www.ltc.com/~brad/mips/mips-cross-toolchain/ I downloaded : binutils-2.13 gcc-2.95.3 glibc-2.2.5 and glibc-linuxthreads-2.2.5 and my build system is gcc version 2.96 20000731 (Red Hat Linux 7.1 2.96-98) and gmake 3.79.1. As I compiled and install binutils-2.13 and gcc-2.95.3 (1th time), everything is fine. However, as I configured glibc-2-2.5 following the instruction: tar -xzf glibc-2.2.5.tar.gz cd glibc-2.2.5 patch -i ../glibc-2.2.5-mips-build-gmon.diff tar -xzf ../glibc-linuxthreads-2.2.5.tar.gz cd .. mkdir mips-glibc-2.2.5-1-3 cd mips-glibc-2.2.5-1-3 CFLAGS="-O2 -g -finline-limit=10000" ../glibc-2.2.5/configure --build=i686-linux \ --host=mips-linux --enable-add-ons --prefix=/usr I got error as following: ////// error output ////// loading cache ./config.cache checking host system type... mips-mips-linux-gnu checking sysdep dirs... sysdeps/mips/elf linuxthreads/sysdeps/unix/sysv/linux linuxthreads/sysdeps/pthread sysdeps/pthread linuxthreads/sysdeps/unix/sysv linuxthreads/sysdeps/unix linuxthreads/sysdeps/mips sysdeps/unix/sysv/linux/mips sysdeps/unix/sysv/linux sysdeps/gnu sysdeps/unix/common sysdeps/unix/mman sysdeps/unix/inet sysdeps/unix/sysv sysdeps/unix/mips sysdeps/unix sysdeps/posix sysdeps/mips/fpu sysdeps/mips sysdeps/wordsize-32 sysdeps/ieee754/flt-32 sysdeps/ieee754/dbl-64 sysdeps/ieee754 sysdeps/generic/elf sysdeps/generic checking for a BSD compatible install... /usr/bin/install -c checking whether ln -s works... yes checking for pwd... /bin/pwd checking build system type... i686-pc-linux-gnu checking for mips-linux-gcc... no checking for mips-linux-cc... no checking for gnumake... no checking for gmake... gmake checking version of gmake... 3.79.1, ok *** These critical programs are missing or too old:gcc *** Check the INSTALL file for required versions. [root@dpr211 mips-glibc-2.2.5-1-3]# //// end of error output ///// As i compiled and install cross-compiler, I use the option --prfix=/usr/xmips-1-3, that means I will install the cross-compiler in the directory /usr/xmips-1-3. And I also check tools and mips-linux-gcc are on my cross-compiler directory /usr/xmips-1-3/bin. My question is why I got the message: checking for mips-linux-gcc... no checking for mips-linux-cc... no And how can I set up path such that this configure can find them. Another question is the configure error. I check the INSTALL to make sure the gcc version. It requires gcc 2.95 or newer. I check my host gcc is 2.96 and cross-compiler gcc is 2.95.3. Why do I get the configure error: *** These critical programs are missing or too old:gcc *** Check the INSTALL file for required versions. Any solution to fix it. Thanks. Chien-Lung From quintela@mandrakesoft.com Fri Jan 3 23:51:56 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 03 Jan 2003 23:51:57 +0000 (GMT) Received: from cm19173.red.mundo-r.com ([IPv6:::ffff:213.60.19.173]:8904 "EHLO demo.mitica") by linux-mips.org with ESMTP id ; Fri, 3 Jan 2003 23:51:56 +0000 Received: by demo.mitica (Postfix, from userid 501) id 9BA97D657; Sat, 4 Jan 2003 00:59:22 +0100 (CET) To: Chien-Lung Wu Cc: "'linux-mips@linux-mips.org'" Subject: Re: glibc-2.2.5 configuration error (cross-compiler) References: X-Url: http://people.mandrakesoft.com/~quintela From: Juan Quintela In-Reply-To: Date: 04 Jan 2003 00:59:22 +0100 Message-ID: Lines: 25 User-Agent: Gnus/5.09 (Gnus v5.9.0) Emacs/21.2.92 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1087 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: quintela@mandrakesoft.com Precedence: bulk X-list: linux-mips >>>>> "chien-lung" == Chien-Lung Wu writes: Hi chien-lung> As i compiled and install cross-compiler, I use the option chien-lung> --prfix=/usr/xmips-1-3, that means I will ^^^^^ I guess prefix :) chien-lung> install the cross-compiler in the directory /usr/xmips-1-3. And I also check chien-lung> tools and mips-linux-gcc are on my cross-compiler directory chien-lung> /usr/xmips-1-3/bin. chien-lung> My question is why I got the message: chien-lung> checking for mips-linux-gcc... no chien-lung> checking for mips-linux-cc... no chien-lung> And how can I set up path such that this configure can find them. Are you sure that /usr/xmips-1-3/bin is in your path? Later, Juan. -- In theory, practice and theory are the same, but in practice they are different -- Larry McVoy From ppopov@mvista.com Mon Jan 6 11:58:09 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jan 2003 11:58:09 +0000 (GMT) Received: from p508B7CBF.dip.t-dialin.net ([IPv6:::ffff:80.139.124.191]:19658 "EHLO p508B7CBF.dip.t-dialin.net") by linux-mips.org with ESMTP id ; Mon, 6 Jan 2003 11:58:09 +0000 Received: from gateway-1237.mvista.com ([IPv6:::ffff:12.44.186.158]:51187 "EHLO av.mvista.com") by ralf.linux-mips.org with ESMTP id ; Sun, 5 Jan 2003 02:39:46 +0100 Received: from localhost (av [127.0.0.1]) by av.mvista.com (8.9.3/8.9.3) with ESMTP id MAA05799; Sat, 4 Jan 2003 12:25:23 -0800 Subject: PATCH: unaligned handler problem From: Pete Popov To: Ralf Baechle Cc: linux-mips In-Reply-To: <20030103144615.A8482@linux-mips.org> References: <1041589762.18883.4.camel@adsl.pacbell.net> <20030103144615.A8482@linux-mips.org> Content-Type: text/plain Organization: MontaVista Software Message-Id: <1041711952.29512.4.camel@adsl.pacbell.net> Mime-Version: 1.0 X-Mailer: Ximian Evolution 1.2.1 Date: 04 Jan 2003 12:25:52 -0800 Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1088 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ppopov@mvista.com Precedence: bulk X-list: linux-mips On Fri, 2003-01-03 at 05:46, Ralf Baechle wrote: > On Fri, Jan 03, 2003 at 02:29:22AM -0800, Pete Popov wrote: > > > The changes betwen rev 1.23 and 1.24 in unaligned.c, to replace > > check_axs() with verify_area(), causes any unaligned access from within > > a kernel module to crash. access_ok() returns -EFAULT as the > > __access_mask is 0xffffffff so __access_ok evaluates to > 0. It's too > > late for me to look into it any further but perhaps the problem will be > > obvious to someone else. I'm not sure what get_fs() should return in > > this case (again, the access is from within a kernel module) but it > > returns 0xffffffff. > > The address error handler should do something like: > > mm_segment_t seg; > > seg = get_fs(); > if (!user_mode(regs)) > set_fs(KERNEL_DS); > > ... usual unaligned stuff goes here ... > > set_fs(seg); Thanks! The patch below works. I had a test case plus a pcmcia driver that was crashing, and now they both pass. --- linux-2.4-head/arch/mips/kernel/unaligned.c Thu Dec 26 21:35:00 2002 +++ linux-2.4-dev/arch/mips/kernel/unaligned.c Sat Jan 4 12:21:06 2003 @@ -98,6 +98,11 @@ union mips_instruction insn; unsigned long value, fixup; unsigned int res; + mm_segment_t seg; + + seg = get_fs(); + if (!user_mode(regs)) + set_fs(KERNEL_DS); regs->regs[0] = 0; /* @@ -458,6 +463,7 @@ unaligned_instructions++; #endif + set_fs(seg); return; fault: @@ -469,24 +475,28 @@ printk(KERN_DEBUG "%s: Forwarding exception at [<%lx>] (%lx)\n", current->comm, regs->cp0_epc, new_epc); regs->cp0_epc = new_epc; + set_fs(seg); return; } die_if_kernel ("Unhandled kernel unaligned access", regs); send_sig(SIGSEGV, current, 1); + set_fs(seg); return; sigbus: die_if_kernel("Unhandled kernel unaligned access", regs); send_sig(SIGBUS, current, 1); + set_fs(seg); return; sigill: die_if_kernel("Unhandled kernel unaligned access or invalid instruction", regs); send_sig(SIGILL, current, 1); + set_fs(seg); return; } From cwu@deltartp.com Mon Jan 6 21:11:55 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 06 Jan 2003 21:11:56 +0000 (GMT) Received: from 216-166-237-83.clec.madisonriver.net ([IPv6:::ffff:216.166.237.83]:49156 "EHLO dpr338") by linux-mips.org with ESMTP id ; Mon, 6 Jan 2003 21:11:55 +0000 Received: from dprn03.deltartp.com ([216.166.210.181]) by 216.166.237.83 with InterScan Messaging Security Suite; Mon, 06 Jan 2003 16:19:23 -0800 Received: by dprn03.deltartp.com with Internet Mail Service (5.5.2653.19) id ; Mon, 6 Jan 2003 15:54:50 -0500 Message-ID: From: Chien-Lung Wu To: "'linux-mips@linux-mips.org'" Subject: Cross-compiler: glibc-2.2.5 compiling error Date: Mon, 6 Jan 2003 15:54:49 -0500 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.5.2653.19) Content-Type: text/plain; charset="iso-8859-1" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1089 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: cwu@deltartp.com Precedence: bulk X-list: linux-mips Hi, I am working on the cross-compiler for mips target. I uses: binutil-2.13.10 gcc-2.95.3 glibc-2.2.5. I installed the binutils in /usr/xmips-1-2 and get the first phase of gcc compiled and installed on the same directory. Now when I compile glibc-2.2.5, I got the following error: /*error message */ mips-linux-gcc -shared -Wl,-O1 -Wl,-dynamic-linker=/lib/ld.so.1 -B/home/cross-compiler/mips-glibc-2.2.5-1-6/csu/ -Wl,--version-script=/home/cross-compiler/mips-glibc-2.2.5-1-6/libc.map -Wl,-soname=libc.so.6 -nostdlib -nostartfiles -e __libc_main -u __register_frame -L/home/cross-compiler/mips-glibc-2.2.5-1-6 -L/home/cross-compiler/mips-glibc-2.2.5-1-6/math -L/home/cross-compiler/mips-glibc-2.2.5-1-6/elf -L/home/cross-compiler/mips-glibc-2.2.5-1-6/dlfcn -L/home/cross-compiler/mips-glibc-2.2.5-1-6/nss -L/home/cross-compiler/mips-glibc-2.2.5-1-6/nis -L/home/cross-compiler/mips-glibc-2.2.5-1-6/rt -L/home/cross-compiler/mips-glibc-2.2.5-1-6/resolv -L/home/cross-compiler/mips-glibc-2.2.5-1-6/crypt -L/home/cross-compiler/mips-glibc-2.2.5-1-6/linuxthreads -Wl,-rpath-link=/home/cross-compiler/mips-glibc-2.2.5-1-6:/home/cross-compil er/mips-glibc-2.2.5-1-6/math:/home/cross-compiler/mips-glibc-2.2.5-1-6/elf:/ home/cross-compiler/mips-glibc-2.2.5-1-6/dlfcn:/home/cross-compiler/mips-gli bc-2.2.5-1-6/nss:/home/cross-compiler/mips-glibc-2.2.5-1-6/nis:/home/cross-c ompiler/mips-glibc-2.2.5-1-6/rt:/home/cross-compiler/mips-glibc-2.2.5-1-6/re solv:/home/cross-compiler/mips-glibc-2.2.5-1-6/crypt:/home/cross-compiler/mi ps-glibc-2.2.5-1-6/linuxthreads -o /home/cross-compiler/mips-glibc-2.2.5-1-6/libc.so -T /home/cross-compiler/mips-glibc-2.2.5-1-6/libc.so.lds /home/cross-compiler/mips-glibc-2.2.5-1-6/csu/abi-note.o /home/cross-compiler/mips-glibc-2.2.5-1-6/elf/soinit.os /home/cross-compiler/mips-glibc-2.2.5-1-6/libc_pic.os /home/cross-compiler/mips-glibc-2.2.5-1-6/elf/sofini.os /home/cross-compiler/mips-glibc-2.2.5-1-6/elf/interp.os /home/cross-compiler/mips-glibc-2.2.5-1-6/elf/ld.so -lgcc /home/cross-compiler/mips-glibc-2.2.5-1-6/libc_pic.os: In function `__sigprocmask': /home/cross-compiler/glibc-2.2.5/signal/../sysdeps/unix/sysv/linux/sigprocma sk.c(.text+0x1bc30): relocation truncated to fit: R_MIPS_PC16 __syscall_error /home/cross-compiler/mips-glibc-2.2.5-1-6/libc_pic.os: In function `sigstack': /home/cross-compiler/glibc-2.2.5/signal/../sysdeps/unix/sysv/linux/sigstack. c(.text+0x1c6d0): relocation truncated to fit: R_MIPS_PC16 __syscall_error /home/cross-compiler/mips-glibc-2.2.5-1-6/libc_pic.os: In function `sigset': /home/cross-compiler/glibc-2.2.5/signal/../sysdeps/posix/sigset.c(.text+0x1d 670): relocation truncated to fit: R_MIPS_PC16 __syscall_error /home/cross-compiler/glibc-2.2.5/signal/../sysdeps/posix/sigset.c(.text+0x1d 690): relocation .... /** end of error emssages ****/ Do anyone ever see this before? Any solution(s)? TIA. Chien-Lung From ladis@psi.cz Wed Jan 8 12:21:46 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jan 2003 12:21:47 +0000 (GMT) Received: from erebor.lep.brno.cas.cz ([IPv6:::ffff:195.178.65.162]:40972 "EHLO erebor.lep.brno.cas.cz") by linux-mips.org with ESMTP id ; Wed, 8 Jan 2003 12:21:46 +0000 Received: from ladis by erebor.lep.brno.cas.cz with local (Exim 3.12 #1 (Debian)) id 18WFLZ-0004nO-00; Wed, 08 Jan 2003 13:30:13 +0100 Date: Wed, 8 Jan 2003 13:30:13 +0100 To: linux-mips Cc: Ralf Baechle , Guido Guenther Subject: Remove GIO interface Message-ID: <20030108133013.A17162@erebor.psi.cz> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5i From: Ladislav Michl Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1090 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ladis@psi.cz Precedence: bulk X-list: linux-mips Hi, after many tests I decided to remove GIO interface from kernel... Reasons: * Due to hardware setup it is not possible to determine device in GFX slot. Even more it's not possible to say if there is any. (gio.ps Lie #1) * Newport XL nor XZ doesn't provide GIO product identification word. In fact Newport is simply mapped from SLOT_BASE + 0xf0000. (gio.ps Lie #2) * Even in case everything work as stated in documentation, we are unable to use this mechanism to detect Newport for console driver (the main reason why I created this interface was to provide neccessary informations to Xserver), because our DBE handling doesn't work until modules are initialized (in case we are building kernel with modules support). Because we have only three (two on Indigo) slots and each type of device can be located only in one (rarely two possitions), drivers will use get_dbe for device probing (see my next post). I think now is time to eat humble pie for my stupidity, I'll no more trust any documentation and will always verify facts. I'm sorry. ladis Index: include/asm-mips/sgi/sgigio.h =================================================================== RCS file: /home/cvs/linux/include/asm-mips/sgi/sgigio.h,v retrieving revision 1.1.2.2 diff -u -r1.1.2.2 sgigio.h --- include/asm-mips/sgi/sgigio.h 5 Aug 2002 23:53:38 -0000 1.1.2.2 +++ include/asm-mips/sgi/sgigio.h 8 Jan 2003 11:10:37 -0000 @@ -12,6 +12,11 @@ #define _ASM_SGI_SGIGIO_H /* + * GIO bus addresses + * + * The Indigo and Indy have two GIO bus connectors. Indigo2 (all models) have + * three physical connectors, but only two slots, GFX and EXP0. + * * There is 10MB of GIO address space for GIO64 slot devices * slot# slot type address range size * ----- --------- ----------------------- ----- @@ -26,44 +31,56 @@ * Following space is reserved and unused * - RESERVED 0x18000000 - 0x1effffff 112MB * - * The GIO specification tends to use slot numbers while the MC specification - * tends to use slot types. + * GIO bus IDs + * + * Each GIO bus device identifies itself to the system by answering a + * read with an "ID" value. IDs are either 8 or 32 bits long. IDs less + * than 128 are 8 bits long, with the most significant 24 bits read from + * the slot undefined. + * + * 32-bit IDs are divided into + * bits 0:6 the product ID; ranges from 0x00 to 0x7F. + * bit 7 0=GIO Product ID is 8 bits wide + * 1=GIO Product ID is 32 bits wide. + * bits 8:15 manufacturer version for the product. + * bit 16 0=GIO32 and GIO32-bis, 1=GIO64. + * bit 17 0=no ROM present + * 1=ROM present on this board AND next three words + * space define the ROM. + * bits 18:31 up to manufacturer. + * + * IDs above 0x50/0xd0 are of 3rd party boards. + * + * 8-bit IDs + * 0x01 XPI low cost FDDI + * 0x02 GTR TokenRing + * 0x04 Synchronous ISDN + * 0x05 ATM board [*] + * 0x06 Canon Interface + * 0x07 16 bit SCSI Card [*] + * 0x08 JPEG (Double Wide) + * 0x09 JPEG (Single Wide) + * 0x0a XPI mez. FDDI device 0 + * 0x0b XPI mez. FDDI device 1 + * 0x0c SMPTE 259M Video [*] + * 0x0d Babblefish Compression [*] + * 0x0e E-Plex 8-port Ethernet + * 0x30 Lyon Lamb IVAS + * 0xb8 GIO 100BaseTX Fast Ethernet (gfe) + * + * [*] Device provide 32-bit ID. * - * slot0 - the "graphics" (GFX) slot but there is no requirement that - * a graphics dev may only use this slot - * slot1 - this is the "expansion"-slot 0 (EXP0), do not confuse with - * slot 0 (GFX). - * slot2 - this is the "expansion"-slot 1 (EXP1), do not confuse with - * slot 1 (EXP0). */ -#define GIO_SLOT_GFX 0 -#define GIO_SLOT_GIO1 1 -#define GIO_SLOT_GIO2 2 -#define GIO_NUM_SLOTS 3 - -#define GIO_ANY_ID 0xff - -#define GIO_VALID_ID_ONLY 0x01 -#define GIO_IFACE_64 0x02 -#define GIO_HAS_ROM 0x04 - -struct gio_dev { - unsigned char device; - unsigned char revision; - unsigned short vendor; - unsigned char flags; - - unsigned char slot_number; - unsigned long base_addr; - unsigned int map_size; - - char *name; - char slot_name[5]; -}; - -extern struct gio_dev* gio_find_device(unsigned char device, const struct gio_dev *from); - -extern void sgigio_init(void); +#define GIO_ID(x) (x & 0x7f) +#define GIO_32BIT_ID 0x80 +#define GIO_REV(x) ((x >> 8) & 0xff) +#define GIO_64BIT_IFACE 0x10000 +#define GIO_ROM_PRESENT 0x20000 +#define GIO_VENDOR_CODE(x) ((x >> 18) & 0x3fff) + +#define GIO_SLOT_GFX_BASE 0x1f000000 +#define GIO_SLOT_EXP0_BASE 0x1f400000 +#define GIO_SLOT_EXP1_BASE 0x1f600000 #endif /* _ASM_SGI_SGIGIO_H */ Index: include/asm-mips64/sgi/sgigio.h =================================================================== RCS file: /home/cvs/linux/include/asm-mips64/sgi/sgigio.h,v retrieving revision 1.1.2.2 diff -u -r1.1.2.2 sgigio.h --- include/asm-mips64/sgi/sgigio.h 5 Aug 2002 23:53:40 -0000 1.1.2.2 +++ include/asm-mips64/sgi/sgigio.h 8 Jan 2003 11:10:37 -0000 @@ -12,6 +12,11 @@ #define _ASM_SGI_SGIGIO_H /* + * GIO bus addresses + * + * The Indigo and Indy have two GIO bus connectors. Indigo2 (all models) have + * three physical connectors, but only two slots, GFX and EXP0. + * * There is 10MB of GIO address space for GIO64 slot devices * slot# slot type address range size * ----- --------- ----------------------- ----- @@ -26,44 +31,56 @@ * Following space is reserved and unused * - RESERVED 0x18000000 - 0x1effffff 112MB * - * The GIO specification tends to use slot numbers while the MC specification - * tends to use slot types. + * GIO bus IDs + * + * Each GIO bus device identifies itself to the system by answering a + * read with an "ID" value. IDs are either 8 or 32 bits long. IDs less + * than 128 are 8 bits long, with the most significant 24 bits read from + * the slot undefined. + * + * 32-bit IDs are divided into + * bits 0:6 the product ID; ranges from 0x00 to 0x7F. + * bit 7 0=GIO Product ID is 8 bits wide + * 1=GIO Product ID is 32 bits wide. + * bits 8:15 manufacturer version for the product. + * bit 16 0=GIO32 and GIO32-bis, 1=GIO64. + * bit 17 0=no ROM present + * 1=ROM present on this board AND next three words + * space define the ROM. + * bits 18:31 up to manufacturer. + * + * IDs above 0x50/0xd0 are of 3rd party boards. + * + * 8-bit IDs + * 0x01 XPI low cost FDDI + * 0x02 GTR TokenRing + * 0x04 Synchronous ISDN + * 0x05 ATM board [*] + * 0x06 Canon Interface + * 0x07 16 bit SCSI Card [*] + * 0x08 JPEG (Double Wide) + * 0x09 JPEG (Single Wide) + * 0x0a XPI mez. FDDI device 0 + * 0x0b XPI mez. FDDI device 1 + * 0x0c SMPTE 259M Video [*] + * 0x0d Babblefish Compression [*] + * 0x0e E-Plex 8-port Ethernet + * 0x30 Lyon Lamb IVAS + * 0xb8 GIO 100BaseTX Fast Ethernet (gfe) + * + * [*] Device provide 32-bit ID. * - * slot0 - the "graphics" (GFX) slot but there is no requirement that - * a graphics dev may only use this slot - * slot1 - this is the "expansion"-slot 0 (EXP0), do not confuse with - * slot 0 (GFX). - * slot2 - this is the "expansion"-slot 1 (EXP1), do not confuse with - * slot 1 (EXP0). */ -#define GIO_SLOT_GFX 0 -#define GIO_SLOT_GIO1 1 -#define GIO_SLOT_GIO2 2 -#define GIO_NUM_SLOTS 3 - -#define GIO_ANY_ID 0xff - -#define GIO_VALID_ID_ONLY 0x01 -#define GIO_IFACE_64 0x02 -#define GIO_HAS_ROM 0x04 - -struct gio_dev { - unsigned char device; - unsigned char revision; - unsigned short vendor; - unsigned char flags; - - unsigned char slot_number; - unsigned long base_addr; - unsigned int map_size; - - char *name; - char slot_name[5]; -}; - -extern struct gio_dev* gio_find_device(unsigned char device, const struct gio_dev *from); - -extern void sgigio_init(void); +#define GIO_ID(x) (x & 0x7f) +#define GIO_32BIT_ID 0x80 +#define GIO_REV(x) ((x >> 8) & 0xff) +#define GIO_64BIT_IFACE 0x10000 +#define GIO_ROM_PRESENT 0x20000 +#define GIO_VENDOR_CODE(x) ((x >> 18) & 0x3fff) + +#define GIO_SLOT_GFX_BASE 0x1f000000 +#define GIO_SLOT_EXP0_BASE 0x1f400000 +#define GIO_SLOT_EXP1_BASE 0x1f600000 #endif /* _ASM_SGI_SGIGIO_H */ Index: arch/mips/sgi-ip22/ip22-time.c =================================================================== RCS file: /home/cvs/linux/arch/mips/sgi-ip22/ip22-time.c,v retrieving revision 1.1.2.11 diff -u -r1.1.2.11 ip22-time.c --- arch/mips/sgi-ip22/ip22-time.c 18 Dec 2002 22:37:29 -0000 1.1.2.11 +++ arch/mips/sgi-ip22/ip22-time.c 8 Jan 2003 11:10:38 -0000 @@ -180,14 +180,6 @@ (int) (r4k_tick / 5000), (int) (r4k_tick % 5000) / 50); mips_counter_frequency = r4k_tick * HZ; - - /* HACK ALERT! This get's called after traps initialization - * We piggyback the initialization of GIO bus here even though - * it is technically not related with the timer in any way. - * Doing it from ip22_setup wouldn't work since traps aren't - * initialized yet. - */ - sgigio_init(); } /* Generic SGI handler for (spurious) 8254 interrupts */ Index: arch/mips/sgi-ip22/ip22-setup.c =================================================================== RCS file: /home/cvs/linux/arch/mips/sgi-ip22/ip22-setup.c,v retrieving revision 1.1.2.14 diff -u -r1.1.2.14 ip22-setup.c --- arch/mips/sgi-ip22/ip22-setup.c 27 Sep 2002 16:45:04 -0000 1.1.2.14 +++ arch/mips/sgi-ip22/ip22-setup.c 8 Jan 2003 11:18:39 -0000 @@ -47,7 +47,6 @@ extern struct rtc_ops indy_rtc_ops; extern void indy_reboot_setup(void); extern void sgi_volume_set(unsigned char); -extern void create_gio_proc_entry(void); #define sgi_kh ((struct hpc_keyb *) &(hpc3mregs->kbdmouse0)) @@ -69,11 +68,6 @@ * ip22_setup wouldn't work since kmalloc isn't initialized yet. */ indy_reboot_setup(); - - /* Ehm, well... once David used hack above, let's add yet another. - * Register GIO bus proc entry here. - */ - create_gio_proc_entry(); return request_irq(SGI_KEYBD_IRQ, handler, 0, "keyboard", NULL); } Index: arch/mips/sgi-ip22/ip22-gio.c =================================================================== RCS file: /home/cvs/linux/arch/mips/sgi-ip22/ip22-gio.c,v retrieving revision 1.1.2.4 diff -u -r1.1.2.4 ip22-gio.c --- arch/mips/sgi-ip22/ip22-gio.c 18 Dec 2002 19:11:09 -0000 1.1.2.4 +++ arch/mips/sgi-ip22/ip22-gio.c 8 Jan 2003 12:14:53 -0000 @@ -1,137 +1,5 @@ /* - * ip22-gio.c: Support for GIO64 bus (inspired by PCI code) - * - * Copyright (C) 2002 Ladislav Michl + * ip22-gio.c: Support for GIO bus (add interrupt handling code here) */ -#include -#include -#include -#include -#include - -#include -#include #include - -#define GIO_PIO_MAP_BASE 0x1f000000L -#define GIO_PIO_MAP_SIZE (16 * 1024*1024) - -#define GIO_ADDR_GFX 0x1f000000L -#define GIO_ADDR_GIO1 0x1f400000L -#define GIO_ADDR_GIO2 0x1f600000L - -#define GIO_GFX_MAP_SIZE (4 * 1024*1024) -#define GIO_GIO1_MAP_SIZE (2 * 1024*1024) -#define GIO_GIO2_MAP_SIZE (4 * 1024*1024) - -#define GIO_NO_DEVICE 0x80 - -static struct gio_dev gio_slot[GIO_NUM_SLOTS] = {{ - .flags = GIO_NO_DEVICE, - .slot_number = GIO_SLOT_GFX, - .base_addr = GIO_ADDR_GFX, - .map_size = GIO_GFX_MAP_SIZE, - .slot_name = "GFX", -}, { - .flags = GIO_NO_DEVICE, - .slot_number = GIO_SLOT_GIO1, - .base_addr = GIO_ADDR_GIO1, - .map_size = GIO_GIO1_MAP_SIZE, - .slot_name = "EXP0", -}, { - .flags = GIO_NO_DEVICE, - .slot_number = GIO_SLOT_GIO2, - .base_addr = GIO_ADDR_GIO2, - .map_size = GIO_GIO2_MAP_SIZE, - .slot_name = "EXP1" -}}; - -static int gio_read_proc(char *buf, char **start, off_t off, - int count, int *eof, void *data) -{ - int i; - char *p = buf; - - p += sprintf(p, "GIO devices found:\n"); - for (i = 0; i < GIO_NUM_SLOTS; i++) { - if (gio_slot[i].flags & GIO_NO_DEVICE) - continue; - p += sprintf(p, " Slot %s, DeviceId 0x%02x\n", - gio_slot[i].slot_name, gio_slot[i].device); - p += sprintf(p, " BaseAddr 0x%08lx, MapSize 0x%08x\n", - gio_slot[i].base_addr, gio_slot[i].map_size); - } - - return p - buf; -} - -void create_gio_proc_entry(void) -{ - create_proc_read_entry("gio", 0, NULL, gio_read_proc, NULL); -} - -/** - * gio_find_device - begin or continue searching for a GIO device by device id - * @device: GIO device id to match, or %GIO_ANY_ID to match all device ids - * @from: Previous GIO device found in search, or %NULL for new search. - * - * Iterates through the list of known GIO devices. If a GIO device is found - * with a matching @device, a pointer to its device structure is returned. - * Otherwise, %NULL is returned. - * A new search is initiated by passing %NULL to the @from argument. - * Otherwise if @from is not %NULL, searches continue from next device. - */ -struct gio_dev * -gio_find_device(unsigned char device, const struct gio_dev *from) -{ - int i; - - for (i = (from) ? from->slot_number : 0; i < GIO_NUM_SLOTS; i++) - if (!(gio_slot[i].flags & GIO_NO_DEVICE) && - (device == GIO_ANY_ID || device == gio_slot[i].device)) - return &gio_slot[i]; - - return NULL; -} - -#define GIO_IDCODE(x) (x & 0x7f) -#define GIO_ALL_BITS_VALID 0x80 -#define GIO_REV(x) ((x >> 8) & 0xff) -#define GIO_GIO_SIZE_64 0x10000 -#define GIO_ROM_PRESENT 0x20000 -#define GIO_VENDOR_CODE(x) ((x >> 18) & 0x3fff) - -extern int ip22_baddr(unsigned int *val, unsigned long addr); - -/** - * sgigio_init - scan the GIO space and figure out what hardware is actually - * present. - */ -void __init sgigio_init(void) -{ - unsigned int i, id, found = 0; - - printk("GIO: Scanning for GIO cards...\n"); - for (i = 0; i < GIO_NUM_SLOTS; i++) { - if (ip22_baddr(&id, KSEG1ADDR(gio_slot[i].base_addr))) - continue; - - found = 1; - gio_slot[i].device = GIO_IDCODE(id); - if (id & GIO_ALL_BITS_VALID) { - gio_slot[i].revision = GIO_REV(id); - gio_slot[i].vendor = GIO_VENDOR_CODE(id); - gio_slot[i].flags = - (id & GIO_GIO_SIZE_64) ? GIO_IFACE_64 : 0 | - (id & GIO_ROM_PRESENT) ? GIO_HAS_ROM : 0; - } else - gio_slot[i].flags = GIO_VALID_ID_ONLY; - - printk("GIO: Card 0x%02x @ 0x%08lx\n", gio_slot[i].device, - gio_slot[i].base_addr); - } - - if (!found) - printk("GIO: No GIO cards present.\n"); -} From ladis@psi.cz Wed Jan 8 12:33:05 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jan 2003 12:33:06 +0000 (GMT) Received: from erebor.lep.brno.cas.cz ([IPv6:::ffff:195.178.65.162]:42252 "EHLO erebor.lep.brno.cas.cz") by linux-mips.org with ESMTP id ; Wed, 8 Jan 2003 12:33:05 +0000 Received: from ladis by erebor.lep.brno.cas.cz with local (Exim 3.12 #1 (Debian)) id 18WFWd-0004rG-00; Wed, 08 Jan 2003 13:41:39 +0100 Date: Wed, 8 Jan 2003 13:41:38 +0100 To: linux-mips Cc: Ralf Baechle , Guido Guenther Subject: [PATCH] proper bus error handling for IP22 Message-ID: <20030108134138.B17162@erebor.psi.cz> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5i From: Ladislav Michl Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1091 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ladis@psi.cz Precedence: bulk X-list: linux-mips This patch makes get_dbe/put_dbe useable. Additionaly prints some useful informations on bus error. Depends on GIO interface removing patch. ladis Index: arch/mips/sgi-ip22/ip22-berr.c =================================================================== RCS file: /home/cvs/linux/arch/mips/sgi-ip22/ip22-berr.c,v retrieving revision 1.1.2.2 diff -u -r1.1.2.2 ip22-berr.c --- arch/mips/sgi-ip22/ip22-berr.c 5 Aug 2002 23:53:35 -0000 1.1.2.2 +++ arch/mips/sgi-ip22/ip22-berr.c 8 Jan 2003 12:22:32 -0000 @@ -15,12 +15,11 @@ #include #include -unsigned int cpu_err_stat; /* Status reg for CPU */ -unsigned int gio_err_stat; /* Status reg for GIO */ -unsigned int cpu_err_addr; /* Error address reg for CPU */ -unsigned int gio_err_addr; /* Error address reg for GIO */ -volatile int nofault; +static unsigned int cpu_err_stat; /* Status reg for CPU */ +static unsigned int gio_err_stat; /* Status reg for GIO */ +static unsigned int cpu_err_addr; /* Error address reg for CPU */ +static unsigned int gio_err_addr; /* Error address reg for GIO */ static void save_and_clear_buserr(void) { @@ -33,6 +32,35 @@ mcmisc_regs->cstat = mcmisc_regs->gstat = 0; } +#define GIO_ERRMASK 0xff00 +#define CPU_ERRMASK 0x3f00 + +static void print_buserr(void) +{ + if (cpu_err_stat & CPU_ERRMASK) + printk(KERN_ALERT "CPU Error/Addr 0x%x<%s%s%s%s%s%s> 0x%08x\n", + cpu_err_stat, + cpu_err_stat & SGIMC_CSTAT_RD ? "RD " : "", + cpu_err_stat & SGIMC_CSTAT_PAR ? "PAR " : "", + cpu_err_stat & SGIMC_CSTAT_ADDR ? "ADDR " : "", + cpu_err_stat & SGIMC_CSTAT_SYSAD_PAR ? "SYSAD " : "", + cpu_err_stat & SGIMC_CSTAT_SYSCMD_PAR ? "SYSCMD " : "", + cpu_err_stat & SGIMC_CSTAT_BAD_DATA ? "BAD_DATA " : "", + cpu_err_addr); + if (gio_err_stat & GIO_ERRMASK) + printk(KERN_ALERT "GIO Error/Addr 0x%x:<%s%s%s%s%s%s%s%s> 0x08%x\n", + gio_err_stat, + gio_err_stat & SGIMC_GSTAT_RD ? "RD " : "", + gio_err_stat & SGIMC_GSTAT_WR ? "WR " : "", + gio_err_stat & SGIMC_GSTAT_TIME ? "TIME " : "", + gio_err_stat & SGIMC_GSTAT_PROM ? "PROM " : "", + gio_err_stat & SGIMC_GSTAT_ADDR ? "ADDR " : "", + gio_err_stat & SGIMC_GSTAT_BC ? "BC " : "", + gio_err_stat & SGIMC_GSTAT_PIO_RD ? "PIO_RD " : "", + gio_err_stat & SGIMC_GSTAT_PIO_WR ? "PIO_WR " : "", + gio_err_addr); +} + /* * MC sends an interrupt whenever bus or parity errors occur. In addition, * if the error happened during a CPU read, it also asserts the bus error @@ -43,33 +71,18 @@ void be_ip22_interrupt(int irq, struct pt_regs *regs) { save_and_clear_buserr(); - printk(KERN_ALERT "Bus error, epc == %08lx, ra == %08lx\n", - regs->cp0_epc, regs->regs[31]); - die_if_kernel("Oops", regs); - force_sig(SIGBUS, current); + print_buserr(); + panic("Bus error, epc == %08lx, ra == %08lx\n", + regs->cp0_epc, regs->regs[31]); } int be_ip22_handler(struct pt_regs *regs, int is_fixup) { save_and_clear_buserr(); - if (nofault) { - nofault = 0; - compute_return_epc(regs); - return MIPS_BE_DISCARD; - } - return MIPS_BE_FIXUP; -} - -int ip22_baddr(unsigned int *val, unsigned long addr) -{ - nofault = 1; - *val = *(volatile unsigned int *) addr; - __asm__ __volatile__("nop;nop;nop;nop"); - if (nofault) { - nofault = 0; - return 0; - } - return -EFAULT; + if (is_fixup) + return MIPS_BE_FIXUP; + print_buserr(); + return MIPS_BE_FATAL; } void __init bus_error_init(void) Index: include/asm-mips/sgi/sgimc.h =================================================================== RCS file: /home/cvs/linux/include/asm-mips/sgi/sgimc.h,v retrieving revision 1.5 diff -u -r1.5 sgimc.h --- include/asm-mips/sgi/sgimc.h 6 Sep 2001 13:12:03 -0000 1.5 +++ include/asm-mips/sgi/sgimc.h 8 Jan 2003 12:22:33 -0000 @@ -15,144 +15,159 @@ struct sgimc_misc_ctrl { u32 _unused1; - volatile u32 cpuctrl0; /* CPU control register 0, readwrite */ -#define SGIMC_CCTRL0_REFS 0x0000000f /* REFS mask */ -#define SGIMC_CCTRL0_EREFRESH 0x00000010 /* Memory refresh enable */ -#define SGIMC_CCTRL0_EPERRGIO 0x00000020 /* GIO parity error enable */ -#define SGIMC_CCTRL0_EPERRMEM 0x00000040 /* Main mem parity error enable */ -#define SGIMC_CCTRL0_EPERRCPU 0x00000080 /* CPU bus parity error enable */ -#define SGIMC_CCTRL0_WDOG 0x00000100 /* Watchdog timer enable */ -#define SGIMC_CCTRL0_SYSINIT 0x00000200 /* System init bit */ -#define SGIMC_CCTRL0_GFXRESET 0x00000400 /* Graphics interface reset */ -#define SGIMC_CCTRL0_EISALOCK 0x00000800 /* Lock CPU from memory for EISA */ -#define SGIMC_CCTRL0_EPERRSCMD 0x00001000 /* SysCMD bus parity error enable */ -#define SGIMC_CCTRL0_IENAB 0x00002000 /* Allow interrupts from MC */ -#define SGIMC_CCTRL0_ESNOOP 0x00004000 /* Snooping I/O enable */ -#define SGIMC_CCTRL0_EPROMWR 0x00008000 /* Prom writes from cpu enable */ -#define SGIMC_CCTRL0_WRESETPMEM 0x00010000 /* Perform warm reset, preserves mem */ -#define SGIMC_CCTRL0_LENDIAN 0x00020000 /* Put MC in little-endian mode */ -#define SGIMC_CCTRL0_WRESETDMEM 0x00040000 /* Warm reset, destroys mem contents */ -#define SGIMC_CCTRL0_CMEMBADPAR 0x02000000 /* Generate bad perr from cpu to mem */ -#define SGIMC_CCTRL0_R4KNOCHKPARR 0x04000000 /* Don't chk parity on mem data reads */ -#define SGIMC_CCTRL0_GIOBTOB 0x08000000 /* Allow GIO back to back writes */ + volatile u32 cpuctrl0; /* CPU control register 0, readwrite */ +#define SGIMC_CCTRL0_REFS 0x0000000f /* REFS mask */ +#define SGIMC_CCTRL0_EREFRESH 0x00000010 /* Memory refresh enable */ +#define SGIMC_CCTRL0_EPERRGIO 0x00000020 /* GIO parity error enable */ +#define SGIMC_CCTRL0_EPERRMEM 0x00000040 /* Main mem parity error enable */ +#define SGIMC_CCTRL0_EPERRCPU 0x00000080 /* CPU bus parity error enable */ +#define SGIMC_CCTRL0_WDOG 0x00000100 /* Watchdog timer enable */ +#define SGIMC_CCTRL0_SYSINIT 0x00000200 /* System init bit */ +#define SGIMC_CCTRL0_GFXRESET 0x00000400 /* Graphics interface reset */ +#define SGIMC_CCTRL0_EISALOCK 0x00000800 /* Lock CPU from memory for EISA */ +#define SGIMC_CCTRL0_EPERRSCMD 0x00001000 /* SysCMD bus parity error enable */ +#define SGIMC_CCTRL0_IENAB 0x00002000 /* Allow interrupts from MC */ +#define SGIMC_CCTRL0_ESNOOP 0x00004000 /* Snooping I/O enable */ +#define SGIMC_CCTRL0_EPROMWR 0x00008000 /* Prom writes from cpu enable */ +#define SGIMC_CCTRL0_WRESETPMEM 0x00010000 /* Perform warm reset, preserves mem */ +#define SGIMC_CCTRL0_LENDIAN 0x00020000 /* Put MC in little-endian mode */ +#define SGIMC_CCTRL0_WRESETDMEM 0x00040000 /* Warm reset, destroys mem contents */ +#define SGIMC_CCTRL0_CMEMBADPAR 0x02000000 /* Generate bad perr from cpu to mem */ +#define SGIMC_CCTRL0_R4KNOPAR 0x04000000 /* Don't chk parity on mem data reads */ +#define SGIMC_CCTRL0_GIOBTOB 0x08000000 /* Allow GIO back to back writes */ u32 _unused2; - volatile u32 cpuctrl1; /* CPU control register 1, readwrite */ -#define SGIMC_CCTRL1_EGIOTIMEO 0x00000010 /* GIO bus timeout enable */ -#define SGIMC_CCTRL1_FIXEDEHPC 0x00001000 /* Fixed HPC endianness */ -#define SGIMC_CCTRL1_LITTLEHPC 0x00002000 /* Little endian HPC */ -#define SGIMC_CCTRL1_FIXEDEEXP0 0x00004000 /* Fixed EXP0 endianness */ -#define SGIMC_CCTRL1_LITTLEEXP0 0x00008000 /* Little endian EXP0 */ -#define SGIMC_CCTRL1_FIXEDEEXP1 0x00010000 /* Fixed EXP1 endianness */ -#define SGIMC_CCTRL1_LITTLEEXP1 0x00020000 /* Little endian EXP1 */ + volatile u32 cpuctrl1; /* CPU control register 1, readwrite */ +#define SGIMC_CCTRL1_EGIOTIMEO 0x00000010 /* GIO bus timeout enable */ +#define SGIMC_CCTRL1_FIXEDEHPC 0x00001000 /* Fixed HPC endianness */ +#define SGIMC_CCTRL1_LITTLEHPC 0x00002000 /* Little endian HPC */ +#define SGIMC_CCTRL1_FIXEDEEXP0 0x00004000 /* Fixed EXP0 endianness */ +#define SGIMC_CCTRL1_LITTLEEXP0 0x00008000 /* Little endian EXP0 */ +#define SGIMC_CCTRL1_FIXEDEEXP1 0x00010000 /* Fixed EXP1 endianness */ +#define SGIMC_CCTRL1_LITTLEEXP1 0x00020000 /* Little endian EXP1 */ u32 _unused3; - volatile u32 watchdogt; /* Watchdog reg rdonly, write clears */ + volatile u32 watchdogt; /* Watchdog reg rdonly, write clears */ u32 _unused4; - volatile u32 systemid; /* MC system ID register, readonly */ -#define SGIMC_SYSID_MASKREV 0x0000000f /* Revision of MC controller */ -#define SGIMC_SYSID_EPRESENT 0x00000010 /* Indicates presence of EISA bus */ + volatile u32 systemid; /* MC system ID register, readonly */ +#define SGIMC_SYSID_MASKREV 0x0000000f /* Revision of MC controller */ +#define SGIMC_SYSID_EPRESENT 0x00000010 /* Indicates presence of EISA bus */ u32 _unused5[3]; - volatile u32 divider; /* Divider reg for RPSS */ + volatile u32 divider; /* Divider reg for RPSS */ u32 _unused6; - volatile unsigned char eeprom; /* EEPROM byte reg for r4k */ -#define SGIMC_EEPROM_PRE 0x00000001 /* eeprom chip PRE pin assertion */ -#define SGIMC_EEPROM_CSEL 0x00000002 /* Active high, eeprom chip select */ -#define SGIMC_EEPROM_SECLOCK 0x00000004 /* EEPROM serial clock */ -#define SGIMC_EEPROM_SDATAO 0x00000008 /* Serial EEPROM data-out */ -#define SGIMC_EEPROM_SDATAI 0x00000010 /* Serial EEPROM data-in */ + volatile unsigned char eeprom; /* EEPROM byte reg for r4k */ +#define SGIMC_EEPROM_PRE 0x00000001 /* eeprom chip PRE pin assertion */ +#define SGIMC_EEPROM_CSEL 0x00000002 /* Active high, eeprom chip select */ +#define SGIMC_EEPROM_SECLOCK 0x00000004 /* EEPROM serial clock */ +#define SGIMC_EEPROM_SDATAO 0x00000008 /* Serial EEPROM data-out */ +#define SGIMC_EEPROM_SDATAI 0x00000010 /* Serial EEPROM data-in */ unsigned char _unused7[3]; u32 _unused8[3]; - volatile unsigned short rcntpre; /* Preload refresh counter */ + volatile unsigned short rcntpre; /* Preload refresh counter */ unsigned short _unused9; u32 _unused9a; - volatile unsigned short rcounter; /* Readonly refresh counter */ + volatile unsigned short rcounter; /* Readonly refresh counter */ unsigned short _unused10; u32 _unused11[13]; - volatile u32 gioparm; /* Parameter word for GIO64 */ -#define SGIMC_GIOPARM_HPC64 0x00000001 /* HPC talks to GIO using 64-bits */ -#define SGIMC_GIOPARM_GFX64 0x00000002 /* GFX talks to GIO using 64-bits */ -#define SGIMC_GIOPARM_EXP064 0x00000004 /* EXP(slot0) talks using 64-bits */ -#define SGIMC_GIOPARM_EXP164 0x00000008 /* EXP(slot1) talks using 64-bits */ -#define SGIMC_GIOPARM_EISA64 0x00000010 /* EISA bus talks 64-bits to GIO */ -#define SGIMC_GIOPARM_HPC264 0x00000020 /* 2nd HPX talks 64-bits to GIO */ -#define SGIMC_GIOPARM_RTIMEGFX 0x00000040 /* GFX device has realtime attr */ -#define SGIMC_GIOPARM_RTIMEEXP0 0x00000080 /* EXP(slot0) has realtime attr */ -#define SGIMC_GIOPARM_RTIMEEXP1 0x00000100 /* EXP(slot1) has realtime attr */ -#define SGIMC_GIOPARM_MASTEREISA 0x00000200 /* EISA bus can act as bus master */ -#define SGIMC_GIOPARM_ONEBUS 0x00000400 /* Exists one GIO64 pipelined bus */ -#define SGIMC_GIOPARM_MASTERGFX 0x00000800 /* GFX can act as a bus master */ -#define SGIMC_GIOPARM_MASTEREXP0 0x00001000 /* EXP(slot0) can bus master */ -#define SGIMC_GIOPARM_MASTEREXP1 0x00002000 /* EXP(slot1) can bus master */ -#define SGIMC_GIOPARM_PLINEEXP0 0x00004000 /* EXP(slot0) has pipeline attr */ -#define SGIMC_GIOPARM_PLINEEXP1 0x00008000 /* EXP(slot1) has pipeline attr */ + volatile u32 gioparm; /* Parameter word for GIO64 */ +#define SGIMC_GIOPARM_HPC64 0x00000001 /* HPC talks to GIO using 64-bits */ +#define SGIMC_GIOPARM_GFX64 0x00000002 /* GFX talks to GIO using 64-bits */ +#define SGIMC_GIOPARM_EXP064 0x00000004 /* EXP(slot0) talks using 64-bits */ +#define SGIMC_GIOPARM_EXP164 0x00000008 /* EXP(slot1) talks using 64-bits */ +#define SGIMC_GIOPARM_EISA64 0x00000010 /* EISA bus talks 64-bits to GIO */ +#define SGIMC_GIOPARM_HPC264 0x00000020 /* 2nd HPX talks 64-bits to GIO */ +#define SGIMC_GIOPARM_RTIMEGFX 0x00000040 /* GFX device has realtime attr */ +#define SGIMC_GIOPARM_RTIMEEXP0 0x00000080 /* EXP(slot0) has realtime attr */ +#define SGIMC_GIOPARM_RTIMEEXP1 0x00000100 /* EXP(slot1) has realtime attr */ +#define SGIMC_GIOPARM_MSTREISA 0x00000200 /* EISA bus can act as bus master */ +#define SGIMC_GIOPARM_ONEBUS 0x00000400 /* Exists one GIO64 pipelined bus */ +#define SGIMC_GIOPARM_MSTRGFX 0x00000800 /* GFX can act as a bus master */ +#define SGIMC_GIOPARM_MSTREXP0 0x00001000 /* EXP(slot0) can bus master */ +#define SGIMC_GIOPARM_MSTREXP1 0x00002000 /* EXP(slot1) can bus master */ +#define SGIMC_GIOPARM_PLINEEXP0 0x00004000 /* EXP(slot0) has pipeline attr */ +#define SGIMC_GIOPARM_PLINEEXP1 0x00008000 /* EXP(slot1) has pipeline attr */ u32 _unused13; - volatile unsigned short cputp; /* CPU bus arb time period */ + volatile unsigned short cputp; /* CPU bus arb time period */ unsigned short _unused14; u32 _unused15[3]; - volatile unsigned short lbursttp; /* Time period for long bursts */ + volatile unsigned short lbursttp; /* Time period for long bursts */ unsigned short _unused16; u32 _unused17[9]; - volatile u32 mconfig0; /* Memory config register zero */ + volatile u32 mconfig0; /* Memory config register zero */ u32 _unused18; - volatile u32 mconfig1; /* Memory config register one */ + volatile u32 mconfig1; /* Memory config register one */ - /* These defines apply to both mconfig registers above. */ -#define SGIMC_MCONFIG_FOURMB 0x00000000 /* Physical ram = 4megs */ -#define SGIMC_MCONFIG_EIGHTMB 0x00000100 /* Physical ram = 8megs */ -#define SGIMC_MCONFIG_SXTEENMB 0x00000300 /* Physical ram = 16megs */ -#define SGIMC_MCONFIG_TTWOMB 0x00000700 /* Physical ram = 32megs */ -#define SGIMC_MCONFIG_SFOURMB 0x00000f00 /* Physical ram = 64megs */ -#define SGIMC_MCONFIG_OTEIGHTMB 0x00001f00 /* Physical ram = 128megs */ -#define SGIMC_MCONFIG_RMASK 0x00001f00 /* Ram config bitmask */ + /* These defines apply to both mconfig registers above. */ +#define SGIMC_MCONFIG_FOURMB 0x00000000 /* Physical ram = 4megs */ +#define SGIMC_MCONFIG_EIGHTMB 0x00000100 /* Physical ram = 8megs */ +#define SGIMC_MCONFIG_SXTEENMB 0x00000300 /* Physical ram = 16megs */ +#define SGIMC_MCONFIG_TTWOMB 0x00000700 /* Physical ram = 32megs */ +#define SGIMC_MCONFIG_SFOURMB 0x00000f00 /* Physical ram = 64megs */ +#define SGIMC_MCONFIG_OTEIGHTMB 0x00001f00 /* Physical ram = 128megs */ +#define SGIMC_MCONFIG_RMASK 0x00001f00 /* Ram config bitmask */ u32 _unused19; - volatile u32 cmacc; /* Mem access config for CPU */ + volatile u32 cmacc; /* Mem access config for CPU */ u32 _unused20; - volatile u32 gmacc; /* Mem access config for GIO */ + volatile u32 gmacc; /* Mem access config for GIO */ /* This define applies to both cmacc and gmacc registers above. */ -#define SGIMC_MACC_ALIASBIG 0x20000000 /* 512MB home for alias */ +#define SGIMC_MACC_ALIASBIG 0x20000000 /* 512MB home for alias */ /* Error address/status regs from GIO and CPU perspectives. */ u32 _unused21; - volatile u32 cerr; /* Error address reg for CPU */ + volatile u32 cerr; /* Error address reg for CPU */ u32 _unused22; - volatile u32 cstat; /* Status reg for CPU */ + volatile u32 cstat; /* Status reg for CPU */ +#define SGIMC_CSTAT_RD 0x00000100 /* read parity error */ +#define SGIMC_CSTAT_PAR 0x00000200 /* CPU parity error */ +#define SGIMC_CSTAT_ADDR 0x00000400 /* memory bus error bad addr */ +#define SGIMC_CSTAT_SYSAD_PAR 0x00000800 /* sysad parity error */ +#define SGIMC_CSTAT_SYSCMD_PAR 0x00001000 /* syscmd parity error */ +#define SGIMC_CSTAT_BAD_DATA 0x00002000 /* bad data identifier */ +#define SGIMC_CSTAT_PAR_MASK 0x00001f00 /* parity error mask */ +#define SGIMC_CSTAT_RD_PAR (SGIMC_CSTAT_RD | SGIMC_CSTAT_PAR) u32 _unused23; - volatile u32 gerr; /* Error address reg for GIO */ + volatile u32 gerr; /* Error address reg for GIO */ u32 _unused24; - volatile u32 gstat; /* Status reg for GIO */ - + volatile u32 gstat; /* Status reg for GIO */ +#define SGIMC_GSTAT_RD 0x00000100 /* read parity error */ +#define SGIMC_GSTAT_WR 0x00000200 /* write parity error */ +#define SGIMC_GSTAT_TIME 0x00000400 /* GIO bus timed out */ +#define SGIMC_GSTAT_PROM 0x00000800 /* write to PROM when PROM_EN not set */ +#define SGIMC_GSTAT_ADDR 0x00001000 /* parity error on addr cycle */ +#define SGIMC_GSTAT_BC 0x00002000 /* parity error on byte count cycle */ +#define SGIMC_GSTAT_PIO_RD 0x00004000 /* read data parity on pio */ +#define SGIMC_GSTAT_PIO_WR 0x00008000 /* write data parity on pio */ /* Special hard bus locking registers. */ u32 _unused25; - volatile unsigned char syssembit; /* Uni-bit system semaphore */ + volatile unsigned char syssembit; /* Uni-bit system semaphore */ unsigned char _unused26[3]; u32 _unused27; - volatile unsigned char mlock; /* Global GIO memory access lock */ + volatile unsigned char mlock; /* Global GIO memory access lock */ unsigned char _unused28[3]; u32 _unused29; - volatile unsigned char elock; /* Locks EISA from GIO accesses */ + volatile unsigned char elock; /* Locks EISA from GIO accesses */ /* GIO dma control registers. */ unsigned char _unused30[3]; u32 _unused31[14]; - volatile u32 gio_dma_trans;/* DMA mask to translation GIO addrs */ + volatile u32 gio_dma_trans; /* DMA mask to translation GIO addrs */ u32 _unused32; - volatile u32 gio_dma_sbits;/* DMA GIO addr substitution bits */ + volatile u32 gio_dma_sbits; /* DMA GIO addr substitution bits */ u32 _unused33; - volatile u32 dma_intr_cause; /* DMA IRQ cause indicator bits */ + volatile u32 dma_intr_cause; /* DMA IRQ cause indicator bits */ u32 _unused34; - volatile u32 dma_ctrl; /* Main DMA control reg */ + volatile u32 dma_ctrl; /* Main DMA control reg */ /* DMA TLB entry 0 */ u32 _unused35; @@ -181,47 +196,47 @@ /* MC misc control registers live at physical 0x1fa00000. */ extern struct sgimc_misc_ctrl *mcmisc_regs; -extern u32 *rpsscounter; /* Chirps at 100ns */ +extern u32 *rpsscounter; /* Chirps at 100ns */ struct sgimc_dma_ctrl { u32 _unused1; - volatile u32 maddronly; /* Address DMA goes at */ + volatile u32 maddronly; /* Address DMA goes at */ u32 _unused2; - volatile u32 maddrpdeflts; /* Same as above, plus set defaults */ + volatile u32 maddrpdeflts; /* Same as above, plus set defaults */ u32 _unused3; - volatile u32 dmasz; /* DMA count */ + volatile u32 dmasz; /* DMA count */ u32 _unused4; - volatile u32 ssize; /* DMA stride size */ + volatile u32 ssize; /* DMA stride size */ u32 _unused5; - volatile u32 gmaddronly; /* Set GIO DMA but do not start trans */ + volatile u32 gmaddronly; /* Set GIO DMA but do not start trans */ u32 _unused6; - volatile u32 dmaddnpgo; /* Set GIO DMA addr + start transfer */ + volatile u32 dmaddnpgo; /* Set GIO DMA addr + start transfer */ u32 _unused7; - volatile u32 dmamode; /* DMA mode config bit settings */ + volatile u32 dmamode; /* DMA mode config bit settings */ u32 _unused8; - volatile u32 dmaccount; /* Zoom and byte count for DMA */ + volatile u32 dmaccount; /* Zoom and byte count for DMA */ u32 _unused9; - volatile u32 dmastart; /* Pedal to the metal. */ + volatile u32 dmastart; /* Pedal to the metal. */ u32 _unused10; - volatile u32 dmarunning; /* DMA op is in progress */ + volatile u32 dmarunning; /* DMA op is in progress */ u32 _unused11; /* Set dma addr, defaults, and kick it */ - volatile u32 maddr_defl_go; /* go go go! -lm */ + volatile u32 maddr_defl_go; /* go go go! -lm */ }; /* MC controller dma regs live at physical 0x1fa02000. */ extern struct sgimc_dma_ctrl *dmactrlregs; /* Base location of the two ram banks found in IP2[0268] machines. */ -#define SGIMC_SEG0_BADDR 0x08000000 -#define SGIMC_SEG1_BADDR 0x20000000 +#define SGIMC_SEG0_BADDR 0x08000000 +#define SGIMC_SEG1_BADDR 0x20000000 /* Maximum size of the above banks are per machine. */ extern u32 sgimc_seg0_size, sgimc_seg1_size; -#define SGIMC_SEG0_SIZE_ALL 0x10000000 /* 256MB */ -#define SGIMC_SEG1_SIZE_IP20_IP22 0x08000000 /* 128MB */ -#define SGIMC_SEG1_SIZE_IP26_IP28 0x20000000 /* 512MB */ +#define SGIMC_SEG0_SIZE_ALL 0x10000000 /* 256MB */ +#define SGIMC_SEG1_SIZE_IP20_IP22 0x08000000 /* 128MB */ +#define SGIMC_SEG1_SIZE_IP26_IP28 0x20000000 /* 512MB */ extern void sgimc_init(void); Index: include/asm-mips64/sgi/sgimc.h =================================================================== RCS file: /home/cvs/linux/include/asm-mips64/sgi/sgimc.h,v retrieving revision 1.3 diff -u -r1.3 sgimc.h --- include/asm-mips64/sgi/sgimc.h 9 Jul 2001 00:25:38 -0000 1.3 +++ include/asm-mips64/sgi/sgimc.h 8 Jan 2003 12:22:33 -0000 @@ -15,144 +15,159 @@ struct sgimc_misc_ctrl { u32 _unused1; - volatile u32 cpuctrl0; /* CPU control register 0, readwrite */ -#define SGIMC_CCTRL0_REFS 0x0000000f /* REFS mask */ -#define SGIMC_CCTRL0_EREFRESH 0x00000010 /* Memory refresh enable */ -#define SGIMC_CCTRL0_EPERRGIO 0x00000020 /* GIO parity error enable */ -#define SGIMC_CCTRL0_EPERRMEM 0x00000040 /* Main mem parity error enable */ -#define SGIMC_CCTRL0_EPERRCPU 0x00000080 /* CPU bus parity error enable */ -#define SGIMC_CCTRL0_WDOG 0x00000100 /* Watchdog timer enable */ -#define SGIMC_CCTRL0_SYSINIT 0x00000200 /* System init bit */ -#define SGIMC_CCTRL0_GFXRESET 0x00000400 /* Graphics interface reset */ -#define SGIMC_CCTRL0_EISALOCK 0x00000800 /* Lock CPU from memory for EISA */ -#define SGIMC_CCTRL0_EPERRSCMD 0x00001000 /* SysCMD bus parity error enable */ -#define SGIMC_CCTRL0_IENAB 0x00002000 /* Allow interrupts from MC */ -#define SGIMC_CCTRL0_ESNOOP 0x00004000 /* Snooping I/O enable */ -#define SGIMC_CCTRL0_EPROMWR 0x00008000 /* Prom writes from cpu enable */ -#define SGIMC_CCTRL0_WRESETPMEM 0x00010000 /* Perform warm reset, preserves mem */ -#define SGIMC_CCTRL0_LENDIAN 0x00020000 /* Put MC in little-endian mode */ -#define SGIMC_CCTRL0_WRESETDMEM 0x00040000 /* Warm reset, destroys mem contents */ -#define SGIMC_CCTRL0_CMEMBADPAR 0x02000000 /* Generate bad perr from cpu to mem */ -#define SGIMC_CCTRL0_R4KNOCHKPARR 0x04000000 /* Don't chk parity on mem data reads */ -#define SGIMC_CCTRL0_GIOBTOB 0x08000000 /* Allow GIO back to back writes */ + volatile u32 cpuctrl0; /* CPU control register 0, readwrite */ +#define SGIMC_CCTRL0_REFS 0x0000000f /* REFS mask */ +#define SGIMC_CCTRL0_EREFRESH 0x00000010 /* Memory refresh enable */ +#define SGIMC_CCTRL0_EPERRGIO 0x00000020 /* GIO parity error enable */ +#define SGIMC_CCTRL0_EPERRMEM 0x00000040 /* Main mem parity error enable */ +#define SGIMC_CCTRL0_EPERRCPU 0x00000080 /* CPU bus parity error enable */ +#define SGIMC_CCTRL0_WDOG 0x00000100 /* Watchdog timer enable */ +#define SGIMC_CCTRL0_SYSINIT 0x00000200 /* System init bit */ +#define SGIMC_CCTRL0_GFXRESET 0x00000400 /* Graphics interface reset */ +#define SGIMC_CCTRL0_EISALOCK 0x00000800 /* Lock CPU from memory for EISA */ +#define SGIMC_CCTRL0_EPERRSCMD 0x00001000 /* SysCMD bus parity error enable */ +#define SGIMC_CCTRL0_IENAB 0x00002000 /* Allow interrupts from MC */ +#define SGIMC_CCTRL0_ESNOOP 0x00004000 /* Snooping I/O enable */ +#define SGIMC_CCTRL0_EPROMWR 0x00008000 /* Prom writes from cpu enable */ +#define SGIMC_CCTRL0_WRESETPMEM 0x00010000 /* Perform warm reset, preserves mem */ +#define SGIMC_CCTRL0_LENDIAN 0x00020000 /* Put MC in little-endian mode */ +#define SGIMC_CCTRL0_WRESETDMEM 0x00040000 /* Warm reset, destroys mem contents */ +#define SGIMC_CCTRL0_CMEMBADPAR 0x02000000 /* Generate bad perr from cpu to mem */ +#define SGIMC_CCTRL0_R4KNOPAR 0x04000000 /* Don't chk parity on mem data reads */ +#define SGIMC_CCTRL0_GIOBTOB 0x08000000 /* Allow GIO back to back writes */ u32 _unused2; - volatile u32 cpuctrl1; /* CPU control register 1, readwrite */ -#define SGIMC_CCTRL1_EGIOTIMEO 0x00000010 /* GIO bus timeout enable */ -#define SGIMC_CCTRL1_FIXEDEHPC 0x00001000 /* Fixed HPC endianness */ -#define SGIMC_CCTRL1_LITTLEHPC 0x00002000 /* Little endian HPC */ -#define SGIMC_CCTRL1_FIXEDEEXP0 0x00004000 /* Fixed EXP0 endianness */ -#define SGIMC_CCTRL1_LITTLEEXP0 0x00008000 /* Little endian EXP0 */ -#define SGIMC_CCTRL1_FIXEDEEXP1 0x00010000 /* Fixed EXP1 endianness */ -#define SGIMC_CCTRL1_LITTLEEXP1 0x00020000 /* Little endian EXP1 */ + volatile u32 cpuctrl1; /* CPU control register 1, readwrite */ +#define SGIMC_CCTRL1_EGIOTIMEO 0x00000010 /* GIO bus timeout enable */ +#define SGIMC_CCTRL1_FIXEDEHPC 0x00001000 /* Fixed HPC endianness */ +#define SGIMC_CCTRL1_LITTLEHPC 0x00002000 /* Little endian HPC */ +#define SGIMC_CCTRL1_FIXEDEEXP0 0x00004000 /* Fixed EXP0 endianness */ +#define SGIMC_CCTRL1_LITTLEEXP0 0x00008000 /* Little endian EXP0 */ +#define SGIMC_CCTRL1_FIXEDEEXP1 0x00010000 /* Fixed EXP1 endianness */ +#define SGIMC_CCTRL1_LITTLEEXP1 0x00020000 /* Little endian EXP1 */ u32 _unused3; - volatile u32 watchdogt; /* Watchdog reg rdonly, write clears */ + volatile u32 watchdogt; /* Watchdog reg rdonly, write clears */ u32 _unused4; - volatile u32 systemid; /* MC system ID register, readonly */ -#define SGIMC_SYSID_MASKREV 0x0000000f /* Revision of MC controller */ -#define SGIMC_SYSID_EPRESENT 0x00000010 /* Indicates presence of EISA bus */ + volatile u32 systemid; /* MC system ID register, readonly */ +#define SGIMC_SYSID_MASKREV 0x0000000f /* Revision of MC controller */ +#define SGIMC_SYSID_EPRESENT 0x00000010 /* Indicates presence of EISA bus */ u32 _unused5[3]; - volatile u32 divider; /* Divider reg for RPSS */ + volatile u32 divider; /* Divider reg for RPSS */ u32 _unused6; - volatile unsigned char eeprom; /* EEPROM byte reg for r4k */ -#define SGIMC_EEPROM_PRE 0x00000001 /* eeprom chip PRE pin assertion */ -#define SGIMC_EEPROM_CSEL 0x00000002 /* Active high, eeprom chip select */ -#define SGIMC_EEPROM_SECLOCK 0x00000004 /* EEPROM serial clock */ -#define SGIMC_EEPROM_SDATAO 0x00000008 /* Serial EEPROM data-out */ -#define SGIMC_EEPROM_SDATAI 0x00000010 /* Serial EEPROM data-in */ + volatile unsigned char eeprom; /* EEPROM byte reg for r4k */ +#define SGIMC_EEPROM_PRE 0x00000001 /* eeprom chip PRE pin assertion */ +#define SGIMC_EEPROM_CSEL 0x00000002 /* Active high, eeprom chip select */ +#define SGIMC_EEPROM_SECLOCK 0x00000004 /* EEPROM serial clock */ +#define SGIMC_EEPROM_SDATAO 0x00000008 /* Serial EEPROM data-out */ +#define SGIMC_EEPROM_SDATAI 0x00000010 /* Serial EEPROM data-in */ unsigned char _unused7[3]; u32 _unused8[3]; - volatile unsigned short rcntpre; /* Preload refresh counter */ + volatile unsigned short rcntpre; /* Preload refresh counter */ unsigned short _unused9; u32 _unused9a; - volatile unsigned short rcounter; /* Readonly refresh counter */ + volatile unsigned short rcounter; /* Readonly refresh counter */ unsigned short _unused10; u32 _unused11[13]; - volatile u32 gioparm; /* Parameter word for GIO64 */ -#define SGIMC_GIOPARM_HPC64 0x00000001 /* HPC talks to GIO using 64-bits */ -#define SGIMC_GIOPARM_GFX64 0x00000002 /* GFX talks to GIO using 64-bits */ -#define SGIMC_GIOPARM_EXP064 0x00000004 /* EXP(slot0) talks using 64-bits */ -#define SGIMC_GIOPARM_EXP164 0x00000008 /* EXP(slot1) talks using 64-bits */ -#define SGIMC_GIOPARM_EISA64 0x00000010 /* EISA bus talks 64-bits to GIO */ -#define SGIMC_GIOPARM_HPC264 0x00000020 /* 2nd HPX talks 64-bits to GIO */ -#define SGIMC_GIOPARM_RTIMEGFX 0x00000040 /* GFX device has realtime attr */ -#define SGIMC_GIOPARM_RTIMEEXP0 0x00000080 /* EXP(slot0) has realtime attr */ -#define SGIMC_GIOPARM_RTIMEEXP1 0x00000100 /* EXP(slot1) has realtime attr */ -#define SGIMC_GIOPARM_MASTEREISA 0x00000200 /* EISA bus can act as bus master */ -#define SGIMC_GIOPARM_ONEBUS 0x00000400 /* Exists one GIO64 pipelined bus */ -#define SGIMC_GIOPARM_MASTERGFX 0x00000800 /* GFX can act as a bus master */ -#define SGIMC_GIOPARM_MASTEREXP0 0x00001000 /* EXP(slot0) can bus master */ -#define SGIMC_GIOPARM_MASTEREXP1 0x00002000 /* EXP(slot1) can bus master */ -#define SGIMC_GIOPARM_PLINEEXP0 0x00004000 /* EXP(slot0) has pipeline attr */ -#define SGIMC_GIOPARM_PLINEEXP1 0x00008000 /* EXP(slot1) has pipeline attr */ + volatile u32 gioparm; /* Parameter word for GIO64 */ +#define SGIMC_GIOPARM_HPC64 0x00000001 /* HPC talks to GIO using 64-bits */ +#define SGIMC_GIOPARM_GFX64 0x00000002 /* GFX talks to GIO using 64-bits */ +#define SGIMC_GIOPARM_EXP064 0x00000004 /* EXP(slot0) talks using 64-bits */ +#define SGIMC_GIOPARM_EXP164 0x00000008 /* EXP(slot1) talks using 64-bits */ +#define SGIMC_GIOPARM_EISA64 0x00000010 /* EISA bus talks 64-bits to GIO */ +#define SGIMC_GIOPARM_HPC264 0x00000020 /* 2nd HPX talks 64-bits to GIO */ +#define SGIMC_GIOPARM_RTIMEGFX 0x00000040 /* GFX device has realtime attr */ +#define SGIMC_GIOPARM_RTIMEEXP0 0x00000080 /* EXP(slot0) has realtime attr */ +#define SGIMC_GIOPARM_RTIMEEXP1 0x00000100 /* EXP(slot1) has realtime attr */ +#define SGIMC_GIOPARM_MSTREISA 0x00000200 /* EISA bus can act as bus master */ +#define SGIMC_GIOPARM_ONEBUS 0x00000400 /* Exists one GIO64 pipelined bus */ +#define SGIMC_GIOPARM_MSTRGFX 0x00000800 /* GFX can act as a bus master */ +#define SGIMC_GIOPARM_MSTREXP0 0x00001000 /* EXP(slot0) can bus master */ +#define SGIMC_GIOPARM_MSTREXP1 0x00002000 /* EXP(slot1) can bus master */ +#define SGIMC_GIOPARM_PLINEEXP0 0x00004000 /* EXP(slot0) has pipeline attr */ +#define SGIMC_GIOPARM_PLINEEXP1 0x00008000 /* EXP(slot1) has pipeline attr */ u32 _unused13; - volatile unsigned short cputp; /* CPU bus arb time period */ + volatile unsigned short cputp; /* CPU bus arb time period */ unsigned short _unused14; u32 _unused15[3]; - volatile unsigned short lbursttp; /* Time period for long bursts */ + volatile unsigned short lbursttp; /* Time period for long bursts */ unsigned short _unused16; u32 _unused17[9]; - volatile u32 mconfig0; /* Memory config register zero */ + volatile u32 mconfig0; /* Memory config register zero */ u32 _unused18; - volatile u32 mconfig1; /* Memory config register one */ + volatile u32 mconfig1; /* Memory config register one */ - /* These defines apply to both mconfig registers above. */ -#define SGIMC_MCONFIG_FOURMB 0x00000000 /* Physical ram = 4megs */ -#define SGIMC_MCONFIG_EIGHTMB 0x00000100 /* Physical ram = 8megs */ -#define SGIMC_MCONFIG_SXTEENMB 0x00000300 /* Physical ram = 16megs */ -#define SGIMC_MCONFIG_TTWOMB 0x00000700 /* Physical ram = 32megs */ -#define SGIMC_MCONFIG_SFOURMB 0x00000f00 /* Physical ram = 64megs */ -#define SGIMC_MCONFIG_OTEIGHTMB 0x00001f00 /* Physical ram = 128megs */ -#define SGIMC_MCONFIG_RMASK 0x00001f00 /* Ram config bitmask */ + /* These defines apply to both mconfig registers above. */ +#define SGIMC_MCONFIG_FOURMB 0x00000000 /* Physical ram = 4megs */ +#define SGIMC_MCONFIG_EIGHTMB 0x00000100 /* Physical ram = 8megs */ +#define SGIMC_MCONFIG_SXTEENMB 0x00000300 /* Physical ram = 16megs */ +#define SGIMC_MCONFIG_TTWOMB 0x00000700 /* Physical ram = 32megs */ +#define SGIMC_MCONFIG_SFOURMB 0x00000f00 /* Physical ram = 64megs */ +#define SGIMC_MCONFIG_OTEIGHTMB 0x00001f00 /* Physical ram = 128megs */ +#define SGIMC_MCONFIG_RMASK 0x00001f00 /* Ram config bitmask */ u32 _unused19; - volatile u32 cmacc; /* Mem access config for CPU */ + volatile u32 cmacc; /* Mem access config for CPU */ u32 _unused20; - volatile u32 gmacc; /* Mem access config for GIO */ + volatile u32 gmacc; /* Mem access config for GIO */ /* This define applies to both cmacc and gmacc registers above. */ -#define SGIMC_MACC_ALIASBIG 0x20000000 /* 512MB home for alias */ +#define SGIMC_MACC_ALIASBIG 0x20000000 /* 512MB home for alias */ /* Error address/status regs from GIO and CPU perspectives. */ u32 _unused21; - volatile u32 cerr; /* Error address reg for CPU */ + volatile u32 cerr; /* Error address reg for CPU */ u32 _unused22; - volatile u32 cstat; /* Status reg for CPU */ + volatile u32 cstat; /* Status reg for CPU */ +#define SGIMC_CSTAT_RD 0x00000100 /* read parity error */ +#define SGIMC_CSTAT_PAR 0x00000200 /* CPU parity error */ +#define SGIMC_CSTAT_ADDR 0x00000400 /* memory bus error bad addr */ +#define SGIMC_CSTAT_SYSAD_PAR 0x00000800 /* sysad parity error */ +#define SGIMC_CSTAT_SYSCMD_PAR 0x00001000 /* syscmd parity error */ +#define SGIMC_CSTAT_BAD_DATA 0x00002000 /* bad data identifier */ +#define SGIMC_CSTAT_PAR_MASK 0x00001f00 /* parity error mask */ +#define SGIMC_CSTAT_RD_PAR (SGIMC_CSTAT_RD | SGIMC_CSTAT_PAR) u32 _unused23; - volatile u32 gerr; /* Error address reg for GIO */ + volatile u32 gerr; /* Error address reg for GIO */ u32 _unused24; - volatile u32 gstat; /* Status reg for GIO */ - + volatile u32 gstat; /* Status reg for GIO */ +#define SGIMC_GSTAT_RD 0x00000100 /* read parity error */ +#define SGIMC_GSTAT_WR 0x00000200 /* write parity error */ +#define SGIMC_GSTAT_TIME 0x00000400 /* GIO bus timed out */ +#define SGIMC_GSTAT_PROM 0x00000800 /* write to PROM when PROM_EN not set */ +#define SGIMC_GSTAT_ADDR 0x00001000 /* parity error on addr cycle */ +#define SGIMC_GSTAT_BC 0x00002000 /* parity error on byte count cycle */ +#define SGIMC_GSTAT_PIO_RD 0x00004000 /* read data parity on pio */ +#define SGIMC_GSTAT_PIO_WR 0x00008000 /* write data parity on pio */ /* Special hard bus locking registers. */ u32 _unused25; - volatile unsigned char syssembit; /* Uni-bit system semaphore */ + volatile unsigned char syssembit; /* Uni-bit system semaphore */ unsigned char _unused26[3]; u32 _unused27; - volatile unsigned char mlock; /* Global GIO memory access lock */ + volatile unsigned char mlock; /* Global GIO memory access lock */ unsigned char _unused28[3]; u32 _unused29; - volatile unsigned char elock; /* Locks EISA from GIO accesses */ + volatile unsigned char elock; /* Locks EISA from GIO accesses */ /* GIO dma control registers. */ unsigned char _unused30[3]; u32 _unused31[14]; - volatile u32 gio_dma_trans;/* DMA mask to translation GIO addrs */ + volatile u32 gio_dma_trans; /* DMA mask to translation GIO addrs */ u32 _unused32; - volatile u32 gio_dma_sbits;/* DMA GIO addr substitution bits */ + volatile u32 gio_dma_sbits; /* DMA GIO addr substitution bits */ u32 _unused33; - volatile u32 dma_intr_cause; /* DMA IRQ cause indicator bits */ + volatile u32 dma_intr_cause; /* DMA IRQ cause indicator bits */ u32 _unused34; - volatile u32 dma_ctrl; /* Main DMA control reg */ + volatile u32 dma_ctrl; /* Main DMA control reg */ /* DMA TLB entry 0 */ u32 _unused35; @@ -181,47 +196,47 @@ /* MC misc control registers live at physical 0x1fa00000. */ extern struct sgimc_misc_ctrl *mcmisc_regs; -extern u32 *rpsscounter; /* Chirps at 100ns */ +extern u32 *rpsscounter; /* Chirps at 100ns */ struct sgimc_dma_ctrl { u32 _unused1; - volatile u32 maddronly; /* Address DMA goes at */ + volatile u32 maddronly; /* Address DMA goes at */ u32 _unused2; - volatile u32 maddrpdeflts; /* Same as above, plus set defaults */ + volatile u32 maddrpdeflts; /* Same as above, plus set defaults */ u32 _unused3; - volatile u32 dmasz; /* DMA count */ + volatile u32 dmasz; /* DMA count */ u32 _unused4; - volatile u32 ssize; /* DMA stride size */ + volatile u32 ssize; /* DMA stride size */ u32 _unused5; - volatile u32 gmaddronly; /* Set GIO DMA but do not start trans */ + volatile u32 gmaddronly; /* Set GIO DMA but do not start trans */ u32 _unused6; - volatile u32 dmaddnpgo; /* Set GIO DMA addr + start transfer */ + volatile u32 dmaddnpgo; /* Set GIO DMA addr + start transfer */ u32 _unused7; - volatile u32 dmamode; /* DMA mode config bit settings */ + volatile u32 dmamode; /* DMA mode config bit settings */ u32 _unused8; - volatile u32 dmacount; /* Zoom and byte count for DMA */ + volatile u32 dmaccount; /* Zoom and byte count for DMA */ u32 _unused9; - volatile u32 dmastart; /* Pedal to the metal. */ + volatile u32 dmastart; /* Pedal to the metal. */ u32 _unused10; - volatile u32 dmarunning; /* DMA op is in progress */ + volatile u32 dmarunning; /* DMA op is in progress */ u32 _unused11; /* Set dma addr, defaults, and kick it */ - volatile u32 maddr_defl_go; /* go go go! -lm */ + volatile u32 maddr_defl_go; /* go go go! -lm */ }; /* MC controller dma regs live at physical 0x1fa02000. */ extern struct sgimc_dma_ctrl *dmactrlregs; /* Base location of the two ram banks found in IP2[0268] machines. */ -#define SGIMC_SEG0_BADDR 0x08000000 -#define SGIMC_SEG1_BADDR 0x20000000 +#define SGIMC_SEG0_BADDR 0x08000000 +#define SGIMC_SEG1_BADDR 0x20000000 /* Maximum size of the above banks are per machine. */ extern u32 sgimc_seg0_size, sgimc_seg1_size; -#define SGIMC_SEG0_SIZE_ALL 0x10000000 /* 256MB */ -#define SGIMC_SEG1_SIZE_IP20_IP22 0x08000000 /* 128MB */ -#define SGIMC_SEG1_SIZE_IP26_IP28 0x20000000 /* 512MB */ +#define SGIMC_SEG0_SIZE_ALL 0x10000000 /* 256MB */ +#define SGIMC_SEG1_SIZE_IP20_IP22 0x08000000 /* 128MB */ +#define SGIMC_SEG1_SIZE_IP26_IP28 0x20000000 /* 512MB */ extern void sgimc_init(void); From macro@ds2.pg.gda.pl Wed Jan 8 12:42:06 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jan 2003 12:42:07 +0000 (GMT) Received: from delta.ds2.pg.gda.pl ([IPv6:::ffff:213.192.72.1]:65500 "EHLO delta.ds2.pg.gda.pl") by linux-mips.org with ESMTP id ; Wed, 8 Jan 2003 12:42:06 +0000 Received: from localhost by delta.ds2.pg.gda.pl (8.9.3/8.9.3) with SMTP id NAA02452; Wed, 8 Jan 2003 13:41:43 +0100 (MET) Date: Wed, 8 Jan 2003 13:41:41 +0100 (MET) From: "Maciej W. Rozycki" To: Ladislav Michl cc: linux-mips , Ralf Baechle , Guido Guenther Subject: Re: Remove GIO interface In-Reply-To: <20030108133013.A17162@erebor.psi.cz> Message-ID: Organization: Technical University of Gdansk MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1092 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@ds2.pg.gda.pl Precedence: bulk X-list: linux-mips On Wed, 8 Jan 2003, Ladislav Michl wrote: > * Even in case everything work as stated in documentation, we are unable > to use this mechanism to detect Newport for console driver (the main > reason why I created this interface was to provide neccessary > informations to Xserver), because our DBE handling doesn't work until > modules are initialized (in case we are building kernel with modules > support). That is a bug and it should be fixed. What are the symptoms? -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + From ladis@psi.cz Wed Jan 8 12:59:50 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jan 2003 12:59:51 +0000 (GMT) Received: from erebor.lep.brno.cas.cz ([IPv6:::ffff:195.178.65.162]:45836 "EHLO erebor.lep.brno.cas.cz") by linux-mips.org with ESMTP id ; Wed, 8 Jan 2003 12:59:50 +0000 Received: from ladis by erebor.lep.brno.cas.cz with local (Exim 3.12 #1 (Debian)) id 18WFwR-0004yw-00; Wed, 08 Jan 2003 14:08:19 +0100 Date: Wed, 8 Jan 2003 14:08:19 +0100 To: "Maciej W. Rozycki" Cc: linux-mips , Ralf Baechle , Guido Guenther Subject: Re: Remove GIO interface Message-ID: <20030108140818.C17162@erebor.psi.cz> References: <20030108133013.A17162@erebor.psi.cz> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5i In-Reply-To: ; from macro@ds2.pg.gda.pl on Wed, Jan 08, 2003 at 01:41:41PM +0100 From: Ladislav Michl Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1093 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ladis@psi.cz Precedence: bulk X-list: linux-mips On Wed, Jan 08, 2003 at 01:41:41PM +0100, Maciej W. Rozycki wrote: > On Wed, 8 Jan 2003, Ladislav Michl wrote: > > > * Even in case everything work as stated in documentation, we are unable > > to use this mechanism to detect Newport for console driver (the main > > reason why I created this interface was to provide neccessary > > informations to Xserver), because our DBE handling doesn't work until > > modules are initialized (in case we are building kernel with modules > > support). > > That is a bug and it should be fixed. What are the symptoms? the most notable symptom is machine hang at boot time :-) it doesn't apply to cvs kernel, just to my private one where I called get_dbe in console_init. you cannot use get_dbe _before_ init_modules is called (ie. in board_irq_init). reason is following (copy&paste from traps.c). read "READ HERE". static inline unsigned long search_dbe_table(unsigned long addr) { unsigned long ret = 0; #ifndef CONFIG_MODULES /* There is only the kernel to search. */ ret = search_one_table(__start___dbe_table, __stop___dbe_table-1, addr); return ret; #else unsigned long flags; /* The kernel is the last "module" -- no need to treat it special. */ struct module *mp; struct archdata *ap; spin_lock_irqsave(&modlist_lock, flags); for (mp = module_list; mp != NULL; mp = mp->next) { if (!mod_member_present(mp, archdata_end) || !mod_archdata_member_present(mp, struct archdata, dbe_table_end)) continue; ap = (struct archdata *)(mp->archdata_start); if (ap->dbe_table_start == NULL || !(mp->flags & (MOD_RUNNING | MOD_INITIALIZING))) continue; /* READ HERE: we don't reach this point because kernel is the last module * and it is not initialized yet, so it has no archdata */ ret = search_one_table(ap->dbe_table_start, ap->dbe_table_end - 1, addr); if (ret) break; } spin_unlock_irqrestore(&modlist_lock, flags); return ret; #endif } so although traps are initialized one cannot use them and have to wait until modules are initialized too. anyway, even if you fix this issue it is not reason for keeping GIO interface. ladis From macro@ds2.pg.gda.pl Wed Jan 8 13:13:32 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jan 2003 13:13:33 +0000 (GMT) Received: from delta.ds2.pg.gda.pl ([IPv6:::ffff:213.192.72.1]:63965 "EHLO delta.ds2.pg.gda.pl") by linux-mips.org with ESMTP id ; Wed, 8 Jan 2003 13:13:32 +0000 Received: from localhost by delta.ds2.pg.gda.pl (8.9.3/8.9.3) with SMTP id OAA03113; Wed, 8 Jan 2003 14:13:17 +0100 (MET) Date: Wed, 8 Jan 2003 14:13:14 +0100 (MET) From: "Maciej W. Rozycki" To: Ladislav Michl cc: linux-mips , Ralf Baechle , Guido Guenther Subject: Re: Remove GIO interface In-Reply-To: <20030108140818.C17162@erebor.psi.cz> Message-ID: Organization: Technical University of Gdansk MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1094 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@ds2.pg.gda.pl Precedence: bulk X-list: linux-mips On Wed, 8 Jan 2003, Ladislav Michl wrote: > ap = (struct archdata *)(mp->archdata_start); > > if (ap->dbe_table_start == NULL || > !(mp->flags & (MOD_RUNNING | MOD_INITIALIZING))) > continue; > /* READ HERE: we don't reach this point because kernel is the last module > * and it is not initialized yet, so it has no archdata */ Hmm, it would be good to have archdata_start and archdata_end initialized statically for kernel_module. Added to my to-do list. -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + From macro@ds2.pg.gda.pl Wed Jan 8 13:27:15 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jan 2003 13:27:16 +0000 (GMT) Received: from delta.ds2.pg.gda.pl ([IPv6:::ffff:213.192.72.1]:30942 "EHLO delta.ds2.pg.gda.pl") by linux-mips.org with ESMTP id ; Wed, 8 Jan 2003 13:27:15 +0000 Received: from localhost by delta.ds2.pg.gda.pl (8.9.3/8.9.3) with SMTP id OAA03438; Wed, 8 Jan 2003 14:27:07 +0100 (MET) Date: Wed, 8 Jan 2003 14:27:05 +0100 (MET) From: "Maciej W. Rozycki" To: Ralf Baechle cc: linux-mips@linux-mips.org Subject: [patch] Use XKPHYS for 64-bit TLB flushes Message-ID: Organization: Technical University of Gdansk MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1095 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@ds2.pg.gda.pl Precedence: bulk X-list: linux-mips Hello, 32-bit R4k TLB flush functions use KSEG0 as an impossible (unmapped) VPN2 value for invalidated TLB entries. 64-bit ones use KSEG0 as well, but here KSEG0 is a valid XKSEG (mapped) value as it gets interpreted as 0xc00000ff80000000 when written into cp0.EntryHi. The correct impossible (unmapped) VPN2 value for the 64-bit mode is XKPHYS. Here is a patch implementing it. The code runs fine on my R4400SC. OK to apply? BTW, show_tlb() (in the same file) is buggy and redundant -- dump_tlb_all() is a correct equivalent. I'd like to remove show_tlb() -- OK? Maciej -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + patch-mips-2.4.20-pre6-20021212-mips64-tlb-r4k-0 diff -up --recursive --new-file linux-mips-2.4.20-pre6-20021212.macro/arch/mips64/mm/tlb-r4k.c linux-mips-2.4.20-pre6-20021212/arch/mips64/mm/tlb-r4k.c --- linux-mips-2.4.20-pre6-20021212.macro/arch/mips64/mm/tlb-r4k.c 2002-12-04 03:56:40.000000000 +0000 +++ linux-mips-2.4.20-pre6-20021212/arch/mips64/mm/tlb-r4k.c 2003-01-08 03:54:28.000000000 +0000 @@ -53,7 +53,7 @@ void local_flush_tlb_all(void) __save_and_cli(flags); /* Save old context and create impossible VPN2 value */ old_ctx = (read_c0_entryhi() & 0xff); - write_c0_entryhi(KSEG0); + write_c0_entryhi(XKPHYS); write_c0_entrylo0(0); write_c0_entrylo1(0); BARRIER; @@ -63,7 +63,7 @@ void local_flush_tlb_all(void) /* Blast 'em all away. */ while(entry < mips_cpu.tlbsize) { /* Make sure all entries differ. */ - write_c0_entryhi(KSEG0+entry*0x2000); + write_c0_entryhi(XKPHYS+entry*0x2000); write_c0_index(entry); BARRIER; tlb_write_indexed(); @@ -128,7 +128,7 @@ void local_flush_tlb_range(struct mm_str if(idx < 0) continue; /* Make sure all entries differ. */ - write_c0_entryhi(KSEG0+idx*0x2000); + write_c0_entryhi(XKPHYS+idx*0x2000); BARRIER; tlb_write_indexed(); BARRIER; @@ -167,7 +167,7 @@ void local_flush_tlb_page(struct vm_area if(idx < 0) goto finish; /* Make sure all entries differ. */ - write_c0_entryhi(KSEG0+idx*0x2000); + write_c0_entryhi(XKPHYS+idx*0x2000); BARRIER; tlb_write_indexed(); finish: From ralf@linux-mips.org Wed Jan 8 14:00:22 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jan 2003 14:00:22 +0000 (GMT) Received: from p508B79B9.dip.t-dialin.net ([IPv6:::ffff:80.139.121.185]:6614 "EHLO dea.linux-mips.net") by linux-mips.org with ESMTP id ; Wed, 8 Jan 2003 14:00:22 +0000 Received: (from ralf@localhost) by dea.linux-mips.net (8.11.6/8.11.6) id h08Dxrv20075; Wed, 8 Jan 2003 14:59:53 +0100 Date: Wed, 8 Jan 2003 14:59:53 +0100 From: Ralf Baechle To: "Maciej W. Rozycki" Cc: linux-mips@linux-mips.org Subject: Re: [patch] Use XKPHYS for 64-bit TLB flushes Message-ID: <20030108145953.B8396@linux-mips.org> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5.1i In-Reply-To: ; from macro@ds2.pg.gda.pl on Wed, Jan 08, 2003 at 02:27:05PM +0100 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1096 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, Jan 08, 2003 at 02:27:05PM +0100, Maciej W. Rozycki wrote: > 32-bit R4k TLB flush functions use KSEG0 as an impossible (unmapped) VPN2 > value for invalidated TLB entries. 64-bit ones use KSEG0 as well, but > here KSEG0 is a valid XKSEG (mapped) value as it gets interpreted as > 0xc00000ff80000000 when written into cp0.EntryHi. The correct impossible > (unmapped) VPN2 value for the 64-bit mode is XKPHYS. That's a funny one. Historically the idea was to use KSEG0 because the for KSEG0 the TLB is not used for translation. That already failed for the Sibyte SB1 which is why we have to use different KSEG0 addresses for each entry there. > Here is a patch implementing it. The code runs fine on my R4400SC. OK > to apply? Yes. > BTW, show_tlb() (in the same file) is buggy and redundant -- > dump_tlb_all() is a correct equivalent. I'd like to remove show_tlb() -- > OK? Yes. I'd eventually like to move the tlb dump functions away from the lib directory into the mm directory which seems to be more the right place for them. Ralf From MAILER-DAEMON Wed Jan 8 15:45:47 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jan 2003 15:45:56 +0000 (GMT) Received: from optic.dynamicpipe.com ([IPv6:::ffff:216.130.208.25]:1252 "HELO optic.dynamicpipe.com") by linux-mips.org with SMTP id ; Wed, 8 Jan 2003 15:45:47 +0000 Received: (qmail 18490 invoked for bounce); 8 Jan 2003 15:50:56 -0000 Date: 8 Jan 2003 15:50:56 -0000 From: MAILER-DAEMON@optic.dynamicpipe.com To: linux-mips@linux-mips.org Subject: failure notice Message-Id: <20030108154547Z8225979-1177+4659@linux-mips.org> Return-Path: <> X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1097 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: MAILER-DAEMON@optic.dynamicpipe.com Precedence: bulk X-list: linux-mips Hi. This is the qmail-send program at optic.dynamicpipe.com. I'm afraid I wasn't able to deliver your message to the following addresses. This is a permanent error; I've given up. Sorry it didn't work out. : Sorry, no mailbox here by that name. (#5.1.1) --- Below this line is a copy of the message. Return-Path: Received: (qmail 18448 invoked by uid 1003); 8 Jan 2003 15:50:55 -0000 Received: from rly-ip03.mx.aol.com (64.12.138.7) by optic.dynamicpipe.com with SMTP; 8 Jan 2003 15:50:55 -0000 Received: from logs-mtc-tg.proxy.aol.com (logs-mtc-tg.proxy.aol.com [64.12.102.135]) by rly-ip03.mx.aol.com (v89.10) with ESMTP id RELAYIN3-0108104358; Wed, 08 Jan 2003 10:43:58 1900 Received: from Zwpy (ACA5F897.ipt.aol.com [172.165.248.151]) by logs-mtc-tg.proxy.aol.com (8.12.6/8.12.6) with SMTP id h08Ff5sG005908 for ; Wed, 8 Jan 2003 10:41:05 -0500 (EST) Date: Wed, 8 Jan 2003 10:41:05 -0500 (EST) Message-Id: <200301081541.h08Ff5sG005908@logs-mtc-tg.proxy.aol.com> From: linux-mips To: cs@gayrealitytv.com Subject: Product. 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LVg+QpTadZ+Id+BUqVUxHsvQTEYMBhGAVc0RBhAKUK3pdU1xFgMGgYXTGNsISIVvMnXks16i d01EuLP7WFNNJ0JyYTJvccIghgBjKWewJjzA4efChQUYCCuo4paxjURgwPjk4pTMOBWlUbSW WUrTcJUA6qlGSPuLwwuougrYOZZ2ua5gYDkeVMS4h1CqWE2GJdpc2Qc5pQ8TOI1n+SkV4VUe SwHtiyix7RZQDW+Qi2EUcRUpqIHuiuOAwJpzgaVCH2TRfRAI/wCCn+9fvPt+jklY/wBAhUDH cqsu8/xLC18nXuARwAslWQLUcsxdeSuUrftwo3OBbTwXC+2CLCbVAoN7UCV6iaBoPGfsxLBY DO1N5fmpf+EHUqEmykbGYRatFlZLAYs3qV6jEA4otCY6thitDuBy7sOOYlYdAzTeI/k+9D3s t1H2tRU3ZQsJrQygboJfDE4fFRQgdkOJcKF06LIuwxjkgfrfJBSPe4QYUcc1/k732iq4h0xl gqooXPLQx8aVA1aXH5fzHWoxgW9SpJhA6RNH4goAZMLTV4Qqfsd/azuEyhmCF1Tj0w0SrWzu OPEm/h8y2LnAqyjIEw3K/wDFBaCvANfVGeY5kV0bAW7laQAWNSirTEJYW+0wNlDfmK79Tlqn kFuGwxg+W3hEkfSFoYCGvAIUrLhQkVhjkEBTc3a2zXcOUY8S9VCxXmiUjYoxqOiMWjcjCKVW o80zCEdBdRQLud5QkVF/nUs5lmNjrOJYrjhX+RWLB2qdeDiMGAfAqoFo4gI+11QUCVCMMRcC QNVFY1vMxxmB53KUBnrwisCsysJJEsGWFs4zPL/eWdQ//9=9 --IUNj13u0A8R66622-- From dom@algor.co.uk Wed Jan 8 19:02:29 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jan 2003 19:02:29 +0000 (GMT) Received: from alg145.algor.co.uk ([IPv6:::ffff:62.254.210.145]:29197 "EHLO dmz.algor.co.uk") by linux-mips.org with ESMTP id ; Wed, 8 Jan 2003 19:02:29 +0000 Received: from alg158.algor.co.uk ([62.254.210.158] helo=olympia.algor.co.uk) by dmz.algor.co.uk with esmtp (Exim 3.35 #1 (Debian)) id 18WLbe-0004iw-00; Wed, 08 Jan 2003 19:11:14 +0000 Received: from arsenal.algor.co.uk ([192.168.192.197] ident=mail) by olympia.algor.co.uk with esmtp (Exim 3.36 #1 (Debian)) id 18WLSq-0006V1-00; Wed, 08 Jan 2003 19:02:08 +0000 Received: from dom by arsenal.algor.co.uk with local (Exim 3.35 #1 (Debian)) id 18WLSp-0003Zb-00; Wed, 08 Jan 2003 19:02:07 +0000 From: Dominic Sweetman MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Message-ID: <15900.30127.646847.937900@arsenal.algor.co.uk> Date: Wed, 8 Jan 2003 19:02:07 +0000 To: Ralf Baechle Cc: "Maciej W. Rozycki" , linux-mips@linux-mips.org Subject: Re: [patch] Use XKPHYS for 64-bit TLB flushes In-Reply-To: <20030108145953.B8396@linux-mips.org> References: <20030108145953.B8396@linux-mips.org> X-Mailer: VM 7.03 under 21.4 (patch 6) "Common Lisp" XEmacs Lucid X-MTUK-Scanner: Found to be clean X-MTUK-SpamCheck: not spam, SpamAssassin (score=-1.2, required 5, AWL, IN_REP_TO, QUOTED_EMAIL_TEXT, REFERENCES, SPAM_PHRASE_00_01) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1098 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dom@mips.com Precedence: bulk X-list: linux-mips > On Wed, Jan 08, 2003 at 02:27:05PM +0100, Maciej W. Rozycki wrote: > > > 32-bit R4k TLB flush functions use KSEG0 as an impossible (unmapped) VPN2 > > value for invalidated TLB entries. 64-bit ones use KSEG0 as well, but > > here KSEG0 is a valid XKSEG (mapped) value as it gets interpreted as > > 0xc00000ff80000000 when written into cp0.EntryHi. The correct impossible > > (unmapped) VPN2 value for the 64-bit mode is XKPHYS. > > That's a funny one. Historically the idea was to use KSEG0 because the > for KSEG0 the TLB is not used for translation. That already failed for > the Sibyte SB1 which is why we have to use different KSEG0 addresses for > each entry there. Amplification: some MIPS CPUs really hate having the same "virtual address" in more than one TLB entry. Some of MIPS Technologies' own cores are the same. It's probably better to use legal kuseg virtual addresses (but with the invalid bit set) for initialising TLBs. And to make them all different... -- Dominic Sweetman mailto:dom@mips.com From macro@ds2.pg.gda.pl Wed Jan 8 19:18:55 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jan 2003 19:18:56 +0000 (GMT) Received: from delta.ds2.pg.gda.pl ([IPv6:::ffff:213.192.72.1]:22251 "EHLO delta.ds2.pg.gda.pl") by linux-mips.org with ESMTP id ; Wed, 8 Jan 2003 19:18:55 +0000 Received: from localhost by delta.ds2.pg.gda.pl (8.9.3/8.9.3) with SMTP id UAA10656; Wed, 8 Jan 2003 20:18:50 +0100 (MET) Date: Wed, 8 Jan 2003 20:18:46 +0100 (MET) From: "Maciej W. Rozycki" To: Dominic Sweetman cc: Ralf Baechle , linux-mips@linux-mips.org Subject: Re: [patch] Use XKPHYS for 64-bit TLB flushes In-Reply-To: <15900.30127.646847.937900@arsenal.algor.co.uk> Message-ID: Organization: Technical University of Gdansk MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1099 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@ds2.pg.gda.pl Precedence: bulk X-list: linux-mips On Wed, 8 Jan 2003, Dominic Sweetman wrote: > It's probably better to use legal kuseg virtual addresses (but with I'd wait until there is an implementation that breaks with KSEG0 or XKPHYS addresses. Hopefully forever. > the invalid bit set) for initialising TLBs. And to make them all > different... They do are different: KSEG0+entry*0x2000, likewise for XKPHYS -- see the patch. -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + From uhler@mips.com Wed Jan 8 19:34:04 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jan 2003 19:34:05 +0000 (GMT) Received: from ftp.mips.com ([IPv6:::ffff:206.31.31.227]:451 "EHLO mx2.mips.com") by linux-mips.org with ESMTP id ; Wed, 8 Jan 2003 19:34:04 +0000 Received: from newman.mips.com (ns-dmz [206.31.31.225]) by mx2.mips.com (8.12.5/8.12.5) with ESMTP id h08JXH67023968; Wed, 8 Jan 2003 11:33:17 -0800 (PST) Received: from uhler-linux.mips.com (uhler-linux [192.168.11.222]) by newman.mips.com (8.9.3/8.9.0) with ESMTP id LAA15398; Wed, 8 Jan 2003 11:33:01 -0800 (PST) Received: from uhler-linux.mips.com (uhler@localhost) by uhler-linux.mips.com (8.11.2/8.9.3) with ESMTP id h08JX1F09754; Wed, 8 Jan 2003 11:33:01 -0800 Message-Id: <200301081933.h08JX1F09754@uhler-linux.mips.com> X-Authentication-Warning: uhler-linux.mips.com: uhler owned process doing -bs X-Mailer: exmh version 2.2 06/23/2000 with nmh-1.0.4 To: "Maciej W. Rozycki" cc: Dominic Sweetman , Ralf Baechle , linux-mips@linux-mips.org cc: uhler@mips.com Reply-To: uhler@mips.com Subject: Re: [patch] Use XKPHYS for 64-bit TLB flushes In-reply-to: Your message of "Wed, 08 Jan 2003 20:18:46 +0100." Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Wed, 08 Jan 2003 11:33:01 -0800 From: "Mike Uhler" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1100 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: uhler@mips.com Precedence: bulk X-list: linux-mips > > They do are different: KSEG0+entry*0x2000, likewise for XKPHYS -- see the > patch. This is precisely what we use for our internal testing (which is also exported to MIPS32 and MIPS64 architecture licensees) to initialize the TLB. I have not yet seen a case where this fails, and would be interested in hearing about any case where it does fail. /gmu -- =*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*= Michael Uhler, VP, Systems, Architecture, and Software Products MIPS Technologies, Inc. Email: uhler@mips.com Pager: uhler_p@mips.com 1225 Charleston Road Voice: (650)567-5025 FAX: (650)567-5225 Mountain View, CA 94043 Mobile: (650)868-6870 Admin: (650)567-5085 From ralf@linux-mips.org Wed Jan 8 19:44:22 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jan 2003 19:44:23 +0000 (GMT) Received: from p508B6BF1.dip.t-dialin.net ([IPv6:::ffff:80.139.107.241]:11996 "EHLO dea.linux-mips.net") by linux-mips.org with ESMTP id ; Wed, 8 Jan 2003 19:44:22 +0000 Received: (from ralf@localhost) by dea.linux-mips.net (8.11.6/8.11.6) id h08Ji8M28110; Wed, 8 Jan 2003 20:44:08 +0100 Date: Wed, 8 Jan 2003 20:44:08 +0100 From: Ralf Baechle To: Mike Uhler Cc: "Maciej W. Rozycki" , Dominic Sweetman , linux-mips@linux-mips.org Subject: Re: [patch] Use XKPHYS for 64-bit TLB flushes Message-ID: <20030108204408.A27888@linux-mips.org> References: <200301081933.h08JX1F09754@uhler-linux.mips.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5.1i In-Reply-To: <200301081933.h08JX1F09754@uhler-linux.mips.com>; from uhler@mips.com on Wed, Jan 08, 2003 at 11:33:01AM -0800 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1101 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, Jan 08, 2003 at 11:33:01AM -0800, Mike Uhler wrote: > > They do are different: KSEG0+entry*0x2000, likewise for XKPHYS -- see the > > patch. > > This is precisely what we use for our internal testing (which is also > exported to MIPS32 and MIPS64 architecture licensees) to initialize the > TLB. I have not yet seen a case where this fails, and would be interested > in hearing about any case where it does fail. We used to use just KSEG0 instead of KSEG0+entry*0x2000. That was running fine over years but had to be changed for the sake of two CPUs afair. There was some discussion on this list about this and I accepted the change by that time because Kevin imho correctly argued that the spec left it unspecified if an implementation is feeding addresses in an unmapped address space though the TLB. Ralf From macro@ds2.pg.gda.pl Wed Jan 8 20:11:52 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jan 2003 20:11:53 +0000 (GMT) Received: from delta.ds2.pg.gda.pl ([IPv6:::ffff:213.192.72.1]:21997 "EHLO delta.ds2.pg.gda.pl") by linux-mips.org with ESMTP id ; Wed, 8 Jan 2003 20:11:52 +0000 Received: from localhost by delta.ds2.pg.gda.pl (8.9.3/8.9.3) with SMTP id VAA11713; Wed, 8 Jan 2003 21:12:03 +0100 (MET) Date: Wed, 8 Jan 2003 21:12:03 +0100 (MET) From: "Maciej W. Rozycki" To: Ralf Baechle cc: Mike Uhler , Dominic Sweetman , linux-mips@linux-mips.org Subject: Re: [patch] Use XKPHYS for 64-bit TLB flushes In-Reply-To: <20030108204408.A27888@linux-mips.org> Message-ID: Organization: Technical University of Gdansk MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1102 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@ds2.pg.gda.pl Precedence: bulk X-list: linux-mips On Wed, 8 Jan 2003, Ralf Baechle wrote: > We used to use just KSEG0 instead of KSEG0+entry*0x2000. That was running > fine over years but had to be changed for the sake of two CPUs afair. There > was some discussion on this list about this and I accepted the change by that > time because Kevin imho correctly argued that the spec left it unspecified > if an implementation is feeding addresses in an unmapped address space > though the TLB. Well, like it or not, CAMs do not like multiple matches -- up to a physical damage even. So they should be avoided if possible. While KSEG0 won't match for any real address translation, there is a non-zero probability of executing a tlbp for it as a result of buggy code or execution gone wild (root running crashme?). -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + From gilad@riverhead.com Wed Jan 8 20:32:44 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 08 Jan 2003 20:32:45 +0000 (GMT) Received: from mxout1.netvision.net.il ([IPv6:::ffff:194.90.9.20]:17292 "EHLO mxout1.netvision.net.il") by linux-mips.org with ESMTP id ; Wed, 8 Jan 2003 20:32:44 +0000 Received: from Crusty ([62.0.78.173]) by mxout1.netvision.net.il (iPlanet Messaging Server 5.2 HotFix 1.08 (built Dec 6 2002)) with ESMTPA id <0H8E002TCX24WX@mxout1.netvision.net.il> for linux-mips@linux-mips.org; Wed, 08 Jan 2003 22:32:30 +0200 (IST) Date: Wed, 08 Jan 2003 22:15:19 +0200 From: Gilad Benjamini Subject: ksymoops and 64 bit mips To: linux-mips@linux-mips.org Message-id: MIME-version: 1.0 X-MIMEOLE: Produced By Microsoft MimeOLE V6.00.2800.1106 X-Mailer: Microsoft Outlook IMO, Build 9.0.2416 (9.0.2911.0) Content-type: text/plain; charset=windows-1255 Content-transfer-encoding: 7BIT Importance: Normal X-Priority: 3 (Normal) X-MSMail-priority: Normal Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1103 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: gilad@riverhead.com Precedence: bulk X-list: linux-mips I tried using ksymoops to analyze an oops on my 64 bit SMP mips kernel. I am running ksymoops on x86 platform. Initially I got a lot of garbage. Upgrdaing to ksymoops 2.4.5 , and using the --truncate=1 and -t elf32-little reduced the amount of garbage, but still all the output shown was "No symbol available". Any additional things I should do ? TIA From ralf@linux-mips.org Thu Jan 9 01:36:10 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jan 2003 01:36:11 +0000 (GMT) Received: from p508B6BF1.dip.t-dialin.net ([IPv6:::ffff:80.139.107.241]:15840 "EHLO dea.linux-mips.net") by linux-mips.org with ESMTP id ; Thu, 9 Jan 2003 01:36:10 +0000 Received: (from ralf@localhost) by dea.linux-mips.net (8.11.6/8.11.6) id h091a1a03540; Thu, 9 Jan 2003 02:36:01 +0100 Date: Thu, 9 Jan 2003 02:36:01 +0100 From: Ralf Baechle To: "Maciej W. Rozycki" Cc: Mike Uhler , Dominic Sweetman , linux-mips@linux-mips.org Subject: Re: [patch] Use XKPHYS for 64-bit TLB flushes Message-ID: <20030109023601.A1213@linux-mips.org> References: <20030108204408.A27888@linux-mips.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5.1i In-Reply-To: ; from macro@ds2.pg.gda.pl on Wed, Jan 08, 2003 at 09:12:03PM +0100 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1104 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, Jan 08, 2003 at 09:12:03PM +0100, Maciej W. Rozycki wrote: > Well, like it or not, CAMs do not like multiple matches -- up to a > physical damage even. So they should be avoided if possible. While KSEG0 > won't match for any real address translation, there is a non-zero > probability of executing a tlbp for it as a result of buggy code or > execution gone wild (root running crashme?). I'm told the TLB Shutdown bit in the R4000 is basically implemented as an overcurrent protection. That is on many chips even a hit on several entries won't cause a tlb shutdown until the matches do result in the TLB drawing more than a certain current. A tlbp on a KSEG0 address shouldn't happen. If it's attempted we already have worse problems. Ralf From lindahl@keyresearch.com Thu Jan 9 02:42:43 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jan 2003 02:42:43 +0000 (GMT) Received: from ppp-66-122-194-201.aonnetworks.com ([IPv6:::ffff:66.122.194.201]:23941 "EHLO localhost.localdomain") by linux-mips.org with ESMTP id ; Thu, 9 Jan 2003 02:42:43 +0000 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by localhost.localdomain (8.12.5/8.12.5) with ESMTP id h092jcDP002663 for ; Wed, 8 Jan 2003 18:45:38 -0800 Received: (from lindahl@localhost) by localhost.localdomain (8.12.5/8.12.5/Submit) id h092jcgi002661 for linux-mips@linux-mips.org; Wed, 8 Jan 2003 18:45:38 -0800 X-Authentication-Warning: localhost.localdomain: lindahl set sender to lindahl@keyresearch.com using -f Date: Wed, 8 Jan 2003 18:45:38 -0800 From: Greg Lindahl To: linux-mips@linux-mips.org Subject: IS_ERR() in linux32.c Message-ID: <20030109024537.GA2653@wumpus.internal.keyresearch.com> Mail-Followup-To: linux-mips@linux-mips.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.4i Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1105 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: lindahl@keyresearch.com Precedence: bulk X-list: linux-mips The file arch/mips64/kernel/linux32.c has a bunch of uses of IS_ERR(), some against pointers (which is what it's designed to be used with), and some against integers. I see a patch posted in 2001 which fixes that, but it was also fixing other things and didn't get applied. Anyone have a comment? This is about 1/3 of the remaining warnings when I do "make -s" on the kernel. -- greg From giladb@riverhead.com Thu Jan 9 07:27:20 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jan 2003 07:27:21 +0000 (GMT) Received: from mxout3.netvision.net.il ([IPv6:::ffff:194.90.9.24]:51913 "EHLO mxout3.netvision.net.il") by linux-mips.org with ESMTP id ; Thu, 9 Jan 2003 07:27:20 +0000 Received: from mail.riverhead.com ([194.90.64.163]) by mxout3.netvision.net.il (iPlanet Messaging Server 5.2 HotFix 1.08 (built Dec 6 2002)) with ESMTP id <0H8F00HKNRDCAT@mxout3.netvision.net.il> for linux-mips@linux-mips.org; Thu, 09 Jan 2003 09:27:13 +0200 (IST) Received: from Crusty (comp76.wanwall.com [10.0.0.76]) by mail.riverhead.com (8.11.0/8.11.0) with SMTP id h097RhY08576 for ; Thu, 09 Jan 2003 09:27:43 +0200 Date: Thu, 09 Jan 2003 09:09:19 +0200 From: Gilad Benjamini Subject: kgdb & mips-linux To: linux-mips@linux-mips.org Message-id: MIME-version: 1.0 X-MIMEOLE: Produced By Microsoft MimeOLE V6.00.2800.1106 X-Mailer: Microsoft Outlook IMO, Build 9.0.2416 (9.0.2911.0) Content-type: text/plain; charset=windows-1255 Content-transfer-encoding: 7BIT Importance: Normal X-Priority: 3 (Normal) X-MSMail-priority: Normal X-RAV-AntiVirus: This e-mail has been scanned for viruses on host: mail.riverhead.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1106 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: giladb@riverhead.com Precedence: bulk X-list: linux-mips After many efforts I was able to start a succesfull kgdb session. However, each time I tell gdb to "continue", it receives a SIGTRAP in process.c. I was told that this is probably a yet un-resolved mips SMP issue. Is this a known issue ? Any workarounds or solutions ? TIA From ralf@linux-mips.org Thu Jan 9 13:38:30 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jan 2003 13:38:31 +0000 (GMT) Received: from p508B6BF1.dip.t-dialin.net ([IPv6:::ffff:80.139.107.241]:3818 "EHLO dea.linux-mips.net") by linux-mips.org with ESMTP id ; Thu, 9 Jan 2003 13:38:30 +0000 Received: (from ralf@localhost) by dea.linux-mips.net (8.11.6/8.11.6) id h09DcMK24074; Thu, 9 Jan 2003 14:38:22 +0100 Date: Thu, 9 Jan 2003 14:38:22 +0100 From: Ralf Baechle To: Gilad Benjamini Cc: linux-mips@linux-mips.org Subject: Re: ksymoops and 64 bit mips Message-ID: <20030109143822.A23928@linux-mips.org> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5.1i In-Reply-To: ; from gilad@riverhead.com on Wed, Jan 08, 2003 at 10:15:19PM +0200 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1107 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Wed, Jan 08, 2003 at 10:15:19PM +0200, Gilad Benjamini wrote: > Initially I got a lot of garbage. > Upgrdaing to ksymoops 2.4.5 , and using the --truncate=1 and > -t elf32-little reduced > the amount of garbage, but still all the output shown > was "No symbol available". > > Any additional things I should do ? Possibly your ksymoops is get confused by the System.map file. The vmlinux file is a 32-bit ELF file but the System.map file contains the addresses sign-extended to 64-bit. As a bandaid you can just chop off the high 32-bits of all addresses in System.map. Ralf From macro@ds2.pg.gda.pl Thu Jan 9 14:03:06 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jan 2003 14:03:07 +0000 (GMT) Received: from delta.ds2.pg.gda.pl ([IPv6:::ffff:213.192.72.1]:61335 "EHLO delta.ds2.pg.gda.pl") by linux-mips.org with ESMTP id ; Thu, 9 Jan 2003 14:03:06 +0000 Received: from localhost by delta.ds2.pg.gda.pl (8.9.3/8.9.3) with SMTP id PAA01439; Thu, 9 Jan 2003 15:03:16 +0100 (MET) Date: Thu, 9 Jan 2003 15:03:14 +0100 (MET) From: "Maciej W. Rozycki" To: Ralf Baechle cc: Gilad Benjamini , linux-mips@linux-mips.org Subject: Re: ksymoops and 64 bit mips In-Reply-To: <20030109143822.A23928@linux-mips.org> Message-ID: Organization: Technical University of Gdansk MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1108 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@ds2.pg.gda.pl Precedence: bulk X-list: linux-mips On Thu, 9 Jan 2003, Ralf Baechle wrote: > > Initially I got a lot of garbage. > > Upgrdaing to ksymoops 2.4.5 , and using the --truncate=1 and > > -t elf32-little reduced > > the amount of garbage, but still all the output shown > > was "No symbol available". > > > > Any additional things I should do ? > > Possibly your ksymoops is get confused by the System.map file. The vmlinux > file is a 32-bit ELF file but the System.map file contains the addresses > sign-extended to 64-bit. As a bandaid you can just chop off the high > 32-bits of all addresses in System.map. Recent versions of ksymoops contain code to handle 64-bit MIPS flexibly and are expected to take care of address aliases. They don't works very well, though, and I've done a few fixes. They are available in a ksymoops 2.4.8 package at my site and hopefully will be applied in a future release. Anyway the cross-ksymoops case referred by Gilad is tricky -- you need to build ksymoops linking against an appropriate BFD library, i.e. one that supports a MIPS64 target. Additionally MIPS64-specific nm and objdump programs have to be available to that ksymoops binary (cf. KSYMOOPS_NM and KSYMOOPS_OBJDUMP environment variables). For detailed information on using a cross-setup see the ksymoops documentation. -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + From gilad@riverhead.com Thu Jan 9 14:06:25 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jan 2003 14:06:26 +0000 (GMT) Received: from mxout1.netvision.net.il ([IPv6:::ffff:194.90.9.20]:20975 "EHLO mxout1.netvision.net.il") by linux-mips.org with ESMTP id ; Thu, 9 Jan 2003 14:06:25 +0000 Received: from mail.riverhead.com ([194.90.64.163]) by mxout1.netvision.net.il (iPlanet Messaging Server 5.2 HotFix 1.08 (built Dec 6 2002)) with ESMTP id <0H8G0043N9UBNX@mxout1.netvision.net.il>; Thu, 09 Jan 2003 16:06:12 +0200 (IST) Received: from GILAD (comp113.wanwall.com [10.0.0.113]) by mail.riverhead.com (8.11.0/8.11.0) with SMTP id h09E6kY17405; Thu, 09 Jan 2003 16:06:46 +0200 Date: Thu, 09 Jan 2003 16:01:01 +0200 From: Gilad Benjamini Subject: RE: ksymoops and 64 bit mips In-reply-to: <20030109143822.A23928@linux-mips.org> To: 'Ralf Baechle' , Gilad Benjamini Cc: linux-mips@linux-mips.org Message-id: <001801c2b7e7$8b3c04d0$7100000a@riverhead.com> MIME-version: 1.0 X-MIMEOLE: Produced By Microsoft MimeOLE V6.00.2800.1106 X-Mailer: Microsoft Outlook CWS, Build 9.0.2416 (9.0.2911.0) Content-type: text/plain; charset=us-ascii Content-transfer-encoding: 7BIT Importance: Normal X-Priority: 3 (Normal) X-MSMail-priority: Normal X-RAV-AntiVirus: This e-mail has been scanned for viruses on host: mail.riverhead.com Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1109 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: gilad@riverhead.com Precedence: bulk X-list: linux-mips Au contraire. System.map has 32 bit addresses, which I tried to sign extended with "ffffffff" (the wonders of sed), but that didn't help. > -----Original Message----- > From: Ralf Baechle [mailto:ralf@linux-mips.org] > Sent: Thursday, January 09, 2003 3:38 PM > To: Gilad Benjamini > Cc: linux-mips@linux-mips.org > Subject: Re: ksymoops and 64 bit mips > > > On Wed, Jan 08, 2003 at 10:15:19PM +0200, Gilad Benjamini wrote: > > > Initially I got a lot of garbage. > > Upgrdaing to ksymoops 2.4.5 , and using the --truncate=1 and > > -t elf32-little reduced > > the amount of garbage, but still all the output shown > > was "No symbol available". > > > > Any additional things I should do ? > > Possibly your ksymoops is get confused by the System.map > file. The vmlinux > file is a 32-bit ELF file but the System.map file contains > the addresses > sign-extended to 64-bit. As a bandaid you can just chop off the high > 32-bits of all addresses in System.map. > > Ralf > From gilad@riverhead.com Thu Jan 9 14:06:45 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jan 2003 14:06:46 +0000 (GMT) Received: from mxout1.netvision.net.il ([IPv6:::ffff:194.90.9.20]:20975 "EHLO mxout1.netvision.net.il") by linux-mips.org with ESMTP id ; Thu, 9 Jan 2003 14:06:26 +0000 Received: from mail.riverhead.com ([194.90.64.163]) by mxout1.netvision.net.il (iPlanet Messaging Server 5.2 HotFix 1.08 (built Dec 6 2002)) with ESMTP id <0H8G0043N9UBNX@mxout1.netvision.net.il>; Thu, 09 Jan 2003 16:06:14 +0200 (IST) Received: from exchange.riverhead.com (exchange.wanwall.com [10.0.0.10]) by mail.riverhead.com (8.11.0/8.11.0) with ESMTP id h09E6mY17412; Thu, 09 Jan 2003 16:06:48 +0200 Date: Thu, 09 Jan 2003 16:01:03 +0200 From: Gilad Benjamini Subject: RE: ksymoops and 64 bit mips To: Ralf Baechle , Gilad Benjamini Cc: linux-mips@linux-mips.org Message-id: <328392AA673C0A49B54DABA457E37DAA458D@exchange.riverhead.com> MIME-version: 1.0 X-MIMEOLE: Produced By Microsoft Exchange V6.0.4417.0 Content-type: text/plain; charset=us-ascii Content-transfer-encoding: 7BIT Content-class: urn:content-classes:message Thread-topic: ksymoops and 64 bit mips Thread-index: AcK354pUgK49iMd+ShSpD+xdCoGTlA== X-RAV-AntiVirus: This e-mail has been scanned for viruses on host: mail.riverhead.com X-MS-Has-Attach: X-MS-TNEF-Correlator: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1110 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: gilad@riverhead.com Precedence: bulk X-list: linux-mips Au contraire. System.map has 32 bit addresses, which I tried to sign extended with "ffffffff" (the wonders of sed), but that didn't help. > -----Original Message----- > From: Ralf Baechle [mailto:ralf@linux-mips.org] > Sent: Thursday, January 09, 2003 3:38 PM > To: Gilad Benjamini > Cc: linux-mips@linux-mips.org > Subject: Re: ksymoops and 64 bit mips > > > On Wed, Jan 08, 2003 at 10:15:19PM +0200, Gilad Benjamini wrote: > > > Initially I got a lot of garbage. > > Upgrdaing to ksymoops 2.4.5 , and using the --truncate=1 and > > -t elf32-little reduced > > the amount of garbage, but still all the output shown > > was "No symbol available". > > > > Any additional things I should do ? > > Possibly your ksymoops is get confused by the System.map > file. The vmlinux > file is a 32-bit ELF file but the System.map file contains > the addresses > sign-extended to 64-bit. As a bandaid you can just chop off the high > 32-bits of all addresses in System.map. > > Ralf > From iilangov@cisco.com Thu Jan 9 15:18:29 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jan 2003 15:18:30 +0000 (GMT) Received: from sj-msg-core-2.cisco.com ([IPv6:::ffff:171.70.145.30]:14259 "EHLO sj-msg-core-2.cisco.com") by linux-mips.org with ESMTP id ; Thu, 9 Jan 2003 15:18:29 +0000 Received: from cisco.com (megha.cisco.com [192.122.173.140]) by sj-msg-core-2.cisco.com (8.12.2/8.12.2) with ESMTP id h09FIRfm017781; Thu, 9 Jan 2003 07:18:27 -0800 (PST) Received: from IILANGOVW2K ([10.77.139.167]) by cisco.com (8.8.8/2.6/Cisco List Logging/8.8.8) with SMTP id UAA05081; Thu, 9 Jan 2003 20:47:23 +0530 (IST) Message-ID: <040b01c2b7f2$56ff0f40$a78b4d0a@apac.cisco.com> From: "Indukumar Ilangovan" To: , Subject: [OT] cross-compiler problem Date: Thu, 9 Jan 2003 20:48:18 +0530 MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2600.0000 x-mimeole: Produced By Microsoft MimeOLE V6.00.2600.0000 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1111 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: iilangov@cisco.com Precedence: bulk X-list: linux-mips Hi All, I tried to build cross compiler on Red Hat Linux Kernel 2.4.2-2 on an i686. I use binutils-2.13, gcc-3.2, glibc-2.2.5, glibc-2.2.5-mips-build-gmon.diff, glibc-linuxthreads.tar.gz. I followed the instructions from http://www.ltc.com/~brad/mips/mipsel-linux-cross-toolchain-building.txt I installed binutils without any problems. While compiling glibc2.2.5 I get the following error. ../sysdeps/unix/syscall.S: Assembler messages: ../sysdeps/unix/syscall.S:28: Error: absolute expression required `li' make[2]: *** [/home/iilangov/crossGCC/mips/mips-glibc/misc/syscall.o] Error 1 make[2]: Leaving directory `/home/iilangov/crossGCC/mips/glibc-2.2.5/misc' make[1]: *** [misc/subdir_lib] Error 2 make[1]: Leaving directory `/home/iilangov/crossGCC/mips/glibc-2.2.5' make: *** [all] Error 2 I have "asm/unistd.h" in the include path, still this problem is happening. Do you guys have any clue ? Thanks in Advance ! Indu ----- Original Message ----- From: "Alexandre Oliva" To: "Khantharat Anekboon" Cc: Sent: Saturday, December 28, 2002 12:22 PM Subject: Re: cross-compiler problem | On Dec 28, 2002, "Khantharat Anekboon" wrote: | | > ../sysdeps/unix/syscall.S:28: Error: absolute expression required 'li' | | Looks like you're missing the kernel headers where the syscall numbers | are defined. (.../include/asm/unistd.h) | | -- | Alexandre Oliva Enjoy Guarana', see http://www.ic.unicamp.br/~oliva/ | Red Hat GCC Developer aoliva@{redhat.com, gcc.gnu.org} | CS PhD student at IC-Unicamp oliva@{lsd.ic.unicamp.br, gnu.org} | Free Software Evangelist Professional serial bug killer | | ------ | Want more information? See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/ | Want to unsubscribe? Send a note to crossgcc-unsubscribe@sources.redhat.com ******************************************************** Indukumar Ilangovan HCL-Cisco Offshore development center, 49-50, Nelson Manickam Road, Chennai - 600029 , India . TEL: +91-44-2374 1939 x 2215 FAX: +91-44-3741038 Email :iilangov@cisco.com From krishnakumar@naturesoft.net Thu Jan 9 15:32:19 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jan 2003 17:06:27 +0000 (GMT) Received: from [IPv6:::ffff:203.145.184.221] ([IPv6:::ffff:203.145.184.221]:29968 "EHLO naturesoft.net") by linux-mips.org with ESMTP id convert rfc822-to-8bit; Thu, 9 Jan 2003 15:32:19 +0000 Received: from [192.168.0.15] (helo=krishna.royalchallenge.com) by naturesoft.net with esmtp (Exim 3.35 #1) id 18Weem-0000qg-00; Thu, 09 Jan 2003 21:01:44 +0530 Content-Type: text/plain; charset="iso-8859-1" From: "Krishnakumar. R" Reply-To: krishnakumar@naturesoft.net To: "Indukumar Ilangovan" Subject: Re: [OT] cross-compiler problem Date: Thu, 9 Jan 2003 21:01:12 +0530 User-Agent: KMail/1.4.1 References: <040b01c2b7f2$56ff0f40$a78b4d0a@apac.cisco.com> In-Reply-To: <040b01c2b7f2$56ff0f40$a78b4d0a@apac.cisco.com> Cc: MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT Message-Id: <200301092101.12871.krishnakumar@naturesoft.net> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1112 X-Approved-By: ralf@linux-mips.org X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: krishnakumar@naturesoft.net Precedence: bulk X-list: linux-mips Hi, Have you changed the /usr/src/linux/include/asm link to point to the asm-mips. IMHO you should do it. Hope it helps Regards KK On Thursday 09 January 2003 08:48 pm, you wrote: > Hi All, > > I tried to build cross compiler on Red Hat Linux > Kernel 2.4.2-2 on an i686. > I use binutils-2.13, gcc-3.2, glibc-2.2.5, > glibc-2.2.5-mips-build-gmon.diff, glibc-linuxthreads.tar.gz. > I followed the instructions from > http://www.ltc.com/~brad/mips/mipsel-linux-cross-toolchain-building.txt > > I installed binutils without any problems. > > While compiling glibc2.2.5 I get the following error. > > ../sysdeps/unix/syscall.S: Assembler messages: > ../sysdeps/unix/syscall.S:28: Error: absolute expression required `li' > make[2]: *** [/home/iilangov/crossGCC/mips/mips-glibc/misc/syscall.o] Error > 1 > make[2]: Leaving directory `/home/iilangov/crossGCC/mips/glibc-2.2.5/misc' > make[1]: *** [misc/subdir_lib] Error 2 > make[1]: Leaving directory `/home/iilangov/crossGCC/mips/glibc-2.2.5' > make: *** [all] Error 2 > > I have "asm/unistd.h" in the include path, still this problem is happening. > Do you guys have any clue ? > > Thanks in Advance ! > Indu > > > ----- Original Message ----- > From: "Alexandre Oliva" > To: "Khantharat Anekboon" > Cc: > Sent: Saturday, December 28, 2002 12:22 PM > Subject: Re: cross-compiler problem > > | On Dec 28, 2002, "Khantharat Anekboon" wrote: > | > ../sysdeps/unix/syscall.S:28: Error: absolute expression required 'li' > | > | Looks like you're missing the kernel headers where the syscall numbers > | are defined. (.../include/asm/unistd.h) > | > | -- > | Alexandre Oliva Enjoy Guarana', see http://www.ic.unicamp.br/~oliva/ > | Red Hat GCC Developer aoliva@{redhat.com, gcc.gnu.org} > | CS PhD student at IC-Unicamp oliva@{lsd.ic.unicamp.br, gnu.org} > | Free Software Evangelist Professional serial bug killer > | > | ------ > | Want more information? See the CrossGCC FAQ, > > http://www.objsw.com/CrossGCC/ > > | Want to unsubscribe? Send a note to > > crossgcc-unsubscribe@sources.redhat.com > > ******************************************************** > Indukumar Ilangovan > HCL-Cisco Offshore development center, > 49-50, Nelson Manickam Road, Chennai - 600029 , India . > TEL: +91-44-2374 1939 x 2215 FAX: +91-44-3741038 > Email :iilangov@cisco.com From cvieira@mediaprimer.pt Thu Jan 9 17:32:39 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jan 2003 17:32:39 +0000 (GMT) Received: from a213-22-99-250.netcabo.pt ([IPv6:::ffff:213.22.99.250]:62725 "EHLO orion.mediaprimer.pt") by linux-mips.org with ESMTP id ; Thu, 9 Jan 2003 17:32:39 +0000 Received: from pc03.mediaprimer.pt ([192.168.0.32]) by orion.mediaprimer.pt (8.12.6/8.12.6) with ESMTP id h09J8IUE013154 for ; Thu, 9 Jan 2003 19:08:41 GMT Message-Id: <5.0.2.1.2.20030109172726.02a694e0@192.168.0.1> X-Sender: cvieira@192.168.0.1 X-Mailer: QUALCOMM Windows Eudora Version 5.0.2 Date: Thu, 09 Jan 2003 17:29:03 +0000 To: linux-mips@linux-mips.org From: Carlos Vieira Subject: SGI INDY and RedHat Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; format=flowed Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1113 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: cvieira@mediaprimer.pt Precedence: bulk X-list: linux-mips Hi, I have an SGI Indy with R5000 MIPS processor and with IRIX OS. I want to make this machine a DNS Server with RedHat for MIPS processor. How can i install RedHat in this machine without using IRIX that is installed. Netboot at machine boot time is a good option (using bootp server for downloading kernel and then get the rest of the OS installation)? Thanks in advance Carlos From carstenl@linux-mips.org Thu Jan 9 20:09:12 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 09 Jan 2003 20:09:13 +0000 (GMT) Received: from cpe.atm2-0-1031142.0x50c4469e.albnxx9.customer.tele.dk ([IPv6:::ffff:80.196.70.158]:33285 "EHLO localhost.localdomain") by linux-mips.org with ESMTP id ; Thu, 9 Jan 2003 20:09:12 +0000 Received: from linux-mips.org (localhost.localdomain [127.0.0.1]) by localhost.localdomain (8.11.2/8.11.2) with ESMTP id h09KA2L01409; Thu, 9 Jan 2003 21:10:02 +0100 Message-ID: <3E1DD719.2464A916@linux-mips.org> Date: Thu, 09 Jan 2003 21:10:01 +0100 From: Carsten Langgaard X-Mailer: Mozilla 4.76 [en] (X11; U; Linux 2.4.20 i686) X-Accept-Language: en MIME-Version: 1.0 To: Ralf Baechle CC: Mike Uhler , "Maciej W. Rozycki" , Dominic Sweetman , linux-mips@linux-mips.org Subject: Re: [patch] Use XKPHYS for 64-bit TLB flushes References: <200301081933.h08JX1F09754@uhler-linux.mips.com> <20030108204408.A27888@linux-mips.org> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1114 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: carstenl@linux-mips.org Precedence: bulk X-list: linux-mips Ralf Baechle wrote: > On Wed, Jan 08, 2003 at 11:33:01AM -0800, Mike Uhler wrote: > > > > They do are different: KSEG0+entry*0x2000, likewise for XKPHYS -- see the > > > patch. > > > > This is precisely what we use for our internal testing (which is also > > exported to MIPS32 and MIPS64 architecture licensees) to initialize the > > TLB. I have not yet seen a case where this fails, and would be interested > > in hearing about any case where it does fail. > > We used to use just KSEG0 instead of KSEG0+entry*0x2000. That was running > fine over years but had to be changed for the sake of two CPUs afair. There > was some discussion on this list about this and I accepted the change by that > time because Kevin imho correctly argued that the spec left it unspecified > if an implementation is feeding addresses in an unmapped address space > though the TLB. > All MIPS's CPUs need these unique TLB entries otherwise you get a machine check error. Inspired by Kevin Kissell's changes to openBSD, I made the above change (KSEG0+entry*0x2000) to the TLB routine in linux. It was done when we first tried to boot linux on the MIPS 4Kc CPU, a couple of years ago. > > Ralf From atulsrivastava9@rediffmail.com Fri Jan 10 10:18:14 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 10:18:15 +0000 (GMT) Received: from webmail29.rediffmail.com ([IPv6:::ffff:203.199.83.39]:16315 "HELO rediffmail.com") by linux-mips.org with SMTP id ; Fri, 10 Jan 2003 10:18:14 +0000 Received: (qmail 7451 invoked by uid 510); 10 Jan 2003 10:14:03 -0000 Date: 10 Jan 2003 10:14:03 -0000 Message-ID: <20030110101403.7450.qmail@webmail29.rediffmail.com> Received: from unknown (203.196.179.98) by rediffmail.com via HTTP; 10 jan 2003 10:14:03 -0000 MIME-Version: 1.0 From: "atul srivastava" Reply-To: "atul srivastava" To: linux-mips@linux-mips.org Subject: handling of s-record images by bootloader Content-type: text/plain; format=flowed Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1115 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: atulsrivastava9@rediffmail.com Precedence: bulk X-list: linux-mips Hello . A quick question.. I have developed a primitive bootloader for custom board, that is successfuly doing the board bringup and loads linux os image currently through serial link (kermit) only. network link is also likely to be up soon. but through serial it loads kernel image only in raw binary format. now i want to extend this for s-record images as well.. I am umware that, how differently s-record image need to be handled..? i just need some idea or if possible any example code for that.. Best Reagards, Atul From atulsrivastava9@rediffmail.com Fri Jan 10 10:20:59 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 10:21:00 +0000 (GMT) Received: from webmail27.rediffmail.com ([IPv6:::ffff:203.199.83.37]:32689 "HELO rediffmail.com") by linux-mips.org with SMTP id ; Fri, 10 Jan 2003 10:20:59 +0000 Received: (qmail 27154 invoked by uid 510); 10 Jan 2003 10:17:15 -0000 Date: 10 Jan 2003 10:17:15 -0000 Message-ID: <20030110101715.27153.qmail@webmail27.rediffmail.com> Received: from unknown (203.196.179.98) by rediffmail.com via HTTP; 10 jan 2003 10:17:15 -0000 MIME-Version: 1.0 From: "atul srivastava" Reply-To: "atul srivastava" To: linux-mips@linux-mips.org Subject: handling of s-record images by bootloader Content-type: text/plain; format=flowed Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1116 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: atulsrivastava9@rediffmail.com Precedence: bulk X-list: linux-mips Hello . A quick question.. I have developed a primitive bootloader for custom board, that is successfuly doing the board bringup and loads linux os image currently through serial link (kermit) only. network link is also likely to be up soon. but through serial it loads kernel image only in raw binary format. now i want to extend this for s-record images as well.. I am umware that, how differently s-record image need to be handled..? i just need some idea or if possible any example code for that.. Best Reagards, Atul From Jon_Burgess@eur.3com.com Fri Jan 10 10:21:58 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 10:21:59 +0000 (GMT) Received: from ip-161-71-171-238.corp-eur.3com.com ([IPv6:::ffff:161.71.171.238]:4807 "EHLO columba.www.eur.3com.com") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 10:21:58 +0000 Received: from toucana.eur.3com.com (toucana.EUR.3Com.COM [140.204.220.50]) by columba.www.eur.3com.com with ESMTP id h0AANYNS006441; Fri, 10 Jan 2003 10:23:34 GMT Received: from notesmta.eur.3com.com (eurmta1.EUR.3Com.COM [140.204.220.206]) by toucana.eur.3com.com with SMTP id h0AANKQ03089; Fri, 10 Jan 2003 10:23:20 GMT Received: by notesmta.eur.3com.com(Lotus SMTP MTA v4.6.3 (733.2 10-16-1998)) id 80256CAA.0038F253 ; Fri, 10 Jan 2003 10:22:00 +0000 X-Lotus-FromDomain: 3COM From: "Jon Burgess" To: "atul srivastava" cc: linux-mips@linux-mips.org Message-ID: <80256CAA.0038F181.00@notesmta.eur.3com.com> Date: Fri, 10 Jan 2003 10:21:42 +0000 Subject: Re: handling of s-record images by bootloader Mime-Version: 1.0 Content-type: text/plain; charset=us-ascii Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1117 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: Jon_Burgess@eur.3com.com Precedence: bulk X-list: linux-mips > I am umware that, how differently s-record image need > to be handled..? > i just need some idea or if possible any example code for that.. Have you tried looking at binutils? objcopy can convert Binary<->S-Record Jon From Jon_Burgess@eur.3com.com Fri Jan 10 12:36:10 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 12:36:10 +0000 (GMT) Received: from ip-161-71-171-238.corp-eur.3com.com ([IPv6:::ffff:161.71.171.238]:18922 "EHLO columba.www.eur.3com.com") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 12:36:10 +0000 Received: from toucana.eur.3com.com (toucana.EUR.3Com.COM [140.204.220.50]) by columba.www.eur.3com.com with ESMTP id h0ACbcNS017223; Fri, 10 Jan 2003 12:37:44 GMT Received: from notesmta.eur.3com.com (eurmta1.EUR.3Com.COM [140.204.220.206]) by toucana.eur.3com.com with SMTP id h0ACbQQ17121; Fri, 10 Jan 2003 12:37:26 GMT Received: by notesmta.eur.3com.com(Lotus SMTP MTA v4.6.3 (733.2 10-16-1998)) id 80256CAA.00453B66 ; Fri, 10 Jan 2003 12:36:11 +0000 X-Lotus-FromDomain: 3COM From: "Jon Burgess" To: "atul srivastava" cc: linux-mips@linux-mips.org Message-ID: <80256CAA.00453946.00@notesmta.eur.3com.com> Date: Fri, 10 Jan 2003 12:33:13 +0000 Subject: Re: handling of s-record images by bootloader Mime-Version: 1.0 Content-type: text/plain; charset=us-ascii Content-Disposition: inline Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1118 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: Jon_Burgess@eur.3com.com Precedence: bulk X-list: linux-mips atul srivastava wrote: > I am umware that, how differently s-record image need > to be handled..? > i just need some idea or if possible any example code for that.. On second thoughts the binutils code is probably rather large. You could try the pmon source http://www.carmel.com/pmon/pmon.tgz pmon/tools/rdsrec.c might do what you want. Jon From macro@ds2.pg.gda.pl Fri Jan 10 12:37:04 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 12:37:05 +0000 (GMT) Received: from delta.ds2.pg.gda.pl ([IPv6:::ffff:213.192.72.1]:20939 "EHLO delta.ds2.pg.gda.pl") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 12:37:04 +0000 Received: from localhost by delta.ds2.pg.gda.pl (8.9.3/8.9.3) with SMTP id NAA24336; Fri, 10 Jan 2003 13:37:14 +0100 (MET) Date: Fri, 10 Jan 2003 13:37:12 +0100 (MET) From: "Maciej W. Rozycki" To: Ralf Baechle cc: linux-mips@linux-mips.org Subject: [patch] R4k cache code synchronization Message-ID: Organization: Technical University of Gdansk MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1119 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@ds2.pg.gda.pl Precedence: bulk X-list: linux-mips Ralf, Here are some bits to synchronize c-r4k.c across ports. There are no functional changes, at least no intended ones. OK to apply? I can't see any need for flush_cache_l1() and flush_cache_l2(). I'd like to remove them. A single flush_cache_all() seems sufficient for our needs. Any objections? Maciej -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + patch-mips-2.4.20-pre6-20030107-mips-c-r4k-sync-0 diff -up --recursive --new-file linux-mips-2.4.20-pre6-20030107.macro/arch/mips/mm/c-r4k.c linux-mips-2.4.20-pre6-20030107/arch/mips/mm/c-r4k.c --- linux-mips-2.4.20-pre6-20030107.macro/arch/mips/mm/c-r4k.c 2002-12-20 03:56:50.000000000 +0000 +++ linux-mips-2.4.20-pre6-20030107/arch/mips/mm/c-r4k.c 2003-01-09 22:23:33.000000000 +0000 @@ -948,12 +948,13 @@ static void r4k_flush_icache_page_p(stru static void r4k_dma_cache_wback_inv_pc(unsigned long addr, unsigned long size) { unsigned long end, a; - unsigned int flags; if (size >= dcache_size) { flush_cache_all(); } else { #ifdef R4600_V2_HIT_CACHEOP_WAR + unsigned long flags; + /* Workaround for R4600 bug. See comment in . */ local_irq_save(flags); *(volatile unsigned long *)KSEG1; @@ -962,7 +963,7 @@ static void r4k_dma_cache_wback_inv_pc(u a = addr & ~(dc_lsize - 1); end = (addr + size - 1) & ~(dc_lsize - 1); while (1) { - flush_dcache_line(a); /* Hit_Writeback_Inv_D */ + flush_dcache_line(a); /* Hit_Writeback_Inv_D */ if (a == end) break; a += dc_lsize; } @@ -970,6 +971,7 @@ static void r4k_dma_cache_wback_inv_pc(u local_irq_restore(flags); #endif } + bc_wback_inv(addr, size); } @@ -994,12 +996,13 @@ static void r4k_dma_cache_wback_inv_sc(u static void r4k_dma_cache_inv_pc(unsigned long addr, unsigned long size) { unsigned long end, a; - unsigned int flags; if (size >= dcache_size) { flush_cache_all(); } else { #ifdef R4600_V2_HIT_CACHEOP_WAR + unsigned long flags; + /* Workaround for R4600 bug. See comment in . */ local_irq_save(flags); *(volatile unsigned long *)KSEG1; @@ -1008,7 +1011,7 @@ static void r4k_dma_cache_inv_pc(unsigne a = addr & ~(dc_lsize - 1); end = (addr + size - 1) & ~(dc_lsize - 1); while (1) { - flush_dcache_line(a); /* Hit_Writeback_Inv_D */ + flush_dcache_line(a); /* Hit_Writeback_Inv_D */ if (a == end) break; a += dc_lsize; } @@ -1016,6 +1019,7 @@ static void r4k_dma_cache_inv_pc(unsigne local_irq_restore(flags); #endif } + bc_inv(addr, size); } @@ -1031,7 +1035,7 @@ static void r4k_dma_cache_inv_sc(unsigne a = addr & ~(sc_lsize - 1); end = (addr + size - 1) & ~(sc_lsize - 1); while (1) { - flush_scache_line(a); /* Hit_Writeback_Inv_SD */ + flush_scache_line(a); /* Hit_Writeback_Inv_SD */ if (a == end) break; a += sc_lsize; } @@ -1232,10 +1236,10 @@ static void __init setup_noscache_funcs( _flush_cache_page = r4k_flush_cache_page_d32i32; break; } - ___flush_cache_all = _flush_cache_all; - _flush_icache_page = r4k_flush_icache_page_p; + ___flush_cache_all = _flush_cache_all; + _dma_cache_wback_inv = r4k_dma_cache_wback_inv_pc; _dma_cache_wback = r4k_dma_cache_wback_inv_pc; _dma_cache_inv = r4k_dma_cache_inv_pc; @@ -1317,8 +1321,10 @@ static void __init setup_scache_funcs(vo _copy_page = r4k_copy_page_s128; break; } - ___flush_cache_all = _flush_cache_all; _flush_icache_page = r4k_flush_icache_page_s; + + ___flush_cache_all = _flush_cache_all; + _dma_cache_wback_inv = r4k_dma_cache_wback_inv_sc; _dma_cache_wback = r4k_dma_cache_wback_inv_sc; _dma_cache_inv = r4k_dma_cache_inv_sc; @@ -1373,10 +1379,10 @@ void __init ld_mmu_r4xx0(void) } _flush_cache_sigtramp = r4k_flush_cache_sigtramp; - _flush_icache_range = r4k_flush_icache_range; /* Ouch */ if ((read_c0_prid() & 0xfff0) == 0x2020) { _flush_cache_sigtramp = r4600v20k_flush_cache_sigtramp; } + _flush_icache_range = r4k_flush_icache_range; /* Ouch */ __flush_cache_all(); } diff -up --recursive --new-file linux-mips-2.4.20-pre6-20030107.macro/arch/mips64/mm/c-r4k.c linux-mips-2.4.20-pre6-20030107/arch/mips64/mm/c-r4k.c --- linux-mips-2.4.20-pre6-20030107.macro/arch/mips64/mm/c-r4k.c 2002-12-20 03:56:52.000000000 +0000 +++ linux-mips-2.4.20-pre6-20030107/arch/mips64/mm/c-r4k.c 2003-01-09 23:21:39.000000000 +0000 @@ -950,7 +950,7 @@ static void r4k_dma_cache_wback_inv_pc(u unsigned long end, a; if (size >= dcache_size) { - flush_cache_l1(); + flush_cache_all(); } else { #ifdef R4600_V2_HIT_CACHEOP_WAR unsigned long flags; @@ -963,7 +963,7 @@ static void r4k_dma_cache_wback_inv_pc(u a = addr & ~(dc_lsize - 1); end = (addr + size - 1) & ~(dc_lsize - 1); while (1) { - flush_dcache_line(a); /* Hit_Writeback_Inv_D */ + flush_dcache_line(a); /* Hit_Writeback_Inv_D */ if (a == end) break; a += dc_lsize; } @@ -971,6 +971,7 @@ static void r4k_dma_cache_wback_inv_pc(u local_irq_restore(flags); #endif } + bc_wback_inv(addr, size); } @@ -979,7 +980,7 @@ static void r4k_dma_cache_wback_inv_sc(u unsigned long end, a; if (size >= scache_size) { - flush_cache_l1(); + flush_cache_all(); return; } @@ -997,7 +998,7 @@ static void r4k_dma_cache_inv_pc(unsigne unsigned long end, a; if (size >= dcache_size) { - flush_cache_l1(); + flush_cache_all(); } else { #ifdef R4600_V2_HIT_CACHEOP_WAR unsigned long flags; @@ -1010,7 +1011,7 @@ static void r4k_dma_cache_inv_pc(unsigne a = addr & ~(dc_lsize - 1); end = (addr + size - 1) & ~(dc_lsize - 1); while (1) { - flush_dcache_line(a); /* Hit_Writeback_Inv_D */ + flush_dcache_line(a); /* Hit_Writeback_Inv_D */ if (a == end) break; a += dc_lsize; } @@ -1027,14 +1028,14 @@ static void r4k_dma_cache_inv_sc(unsigne unsigned long end, a; if (size >= scache_size) { - flush_cache_l1(); + flush_cache_all(); return; } a = addr & ~(sc_lsize - 1); end = (addr + size - 1) & ~(sc_lsize - 1); while (1) { - flush_scache_line(a); /* Hit_Writeback_Inv_SD */ + flush_scache_line(a); /* Hit_Writeback_Inv_SD */ if (a == end) break; a += sc_lsize; } @@ -1241,9 +1242,10 @@ static void __init setup_noscache_funcs( _flush_cache_page = r4k_flush_cache_page_d32i32; break; } - _flush_icache_page = r4k_flush_icache_page_p; + ___flush_cache_all = _flush_cache_all; + _dma_cache_wback_inv = r4k_dma_cache_wback_inv_pc; _dma_cache_wback = r4k_dma_cache_wback_inv_pc; _dma_cache_inv = r4k_dma_cache_inv_pc; @@ -1333,6 +1335,9 @@ static void __init setup_scache_funcs(vo break; } _flush_icache_page = r4k_flush_icache_page_s; + + ___flush_cache_all = _flush_cache_all; + _dma_cache_wback_inv = r4k_dma_cache_wback_inv_sc; _dma_cache_wback = r4k_dma_cache_wback_inv_sc; _dma_cache_inv = r4k_dma_cache_inv_sc; @@ -1394,5 +1399,5 @@ void __init ld_mmu_r4xx0(void) _flush_cache_l2 = r4k_flush_cache_l2; - flush_cache_l1(); + __flush_cache_all(); } From ralf@linux-mips.org Fri Jan 10 13:03:31 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 13:03:32 +0000 (GMT) Received: from p508B758A.dip.t-dialin.net ([IPv6:::ffff:80.139.117.138]:11408 "EHLO dea.linux-mips.net") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 13:03:31 +0000 Received: (from ralf@localhost) by dea.linux-mips.net (8.11.6/8.11.6) id h0AD3QI08346; Fri, 10 Jan 2003 14:03:26 +0100 Date: Fri, 10 Jan 2003 14:03:26 +0100 From: Ralf Baechle To: "Maciej W. Rozycki" Cc: linux-mips@linux-mips.org Subject: Re: [patch] R4k cache code synchronization Message-ID: <20030110140326.B7699@linux-mips.org> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5.1i In-Reply-To: ; from macro@ds2.pg.gda.pl on Fri, Jan 10, 2003 at 01:37:12PM +0100 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1120 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Fri, Jan 10, 2003 at 01:37:12PM +0100, Maciej W. Rozycki wrote: > I can't see any need for flush_cache_l1() and flush_cache_l2(). I'd like > to remove them. A single flush_cache_all() seems sufficient for our > needs. Any objections? The reason for the existance of flush_cache_l1 and flush_cache_l2 is the Origin. An empty flush_cache_all() is sufficient on the Origin because it's R10000 processor doesn't suffer from cache aliases. During bootup we have to flush all caches or the cache coherence logic will send crazy exceptions at us. For all other occasions just a flush of the primary caches is sufficient which is why there is flush_cache_l1. So I think we want to wrap things a bit nicer but basically we have to keep those cacheops for the sake of the Origin. Ralf From quintela@mandrakesoft.com Fri Jan 10 13:25:51 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 13:25:51 +0000 (GMT) Received: from cm19173.red.mundo-r.com ([IPv6:::ffff:213.60.19.173]:27623 "EHLO demo.mitica") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 13:25:51 +0000 Received: by demo.mitica (Postfix, from userid 501) id 519BDD657; Fri, 10 Jan 2003 14:33:51 +0100 (CET) To: "Maciej W. Rozycki" Cc: Ralf Baechle , linux-mips@linux-mips.org Subject: Re: [patch] R4k cache code synchronization References: X-Url: http://people.mandrakesoft.com/~quintela From: Juan Quintela In-Reply-To: Date: 10 Jan 2003 14:33:51 +0100 Message-ID: Lines: 26 User-Agent: Gnus/5.09 (Gnus v5.9.0) Emacs/21.2.92 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1121 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: quintela@mandrakesoft.com Precedence: bulk X-list: linux-mips I agree with the cleanup. The only thing that could be controversial is the _l1() thing, and as current thing is broken, I vote for insclusion. maciej> diff -up --recursive --new-file linux-mips-2.4.20-pre6-20030107.macro/arch/mips64/mm/c-r4k.c linux-mips-2.4.20-pre6-20030107/arch/mips64/mm/c-r4k.c maciej> --- linux-mips-2.4.20-pre6-20030107.macro/arch/mips64/mm/c-r4k.c 2002-12-20 03:56:52.000000000 +0000 maciej> +++ linux-mips-2.4.20-pre6-20030107/arch/mips64/mm/c-r4k.c 2003-01-09 23:21:39.000000000 +0000 @@ -979,7 +980,7 @@ static void r4k_dma_cache_wback_inv_sc(u unsigned long end, a; if (size >= scache_size) { - flush_cache_l1(); + flush_cache_all(); return; } This one is fixing a bug, we are talking about a chip with Secondary cache and don't touch the secondary cache at all :( Later, Juan. -- In theory, practice and theory are the same, but in practice they are different -- Larry McVoy From quintela@mandrakesoft.com Fri Jan 10 13:28:42 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 13:28:43 +0000 (GMT) Received: from cm19173.red.mundo-r.com ([IPv6:::ffff:213.60.19.173]:30183 "EHLO demo.mitica") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 13:28:42 +0000 Received: by demo.mitica (Postfix, from userid 501) id 016BBD657; Fri, 10 Jan 2003 14:36:45 +0100 (CET) To: Ralf Baechle Cc: "Maciej W. Rozycki" , linux-mips@linux-mips.org Subject: Re: [patch] R4k cache code synchronization References: <20030110140326.B7699@linux-mips.org> X-Url: http://people.mandrakesoft.com/~quintela From: Juan Quintela In-Reply-To: <20030110140326.B7699@linux-mips.org> Date: 10 Jan 2003 14:36:45 +0100 Message-ID: Lines: 84 User-Agent: Gnus/5.09 (Gnus v5.9.0) Emacs/21.2.92 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1122 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: quintela@mandrakesoft.com Precedence: bulk X-list: linux-mips >>>>> "ralf" == Ralf Baechle writes: ralf> On Fri, Jan 10, 2003 at 01:37:12PM +0100, Maciej W. Rozycki wrote: >> I can't see any need for flush_cache_l1() and flush_cache_l2(). I'd like >> to remove them. A single flush_cache_all() seems sufficient for our >> needs. Any objections? ralf> The reason for the existance of flush_cache_l1 and flush_cache_l2 is the ralf> Origin. An empty flush_cache_all() is sufficient on the Origin because ralf> it's R10000 processor doesn't suffer from cache aliases. During bootup ralf> we have to flush all caches or the cache coherence logic will send crazy ralf> exceptions at us. For all other occasions just a flush of the primary ralf> caches is sufficient which is why there is flush_cache_l1. ralf> So I think we want to wrap things a bit nicer but basically we have to ralf> keep those cacheops for the sake of the Origin. Humm, I thought that there wasn't origins with R4400 processors :) Anyways, I think that the change is the good direction, at least: - unsigned int flags -> unsigned long flags && under proper #ifdefs and the mips64 port just now should work only in R4400MC & R4400PC (to me knowlegge the most unusual ones), and broke in the R4400SC :( Once talking about caches, why do we _allways_ do the writeback, indeed if they asked us to do a invalidate? Something like that? Later, Juan. Index: arch/mips64/mm/c-r4k.c =================================================================== RCS file: /home/cvs/linux/arch/mips64/mm/c-r4k.c,v retrieving revision 1.1.2.11 diff -u -r1.1.2.11 c-r4k.c --- arch/mips64/mm/c-r4k.c 8 Jan 2003 14:16:31 -0000 1.1.2.11 +++ arch/mips64/mm/c-r4k.c 9 Jan 2003 23:16:41 -0000 @@ -979,7 +979,7 @@ unsigned long end, a; if (size >= scache_size) { - flush_cache_l1(); + flush_cache_all(); return; } @@ -1010,7 +1010,7 @@ a = addr & ~(dc_lsize - 1); end = (addr + size - 1) & ~(dc_lsize - 1); while (1) { - flush_dcache_line(a); /* Hit_Writeback_Inv_D */ + invalidate_dcache_line(a); /* Hit_Invalidate_D */ if (a == end) break; a += dc_lsize; } @@ -1027,14 +1027,14 @@ unsigned long end, a; if (size >= scache_size) { - flush_cache_l1(); + flush_cache_all(); return; } a = addr & ~(sc_lsize - 1); end = (addr + size - 1) & ~(sc_lsize - 1); while (1) { - flush_scache_line(a); /* Hit_Writeback_Inv_SD */ + invalidate_scache_line(a); /* Hit_Invalidate_SD */ if (a == end) break; a += sc_lsize; } -- In theory, practice and theory are the same, but in practice they are different -- Larry McVoy From macro@ds2.pg.gda.pl Fri Jan 10 13:30:08 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 13:30:08 +0000 (GMT) Received: from delta.ds2.pg.gda.pl ([IPv6:::ffff:213.192.72.1]:21965 "EHLO delta.ds2.pg.gda.pl") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 13:30:08 +0000 Received: from localhost by delta.ds2.pg.gda.pl (8.9.3/8.9.3) with SMTP id OAA25438; Fri, 10 Jan 2003 14:30:15 +0100 (MET) Date: Fri, 10 Jan 2003 14:30:12 +0100 (MET) From: "Maciej W. Rozycki" To: Ralf Baechle cc: linux-mips@linux-mips.org Subject: Re: [patch] R4k cache code synchronization In-Reply-To: <20030110140326.B7699@linux-mips.org> Message-ID: Organization: Technical University of Gdansk MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1123 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@ds2.pg.gda.pl Precedence: bulk X-list: linux-mips On Fri, 10 Jan 2003, Ralf Baechle wrote: > The reason for the existance of flush_cache_l1 and flush_cache_l2 is the > Origin. An empty flush_cache_all() is sufficient on the Origin because > it's R10000 processor doesn't suffer from cache aliases. During bootup > we have to flush all caches or the cache coherence logic will send crazy > exceptions at us. For all other occasions just a flush of the primary > caches is sufficient which is why there is flush_cache_l1. So flush_cache_l1() as currently defined is sufficient for DMA coherency on the R10000, isn't it? > So I think we want to wrap things a bit nicer but basically we have to > keep those cacheops for the sake of the Origin. The naming is grossly incorrect. If the R10000 has such a cache semantics, then it should use flush_cache_all() (targetting L1) for coherency and __flush_cache_all() (targetting L2; I assume L2 operations imply L1 ones, otherwise the function should explicitly operate on L1, too) for a maintenance flush. Just like it's done for the 32-bit port. There was a patch attached -- what about it? Maciej -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + From macro@ds2.pg.gda.pl Fri Jan 10 13:32:59 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 13:33:00 +0000 (GMT) Received: from delta.ds2.pg.gda.pl ([IPv6:::ffff:213.192.72.1]:30925 "EHLO delta.ds2.pg.gda.pl") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 13:32:59 +0000 Received: from localhost by delta.ds2.pg.gda.pl (8.9.3/8.9.3) with SMTP id OAA25532; Fri, 10 Jan 2003 14:33:05 +0100 (MET) Date: Fri, 10 Jan 2003 14:33:03 +0100 (MET) From: "Maciej W. Rozycki" To: Juan Quintela cc: Ralf Baechle , linux-mips@linux-mips.org Subject: Re: [patch] R4k cache code synchronization In-Reply-To: Message-ID: Organization: Technical University of Gdansk MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1124 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@ds2.pg.gda.pl Precedence: bulk X-list: linux-mips On 10 Jan 2003, Juan Quintela wrote: > The only thing that could be controversial is the _l1() thing, and as > current thing is broken, I vote for insclusion. > > maciej> diff -up --recursive --new-file linux-mips-2.4.20-pre6-20030107.macro/arch/mips64/mm/c-r4k.c linux-mips-2.4.20-pre6-20030107/arch/mips64/mm/c-r4k.c > maciej> --- linux-mips-2.4.20-pre6-20030107.macro/arch/mips64/mm/c-r4k.c 2002-12-20 03:56:52.000000000 +0000 > maciej> +++ linux-mips-2.4.20-pre6-20030107/arch/mips64/mm/c-r4k.c 2003-01-09 23:21:39.000000000 +0000 > @@ -979,7 +980,7 @@ static void r4k_dma_cache_wback_inv_sc(u > unsigned long end, a; > > if (size >= scache_size) { > - flush_cache_l1(); > + flush_cache_all(); > return; > } > > This one is fixing a bug, we are talking about a chip with Secondary > cache and don't touch the secondary cache at all :( That bug is inactive -- both function pointers are defined to the same value as surprisinly enough "l1" means "both caches" for the R4k. Anyway, I for removing flush_cache_l1() altogether in the next step. -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + From quintela@mandrakesoft.com Fri Jan 10 13:43:17 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 13:43:18 +0000 (GMT) Received: from cm19173.red.mundo-r.com ([IPv6:::ffff:213.60.19.173]:34535 "EHLO demo.mitica") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 13:43:17 +0000 Received: by demo.mitica (Postfix, from userid 501) id 06EA5D657; Fri, 10 Jan 2003 14:51:20 +0100 (CET) To: "Maciej W. Rozycki" Cc: Ralf Baechle , linux-mips@linux-mips.org Subject: Re: [patch] R4k cache code synchronization References: X-Url: http://people.mandrakesoft.com/~quintela From: Juan Quintela In-Reply-To: Date: 10 Jan 2003 14:51:20 +0100 Message-ID: Lines: 42 User-Agent: Gnus/5.09 (Gnus v5.9.0) Emacs/21.2.92 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1125 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: quintela@mandrakesoft.com Precedence: bulk X-list: linux-mips >>>>> "maciej" == Maciej W Rozycki writes: maciej> On 10 Jan 2003, Juan Quintela wrote: >> The only thing that could be controversial is the _l1() thing, and as >> current thing is broken, I vote for insclusion. >> maciej> diff -up --recursive --new-file linux-mips-2.4.20-pre6-20030107.macro/arch/mips64/mm/c-r4k.c linux-mips-2.4.20-pre6-20030107/arch/mips64/mm/c-r4k.c maciej> --- linux-mips-2.4.20-pre6-20030107.macro/arch/mips64/mm/c-r4k.c 2002-12-20 03:56:52.000000000 +0000 maciej> +++ linux-mips-2.4.20-pre6-20030107/arch/mips64/mm/c-r4k.c 2003-01-09 23:21:39.000000000 +0000 >> @@ -979,7 +980,7 @@ static void r4k_dma_cache_wback_inv_sc(u >> unsigned long end, a; >> >> if (size >= scache_size) { >> - flush_cache_l1(); >> + flush_cache_all(); >> return; >> } >> >> This one is fixing a bug, we are talking about a chip with Secondary >> cache and don't touch the secondary cache at all :( maciej> That bug is inactive -- both function pointers are defined to the same maciej> value as surprisinly enough "l1" means "both caches" for the R4k. Anyway, maciej> I for removing flush_cache_l1() altogether in the next step. Yep, you are right, only 2 weeks since I looked at that file and already forgot it. Ralf, current code (as Maciej tolds), just have _l1 & _l2 variants, but at least in that file, they are defined to be the same :( I also vote to unify the mips & mips64 versions of that file, they are the same :( Maciej, in the other hand, you didn't coment in the other part, that we writeback & invalidate when we are asked only to invalidate? Later, Juan. -- In theory, practice and theory are the same, but in practice they are different -- Larry McVoy From macro@ds2.pg.gda.pl Fri Jan 10 14:02:05 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 14:02:06 +0000 (GMT) Received: from delta.ds2.pg.gda.pl ([IPv6:::ffff:213.192.72.1]:37582 "EHLO delta.ds2.pg.gda.pl") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 14:02:05 +0000 Received: from localhost by delta.ds2.pg.gda.pl (8.9.3/8.9.3) with SMTP id PAA26103; Fri, 10 Jan 2003 15:02:08 +0100 (MET) Date: Fri, 10 Jan 2003 15:02:05 +0100 (MET) From: "Maciej W. Rozycki" To: Juan Quintela cc: Ralf Baechle , linux-mips@linux-mips.org Subject: Re: [patch] R4k cache code synchronization In-Reply-To: Message-ID: Organization: Technical University of Gdansk MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1126 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@ds2.pg.gda.pl Precedence: bulk X-list: linux-mips On 10 Jan 2003, Juan Quintela wrote: > Maciej, in the other hand, you didn't coment in the other part, that > we writeback & invalidate when we are asked only to invalidate? I did some investigation now and I think dma_cache_wback_inv(), dma_cache_wback() and dma_cache_inv() all should do what the name implies. I'll make a fix. -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + From macro@ds2.pg.gda.pl Fri Jan 10 14:32:32 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 14:32:33 +0000 (GMT) Received: from delta.ds2.pg.gda.pl ([IPv6:::ffff:213.192.72.1]:63183 "EHLO delta.ds2.pg.gda.pl") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 14:32:32 +0000 Received: from localhost by delta.ds2.pg.gda.pl (8.9.3/8.9.3) with SMTP id PAA26838; Fri, 10 Jan 2003 15:32:37 +0100 (MET) Date: Fri, 10 Jan 2003 15:32:34 +0100 (MET) From: "Maciej W. Rozycki" To: Ralf Baechle , linux-mips@linux-mips.org cc: Karsten Merker , Thiemo Seufer Subject: [patch] R4000/R4400 64-bit errata handling Message-ID: Organization: Technical University of Gdansk MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1127 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@ds2.pg.gda.pl Precedence: bulk X-list: linux-mips Hello, As you might already know there are a few nasty errata in the R4000 and the early R4400 that hit 64-bit operation badly. Here is proposed code to detect them. If an erratum is found in the processor and no workaround is applied to a kernel executable, the kernel refuses to run. In all cases the result of the probes is output to the bootstrap log. The code has bits that make use of features of non-standard tools (binutils and gcc). But it doesn't depend on them -- when built with standard tools and run on an affected system, a kernel will simply fail, and on good systems it will run normally. Therefore it's safe to apply, and if the ultimate implementation in the tools differs, the code may get adjusted appropriately later. I'd like to apply this code as soon as possible as I consider it a prerequisite for integrating 64-bit support for the DECstation (to prevent people from running unreliable code), so please tell me if there are any doubts about it. Errata descriptions are available at the MIPS site -- see: 'http://www.mips.com/publications/r400_r5000.html'. Unfortunately, despite several attempts to get a permission to duplicate them within Linux sources, I failed to get one. I'd like to express my gratitude to Karsten and Thiemo for testing the code with their hardware. Without their help, I wouldn't be able to prepare appropriate tests for errata my hardware doesn't suffer from. Maciej -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + patch-mips-2.4.20-pre6-20021212-mips-bugs-20 diff -up --recursive --new-file linux-mips-2.4.20-pre6-20021212.macro/arch/mips64/kernel/Makefile linux-mips-2.4.20-pre6-20021212/arch/mips64/kernel/Makefile --- linux-mips-2.4.20-pre6-20021212.macro/arch/mips64/kernel/Makefile 2002-12-04 03:56:39.000000000 +0000 +++ linux-mips-2.4.20-pre6-20021212/arch/mips64/kernel/Makefile 2003-01-09 19:04:31.000000000 +0000 @@ -32,6 +32,7 @@ ifndef CONFIG_MAPPED_PCI_IO obj-y += pci-dma.o endif -AFLAGS_r4k_genex.o := -P +CFLAGS_cpu-probe.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi) +AFLAGS_r4k_genex.o = -P include $(TOPDIR)/Rules.make diff -up --recursive --new-file linux-mips-2.4.20-pre6-20021212.macro/arch/mips64/kernel/cpu-probe.c linux-mips-2.4.20-pre6-20021212/arch/mips64/kernel/cpu-probe.c --- linux-mips-2.4.20-pre6-20021212.macro/arch/mips64/kernel/cpu-probe.c 2002-12-04 03:56:39.000000000 +0000 +++ linux-mips-2.4.20-pre6-20021212/arch/mips64/kernel/cpu-probe.c 2003-01-09 20:19:32.000000000 +0000 @@ -1,10 +1,27 @@ +/* + * arch/mips64/kernel/cpu-probe.c + * + * Processor capabilities determination functions. + * + * Copyright (C) xxxx the Anonymous + * Copyright (C) 2003 Maciej W. Rozycki + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + #include #include +#include #include + #include #include #include #include +#include /* * Not all of the MIPS CPUs have the "wait" instruction available. Moreover, @@ -90,9 +107,229 @@ static inline void check_wait(void) } } +static inline void check_mult_sh(void) +{ + unsigned long flags; + int m1, m2; + long p, s, v; + + printk("Checking for the multiply/shift bug... "); + + __save_and_cli(flags); + /* + * The following code leads to a wrong result of dsll32 when + * executed on R4000 rev. 2.2 or 3.0. + * + * See "MIPS R4000PC/SC Errata, Processor Revision 2.2 and + * 3.0" by MIPS Technologies, Inc., errata #16 and #28 for + * details. I got no permission to duplicate them here, + * sigh... --macro + */ + asm volatile( + ".set push\n\t" + ".set noat\n\t" + ".set noreorder\n\t" + ".set nomacro\n\t" + "mult %1, %2\n\t" + "dsll32 %0, %3, %4\n\t" + "mflo $0\n\t" + ".set pop" + : "=r" (v) + : "r" (5), "r" (8), "r" (5), "I" (0) + : "hi", "lo", "accum"); + __restore_flags(flags); + + if (v == 5L << 32) { + printk("no.\n"); + return; + } + + printk("yes, workaround... "); + __save_and_cli(flags); + /* + * We want the multiply and the shift to be isolated from the + * rest of the code to disable gcc optimizations. Hence the + * asm statements that execute nothing, but make gcc not know + * what the values of m1, m2 and s are and what v and p are + * used for. + * + * We have to use single integers for m1 and m2 and a double + * one for p to be sure the mulsidi3 gcc's RTL multiplication + * instruction has the workaround applied. Older versions of + * gcc have correct mulsi3, but other multiplication variants + * lack the workaround. + */ + asm volatile( + "" + : "=r" (m1), "=r" (m2), "=r" (s) + : "0" (5), "1" (8), "2" (5)); + p = m1 * m2; + v = s << 32; + asm volatile( + "" + : "=r" (v) + : "0" (v), "r" (p)); + __restore_flags(flags); + + if (v == 5L << 32) { + printk("yes.\n"); + return; + } + + printk("no.\n"); + panic("Reliable operation impossible!\n" +#ifndef CONFIG_CPU_R4000 + "Configure for R4000 to enable the workaround." +#else + "Please report to ." +#endif + ); +} + +static volatile int daddi_ov __initdata = 0; + +asmlinkage void __init do_daddi_ov(struct pt_regs *regs) +{ + daddi_ov = 1; + regs->cp0_epc += 4; +} + +static inline void check_daddi(void) +{ + extern asmlinkage void handle_daddi_ov(void); + unsigned long flags; + void *handler; + long v; + + printk("Checking for the daddi bug... "); + + __save_and_cli(flags); + handler = set_except_vector(12, handle_daddi_ov); + /* + * The following code fails to trigger an overflow exception + * when executed on R4000 rev. 2.2 or 3.0. + * + * See "MIPS R4000PC/SC Errata, Processor Revision 2.2 and + * 3.0" by MIPS Technologies, Inc., erratum #23 for details. + * I got no permission to duplicate it here, sigh... --macro + */ + asm volatile( + ".set push\n\t" + ".set noat\n\t" + ".set noreorder\n\t" + ".set nomacro\n\t" +#ifdef HAVE_AS_SET_DADDI + ".set daddi\n\t" +#endif + "daddi %0, %1, %2\n\t" + ".set pop" + : "=r" (v) + : "r" (0x7fffffffffffedcd), "I" (0x1234)); + set_except_vector(12, handler); + __restore_flags(flags); + + if (daddi_ov) { + printk("no.\n"); + return; + } + + printk("yes, workaround... "); + + __save_and_cli(flags); + handler = set_except_vector(12, handle_daddi_ov); + asm volatile( + "daddi %0, %1, %2" + : "=r" (v) + : "r" (0x7fffffffffffedcd), "I" (0x1234)); + set_except_vector(12, handler); + __restore_flags(flags); + + if (daddi_ov) { + printk("yes.\n"); + return; + } + + printk("no.\n"); + panic("Reliable operation impossible!\n" +#if !defined(CONFIG_CPU_R4000) && !defined(CONFIG_CPU_R4400) + "Configure for R4000 or R4400 to enable the workaround." +#else + "Please report to ." +#endif + ); +} + +static inline void check_daddiu(void) +{ + long v, w; + + printk("Checking for the daddiu bug... "); + + /* + * The following code leads to a wrong result of daddiu when + * executed on R4400 rev. 1.0. + * + * See "MIPS R4400PC/SC Errata, Processor Revision 1.0" by + * MIPS Technologies, Inc., erratum #7 for details. + * + * According to "MIPS R4000PC/SC Errata, Processor Revision + * 2.2 and 3.0" by MIPS Technologies, Inc., erratum #41 this + * problem affects R4000 rev. 2.2 and 3.0, too. Testing + * failed to trigger it so far. + * + * I got no permission to duplicate the errata here, sigh... + * --macro + */ + asm volatile( + ".set push\n\t" + ".set noat\n\t" + ".set noreorder\n\t" + ".set nomacro\n\t" +#ifdef HAVE_AS_SET_DADDI + ".set daddi\n\t" +#endif + "daddiu %0, %2, %3\n\t" + "addiu %1, $0, %3\n\t" + "daddu %1, %2\n\t" + ".set pop" + : "=&r" (v), "=&r" (w) + : "r" (0x7fffffffffffedcd), "I" (0x1234)); + + if (v == w) { + printk("no.\n"); + return; + } + + printk("yes, workaround... "); + + asm volatile( + "daddiu %0, %2, %3\n\t" + "addiu %1, $0, %3\n\t" + "daddu %1, %2" + : "=&r" (v), "=&r" (w) + : "r" (0x7fffffffffffedcd), "I" (0x1234)); + + if (v == w) { + printk("yes.\n"); + return; + } + + printk("no.\n"); + panic("Reliable operation impossible!\n" +#if !defined(CONFIG_CPU_R4000) && !defined(CONFIG_CPU_R4400) + "Configure for R4000 or R4400 to enable the workaround." +#else + "Please report to ." +#endif + ); +} + void __init check_bugs(void) { check_wait(); + check_mult_sh(); + check_daddi(); + check_daddiu(); } /* diff -up --recursive --new-file linux-mips-2.4.20-pre6-20021212.macro/arch/mips64/kernel/r4k_genex.S linux-mips-2.4.20-pre6-20021212/arch/mips64/kernel/r4k_genex.S --- linux-mips-2.4.20-pre6-20021212.macro/arch/mips64/kernel/r4k_genex.S 2002-10-02 17:22:18.000000000 +0000 +++ linux-mips-2.4.20-pre6-20021212/arch/mips64/kernel/r4k_genex.S 2002-10-22 21:44:51.000000000 +0000 @@ -35,6 +35,11 @@ __INIT +/* A temporary overflow handler used by check_daddi(). */ + + BUILD_HANDLER daddi_ov daddi_ov none silent /* #12 */ + + /* General exception handler for CPUs with virtual coherency exception. * * Be careful when changing this, it has to be at most 256 (as a special From ralf@linux-mips.org Fri Jan 10 14:47:57 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 14:47:57 +0000 (GMT) Received: from p508B758A.dip.t-dialin.net ([IPv6:::ffff:80.139.117.138]:22929 "EHLO dea.linux-mips.net") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 14:47:57 +0000 Received: (from ralf@localhost) by dea.linux-mips.net (8.11.6/8.11.6) id h0AEljH10678; Fri, 10 Jan 2003 15:47:45 +0100 Date: Fri, 10 Jan 2003 15:47:45 +0100 From: Ralf Baechle To: "Maciej W. Rozycki" Cc: linux-mips@linux-mips.org, Karsten Merker , Thiemo Seufer Subject: Re: [patch] R4000/R4400 64-bit errata handling Message-ID: <20030110154745.D7699@linux-mips.org> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.2.5.1i In-Reply-To: ; from macro@ds2.pg.gda.pl on Fri, Jan 10, 2003 at 03:32:34PM +0100 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1128 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips On Fri, Jan 10, 2003 at 03:32:34PM +0100, Maciej W. Rozycki wrote: > As you might already know there are a few nasty errata in the R4000 and > the early R4400 that hit 64-bit operation badly. Here is proposed code to > detect them. If an erratum is found in the processor and no workaround is > applied to a kernel executable, the kernel refuses to run. In all cases > the result of the probes is output to the bootstrap log. > > The code has bits that make use of features of non-standard tools > (binutils and gcc). But it doesn't depend on them -- when built with > standard tools and run on an affected system, a kernel will simply fail, > and on good systems it will run normally. Therefore it's safe to apply, > and if the ultimate implementation in the tools differs, the code may get > adjusted appropriately later. > > I'd like to apply this code as soon as possible as I consider it a > prerequisite for integrating 64-bit support for the DECstation (to prevent > people from running unreliable code), so please tell me if there are any > doubts about it. Errata descriptions are available at the MIPS site -- > see: 'http://www.mips.com/publications/r400_r5000.html'. Unfortunately, > despite several attempts to get a permission to duplicate them within > Linux sources, I failed to get one. > > I'd like to express my gratitude to Karsten and Thiemo for testing the > code with their hardware. Without their help, I wouldn't be able to > prepare appropriate tests for errata my hardware doesn't suffer from. > + __save_and_cli(flags); > + __restore_flags(flags); I suggest to replace these with local_irq_save and local_irq_restore. They're already deprecated for 2.4 and completly gone in 2.5. Looks ok to me otherwise. Ralf From macro@ds2.pg.gda.pl Fri Jan 10 14:52:31 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 14:52:32 +0000 (GMT) Received: from delta.ds2.pg.gda.pl ([IPv6:::ffff:213.192.72.1]:57296 "EHLO delta.ds2.pg.gda.pl") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 14:52:31 +0000 Received: from localhost by delta.ds2.pg.gda.pl (8.9.3/8.9.3) with SMTP id PAA27368; Fri, 10 Jan 2003 15:52:41 +0100 (MET) Date: Fri, 10 Jan 2003 15:52:38 +0100 (MET) From: "Maciej W. Rozycki" To: Ralf Baechle cc: linux-mips@linux-mips.org, Karsten Merker , Thiemo Seufer Subject: Re: [patch] R4000/R4400 64-bit errata handling In-Reply-To: <20030110154745.D7699@linux-mips.org> Message-ID: Organization: Technical University of Gdansk MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1129 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: macro@ds2.pg.gda.pl Precedence: bulk X-list: linux-mips On Fri, 10 Jan 2003, Ralf Baechle wrote: > > + __save_and_cli(flags); > > > + __restore_flags(flags); > > I suggest to replace these with local_irq_save and local_irq_restore. > They're already deprecated for 2.4 and completly gone in 2.5. Sure -- sorry for missing it. -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + From nmckee@telogy.com Fri Jan 10 15:24:43 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 15:24:44 +0000 (GMT) Received: from [IPv6:::ffff:209.116.120.7] ([IPv6:::ffff:209.116.120.7]:26640 "EHLO tnint11.telogy.design.ti.com") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 15:24:43 +0000 Received: by tnint11.telogy.design.ti.com with Internet Mail Service (5.5.2653.19) id ; Fri, 10 Jan 2003 10:22:17 -0500 Message-ID: <37A3C2F21006D611995100B0D0F9B73CBFE40C@tnint11.telogy.design.ti.com> From: "Zajerko-McKee, Nick" To: 'atul srivastava' , linux-mips@linux-mips.org Subject: RE: handling of s-record images by bootloader Date: Fri, 10 Jan 2003 10:22:15 -0500 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.5.2653.19) Content-Type: text/plain; charset="iso-8859-1" Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1130 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: nmckee@telogy.com Precedence: bulk X-list: linux-mips I had a simular problem. I ended up writing my own code for my platform. Here is a description of s-records: http://www.amelek.gda.pl/avr/uisp/srecord.htm -----Original Message----- From: atul srivastava [mailto:atulsrivastava9@rediffmail.com] Sent: Friday, January 10, 2003 5:17 AM To: linux-mips@linux-mips.org Subject: handling of s-record images by bootloader Hello . A quick question.. I have developed a primitive bootloader for custom board, that is successfuly doing the board bringup and loads linux os image currently through serial link (kermit) only. network link is also likely to be up soon. but through serial it loads kernel image only in raw binary format. now i want to extend this for s-record images as well.. I am umware that, how differently s-record image need to be handled..? i just need some idea or if possible any example code for that.. Best Reagards, Atul From ladis@psi.cz Fri Jan 10 20:48:05 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 10 Jan 2003 20:48:06 +0000 (GMT) Received: from prahad-5-64.dialup.vol.cz ([IPv6:::ffff:212.20.121.196]:260 "EHLO kopretinka") by linux-mips.org with ESMTP id ; Fri, 10 Jan 2003 20:48:05 +0000 Received: from ladis by kopretinka with local (Exim 3.35 #1 (Debian)) id 18X5zl-0000Bm-00; Fri, 10 Jan 2003 21:43:13 +0100 Date: Fri, 10 Jan 2003 21:43:13 +0100 To: linux-mips@linux-mips.org Cc: Ralf Baechle , Ulf Karlsson Subject: [PATCH] HAL2: fix LE stream playback Message-ID: <20030110204313.GA712@kopretinka> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.3.28i From: Ladislav Michl Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1131 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ladis@psi.cz Precedence: bulk X-list: linux-mips Hi, several people complained about it on IRC, so here is a patch against linux_2_4 branch. Please apply. Side note: recording still doesn't work. while ago i tried to play with PBUS configuration and found following (refer to hpc3.ps): 1) writing 0x08248844 (ie. 16bit DMA stream) into pbus_dmacfgs produces noise at output. 2) writing 0x082c8844 (ie. 16bit with EVEN_HIGH bit set) make playback two times faster. 3) writing 0x08248844 (ie. 8 bit stream) works as expected. That is strange, because I still believe that HAL2 is 16bit device. I'd guess that there are two bugs in driver which neutralizes each other. In all cases DMA stream wasn't started for recording. --- XXX/drivers/sound/hal2.c Mon Aug 5 19:40:50 2002 +++ linux/drivers/sound/hal2.c Fri Jan 10 21:06:27 2003 @@ -1,6 +1,6 @@ /* * Driver for HAL2 sound processors - * Copyright (c) 2001, 2002 Ladislav Michl + * Copyright (c) 2001-2003 Ladislav Michl * * Based on Ulf Carlsson's code. * @@ -394,7 +394,8 @@ fifobeg = 0; /* playback is first */ fifoend = (sample_size * 4) >> 3; /* doublewords */ pbus->ctrl = HPC3_PDMACTRL_RT | HPC3_PDMACTRL_LD | - (highwater << 8) | (fifobeg << 16) | (fifoend << 24); + (highwater << 8) | (fifobeg << 16) | (fifoend << 24) | + (hal2->dac.format & AFMT_S16_LE ? HPC3_PDMACTRL_SEL : 0); /* We disable everything before we do anything at all */ pbus->pbus->pbdma_ctrl = HPC3_PDMACTRL_LD; hal2_i_clearbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECTX); @@ -420,7 +421,8 @@ fifobeg = (4 * 4) >> 3; /* record is second */ fifoend = (4 * 4 + sample_size * 4) >> 3; /* doublewords */ pbus->ctrl = HPC3_PDMACTRL_RT | HPC3_PDMACTRL_RCV | HPC3_PDMACTRL_LD | - (highwater << 8) | (fifobeg << 16) | (fifoend << 24); + (highwater << 8) | (fifobeg << 16) | (fifoend << 24) | + (hal2->adc.format & AFMT_S16_LE ? HPC3_PDMACTRL_SEL : 0); pbus->pbus->pbdma_ctrl = HPC3_PDMACTRL_LD; hal2_i_clearbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECR); hal2_i_clearbit16(hal2, H2I_DMA_DRV, (1 << pbus->pbusnr)); From vivienc@nerim.net Sat Jan 11 18:55:16 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 11 Jan 2003 18:55:17 +0000 (GMT) Received: from p508B688C.dip.t-dialin.net ([IPv6:::ffff:80.139.104.140]:2951 "EHLO p508B688C.dip.t-dialin.net") by linux-mips.org with ESMTP id ; Sat, 11 Jan 2003 18:55:16 +0000 Received: from smtp-101.noc.nerim.net ([IPv6:::ffff:62.4.17.101]:8718 "EHLO mallaury.noc.nerim.net") by ralf.linux-mips.org with ESMTP id ; Sat, 11 Jan 2003 19:55:14 +0100 Received: from melkor (vivienc.net1.nerim.net [213.41.134.233]) by mallaury.noc.nerim.net (Postfix) with ESMTP id 0855062E1B; Sat, 11 Jan 2003 19:55:02 +0100 (CET) Received: from glaurung (helo=localhost) by melkor with local-esmtp (Exim 3.36 #1 (Debian)) id 18XQmb-0002FI-00; Sat, 11 Jan 2003 19:55:01 +0100 Date: Sat, 11 Jan 2003 19:55:00 +0100 (CET) From: Vivien Chappelier X-Sender: glaurung@melkor To: Ralf Baechle Cc: linux-mips@linux-mips.org Subject: [PATCH 2.5] udelay Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 1132 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: vivienc@nerim.net Precedence: bulk X-list: linux-mips Hi, The HZ constant has been changed in 2.5 and this breaks udelay(). Here is a patch to fix this. Note that the first multiply in udelay is still optimized out by the compiler if the delay is constant, as in current implementation. Vivien. --- include/asm-mips64/delay.h 2002-12-11 20:44:20.000000000 +0100 +++ include/asm-mips64/delay.h 2003-01-07 20:36:37.000000000 +0100 @@ -41,11 +41,11 @@ { unsigned long lo; -#if (HZ == 100) - usecs *= 0x00068db8bac710cbUL; /* 2**64 / (1000000 / HZ) */ -#elif (HZ == 128) - usecs *= 0x0008637bd05af6c6UL; /* 2**64 / (1000000 / HZ) */ -#endif +/* HZ * 2**64 / 1000000 */ +#define __UDELAY_FIXED64_HZ_1000000 (0x8000000000000000UL / (500000 / HZ)) + + usecs *= __UDELAY_FIXED64_HZ_1000000; + __asm__("dmultu\t%2,%3" :"=h" (usecs), "=l" (lo) :"r" (usecs),"r" (lpj)); --- include/asm-mips/delay.h 2002-12-11 20:44:18.000000000 +0100 +++ include/asm-mips/delay.h 2003-01-08 19:25:17.000000000 +0100 @@ -40,11 +40,10 @@ { unsigned long lo; -#if (HZ == 100) - usecs *= 0x00068db8; /* 2**32 / (1000000 / HZ) */ -#elif (HZ == 128) - usecs *= 0x0008637b; /* 2**32 / (1000000 / HZ) */ -#endif +/* HZ * 2**32 / 1000000 */ +#define __UDELAY_FIXED32_HZ_1000000 (0x80000000UL / (500000 / HZ)) + + usecs *= __UDELAY_FIXED32_HZ_1000000; __asm__("multu\t%2,%3" :"=h" (usecs), "=l" (lo) :"r" (usecs),"r" (lpj)); From ralf@linux-mips.org Sun Jan 12 17:10:19 2003 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 12 Jan 2003 17:20:02 +0000 (GMT) Received: from p508B6452.dip.t-dialin.net ([IPv6:::ffff:80.139.100.82]:62648 "EHLO dea.linux-mips.net") by linux-mips.org with ESMTP id ; Sun, 12 Jan 2003 17:10:19 +0000 Received: (from ralf@localhost) by dea.linux-mips.net (8.11.6/8.11.6) id h0CH9H419209; Sun, 12 Jan 2003 18:09:17 +0100 Date: Sun, 12 Jan 2003 18:09:17 +0100 From: Ralf Baechle