Subject: MIPS CACHE TESTS

From: Dennis Castleman <[email-masked]>
Date: Fri, 6 Jun 2003 11:00:23 -0700

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  legible. Hi ALL I trying to find a way of test both the instruction and
  data caches for a MIPS 5KC core. Does any body have any ideas? Data
  cache is easy instruction cache is not so easy. The Magnum pc-50 use to
  have a monitor called Rx4230 MIPS Monitor. This monitor dumped the
  following on power up [...] 

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Subject: MIPS CACHE TESTS
From: Dennis Castleman <[email-masked]>
To: [email-masked]
Date: Fri, 6 Jun 2003 11:00:23 -0700

Hi ALL
 
I trying to find a way of test both the instruction and data caches for a
MIPS 5KC core.
Does any body have any ideas?  Data cache is easy instruction cache is not
so easy.
The Magnum pc-50 use to have a monitor called Rx4230 MIPS Monitor.
This monitor dumped the following on power up
 
Memory Test 256kb - 5mb...Passed
I/O Cache Test...Passed
NVRAM Test ...Passed
Parallel Test...Passed
Floppy Chip Test...Passed
Primary Data Cache Test...Passed
Primary Instruction Cache Test...Passed
Primary DCache TAG Test...Passed
Primary ICache TAG Test...Passed
Secondary Cache Test...Skipped
Secondary Cache TAG Test...Skipped
Read Merge Write Test...Passed
High Memory Test 5mb -> end...Passed
FP Test...Passed
Keyboard Selftest...Passed
Keyboard Basic Assurance...Passed
Video board Test...Skipped
SCSI Register Test...Passed
Audio Chip Test...Passed
Sonic Reset Test...Passed
Sonic Register Test...Passed
 
PONs Complete...
PON Diagnostics Version 5.05 MIPS OPT Fri May 29 14:22:07 
 
YOMAN doesn't have any thing like this.  If any one knows of power on tests
for a 5KC it would be of great interest to me.

Dennis Castleman
Oak Technology.

---

From: Ralf Baechle <[email-masked]>
Date: Tue, 10 Jun 2003 21:48:13 +0200

On Fri, Jun 06, 2003 at 11:00:23AM -0700, Dennis Castleman wrote:

(Well, not Dennis but Spamassassin ...)

> mail in future.  See http://spamassassin.org/tag/ for more details.

Of course it's not been spam, sorry for that faux pas.  This has been the
first false hit since I'm running Spamassassin for the linux-mips.org
mailing lists and so turned out a little bug in the scripts.

In any case, sending HTML to any of the linux-mips.org lists is an almost
certai way to get caught by the spam filter - HTML email on Linux mailing
lists is an almost certain indicator of SPAM ...

Back to the real business ...

> Does any body have any ideas?  Data cache is easy instruction cache is not

The trick is to run uncached.

> This monitor dumped the following on power up

You're the first one to post about using Magnums in quite a while ...

> for a 5KC it would be of great interest to me.

I don't know of any readily available code.  The general strategy is to
run the cache tests in uncached mode and use the Index_Load_Tag_I etc.
commands to manipulate the cache content directly.  The general
strategy is to first verify that there are no dead bits in the cache,
the initialize all cache indices such that the ECC are set correctly to
avoid a later cache error exception.  For some set-way associative caches
the LRU bits may also have to be initialized.

Linux expects all this to already have been done by the firmware before
it's started.

  Ralf