Subject: Single stepping in mips

From: "Krishnakumar. R" <[email-masked]>
Date: Wed, 4 Jun 2003 09:18:01 +0530

Hi,

How can we single step through an instruction 
in mips architecture. 

In intel 386 architecture if we set TF flag
of the EFLAGS register a trap will be generated
after every instruction. Is there a way in 
mips to do the same. 

Regards and Thanks
KK

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From: Ralf Baechle <[email-masked]>
Date: Wed, 4 Jun 2003 07:18:18 +0200

> after every instruction. Is there a way in 

On most MIPS processors there is no singlestepping feature.  You have to
manual insert a breakpoint into the instruction stream and deal with the
exception.

  Ralf

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From: "Krishnakumar. R" <[email-masked]>
Date: Wed, 4 Jun 2003 11:07:55 +0530

Hi,

> manual insert a breakpoint into the instruction stream and deal with the

But if we insert a Break point into the instruction stream the exception
will be generated before the execution of the real instruction.
That means.
If we have the following set of instructions

addr1: instr1
addr2: instr2
addr3: instr3

if we replace instr1 by break.

addr1: break
addr2: instr2
addr3: instr3

we will get a break point exception as soon as the break
in addr1 is executed (correct me if I have wrongly understood !! )

But the need is to raise an exception after instr1 (at addr1) is executed.
One solution is using a break at instr2 (at addr2).
But suppose instr1 is a jmp then there is no point
in keeping a break at addr2.
(inorder to raise an exception after instr1 is executed).

So is there some other clean way for this ?

Regards and Thanks
KK

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From: Ralf Baechle <[email-masked]>
Date: Wed, 4 Jun 2003 07:53:19 +0200

> (inorder to raise an exception after instr1 is executed).

You understood correctly.  Now jumps and even more so the conditional
branches are sort of the ugly part of the whole thing.  The easiest
method is probably inserting a branch at the jump's destination address
or in case of a branch at the branch target and the instruction following
it's delay slot.  So that's a lot of inserting and removing of
breakpoints ...

  Ralf

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From: "Maciej W. Rozycki" <[email-masked]>
Date: Wed, 4 Jun 2003 16:16:48 +0200 (MET DST)

> it's delay slot.  So that's a lot of inserting and removing of

 In a more finegrained but also more complicated example, you probably
want to insert a breakpoint in the delay slot first and at the second step
evaluate the branch's condition and put a breakpoint at the next
instruction to be executed.  I'm not sure if the current version of gdb
does the first step, but it inserts a single breakpoint in the second one
only.  For branch likely instructions adjust the two steps as necessary. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: [email-masked], PGP key available        +

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From: Daniel Jacobowitz <[email-masked]>
Date: Wed, 4 Jun 2003 10:25:48 -0400

> only.  For branch likely instructions adjust the two steps as necessary. 

Does that actually work reliably across MIPS processors?  I don't
believe that it will.  I suppose you could re-execute the branch to get
the delay slot executed...

GDB simply executes the branch and its delay slot as a unit.

-- 
Daniel Jacobowitz
MontaVista Software                         Debian GNU/Linux Developer

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From: Ralf Baechle <[email-masked]>
Date: Wed, 4 Jun 2003 16:32:32 +0200

> the delay slot executed...

It should.

  Ralf