Subject: Au1550 - Problem access Shared memory from PCI card

From: "Alexey Shinkin" <[email-masked]>
Date: Thu, 16 Sep 2004 12:55:11 +0700

Hi All !

Could anybody help me with the following problem:

I have AMD Au1550 MIPS board, running MontaVista Linux 2.4.20-mvl31.1550.
I have also a PCI card , Linux driver for the card and some user-level 
application.
All work fine on x86 platform.

After I recompiled the driver and the application for MIPS platform I got 
the following:
1. The driver on the MIPS board (host) finds the PCI card (target)
2. I download an executable code into target and start target application 
(application starts, debug info is written to target memory).
3. Target starts to communicate with host using shared memory,allocated on 
host, (target accesses the memory through PCI).

After that I get the following problem:

4. Target writes some values into Host's shared memory and generates 
interrupt on Host.
5. Host catches the interrupt and in interrupt handler reads the values, 
written by target.
6. Host writes some replay to the shared memory, generates PCI interrupt on 
Target.
7. Target gets interrupt but can not see the latest values, written by Host. 
Reading the shared memory several times doesn' t help.

Looks like target reads values that are cached somewhere . I tried to insert 
au_sync(), au_sync_delay(), flush_cache_all() on Host side after writting 
values - nothing helps.

On x86 this approach works fine.

What could be the reason? Could this be hardware problem or can be fixed by 
fine-tuning of caching parameters or PCI controller ?

Thank you in advance!

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From: Pete Popov <[email-masked]>
Date: Thu, 16 Sep 2004 00:50:22 -0700

>
> After I recompiled the driver and the application for MIPS platform I 
> got the following:
> 2. I download an executable code into target and start target 
> application (application starts, debug info is written to target memory).
> 3. Target starts to communicate with host using shared 
> memory,allocated on host, (target accesses the memory through PCI).
>
> 5. Host catches the interrupt and in interrupt handler reads the 
> values, written by target.

So the host at this point reads the correct values written by the target?

> 6. Host writes some replay to the shared memory, generates PCI 
> interrupt on Target.

When you say "host", is this the user application that is writing to the 
shared memory after remmaping it, or is the host driver itself writing 
to the shared memory from kernel space?

> 7. Target gets interrupt but can not see the latest values, written by 
> Host. Reading the shared memory several times doesn' t help.
>
> Looks like target reads values that are cached somewhere . I tried to 
> insert au_sync(), au_sync_delay(), flush_cache_all() on Host side 
> after writting values - nothing helps.

> What could be the reason? Could this be hardware problem or can be 
> fixed by fine-tuning 

> of caching parameters or PCI controller ?

There's no reason why this shouldn't work and it doesn't smell like a 
hardware problem.

Pete