Subject: problem about dma

From: "wuming" <[email-masked]>
Date: Mon, 20 Dec 2004 11:46:33 +0800

In file include/asm-mips/pci.h
there are some functions for dma if the I/O model is non-coherent.
for example:
    pci_map_sg
    pci_unmap_sg
These two functions exist for ide dma.
Before the dma transfer, pci_map_sg will map the memory space covered by sg_table,
and it will flush and invalidate cache indexed by that memory space.
After the dma transfer, pci_unmap_sg also needs to be called to flush and invalidate
the same cache. But I do not know why the second flush will be demanded.
I think that in the interval between the two flush, there would be nothing to access
the memory covered by the dma. But it is not the case.
I want to know what can access that memory and I need some help.

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From: "Gleb O. Raiko" <[email-masked]>
Date: Mon, 20 Dec 2004 11:43:59 +0300

> I want to know what can access that memory and I need some help.

In 2.4, memcpy's prefetch may (and, in practice, do, no smiles, it cost 
me a lot of time to realize) access that memory. I though it has been 
fixed in 2.6 someday.

Regards,
Gleb.

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From: "wuming" <[email-masked]>
Date: Mon, 20 Dec 2004 17:51:16 +0800

----- Original Message ----- 
From: "Gleb O. Raiko" <[email-masked]>
To: "wuming" <[email-masked]>
Cc: <[email-masked]>
Sent: Monday, December 20, 2004 4:43 PM
Subject: Re: problem about dma

> me a lot of time to realize) access that memory. I though it has been 
Thank you! :)
But I think it is not the only reason, because the CPU on my platform does not 
support the "pref" instruction. So, memcpy's prefetch may have no effect on that 
arrange of memory.

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From: Fuxin Zhang <[email-masked]>
Date: Mon, 20 Dec 2004 21:14:16 +0800

I think that speculative loads may be the answer.