Subject: Re: CVS [email-masked]: linux

From: Yoichi Yuasa <[email-masked]>
Date: Tue, 8 Mar 2005 01:44:20 +0900

Hello Ralf and Maciej,

On Wed, 19 Jan 2005 15:21:51 +0900
Yoichi Yuasa <[email-masked]> wrote:

> Hi Maciej,
> 
> On Wed, 19 Jan 2005 05:35:29 +0000 (GMT)
> "Maciej W. Rozycki" <[email-masked]> wrote:
> 
> > On Wed, 19 Jan 2005, Yoichi Yuasa wrote:
> > 
> > > >  Neither of these uses any CONFIG_* macros.
> > > 
> > > I'm making patch for giu.c and icu.c.
> > > These patches need it. 
> > 
> >  Then please just include what you need within these patches.  That's the 
> > usual way of doing stuff.
> 
> Ok, I'll send a patch including get back and add new line.

Sorry for the delay.
Next I'll send giu.c update.

Yoichi

Signed-off-by: Yoichi Yuasa <[email-masked]>

diff -urN -X dontdiff a-orig/arch/mips/vr41xx/Kconfig a/arch/mips/vr41xx/Kconfig
--- a-orig/arch/mips/vr41xx/Kconfig	Mon Jan 31 05:45:36 2005
+++ a/arch/mips/vr41xx/Kconfig	Tue Mar  8 01:34:14 2005
@@ -97,6 +97,10 @@
 	bool "Add PCI control unit support of NEC VR4100 series"
 	depends on MACH_VR41XX && PCI
 
+config GPIO_VR41XX
+	bool "Add General-purpose I/O unit support of NEC VR4100 series"
+	depends on MACH_VR41XX
+
 config VRC4171
 	tristate "Add NEC VRC4171 companion chip support"
 	depends on MACH_VR41XX && ISA
diff -urN -X dontdiff a-orig/arch/mips/vr41xx/common/Makefile a/arch/mips/vr41xx/common/Makefile
--- a-orig/arch/mips/vr41xx/common/Makefile	Thu Feb 26 00:23:50 2004
+++ a/arch/mips/vr41xx/common/Makefile	Fri Mar  4 17:29:00 2005
@@ -2,7 +2,8 @@
 # Makefile for common code of the NEC VR4100 series.
 #
 
-obj-y				+= bcu.o cmu.o giu.o icu.o init.o int-handler.o ksyms.o pmu.o rtc.o
+obj-y				+= bcu.o cmu.o icu.o init.o int-handler.o ksyms.o pmu.o rtc.o
+obj-$(CONFIG_GPIO_VR41XX)	+= giu.o
 obj-$(CONFIG_SERIAL_8250)	+= serial.o
 obj-$(CONFIG_VRC4171)		+= vrc4171.o
 obj-$(CONFIG_VRC4173)		+= vrc4173.o
diff -urN -X dontdiff a-orig/arch/mips/vr41xx/common/icu.c a/arch/mips/vr41xx/common/icu.c
--- a-orig/arch/mips/vr41xx/common/icu.c	Sun Jan 16 22:34:31 2005
+++ a/arch/mips/vr41xx/common/icu.c	Tue Mar  8 01:08:13 2005
@@ -3,8 +3,7 @@
  *
  *  Copyright (C) 2001-2002  MontaVista Software Inc.
  *    Author: Yoichi Yuasa <[email-masked] or [email-masked]>
- *  Copyright (C) 2003-2004  Yoichi Yuasa <[email-masked]>
- *  Copyright (C) 2005 Ralf Baechle ([email-masked])
+ *  Copyright (C) 2003-2005  Yoichi Yuasa <[email-masked]>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -29,6 +28,7 @@
  *  Yoichi Yuasa <[email-masked]>
  *  - Coped with INTASSIGN of NEC VR4133.
  */
+#include <linux/config.h>
 #include <linux/errno.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
@@ -45,8 +45,10 @@
 
 extern asmlinkage void vr41xx_handle_interrupt(void);
 
+#ifdef CONFIG_GPIO_VR41XX
 extern void init_vr41xx_giuint_irq(void);
 extern void giuint_irq_dispatch(struct pt_regs *regs);
+#endif
 
 static uint32_t icu1_base;
 static uint32_t icu2_base;
@@ -672,9 +674,11 @@
 		for (i = 0; i < 16; i++) {
 			if (intnum == sysint1_assign[i] &&
 			    (mask1 & ((uint16_t)1 << i))) {
+#ifdef CONFIG_GPIO_VR41XX
 				if (i == 8)
 					giuint_irq_dispatch(regs);
 				else
+#endif
 					do_IRQ(SYSINT1_IRQ(i), regs);
 				return;
 			}
@@ -698,8 +702,10 @@
 
 /*=======================================================================*/
 
-static int __init vr41xx_icu_init(void)
+static inline void init_vr41xx_icu_irq(void)
 {
+	int i;
+
 	switch (current_cpu_data.cputype) {
 	case CPU_VR4111:
 	case CPU_VR4121:
@@ -723,17 +729,6 @@
 	write_icu2(0, MSYSINT2REG);
 	write_icu2(0xffff, MGIUINTHREG);
 
-	return 0;
-}
-
-early_initcall(vr41xx_icu_init);
-
-/*=======================================================================*/
-
-static inline void init_vr41xx_icu_irq(void)
-{
-	int i;
-
 	for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++)
 		irq_desc[i].handler = &sysint1_irq_type;
 
@@ -751,7 +746,9 @@
 {
 	mips_cpu_irq_init(MIPS_CPU_IRQ_BASE);
 	init_vr41xx_icu_irq();
+#ifdef CONFIG_GPIO_VR41XX
 	init_vr41xx_giuint_irq();
+#endif
 
 	set_except_vector(0, vr41xx_handle_interrupt);
 }

---

From: Yoichi Yuasa <[email-masked]>
Date: Fri, 18 Mar 2005 00:47:50 +0900

Hello again,

On Tue, 8 Mar 2005 01:44:20 +0900

> Next I'll send giu.c update.

This is giu.c update.

Yoichi

diff -urN -X dontdiff a-orig/arch/mips/vr41xx/Kconfig a/arch/mips/vr41xx/Kconfig
--- a-orig/arch/mips/vr41xx/Kconfig	Tue Mar  8 08:10:16 2005
+++ a/arch/mips/vr41xx/Kconfig	Sun Mar 13 23:45:57 2005
@@ -98,7 +98,7 @@
 	depends on MACH_VR41XX && PCI
 
 config GPIO_VR41XX
-	bool "Add General-purpose I/O unit support of NEC VR4100 series"
+	tristate "Add General-purpose I/O unit support of NEC VR4100 series"
 	depends on MACH_VR41XX
 
 config VRC4171
diff -urN -X dontdiff a-orig/arch/mips/vr41xx/common/giu.c a/arch/mips/vr41xx/common/giu.c
--- a-orig/arch/mips/vr41xx/common/giu.c	Sun Jan 16 22:34:31 2005
+++ a/arch/mips/vr41xx/common/giu.c	Thu Mar 17 01:09:47 2005
@@ -3,8 +3,7 @@
  *
  *  Copyright (C) 2002 MontaVista Software Inc.
  *    Author: Yoichi Yuasa <[email-masked] or [email-masked]>
- *  Copyright (C) 2003-2004  Yoichi Yuasa <[email-masked]>
- *  Copyright (C) 2005 Ralf Baechle ([email-masked])
+ *  Copyright (C) 2003-2005  Yoichi Yuasa <[email-masked]>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -29,6 +28,7 @@
  *  - Added support for NEC VR4133.
  *  - Removed board_irq_init.
  */
+#include <linux/config.h>
 #include <linux/errno.h>
 #include <linux/init.h>
 #include <linux/irq.h>
@@ -63,12 +63,6 @@
 
 static uint32_t giu_base;
 
-static struct irqaction giu_cascade = {
-	.handler	= no_action,
-	.mask		= CPU_MASK_NONE,
-	.name		= "cascade",
-};
-
 #define read_giuint(offset)		readw(giu_base + (offset))
 #define write_giuint(val, offset)	writew((val), giu_base + (offset))
 
@@ -192,18 +186,20 @@
 	.end		= end_giuint_high_irq,
 };
 
-void __init init_vr41xx_giuint_irq(void)
+void vr41xx_enable_giuint(unsigned int pin)
 {
-	int i;
-
-	for (i = GIU_IRQ_BASE; i <= GIU_IRQ_LAST; i++) {
-		if (i < (GIU_IRQ_BASE + GIUINT_HIGH_OFFSET))
-			irq_desc[i].handler = &giuint_low_irq_type;
-		else
-			irq_desc[i].handler = &giuint_high_irq_type;
-	}
+	if (pin < GIUINT_HIGH_OFFSET)
+		enable_giuint_low_irq(GIU_IRQ(pin));
+	else
+		enable_giuint_high_irq(GIU_IRQ(pin));
+}
 
-	setup_irq(GIUINT_CASCADE_IRQ, &giu_cascade);
+void vr41xx_disable_giuint(unsigned int pin)
+{
+	if (pin < GIUINT_HIGH_OFFSET)
+		disable_giuint_low_irq(GIU_IRQ(pin));
+	else
+		disable_giuint_high_irq(GIU_IRQ(pin));
 }
 
 void vr41xx_set_irq_trigger(int pin, int trigger, int hold)
@@ -296,6 +292,8 @@
 
 EXPORT_SYMBOL(vr41xx_set_irq_level);
 
+#ifndef MODULE
+
 #define GIUINT_NR_IRQS		32
 
 enum {
@@ -310,6 +308,12 @@
 
 static struct vr41xx_giuint_cascade giuint_cascade[GIUINT_NR_IRQS];
 
+static struct irqaction giu_cascade = {
+	.handler	= no_action,
+	.mask		= CPU_MASK_NONE,
+	.name		= "cascade",
+};
+
 static int no_irq_number(int irq)
 {
 	return -EINVAL;
@@ -421,7 +425,7 @@
 	enable_irq(GIUINT_CASCADE_IRQ);
 }
 
-static int __init vr41xx_giu_init(void)
+void __init init_vr41xx_giuint_irq(void)
 {
 	int i;
 
@@ -437,7 +441,7 @@
 		break;
 	default:
 		printk(KERN_ERR "GIU: Unexpected CPU of NEC VR4100 series\n");
-		return -EINVAL;
+		return;
 	}
 
 	for (i = 0; i < GIUINT_NR_IRQS; i++) {
@@ -449,7 +453,14 @@
 		giuint_cascade[i].get_irq_number = no_irq_number;
 	}
 
-	return 0;
+	for (i = GIU_IRQ_BASE; i <= GIU_IRQ_LAST; i++) {
+		if (i < (GIU_IRQ_BASE + GIUINT_HIGH_OFFSET))
+			irq_desc[i].handler = &giuint_low_irq_type;
+		else
+			irq_desc[i].handler = &giuint_high_irq_type;
+	}
+
+	setup_irq(GIUINT_CASCADE_IRQ, &giu_cascade);
 }
 
-early_initcall(vr41xx_giu_init);
+#endif

---

From: Ralf Baechle <[email-masked]>
Date: Sun, 20 Mar 2005 22:14:59 +0000

> Yoichi

Thanks Yoichi, applied.

  Ralf