From zhzhl555@gmail.com Thu Dec 1 09:50:23 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 01 Dec 2011 09:50:32 +0100 (CET) Received: from mail-gy0-f177.google.com ([209.85.160.177]:54352 "EHLO mail-gy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903667Ab1LAIuX (ORCPT ); Thu, 1 Dec 2011 09:50:23 +0100 Received: by ghrr19 with SMTP id r19so1901064ghr.36 for ; Thu, 01 Dec 2011 00:50:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=xVPIZ0RCNWs7PtK+hpQUuO0u+kMc2Kiyuzh4yTUTZcI=; b=OuzBI246+Fc4+X9+uUtMm330EXkAhTVOfSNTVnykp3LSn711wSTnd8e4qVFOjdzou+ 639qV15TPR5KsaVz/3/FIVNd5cDrR4TRG8YiIkh8B7kORpz1cJiVq2+UzkKuWyUj26+c fACsPNF3TZydwnICWVd3mbs9lixmP0diL/PCw= Received: by 10.101.6.3 with SMTP id j3mr1433164ani.49.1322729417587; Thu, 01 Dec 2011 00:50:17 -0800 (PST) Received: from localhost.localdomain ([182.148.112.76]) by mx.google.com with ESMTPS id x17sm13464994anj.18.2011.12.01.00.50.08 (version=SSLv3 cipher=OTHER); Thu, 01 Dec 2011 00:50:16 -0800 (PST) From: zhzhl555@gmail.com To: a.zummo@towertech.it, rtc-linux@googlegroups.com, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org Cc: ralf@linux-mips.org, keguang.zhang@gmail.com, wuzhangjin@gmail.com, r0bertz@gentoo.org, zhao zhang Subject: [PATCH] MIPS: Add RTC support for loongson1B Date: Thu, 1 Dec 2011 16:44:38 +0800 Message-Id: <1322729078-6141-1-git-send-email-zhzhl555@gmail.com> X-Mailer: git-send-email 1.7.0.4 X-archive-position: 32015 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zhzhl555@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 344 Content-Length: 7549 Lines: 265 From: zhao zhang V2: use new module_platform_driver macro. thanks for Wolfram's advice. This patch adds RTC support(TOY counter0) for loongson1B. Signed-off-by: zhao zhang --- drivers/rtc/Kconfig | 10 ++ drivers/rtc/Makefile | 1 + drivers/rtc/rtc-ls1x.c | 214 ++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 225 insertions(+), 0 deletions(-) create mode 100644 drivers/rtc/rtc-ls1x.c diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 5a538fc..6f8c2d7 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -1070,4 +1070,14 @@ config RTC_DRV_PUV3 This drive can also be built as a module. If so, the module will be called rtc-puv3. +config RTC_DRV_LOONGSON1 + tristate "loongson1 RTC support" + depends on MACH_LOONGSON1 + help + This is a driver for the loongson1 on-chip Counter0 (Time-Of-Year + counter) to be used as a RTC. + + This driver can also be built as a module. If so, the module + will be called rtc-ls1x. + endif # RTC_CLASS diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 6e69823..48153fe 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -109,3 +109,4 @@ obj-$(CONFIG_RTC_DRV_VT8500) += rtc-vt8500.o obj-$(CONFIG_RTC_DRV_WM831X) += rtc-wm831x.o obj-$(CONFIG_RTC_DRV_WM8350) += rtc-wm8350.o obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o +obj-$(CONFIG_RTC_DRV_LOONGSON1) += rtc-ls1x.o diff --git a/drivers/rtc/rtc-ls1x.c b/drivers/rtc/rtc-ls1x.c new file mode 100644 index 0000000..79db272 --- /dev/null +++ b/drivers/rtc/rtc-ls1x.c @@ -0,0 +1,214 @@ +/* + * Copyright (c) 2011 Zhao Zhang + * + * Derived from driver/rtc/rtc-au1xxx.c + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define LS1X_RTC_REG_OFFSET (LS1X_RTC_BASE + 0x20) +#define LS1X_RTC_REGS(x) \ + ((void __iomem *)KSEG1ADDR(LS1X_RTC_REG_OFFSET + (x))) + +/*RTC programmable counters 0 and 1*/ +#define SYS_COUNTER_CNTRL (LS1X_RTC_REGS(0x20)) +#define SYS_CNTRL_ERS (1 << 23) +#define SYS_CNTRL_RTS (1 << 20) +#define SYS_CNTRL_RM2 (1 << 19) +#define SYS_CNTRL_RM1 (1 << 18) +#define SYS_CNTRL_RM0 (1 << 17) +#define SYS_CNTRL_RS (1 << 16) +#define SYS_CNTRL_BP (1 << 14) +#define SYS_CNTRL_REN (1 << 13) +#define SYS_CNTRL_BRT (1 << 12) +#define SYS_CNTRL_TEN (1 << 11) +#define SYS_CNTRL_BTT (1 << 10) +#define SYS_CNTRL_E0 (1 << 8) +#define SYS_CNTRL_ETS (1 << 7) +#define SYS_CNTRL_32S (1 << 5) +#define SYS_CNTRL_TTS (1 << 4) +#define SYS_CNTRL_TM2 (1 << 3) +#define SYS_CNTRL_TM1 (1 << 2) +#define SYS_CNTRL_TM0 (1 << 1) +#define SYS_CNTRL_TS (1 << 0) + +/* Programmable Counter 0 Registers */ +#define SYS_TOYTRIM (LS1X_RTC_REGS(0)) +#define SYS_TOYWRITE0 (LS1X_RTC_REGS(4)) +#define SYS_TOYWRITE1 (LS1X_RTC_REGS(8)) +#define SYS_TOYREAD0 (LS1X_RTC_REGS(0xC)) +#define SYS_TOYREAD1 (LS1X_RTC_REGS(0x10)) +#define SYS_TOYMATCH0 (LS1X_RTC_REGS(0x14)) +#define SYS_TOYMATCH1 (LS1X_RTC_REGS(0x18)) +#define SYS_TOYMATCH2 (LS1X_RTC_REGS(0x1C)) + +/* Programmable Counter 1 Registers */ +#define SYS_RTCTRIM (LS1X_RTC_REGS(0x40)) +#define SYS_RTCWRITE0 (LS1X_RTC_REGS(0x44)) +#define SYS_RTCREAD0 (LS1X_RTC_REGS(0x48)) +#define SYS_RTCMATCH0 (LS1X_RTC_REGS(0x4C)) +#define SYS_RTCMATCH1 (LS1X_RTC_REGS(0x50)) +#define SYS_RTCMATCH2 (LS1X_RTC_REGS(0x54)) + +#define LS1X_SEC_OFFSET (4) +#define LS1X_MIN_OFFSET (10) +#define LS1X_HOUR_OFFSET (16) +#define LS1X_DAY_OFFSET (21) +#define LS1X_MONTH_OFFSET (26) + + +#define LS1X_SEC_MASK (0x3f) +#define LS1X_MIN_MASK (0x3f) +#define LS1X_HOUR_MASK (0x1f) +#define LS1X_DAY_MASK (0x1f) +#define LS1X_MONTH_MASK (0x3f) +#define LS1X_YEAR_MASK (0xffffffff) + +#define ls1x_get_sec(t) (((t) >> LS1X_SEC_OFFSET) & LS1X_SEC_MASK) +#define ls1x_get_min(t) (((t) >> LS1X_MIN_OFFSET) & LS1X_MIN_MASK) +#define ls1x_get_hour(t) (((t) >> LS1X_HOUR_OFFSET) & LS1X_HOUR_MASK) +#define ls1x_get_day(t) (((t) >> LS1X_DAY_OFFSET) & LS1X_DAY_MASK) +#define ls1x_get_month(t) (((t) >> LS1X_MONTH_OFFSET) & LS1X_MONTH_MASK) + +#define RTC_CNTR_OK (SYS_CNTRL_E0 | SYS_CNTRL_32S) + +static int ls1x_rtc_read_time(struct device *dev, struct rtc_time *rtm) +{ + unsigned long v, t; + + v = readl(SYS_TOYREAD0); + t = readl(SYS_TOYREAD1); + + memset(rtm, 0, sizeof(struct rtc_time)); + t = mktime((t & LS1X_YEAR_MASK), ls1x_get_month(v), + ls1x_get_day(v), ls1x_get_hour(v), + ls1x_get_min(v), ls1x_get_sec(v)); + rtc_time_to_tm(t, rtm); + + return rtc_valid_tm(rtm); +} + +static int ls1x_rtc_set_time(struct device *dev, struct rtc_time *rtm) +{ + unsigned long v, t, c; + int ret = -ETIMEDOUT; + + v = ((rtm->tm_mon + 1) << LS1X_MONTH_OFFSET) + | (rtm->tm_mday << LS1X_DAY_OFFSET) + | (rtm->tm_hour << LS1X_HOUR_OFFSET) + | (rtm->tm_min << LS1X_MIN_OFFSET) + | (rtm->tm_sec << LS1X_SEC_OFFSET); + + writel(v, SYS_TOYWRITE0); + __asm__ volatile ("sync"); + c = 0x10000; + /* add timeout check counter, for more safe */ + while ((readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TS) && --c) + usleep_range(1000, 3000); + + if (!c) { + dev_err(dev, "set time timeout!\n"); + goto err; + } + + t = rtm->tm_year + 1900; + writel(t, SYS_TOYWRITE1); + __asm__ volatile ("sync"); + c = 0x10000; + while ((readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TS) && --c) + usleep_range(1000, 3000); + + if (!c) { + dev_err(dev, "set time timeout!\n"); + goto err; + } + return 0; +err: + return ret; +} + +static struct rtc_class_ops ls1x_rtc_ops = { + .read_time = ls1x_rtc_read_time, + .set_time = ls1x_rtc_set_time, +}; + +static int __devinit ls1x_rtc_probe(struct platform_device *pdev) +{ + struct rtc_device *rtcdev; + unsigned long v; + int ret; + + v = readl(SYS_COUNTER_CNTRL); + if (!(v & RTC_CNTR_OK)) { + dev_err(&pdev->dev, "rtc counters not working\n"); + ret = -ENODEV; + goto err; + } + ret = -ETIMEDOUT; + /* set to 1 HZ if needed */ + if (readl(SYS_TOYTRIM) != 32767) { + v = 0x100000; + while ((readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TTS) && --v) + usleep_range(1000, 3000); + + if (!v) { + dev_err(&pdev->dev, "time out\n"); + goto err; + } + writel(32767, SYS_TOYTRIM); + __asm__ volatile("sync"); + } + /* this loop coundn't be endless */ + while (readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TTS) + usleep_range(1000, 3000); + + rtcdev = rtc_device_register("ls1x-rtc", &pdev->dev, + &ls1x_rtc_ops , THIS_MODULE); + if (IS_ERR(rtcdev)) { + ret = PTR_ERR(rtcdev); + goto err; + } + + platform_set_drvdata(pdev, rtcdev); + return 0; +err: + return ret; +} + +static int __devexit ls1x_rtc_remove(struct platform_device *pdev) +{ + struct rtc_device *rtcdev = platform_get_drvdata(pdev); + + rtc_device_unregister(rtcdev); + platform_set_drvdata(pdev, NULL); + + return 0; +} + +static struct platform_driver ls1x_rtc_driver = { + .driver = { + .name = "ls1x-rtc", + .owner = THIS_MODULE, + }, + .remove = __devexit_p(ls1x_rtc_remove), + .probe = ls1x_rtc_probe, +}; + +module_platform_driver(ls1x_rtc_driver); + +MODULE_AUTHOR("zhao zhang "); +MODULE_LICENSE("GPL"); + -- 1.7.0.4 From axel.lin@gmail.com Thu Dec 1 15:04:24 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 01 Dec 2011 15:04:29 +0100 (CET) Received: from mail-qw0-f42.google.com ([209.85.216.42]:61473 "EHLO mail-qw0-f42.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903708Ab1LAOEY (ORCPT ); Thu, 1 Dec 2011 15:04:24 +0100 Received: by qabg40 with SMTP id g40so4026679qab.15 for ; Thu, 01 Dec 2011 06:04:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=message-id:subject:from:to:cc:date:content-type:x-mailer :content-transfer-encoding:mime-version; bh=sFQWSnBEzG5MYOVg2yV3FugcyoDTXl/YnxixIx5iKAY=; b=TsxK2jBDt7D+cBSdk/TWjwgIcl/oEgYxdmjJjUqwOwuozo5XnnXjAP9sJgRFEa4j/y GMtSQqSvpEymoPk8eO3ONClNxhYBosFxvZBuTeYyMDd3MrbRqzk0Wh8ujXRhXM7sNYvb 3N9fEmNuRCnrVXCIsvYKADzH5rNqvu5WYAoMo= Received: by 10.229.62.227 with SMTP id y35mr1315325qch.54.1322748257607; Thu, 01 Dec 2011 06:04:17 -0800 (PST) Received: from [218.172.233.210] (218-172-233-210.dynamic.hinet.net. [218.172.233.210]) by mx.google.com with ESMTPS id cd3sm5741784qab.5.2011.12.01.06.04.13 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 01 Dec 2011 06:04:16 -0800 (PST) Message-ID: <1322748247.31743.1.camel@phoenix> Subject: [PATCH] MTD: nand: Convert au1550nd to use module_platform_driver() From: Axel Lin To: linux-mips@linux-mips.org Cc: Manuel Lauss , Artem Bityutskiy , Ralf Baechle , linux-mtd@lists.infradead.org Date: Thu, 01 Dec 2011 22:04:07 +0800 Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.1- Content-Transfer-Encoding: 7bit Mime-Version: 1.0 X-archive-position: 32016 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: axel.lin@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 574 Content-Length: 1285 Lines: 47 Cc: Manuel Lauss Cc: Artem Bityutskiy Cc: Ralf Baechle Signed-off-by: Axel Lin --- Hi Ralf, This patch converts au1550nd to use module_platform_driver(). You have committed a5bd32fd "MTD: nand: make au1550nd.c a platform_driver". Currently this patch can only apply to either your tree or linux-next. Could you help to take it. ( committed a5bd32fd does not exist in l2-mtd-2.6.git, so Artem cannot apply it.) Thanks, Axel drivers/mtd/nand/au1550nd.c | 12 +----------- 1 files changed, 1 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c index 77fb4e6..73abbc3 100644 --- a/drivers/mtd/nand/au1550nd.c +++ b/drivers/mtd/nand/au1550nd.c @@ -560,17 +560,7 @@ static struct platform_driver au1550nd_driver = { .remove = __devexit_p(au1550nd_remove), }; -static int __init au1550nd_load(void) -{ - return platform_driver_register(&au1550nd_driver); -}; - -static void __exit au1550nd_exit(void) -{ - platform_driver_unregister(&au1550nd_driver); -}; -module_init(au1550nd_load); -module_exit(au1550nd_exit); +module_platform_driver(au1550nd_driver); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Embedded Edge, LLC"); -- 1.7.5.4 From ddaney.cavm@gmail.com Thu Dec 1 18:51:30 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 01 Dec 2011 18:51:35 +0100 (CET) Received: from mail-gx0-f177.google.com ([209.85.161.177]:35639 "EHLO mail-gx0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903715Ab1LARva (ORCPT ); Thu, 1 Dec 2011 18:51:30 +0100 Received: by ggki1 with SMTP id i1so2485863ggk.36 for ; Thu, 01 Dec 2011 09:51:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=bOQaYvlKPp1eDt9+Cu4uXN0qAtG/eZ4/BqmeZgxxF7o=; b=QSjVEpU3qBQeQpAw+5HE++bPvSaZEnDg3+wf5+UPBq8rF7Ub2EKmU+fK2eNF17vplU +tTAfDriGpSsnhy+HbE2uBDmjpwUPVyaxaXLxoq7mLto8OMZtRdR7xLjv/bCHhq6FmDh 4gaW/ymSnCl0Gj49d4Zbf3ia9TGyUOkuC4NaQ= Received: by 10.50.196.137 with SMTP id im9mr9560615igc.32.1322761883798; Thu, 01 Dec 2011 09:51:23 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id ew6sm12919716igc.4.2011.12.01.09.51.22 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 01 Dec 2011 09:51:23 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pB1HpLIh030253; Thu, 1 Dec 2011 09:51:21 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pB1HpIaw030252; Thu, 1 Dec 2011 09:51:18 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: David Daney Subject: [PATCH] MIPS: Octeon: Don't increase PCIe payload sizes. Date: Thu, 1 Dec 2011 09:51:17 -0800 Message-Id: <1322761877-30221-1-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 X-archive-position: 32017 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 787 Content-Length: 1653 Lines: 43 From: David Daney The existing code breaks devices that are capable of large PCIe transfers (Silicon Image SATA controllers for example). We don't have code to properly determine the maximum payload size on a per-bus basis, so the easiest thing to do is just have all devices use the default (128). Signed-off-by: David Daney --- arch/mips/pci/pci-octeon.c | 10 ---------- 1 files changed, 0 insertions(+), 10 deletions(-) diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c index e2ca7de..52a1ba7 100644 --- a/arch/mips/pci/pci-octeon.c +++ b/arch/mips/pci/pci-octeon.c @@ -119,22 +119,12 @@ int pcibios_plat_dev_init(struct pci_dev *dev) /* Enable the PCIe normal error reporting */ pos = pci_find_capability(dev, PCI_CAP_ID_EXP); if (pos) { - pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP, &dconfig); /* Update Device Control */ pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &config); config |= PCI_EXP_DEVCTL_CERE; /* Correctable Error Reporting */ config |= PCI_EXP_DEVCTL_NFERE; /* Non-Fatal Error Reporting */ config |= PCI_EXP_DEVCTL_FERE; /* Fatal Error Reporting */ config |= PCI_EXP_DEVCTL_URRE; /* Unsupported Request */ - /* - * Octeon's max payload is 256 bytes. Set the device's - * to that unless it can't go that big - */ - if ((dconfig & PCI_EXP_DEVCAP_PAYLOAD) >= 1) - config = (config & ~PCI_EXP_DEVCTL_PAYLOAD) | (1 << 5); - /* Set the max read size to 4KB, Octeon's max */ - config = (config & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12); - pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, config); } -- 1.7.2.3 From ddaney.cavm@gmail.com Fri Dec 2 19:02:19 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 02 Dec 2011 19:02:23 +0100 (CET) Received: from mail-gy0-f177.google.com ([209.85.160.177]:44844 "EHLO mail-gy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903832Ab1LBSCT (ORCPT ); Fri, 2 Dec 2011 19:02:19 +0100 Received: by ghrr19 with SMTP id r19so3683758ghr.36 for ; Fri, 02 Dec 2011 10:02:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=qCLRXIDErTwNw8e0bYWQCQFmdnBCblhb8KevHAQXRU4=; b=jXFsk5xRK1oHEW4gwjJLgSNcZl+PmIE9yFwXxLpdF4YzBfWd9HtRrU0ksZ2Aermeec l1CeKqqkCELSqKsfThdE0HzOQnZXWrvsFnvN2F95abG3fUOZ+S1fPqHiu8suCVLndUw9 6H+6rfe7kFtfOsg3zNCjBe3XrqykDoZIbNGOw= Received: by 10.101.158.28 with SMTP id k28mr3225160ano.7.1322848932766; Fri, 02 Dec 2011 10:02:12 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id n64sm16772721yhk.4.2011.12.02.10.02.11 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 02 Dec 2011 10:02:12 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pB2I29hC016154; Fri, 2 Dec 2011 10:02:09 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pB2I29vc016153; Fri, 2 Dec 2011 10:02:09 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: David Daney Subject: [PATCH resend] MIPS: Get rid of some #ifdefery in arch/mips/mm/tlb-r4k.c Date: Fri, 2 Dec 2011 10:02:07 -0800 Message-Id: <1322848927-16122-1-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 X-archive-position: 32018 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 1749 Content-Length: 1436 Lines: 48 From: David Daney In the case of !CONFIG_HUGETLB_PAGE, in linux/hugetlb.h we have this definition: #define pmd_huge(x) 0 The other huge page constants in the if(pmd_huge()) block are likewise defined, so we can get rid of the #ifdef CONFIG_HUGETLB_PAGE an let the compiler optimize this block away instead. Doing this the code has a much cleaner appearance. Signed-off-by: David Daney --- The first attempt as sending the patch resulted in a corrupt change log, no change other than correcting the log. arch/mips/mm/tlb-r4k.c | 6 ++---- 1 files changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index 88dc49c..f93af98 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c @@ -305,7 +305,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte) pudp = pud_offset(pgdp, address); pmdp = pmd_offset(pudp, address); idx = read_c0_index(); -#ifdef CONFIG_HUGETLB_PAGE + /* this could be a huge page */ if (pmd_huge(*pmdp)) { unsigned long lo; @@ -321,9 +321,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte) else tlb_write_indexed(); write_c0_pagemask(PM_DEFAULT_MASK); - } else -#endif - { + } else { ptep = pte_offset_map(pmdp, address); #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) -- 1.7.2.3 From mst@redhat.com Sun Dec 4 11:46:09 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 04 Dec 2011 11:46:18 +0100 (CET) Received: from mx1.redhat.com ([209.132.183.28]:5772 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903562Ab1LDKqJ (ORCPT ); Sun, 4 Dec 2011 11:46:09 +0100 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id pB4Ak6V1022564 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Sun, 4 Dec 2011 05:46:07 -0500 Received: from redhat.com (vpn-202-5.tlv.redhat.com [10.35.202.5]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with SMTP id pB4Ak3OF014316; Sun, 4 Dec 2011 05:46:05 -0500 Date: Sun, 4 Dec 2011 12:47:48 +0200 From: "Michael S. Tsirkin" To: Ralf Baechle , linux-mips@linux-mips.org Subject: Re: [PATCH-RFC 06/10] mips: switch to GENERIC_PCI_IOMAP Message-ID: <20111204104748.GH15464@redhat.com> References: <66457f7750d7d14229fcf8d0b011aba63185a75d.1322163031.git.mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <66457f7750d7d14229fcf8d0b011aba63185a75d.1322163031.git.mst@redhat.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-Scanned-By: MIMEDefang 2.67 on 10.5.11.12 X-archive-position: 32019 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: mst@redhat.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2487 Content-Length: 2174 Lines: 67 On Thu, Nov 24, 2011 at 10:18:37PM +0200, Michael S. Tsirkin wrote: > mips copied pci_iomap from generic code, probably to avoid > pulling the rest of iomap.c in. Since that's in > a separate file now, we can reuse the common implementation. > > Signed-off-by: Michael S. Tsirkin > --- Sorry to nag, any ACKs/NACKs on the mips part? I intend to send this to Linus if there are no objections. Thanks! > arch/mips/Kconfig | 1 + > arch/mips/lib/iomap-pci.c | 26 -------------------------- > 2 files changed, 1 insertions(+), 26 deletions(-) > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > index d46f1da..b70c96f 100644 > --- a/arch/mips/Kconfig > +++ b/arch/mips/Kconfig > @@ -2317,6 +2317,7 @@ config PCI > bool "Support for PCI controller" > depends on HW_HAS_PCI > select PCI_DOMAINS > + select GENERIC_PCI_IOMAP > help > Find out whether you have a PCI motherboard. PCI is the name of a > bus system, i.e. the way the CPU talks to the other stuff inside > diff --git a/arch/mips/lib/iomap-pci.c b/arch/mips/lib/iomap-pci.c > index 2ab899c..2635b1a 100644 > --- a/arch/mips/lib/iomap-pci.c > +++ b/arch/mips/lib/iomap-pci.c > @@ -40,32 +40,6 @@ static void __iomem *ioport_map_pci(struct pci_dev *dev, > return (void __iomem *) (ctrl->io_map_base + port); > } > > -/* > - * Create a virtual mapping cookie for a PCI BAR (memory or IO) > - */ > -void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) > -{ > - resource_size_t start = pci_resource_start(dev, bar); > - resource_size_t len = pci_resource_len(dev, bar); > - unsigned long flags = pci_resource_flags(dev, bar); > - > - if (!len || !start) > - return NULL; > - if (maxlen && len > maxlen) > - len = maxlen; > - if (flags & IORESOURCE_IO) > - return ioport_map_pci(dev, start, len); > - if (flags & IORESOURCE_MEM) { > - if (flags & IORESOURCE_CACHEABLE) > - return ioremap(start, len); > - return ioremap_nocache(start, len); > - } > - /* What? */ > - return NULL; > -} > - > -EXPORT_SYMBOL(pci_iomap); > - > void pci_iounmap(struct pci_dev *dev, void __iomem * addr) > { > iounmap(addr); > -- > 1.7.5.53.gc233e From dedekind1@gmail.com Sun Dec 4 15:14:37 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 04 Dec 2011 15:14:45 +0100 (CET) Received: from mail-iy0-f177.google.com ([209.85.210.177]:42147 "EHLO mail-iy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903601Ab1LDOOh (ORCPT ); Sun, 4 Dec 2011 15:14:37 +0100 Received: by iaby26 with SMTP id y26so10484iab.36 for ; Sun, 04 Dec 2011 06:14:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:date:in-reply-to:references :content-type:x-mailer:message-id:mime-version; bh=+9NaFgEwnFftoqhyZgk+TX8VWc1KZ8I7MJFuzxrwSNA=; b=On4/qfBgcwSe8KRsAEpLF7Je7KBRPwLgLheKUB42VmKnkp0BdnJXH5YSza2Cjo9YyS LDN5x9VMt5zDPMP8V9ftmY40+VxDL6y0BdbkOThSCCZO3w1YYRV0fTv+RFhU67mNS6QU MTWCjA1m7XsyvZ4bmOnhS6DfMbgdxOIfUnEW4= Received: by 10.231.81.146 with SMTP id x18mr1465373ibk.23.1323008070883; Sun, 04 Dec 2011 06:14:30 -0800 (PST) Received: from [127.0.0.1] (jfdmzpr01-ext.jf.intel.com. [134.134.139.70]) by mx.google.com with ESMTPS id wo4sm35093372igc.5.2011.12.04.06.14.27 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 04 Dec 2011 06:14:29 -0800 (PST) Subject: Re: [PATCH] MTD: nand: Convert au1550nd to use module_platform_driver() From: Artem Bityutskiy Reply-To: dedekind1@gmail.com To: Axel Lin Cc: linux-mips@linux-mips.org, Manuel Lauss , Ralf Baechle , linux-mtd@lists.infradead.org Date: Sun, 04 Dec 2011 16:15:32 +0200 In-Reply-To: <1322748247.31743.1.camel@phoenix> References: <1322748247.31743.1.camel@phoenix> Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-inji+l5rPcf7ZbYZlN52" X-Mailer: Evolution 3.0.3 (3.0.3-1.fc15) Message-ID: <1323008139.9400.59.camel@sauron.fi.intel.com> Mime-Version: 1.0 X-archive-position: 32020 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dedekind1@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2548 Content-Length: 1839 Lines: 51 --=-inji+l5rPcf7ZbYZlN52 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2011-12-01 at 22:04 +0800, Axel Lin wrote: > Cc: Manuel Lauss > Cc: Artem Bityutskiy > Cc: Ralf Baechle > Signed-off-by: Axel Lin > --- > Hi Ralf, > This patch converts au1550nd to use module_platform_driver(). > You have committed a5bd32fd "MTD: nand: make au1550nd.c a platform_driver= ". > Currently this patch can only apply to either your tree or linux-next. > Could you help to take it. > ( committed a5bd32fd does not exist in l2-mtd-2.6.git, > so Artem cannot apply it.) Yes, please, merge the au1550nd.c piece via Ralf, thanks! --=20 Best Regards, Artem Bityutskiy --=-inji+l5rPcf7ZbYZlN52 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJO24CEAAoJECmIfjd9wqK0e7wQAMJWcelDQxxBzqU/aQa/lnZ2 U3QUnVGStwLCL3ADXSPCqQ2P3a2mdPZdljcjYntg4GtDlq6k84a3O9qz6sigw+ts WgXZ/E2RUy6vqvoPOtSJHL1jbqI8pF5+4hcOErbGeidssNVpG4RAyvfRxocD86dt B9L2rQFBqFGyzdVc13F/hxtsGpk8ROx0UlsMO4ymrAnyNqSv4nyeT/UNEd+tUvje ZpZhPl5RTTOx+R5gq2U4RGM9Dm7GEGKldBTMH84TJGC2abx/xmQ35e4WWT5uoqrA y6gWBgz2AvNILyvouW5Fsuh2cVTgxrVFueYBR4rMNNlHSU7uDWdMJCDYIj2aZmL4 prrAWmtlYDOuMLZoz9DOM/3JpjppURHxkjKf48xQt/M4eEoJCUgUVoD0WIkPrGOg e+lTfwefyEgrDBP8BbGbplPBJOzeEgCXeO+WhTpnsOCYjbVw5Zv2oqZwG8Lw8CpI vjCG7nmQhyoTMD9wKRLNPjyZsIFREh90aeGl9qMqYdRQnzZGQShmo9chh+3K1st5 MYWqCZAFenUVTaSg5bhGqH7uZqEaQCQYmMkfoc+l7TdUxTz9aBTtjwUnXnOcIxoA 8oVAENtvSXAjRdu4JoF1vq2QyQ+PpIjiBlwfM+hBvIcVrwKaM9mNG68FAj2ZsObs mt+t/7SFmpfdpKsEqhP0 =/ziI -----END PGP SIGNATURE----- --=-inji+l5rPcf7ZbYZlN52-- From sven@narfation.org Sun Dec 4 16:43:37 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 04 Dec 2011 16:43:49 +0100 (CET) Received: from narfation.org ([79.140.41.39]:38038 "EHLO v3-1039.vlinux.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903599Ab1LDPnh (ORCPT ); Sun, 4 Dec 2011 16:43:37 +0100 Received: from sven-desktop.home.narfation.org (i59F6CF54.versanet.de [89.246.207.84]) by v3-1039.vlinux.de (Postfix) with ESMTPSA id 0F76E94020; Sun, 4 Dec 2011 16:45:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=narfation.org; s=mail; t=1323013518; bh=ljJU4DziTxk3aZj9c1odmffc5pR06NzuWNrMqiDNdWY=; h=From:To:Cc:Subject:Date:Message-Id; b=lgFswlTZ7diGibeNubwa7JNi/sz3sRApRaEW28Eh0K3K8xGbLTyGx3Der8Xt2plb/ nGlj/Zk0S1mTjxRTH+FAes1skf7cERNu7f6WYDn2ReYpTrTPj1RDOnsENp/c5dThkA XG6BE7f8Rr41YZwBi35OBB+9hnA0+jAyeAyNCSGc= From: Sven Eckelmann To: Andrew Morton Cc: linux-arch@vger.kernel.org, b.a.t.m.a.n@lists.open-mesh.org, Sven Eckelmann , Randy Dunlap , Richard Henderson , Ivan Kokshaysky , Matt Turner , Russell King , Tony Luck , Fenghua Yu , Hirokazu Takata , Ralf Baechle , Kyle McMartin , Helge Deller , "James E.J. Bottomley" , Benjamin Herrenschmidt , Paul Mackerras , Martin Schwidefsky , Heiko Carstens , linux390@de.ibm.com, "David S. Miller" , Chris Metcalf , Jeff Dike , Richard Weinberger , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Arnd Bergmann , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-alpha@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ia64@vger.kernel.org, linux-m32r@ml.linux-m32r.org, linux-m32r-ja@ml.linux-m32r.org, linux-mips@linux-mips.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net, linux-hexagon@vger.kernel.org Subject: [PATCHv5] atomic: add *_dec_not_zero Date: Sun, 4 Dec 2011 16:42:49 +0100 Message-Id: <1323013369-29691-1-git-send-email-sven@narfation.org> X-Mailer: git-send-email 1.7.7.3 X-archive-position: 32021 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sven@narfation.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2580 Content-Length: 20736 Lines: 539 Introduce an *_dec_not_zero operation. Make this a special case of *_add_unless because batman-adv uses atomic_dec_not_zero in different places like re-broadcast queue or aggregation queue management. There are other non-final patches which may also want to use this macro. Suggested-by: David S. Miller Signed-off-by: Sven Eckelmann Cc: Randy Dunlap Cc: Richard Henderson Cc: Ivan Kokshaysky Cc: Matt Turner Cc: Russell King Cc: Tony Luck Cc: Fenghua Yu Cc: Hirokazu Takata Cc: Ralf Baechle Cc: Kyle McMartin Cc: Helge Deller Cc: "James E.J. Bottomley" Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Martin Schwidefsky Cc: Heiko Carstens Cc: linux390@de.ibm.com Cc: "David S. Miller" Cc: Chris Metcalf Cc: Jeff Dike Cc: Richard Weinberger Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Peter Anvin" Cc: x86@kernel.org Cc: Arnd Bergmann Cc: linux-doc@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-alpha@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-ia64@vger.kernel.org Cc: linux-m32r@ml.linux-m32r.org Cc: linux-m32r-ja@ml.linux-m32r.org Cc: linux-mips@linux-mips.org Cc: linux-parisc@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-s390@vger.kernel.org Cc: sparclinux@vger.kernel.org Cc: user-mode-linux-devel@lists.sourceforge.net Cc: linux-hexagon@vger.kernel.org --- David S. Miller recommended this change in https://lists.open-mesh.org/pipermail/b.a.t.m.a.n/2011-May/004560.html Arnd Bergmann wanted to apply it in 201106172320.26476.arnd@arndb.de ... and then Arun Sharma created a big merge conflict with https://lkml.org/lkml/2011/6/6/430 I don't think that it is a a good idea to assume that everyone still agrees with the patch after I've rewritten it. I try Andrew Morton this time because he applied the last changes to include/linux/atomic.h. There are already two projects (batman-adv/fault_inject) which include their private definition (not conflicting) and I have patches for 9 other modules that could use it. Documentation/atomic_ops.txt | 1 + arch/alpha/include/asm/atomic.h | 1 + arch/alpha/include/asm/local.h | 1 + arch/arm/include/asm/atomic.h | 1 + arch/hexagon/include/asm/atomic.h | 1 + arch/ia64/include/asm/atomic.h | 1 + arch/m32r/include/asm/local.h | 1 + arch/mips/include/asm/atomic.h | 1 + arch/mips/include/asm/local.h | 1 + arch/parisc/include/asm/atomic.h | 1 + arch/powerpc/include/asm/atomic.h | 1 + arch/powerpc/include/asm/local.h | 1 + arch/s390/include/asm/atomic.h | 1 + arch/sparc/include/asm/atomic_64.h | 1 + arch/tile/include/asm/atomic_32.h | 1 + arch/tile/include/asm/atomic_64.h | 1 + arch/x86/include/asm/atomic64_32.h | 12 ++++++++++++ arch/x86/include/asm/atomic64_64.h | 1 + arch/x86/include/asm/local.h | 1 + arch/x86/lib/atomic64_32.c | 4 ++++ arch/x86/lib/atomic64_386_32.S | 21 +++++++++++++++++++++ arch/x86/lib/atomic64_cx8_32.S | 28 ++++++++++++++++++++++++++++ include/asm-generic/atomic-long.h | 2 ++ include/asm-generic/atomic64.h | 1 + include/asm-generic/local.h | 1 + include/asm-generic/local64.h | 2 ++ include/linux/atomic.h | 9 +++++++++ lib/atomic64_test.c | 19 +++++++++++++++++++ 28 files changed, 117 insertions(+), 0 deletions(-) diff --git a/Documentation/atomic_ops.txt b/Documentation/atomic_ops.txt index 3bd585b..1eec221 100644 --- a/Documentation/atomic_ops.txt +++ b/Documentation/atomic_ops.txt @@ -190,6 +190,7 @@ atomic_add_unless requires explicit memory barriers around the operation unless it fails (returns 0). atomic_inc_not_zero, equivalent to atomic_add_unless(v, 1, 0) +atomic_dec_not_zero, equivalent to atomic_add_unless(v, -1, 0) If a caller requires memory barrier semantics around an atomic_t diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h index 640f909..09d1571 100644 --- a/arch/alpha/include/asm/atomic.h +++ b/arch/alpha/include/asm/atomic.h @@ -225,6 +225,7 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) } #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) #define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0) diff --git a/arch/alpha/include/asm/local.h b/arch/alpha/include/asm/local.h index 9c94b84..51eb678 100644 --- a/arch/alpha/include/asm/local.h +++ b/arch/alpha/include/asm/local.h @@ -79,6 +79,7 @@ static __inline__ long local_sub_return(long i, local_t * l) c != (u); \ }) #define local_inc_not_zero(l) local_add_unless((l), 1, 0) +#define local_dec_not_zero(l) local_add_unless((l), -1, 0) #define local_add_negative(a, l) (local_add_return((a), (l)) < 0) diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h index 86976d0..80ed975 100644 --- a/arch/arm/include/asm/atomic.h +++ b/arch/arm/include/asm/atomic.h @@ -458,6 +458,7 @@ static inline int atomic64_add_unless(atomic64_t *v, u64 a, u64 u) #define atomic64_dec_return(v) atomic64_sub_return(1LL, (v)) #define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0) #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL) +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1LL, 0LL) #endif /* !CONFIG_GENERIC_ATOMIC64 */ #endif diff --git a/arch/hexagon/include/asm/atomic.h b/arch/hexagon/include/asm/atomic.h index e220f90..3a1a33a 100644 --- a/arch/hexagon/include/asm/atomic.h +++ b/arch/hexagon/include/asm/atomic.h @@ -148,6 +148,7 @@ static inline int __atomic_add_unless(atomic_t *v, int a, int u) } #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) +#define atomic_dec_not_zero(v) atomic_add_unless((v), -1, 0) #define atomic_inc(v) atomic_add(1, (v)) #define atomic_dec(v) atomic_sub(1, (v)) diff --git a/arch/ia64/include/asm/atomic.h b/arch/ia64/include/asm/atomic.h index 3fad89e..af6e9b2 100644 --- a/arch/ia64/include/asm/atomic.h +++ b/arch/ia64/include/asm/atomic.h @@ -122,6 +122,7 @@ static __inline__ long atomic64_add_unless(atomic64_t *v, long a, long u) } #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) #define atomic_add_return(i,v) \ ({ \ diff --git a/arch/m32r/include/asm/local.h b/arch/m32r/include/asm/local.h index 734bca8..d536082 100644 --- a/arch/m32r/include/asm/local.h +++ b/arch/m32r/include/asm/local.h @@ -272,6 +272,7 @@ static inline int local_add_unless(local_t *l, long a, long u) } #define local_inc_not_zero(l) local_add_unless((l), 1, 0) +#define local_dec_not_zero(l) local_add_unless((l), -1, 0) static inline void local_clear_mask(unsigned long mask, local_t *addr) { diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h index 1d93f81..babb043 100644 --- a/arch/mips/include/asm/atomic.h +++ b/arch/mips/include/asm/atomic.h @@ -697,6 +697,7 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) } #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) #define atomic64_dec_return(v) atomic64_sub_return(1, (v)) #define atomic64_inc_return(v) atomic64_add_return(1, (v)) diff --git a/arch/mips/include/asm/local.h b/arch/mips/include/asm/local.h index 94fde8d..0242256 100644 --- a/arch/mips/include/asm/local.h +++ b/arch/mips/include/asm/local.h @@ -137,6 +137,7 @@ static __inline__ long local_sub_return(long i, local_t * l) c != (u); \ }) #define local_inc_not_zero(l) local_add_unless((l), 1, 0) +#define local_dec_not_zero(l) local_add_unless((l), -1, 0) #define local_dec_return(l) local_sub_return(1, (l)) #define local_inc_return(l) local_add_return(1, (l)) diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h index 4054b31..57b7069 100644 --- a/arch/parisc/include/asm/atomic.h +++ b/arch/parisc/include/asm/atomic.h @@ -334,6 +334,7 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) } #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) #endif /* !CONFIG_64BIT */ diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h index 02e41b5..0798420 100644 --- a/arch/powerpc/include/asm/atomic.h +++ b/arch/powerpc/include/asm/atomic.h @@ -468,6 +468,7 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) } #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) #endif /* __powerpc64__ */ diff --git a/arch/powerpc/include/asm/local.h b/arch/powerpc/include/asm/local.h index b8da913..d182e34 100644 --- a/arch/powerpc/include/asm/local.h +++ b/arch/powerpc/include/asm/local.h @@ -134,6 +134,7 @@ static __inline__ int local_add_unless(local_t *l, long a, long u) } #define local_inc_not_zero(l) local_add_unless((l), 1, 0) +#define local_dec_not_zero(l) local_add_unless((l), -1, 0) #define local_sub_and_test(a, l) (local_sub_return((a), (l)) == 0) #define local_dec_and_test(l) (local_dec_return((l)) == 0) diff --git a/arch/s390/include/asm/atomic.h b/arch/s390/include/asm/atomic.h index 8517d2a..92e7d5d 100644 --- a/arch/s390/include/asm/atomic.h +++ b/arch/s390/include/asm/atomic.h @@ -325,6 +325,7 @@ static inline long long atomic64_dec_if_positive(atomic64_t *v) #define atomic64_dec_return(_v) atomic64_sub_return(1, _v) #define atomic64_dec_and_test(_v) (atomic64_sub_return(1, _v) == 0) #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) #define smp_mb__before_atomic_dec() smp_mb() #define smp_mb__after_atomic_dec() smp_mb() diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h index 9f421df..94cf160 100644 --- a/arch/sparc/include/asm/atomic_64.h +++ b/arch/sparc/include/asm/atomic_64.h @@ -106,6 +106,7 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u) } #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) /* Atomic operations are already serializing */ #define smp_mb__before_atomic_dec() barrier() diff --git a/arch/tile/include/asm/atomic_32.h b/arch/tile/include/asm/atomic_32.h index c03349e..9cfafb3 100644 --- a/arch/tile/include/asm/atomic_32.h +++ b/arch/tile/include/asm/atomic_32.h @@ -233,6 +233,7 @@ static inline void atomic64_set(atomic64_t *v, u64 n) #define atomic64_dec_return(v) atomic64_sub_return(1LL, (v)) #define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0) #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL) +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1LL, 0LL) /* * We need to barrier before modifying the word, since the _atomic_xxx() diff --git a/arch/tile/include/asm/atomic_64.h b/arch/tile/include/asm/atomic_64.h index 27fe667..9c22f50 100644 --- a/arch/tile/include/asm/atomic_64.h +++ b/arch/tile/include/asm/atomic_64.h @@ -141,6 +141,7 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u) #define atomic64_add_negative(i, v) (atomic64_add_return((i), (v)) < 0) #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) /* Atomic dec and inc don't implement barrier, so provide them if needed. */ #define smp_mb__before_atomic_dec() smp_mb() diff --git a/arch/x86/include/asm/atomic64_32.h b/arch/x86/include/asm/atomic64_32.h index 24098aa..3cd4431 100644 --- a/arch/x86/include/asm/atomic64_32.h +++ b/arch/x86/include/asm/atomic64_32.h @@ -287,6 +287,18 @@ static inline int atomic64_inc_not_zero(atomic64_t *v) return r; } + +static inline int atomic64_dec_not_zero(atomic64_t *v) +{ + int r; + asm volatile(ATOMIC64_ALTERNATIVE(dec_not_zero) + : "=a" (r) + : "S" (v) + : "ecx", "edx", "memory" + ); + return r; +} + static inline long long atomic64_dec_if_positive(atomic64_t *v) { long long r; diff --git a/arch/x86/include/asm/atomic64_64.h b/arch/x86/include/asm/atomic64_64.h index 0e1cbfc..539e41b 100644 --- a/arch/x86/include/asm/atomic64_64.h +++ b/arch/x86/include/asm/atomic64_64.h @@ -216,6 +216,7 @@ static inline int atomic64_add_unless(atomic64_t *v, long a, long u) } #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) /* * atomic64_dec_if_positive - decrement by 1 if old value positive diff --git a/arch/x86/include/asm/local.h b/arch/x86/include/asm/local.h index 9cdae5d..2c8c92d 100644 --- a/arch/x86/include/asm/local.h +++ b/arch/x86/include/asm/local.h @@ -185,6 +185,7 @@ static inline long local_sub_return(long i, local_t *l) c != (u); \ }) #define local_inc_not_zero(l) local_add_unless((l), 1, 0) +#define local_dec_not_zero(l) local_add_unless((l), -1, 0) /* On x86_32, these are no better than the atomic variants. * On x86-64 these are better than the atomic variants on SMP kernels diff --git a/arch/x86/lib/atomic64_32.c b/arch/x86/lib/atomic64_32.c index 042f682..7da05c3 100644 --- a/arch/x86/lib/atomic64_32.c +++ b/arch/x86/lib/atomic64_32.c @@ -24,6 +24,8 @@ long long atomic64_dec_if_positive_cx8(atomic64_t *v); EXPORT_SYMBOL(atomic64_dec_if_positive_cx8); int atomic64_inc_not_zero_cx8(atomic64_t *v); EXPORT_SYMBOL(atomic64_inc_not_zero_cx8); +int atomic64_dec_not_zero_cx8(atomic64_t *v); +EXPORT_SYMBOL(atomic64_dec_not_zero_cx8); int atomic64_add_unless_cx8(atomic64_t *v, long long a, long long u); EXPORT_SYMBOL(atomic64_add_unless_cx8); @@ -54,6 +56,8 @@ long long atomic64_dec_if_positive_386(atomic64_t *v); EXPORT_SYMBOL(atomic64_dec_if_positive_386); int atomic64_inc_not_zero_386(atomic64_t *v); EXPORT_SYMBOL(atomic64_inc_not_zero_386); +int atomic64_dec_not_zero_386(atomic64_t *v); +EXPORT_SYMBOL(atomic64_dec_not_zero_386); int atomic64_add_unless_386(atomic64_t *v, long long a, long long u); EXPORT_SYMBOL(atomic64_add_unless_386); #endif diff --git a/arch/x86/lib/atomic64_386_32.S b/arch/x86/lib/atomic64_386_32.S index e8e7e0d..c78337b 100644 --- a/arch/x86/lib/atomic64_386_32.S +++ b/arch/x86/lib/atomic64_386_32.S @@ -181,6 +181,27 @@ ENDP #undef v #define v %esi +BEGIN(dec_not_zero) + movl (v), %eax + movl 4(v), %edx + testl %eax, %eax + je 3f +1: + subl $1, %eax + sbbl $0, %edx + movl %eax, (v) + movl %edx, 4(v) + movl $1, %eax +2: + RET +3: + testl %edx, %edx + jne 1b + jmp 2b +ENDP +#undef v + +#define v %esi BEGIN(dec_if_positive) movl (v), %eax movl 4(v), %edx diff --git a/arch/x86/lib/atomic64_cx8_32.S b/arch/x86/lib/atomic64_cx8_32.S index 391a083..989638c 100644 --- a/arch/x86/lib/atomic64_cx8_32.S +++ b/arch/x86/lib/atomic64_cx8_32.S @@ -220,3 +220,31 @@ ENTRY(atomic64_inc_not_zero_cx8) jmp 3b CFI_ENDPROC ENDPROC(atomic64_inc_not_zero_cx8) + +ENTRY(atomic64_dec_not_zero_cx8) + CFI_STARTPROC + SAVE ebx + + read64 %esi +1: + testl %eax, %eax + je 4f +2: + movl %eax, %ebx + movl %edx, %ecx + subl $1, %ebx + sbbl $0, %ecx + LOCK_PREFIX + cmpxchg8b (%esi) + jne 1b + + movl $1, %eax +3: + RESTORE ebx + ret +4: + testl %edx, %edx + jne 2b + jmp 3b + CFI_ENDPROC +ENDPROC(atomic64_dec_not_zero_cx8) diff --git a/include/asm-generic/atomic-long.h b/include/asm-generic/atomic-long.h index b7babf0..0fe75ab 100644 --- a/include/asm-generic/atomic-long.h +++ b/include/asm-generic/atomic-long.h @@ -130,6 +130,7 @@ static inline long atomic_long_add_unless(atomic_long_t *l, long a, long u) } #define atomic_long_inc_not_zero(l) atomic64_inc_not_zero((atomic64_t *)(l)) +#define atomic_long_dec_not_zero(l) atomic64_dec_not_zero((atomic64_t *)(l)) #define atomic_long_cmpxchg(l, old, new) \ (atomic64_cmpxchg((atomic64_t *)(l), (old), (new))) @@ -247,6 +248,7 @@ static inline long atomic_long_add_unless(atomic_long_t *l, long a, long u) } #define atomic_long_inc_not_zero(l) atomic_inc_not_zero((atomic_t *)(l)) +#define atomic_long_dec_not_zero(l) atomic_dec_not_zero((atomic_t *)(l)) #define atomic_long_cmpxchg(l, old, new) \ (atomic_cmpxchg((atomic_t *)(l), (old), (new))) diff --git a/include/asm-generic/atomic64.h b/include/asm-generic/atomic64.h index b18ce4f..90ff9b1 100644 --- a/include/asm-generic/atomic64.h +++ b/include/asm-generic/atomic64.h @@ -38,5 +38,6 @@ extern int atomic64_add_unless(atomic64_t *v, long long a, long long u); #define atomic64_dec_return(v) atomic64_sub_return(1LL, (v)) #define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0) #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL) +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1LL, 0LL) #endif /* _ASM_GENERIC_ATOMIC64_H */ diff --git a/include/asm-generic/local.h b/include/asm-generic/local.h index 9ceb03b..fabf4f3 100644 --- a/include/asm-generic/local.h +++ b/include/asm-generic/local.h @@ -44,6 +44,7 @@ typedef struct #define local_xchg(l, n) atomic_long_xchg((&(l)->a), (n)) #define local_add_unless(l, _a, u) atomic_long_add_unless((&(l)->a), (_a), (u)) #define local_inc_not_zero(l) atomic_long_inc_not_zero(&(l)->a) +#define local_dec_not_zero(l) atomic_long_dec_not_zero(&(l)->a) /* Non-atomic variants, ie. preemption disabled and won't be touched * in interrupt, etc. Some archs can optimize this case well. */ diff --git a/include/asm-generic/local64.h b/include/asm-generic/local64.h index 5980002..76acbe2 100644 --- a/include/asm-generic/local64.h +++ b/include/asm-generic/local64.h @@ -45,6 +45,7 @@ typedef struct { #define local64_xchg(l, n) local_xchg((&(l)->a), (n)) #define local64_add_unless(l, _a, u) local_add_unless((&(l)->a), (_a), (u)) #define local64_inc_not_zero(l) local_inc_not_zero(&(l)->a) +#define local64_dec_not_zero(l) local_dec_not_zero(&(l)->a) /* Non-atomic variants, ie. preemption disabled and won't be touched * in interrupt, etc. Some archs can optimize this case well. */ @@ -83,6 +84,7 @@ typedef struct { #define local64_xchg(l, n) atomic64_xchg((&(l)->a), (n)) #define local64_add_unless(l, _a, u) atomic64_add_unless((&(l)->a), (_a), (u)) #define local64_inc_not_zero(l) atomic64_inc_not_zero(&(l)->a) +#define local64_dec_not_zero(l) atomic64_dec_not_zero(&(l)->a) /* Non-atomic variants, ie. preemption disabled and won't be touched * in interrupt, etc. Some archs can optimize this case well. */ diff --git a/include/linux/atomic.h b/include/linux/atomic.h index 42b77b5..ad2b750 100644 --- a/include/linux/atomic.h +++ b/include/linux/atomic.h @@ -27,6 +27,15 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u) #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) /** + * atomic_dec_not_zero - decrement unless the number is zero + * @v: pointer of type atomic_t + * + * Atomically decrements @v by 1, so long as @v is non-zero. + * Returns non-zero if @v was non-zero, and zero otherwise. + */ +#define atomic_dec_not_zero(v) atomic_add_unless((v), -1, 0) + +/** * atomic_inc_not_zero_hint - increment if not null * @v: pointer of type atomic_t * @hint: probable value of the atomic before the increment diff --git a/lib/atomic64_test.c b/lib/atomic64_test.c index 0c33cde..b7468b7 100644 --- a/lib/atomic64_test.c +++ b/lib/atomic64_test.c @@ -145,6 +145,25 @@ static __init int test_atomic64(void) r += one; BUG_ON(v.counter != r); + INIT(onestwos); + BUG_ON(!atomic64_dec_not_zero(&v)); + r -= one; + BUG_ON(v.counter != r); + + INIT(0); + BUG_ON(atomic64_dec_not_zero(&v)); + BUG_ON(v.counter != r); + + INIT(one); + BUG_ON(!atomic64_dec_not_zero(&v)); + r -= one; + BUG_ON(v.counter != r); + + INIT(-one); + BUG_ON(!atomic64_dec_not_zero(&v)); + r -= one; + BUG_ON(v.counter != r); + #ifdef CONFIG_X86 printk(KERN_INFO "atomic64 test passed for %s platform %s CX8 and %s SSE\n", #ifdef CONFIG_X86_64 -- 1.7.7.3 From linux@arm.linux.org.uk Sun Dec 4 22:37:09 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 04 Dec 2011 22:37:13 +0100 (CET) Received: from caramon.arm.linux.org.uk ([78.32.30.218]:54152 "EHLO caramon.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903637Ab1LDVhJ (ORCPT ); Sun, 4 Dec 2011 22:37:09 +0100 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=arm.linux.org.uk; s=caramon; h=Sender:In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=2OY5smcNkF9QTn/tdYd0eNNGBIQr3Clq2NF9gAwDXqc=; b=DM8S+/XHUw8nS7LEFE0uO7qZUdbe7a05QNYAsjLibTohm4vtPtw+EJKhpt8ji92bRSG/yqbZf7NhMWmYdXFxCjhYmYwY162Ymnyi41awmV2A3SVPPG0G0SZRIyUwQJN8eTyElgb/BbmXEy2KwVtKBFWU10pixh/mVY6VA+Ko4Zg=; Received: from n2100.arm.linux.org.uk ([2002:4e20:1eda:1:214:fdff:fe10:4f86]:50678) by caramon.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.76) (envelope-from ) id 1RXJgU-0002Fd-It; Sun, 04 Dec 2011 21:33:19 +0000 Received: from linux by n2100.arm.linux.org.uk with local (Exim 4.76) (envelope-from ) id 1RXJgS-00080y-GV; Sun, 04 Dec 2011 21:33:16 +0000 Date: Sun, 4 Dec 2011 21:33:16 +0000 From: Russell King - ARM Linux To: Sven Eckelmann Cc: Andrew Morton , linux-arch@vger.kernel.org, b.a.t.m.a.n@lists.open-mesh.org, Randy Dunlap , Richard Henderson , Ivan Kokshaysky , Matt Turner , Tony Luck , Fenghua Yu , Hirokazu Takata , Ralf Baechle , Kyle McMartin , Helge Deller , "James E.J. Bottomley" , Benjamin Herrenschmidt , Paul Mackerras , Martin Schwidefsky , Heiko Carstens , linux390@de.ibm.com, "David S. Miller" , Chris Metcalf , Jeff Dike , Richard Weinberger , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Arnd Bergmann , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-alpha@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ia64@vger.kernel.org, linux-m32r@ml.linux-m32r.org, linux-m32r-ja@ml.linux-m32r.org, linux-mips@linux-mips.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net, linux-hexagon@vger.kernel.org Subject: Re: [PATCHv5] atomic: add *_dec_not_zero Message-ID: <20111204213316.GB14542@n2100.arm.linux.org.uk> References: <1323013369-29691-1-git-send-email-sven@narfation.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1323013369-29691-1-git-send-email-sven@narfation.org> User-Agent: Mutt/1.5.19 (2009-01-05) X-archive-position: 32022 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: linux@arm.linux.org.uk Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2732 Content-Length: 2406 Lines: 42 On Sun, Dec 04, 2011 at 04:42:49PM +0100, Sven Eckelmann wrote: > diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) > diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1LL, 0LL) > diff --git a/arch/ia64/include/asm/atomic.h b/arch/ia64/include/asm/atomic.h > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) > diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) > diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) > diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) > diff --git a/arch/s390/include/asm/atomic.h b/arch/s390/include/asm/atomic.h > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) > diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) > diff --git a/arch/tile/include/asm/atomic_32.h b/arch/tile/include/asm/atomic_32.h > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1LL, 0LL) > diff --git a/arch/tile/include/asm/atomic_64.h b/arch/tile/include/asm/atomic_64.h > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) > diff --git a/arch/x86/include/asm/atomic64_64.h b/arch/x86/include/asm/atomic64_64.h > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) > diff --git a/include/asm-generic/atomic64.h b/include/asm-generic/atomic64.h > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1LL, 0LL) I think this is rather silly - all these definitions are very similar to each other. Is there really no way to put this into include/linux/atomic.h, maybe as something like: #ifndef atomic64_dec_not_zero #define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) #endif and avoid having to add essentially the same definition to 12 individual files? Architectures which want to override it can do by the following: #define atomic64_dec_not_zero atomic64_dec_not_zero which won't have any effect on C nor asm code. From sven@narfation.org Sun Dec 4 22:49:18 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 04 Dec 2011 22:49:23 +0100 (CET) Received: from narfation.org ([79.140.41.39]:43628 "EHLO v3-1039.vlinux.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903637Ab1LDVtS (ORCPT ); Sun, 4 Dec 2011 22:49:18 +0100 Received: from sven-laptop.home.narfation.org (i59F6CF54.versanet.de [89.246.207.84]) by v3-1039.vlinux.de (Postfix) with ESMTPSA id 33C9694013; Sun, 4 Dec 2011 22:51:01 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=narfation.org; s=mail; t=1323035461; bh=GKM8jeAiRdqqfuG6yco2XIYwCs5CnJh6qUypHqCFVDg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type:Content-Transfer-Encoding; b=Eg1ST5/SDpig76RBNCbl2zf51WC7OpUqsG4Q3UUwixwh2a3btULnIUmYCXLsyIplO iXBh8VgZ8AtsZPuC5/H8n/PsSz5SMotEZwtzma+I0EIN3fQAmnWyAnr2/YuFDvVAN7 AAY1kj83V5fBqJ8a1uC0Yh5p9MArKIDy+FFCrp5w= From: Sven Eckelmann To: Russell King - ARM Linux Cc: Andrew Morton , linux-arch@vger.kernel.org, b.a.t.m.a.n@lists.open-mesh.org, Randy Dunlap , Richard Henderson , Ivan Kokshaysky , Matt Turner , Tony Luck , Fenghua Yu , Hirokazu Takata , Ralf Baechle , Kyle McMartin , Helge Deller , "James E.J. Bottomley" , Benjamin Herrenschmidt , Paul Mackerras , Martin Schwidefsky , Heiko Carstens , linux390@de.ibm.com, "David S. Miller" , Chris Metcalf , Jeff Dike , Richard Weinberger , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Arnd Bergma nn , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-alpha@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ia64@vger.kernel.org, linux-m32r@ml.linux-m32r.org, linux-m32r-ja@ml.linux-m32r.org, linux-mips@linux-mips.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net, linux-hexagon@vger.kernel.org Subject: Re: Re: [PATCHv5] atomic: add *_dec_not_zero Date: Sun, 04 Dec 2011 22:49:10 +0100 Message-ID: <1699880.NTdz2k3W9O@sven-laptop.home.narfation.org> User-Agent: KMail/4.6.0 (Linux/3.1.0-1-686-pae; KDE/4.6.5; i686; ; ) In-Reply-To: <20111204213316.GB14542@n2100.arm.linux.org.uk> References: <1323013369-29691-1-git-send-email-sven@narfation.org> <20111204213316.GB14542@n2100.arm.linux.org.uk> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="nextPart4938203.Qb6ixptZZ3"; micalg="pgp-sha512"; protocol="application/pgp-signature" Content-Transfer-Encoding: 7Bit X-archive-position: 32023 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sven@narfation.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2736 Content-Length: 1975 Lines: 56 --nextPart4938203.Qb6ixptZZ3 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" On Sunday 04 December 2011 21:33:16 Russell King - ARM Linux wrote: [...] > > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1LL, 0LL) > > I think this is rather silly - all these definitions are very similar to > each other. Is there really no way to put this into include/linux/atomic.h, > maybe as something like: > > #ifndef atomic64_dec_not_zero > #define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) > #endif > > and avoid having to add essentially the same definition to 12 individual > files? > > Architectures which want to override it can do by the following: > > #define atomic64_dec_not_zero atomic64_dec_not_zero > > which won't have any effect on C nor asm code. * https://lkml.org/lkml/2011/5/8/15 * https://lkml.org/lkml/2011/5/8/16 * https://lkml.org/lkml/2011/5/8/321 Kind regards, Sven --nextPart4938203.Qb6ixptZZ3 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABCgAGBQJO2+rWAAoJEF2HCgfBJntGGaoP/1cME9u1tSkxi9MYlM/Ss2sw Du85XnWWOFnV+CRwZ7+QCkgr10dzf/Qf7ekcxzM/7wapAawu0FmBbehfNW+06uW0 4XrIxUDaZy0xgHusju96MVJav0msORD/2RXM3rQxwkjR2FhmfbVntuIu/5EqEHFv jIzksziGDgrHx6/HMjrEiX8p2tPPBfQ7MGa1Cvj+kLgDhPAPCOUKfpwgdj35MYHe 2D+zXMr6aHi/JtDkYK2BV9u9nAGx91fcPdOO4/SyyxVg4DLrUnuRgWhNF9UCXd7R IDkz2SAlkqP5RXKa9XMxnS1n1zjkpmc1wfRL4rPHmk7Fg9IgidnlZ8TsXKuDjoVR JtIuXmj1FQ5nuHnzKnzhIfHMlu395tL0PVHeWi1+dPZGfUCLX+T4jdlTRaShY3d1 UUzpbfKuc2dy8uX5BNfJ5kQl4PSx8w97Kn+8vRbb3U627FIpdkK8RQNEGgB7wpIR rCqnxvsjPiiyQA9ckXmL/S0d9xlrPcrB1Tu4kUgXYTr6llV/xKWuYtl801IFP6lr kFqvPd5St69DP66x5bMMC4NalTEfCIx7HOx+xd3xQC+9qsJVLomz95bvMZHxeI8K Ae736/5KDqONzVPOKW2J+UJIJLqIZPuSbNVRY9lkTZXjii1U25WY03PGAGwa4LLP mGvc5Y2WUfdr8CtFrvVL =T3Oo -----END PGP SIGNATURE----- --nextPart4938203.Qb6ixptZZ3-- From linux@arm.linux.org.uk Sun Dec 4 23:21:18 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 04 Dec 2011 23:21:23 +0100 (CET) Received: from caramon.arm.linux.org.uk ([78.32.30.218]:34365 "EHLO caramon.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903649Ab1LDWVS (ORCPT ); Sun, 4 Dec 2011 23:21:18 +0100 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=arm.linux.org.uk; s=caramon; h=Sender:In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=PwBbvNY1gkLyVx7MIqMuQ4iIO41bBCwOKq1im/PcvdE=; b=ZwkunshBzF6Rw0q/zwfgK9DUsmsyGJY+fJtqvrQEcCeqrkBDFHoFyk+bhbGge/PdpctxMbcT21vOzjbk0w0oZamy3ysky6TWJ/YH/O95qFPhQBsNlImHtDKqmfQrdsrisNb7lEqbyv7PdX0Krh289CJ8HWcCYIN6V2bxU/dZZuA=; Received: from n2100.arm.linux.org.uk ([2002:4e20:1eda:1:214:fdff:fe10:4f86]:41618) by caramon.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.76) (envelope-from ) id 1RXKOb-0002IJ-0F; Sun, 04 Dec 2011 22:18:53 +0000 Received: from linux by n2100.arm.linux.org.uk with local (Exim 4.76) (envelope-from ) id 1RXKOY-0008Go-To; Sun, 04 Dec 2011 22:18:50 +0000 Date: Sun, 4 Dec 2011 22:18:50 +0000 From: Russell King - ARM Linux To: Sven Eckelmann Cc: Andrew Morton , linux-arch@vger.kernel.org, b.a.t.m.a.n@lists.open-mesh.org, Randy Dunlap , Richard Henderson , Ivan Kokshaysky , Matt Turner , Tony Luck , Fenghua Yu , Hirokazu Takata , Ralf Baechle , Kyle McMartin , Helge Deller , "James E.J. Bottomley" , Benjamin Herrenschmidt , Paul Mackerras , Martin Schwidefsky , Heiko Carstens , linux390@de.ibm.com, "David S. Miller" , Chris Metcalf , Jeff Dike , Richard Weinberger , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Arnd Bergma nn , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-alpha@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ia64@vger.kernel.org, linux-m32r@ml.linux-m32r.org, linux-m32r-ja@ml.linux-m32r.org, linux-mips@linux-mips.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net, linux-hexagon@vger.kernel.org Subject: Re: Re: [PATCHv5] atomic: add *_dec_not_zero Message-ID: <20111204221850.GC14542@n2100.arm.linux.org.uk> References: <1323013369-29691-1-git-send-email-sven@narfation.org> <20111204213316.GB14542@n2100.arm.linux.org.uk> <1699880.NTdz2k3W9O@sven-laptop.home.narfation.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1699880.NTdz2k3W9O@sven-laptop.home.narfation.org> User-Agent: Mutt/1.5.19 (2009-01-05) X-archive-position: 32024 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: linux@arm.linux.org.uk Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2746 Content-Length: 2431 Lines: 65 On Sun, Dec 04, 2011 at 10:49:10PM +0100, Sven Eckelmann wrote: > On Sunday 04 December 2011 21:33:16 Russell King - ARM Linux wrote: > [...] > > > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1LL, 0LL) > > > > I think this is rather silly - all these definitions are very similar to > > each other. Is there really no way to put this into include/linux/atomic.h, > > maybe as something like: > > > > #ifndef atomic64_dec_not_zero > > #define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) > > #endif > > > > and avoid having to add essentially the same definition to 12 individual > > files? > > > > Architectures which want to override it can do by the following: > > > > #define atomic64_dec_not_zero atomic64_dec_not_zero > > > > which won't have any effect on C nor asm code. > > * https://lkml.org/lkml/2011/5/8/15 > * https://lkml.org/lkml/2011/5/8/16 > * https://lkml.org/lkml/2011/5/8/321 I don't see any reason in that set of messages _not_ to do what I suggest. Even on SMP architectures, your: #define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) makes total sense - and with the adjustments I've suggested it means that architectures (like x86) can still override it if have a more optimal way to perform this operation. Not only that, but we already do this kind of thing in include/linux/atomic.h for the non-64 bit ops, for example: #ifndef atomic_inc_unless_negative static inline int atomic_inc_unless_negative(atomic_t *p) { int v, v1; for (v = 0; v >= 0; v = v1) { v1 = atomic_cmpxchg(p, v, v + 1); if (likely(v1 == v)) return 1; } return 0; } #endif And really, I believe it would be a good cleanup if all the standard definitions for atomic64 ops (like atomic64_add_negative) were also defined in include/linux/atomic.h rather than individually in every atomic*.h header throughout the kernel source, except where an arch wants to explicitly override it. Yet again, virtually all architectures define these in exactly the same way. We have more than enough code in arch/ for any architecture to worry about, we don't need schemes to add more when there's simple and practical solutions to avoiding doing so if the right design were chosen (preferably from the outset.) So, I'm not going to offer my ack for a change which I don't believe is the correct approach. From sven@narfation.org Sun Dec 4 23:42:53 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 04 Dec 2011 23:43:01 +0100 (CET) Received: from narfation.org ([79.140.41.39]:60486 "EHLO v3-1039.vlinux.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903649Ab1LDWmx (ORCPT ); Sun, 4 Dec 2011 23:42:53 +0100 Received: from sven-laptop.home.narfation.org (i59F6CF54.versanet.de [89.246.207.84]) by v3-1039.vlinux.de (Postfix) with ESMTPSA id 09A3694020; Sun, 4 Dec 2011 23:44:36 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=narfation.org; s=mail; t=1323038676; bh=sG5FqdZr+D6pBJlEbI34XlgdsTaw+PQMIri88cFAKOc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type:Content-Transfer-Encoding; b=rmPbymZC4QfnOgNGQtlmx7KVvD+tFAMZGNrkMfBZCL1v7zr/YSyMNmOwo8qZnW6v2 /G4zu89xmWrfgqtSNMHcVLpr+BIOsJVpULIsoS00NuJ5vPcprqwTvboHBZs1/i8tfA MGU710BOT7ktFs2O/MqozGBVFHFvjWyDTE+7sShU= From: Sven Eckelmann To: Russell King - ARM Linux Cc: Andrew Morton , linux-arch@vger.kernel.org, b.a.t.m.a.n@lists.open-mesh.org, Randy Dunlap , Richard Henderson , Ivan Kokshaysky , Matt Turner , Tony Luck , Fenghua Yu , Hirokazu Takata , Ralf Baechle , Kyle McMartin , Helge Deller , "James E.J. Bottomley" , Benjamin Herrenschmidt , Paul Mackerras , Martin Schwidefsky , Heiko Carstens , linux390@de.ibm.com, "David S. Miller" , Chris Metcalf , Jeff Dike , Richard Weinberger , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Arnd Bergma nn , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-alpha@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ia64@vger.kernel.org, linux-m32r@ml.linux-m32r.org, linux-m32r-ja@ml.linux-m32r.org, linux-mips@linux-mips.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net, linux-hexagon@vger.kernel.org Subject: Re: Re: Re: [PATCHv5] atomic: add *_dec_not_zero Date: Sun, 04 Dec 2011 23:42:47 +0100 Message-ID: <2181790.72pQvQZ7mR@sven-laptop.home.narfation.org> User-Agent: KMail/4.6.0 (Linux/3.1.0-1-686-pae; KDE/4.6.5; i686; ; ) In-Reply-To: <20111204221850.GC14542@n2100.arm.linux.org.uk> References: <1323013369-29691-1-git-send-email-sven@narfation.org> <1699880.NTdz2k3W9O@sven-laptop.home.narfation.org> <20111204221850.GC14542@n2100.arm.linux.org.uk> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="nextPart3657609.EYmP6sRycV"; micalg="pgp-sha512"; protocol="application/pgp-signature" Content-Transfer-Encoding: 7Bit X-archive-position: 32025 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sven@narfation.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2748 Content-Length: 4073 Lines: 105 --nextPart3657609.EYmP6sRycV Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" On Sunday 04 December 2011 22:18:50 Russell King - ARM Linux wrote: > On Sun, Dec 04, 2011 at 10:49:10PM +0100, Sven Eckelmann wrote: > > On Sunday 04 December 2011 21:33:16 Russell King - ARM Linux wrote: > > [...] > > > > > > +#define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1LL, > > > > 0LL) > > > > > > I think this is rather silly - all these definitions are very > > > similar to each other. Is there really no way to put this into > > > include/linux/atomic.h, maybe as something like: > > > > > > #ifndef atomic64_dec_not_zero > > > #define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) > > > #endif > > > > > > and avoid having to add essentially the same definition to 12 > > > individual files? > > > > > > Architectures which want to override it can do by the following: > > > > > > #define atomic64_dec_not_zero atomic64_dec_not_zero > > > > > > which won't have any effect on C nor asm code. > > > > * https://lkml.org/lkml/2011/5/8/15 > > * https://lkml.org/lkml/2011/5/8/16 > > * https://lkml.org/lkml/2011/5/8/321 > > I don't see any reason in that set of messages _not_ to do what I suggest. > Even on SMP architectures, your: > > #define atomic64_dec_not_zero(v) atomic64_add_unless((v), -1, 0) > > makes total sense - and with the adjustments I've suggested it means > that architectures (like x86) can still override it if have a more > optimal way to perform this operation. > > Not only that, but we already do this kind of thing in > include/linux/atomic.h for the non-64 bit ops, for example: > > #ifndef atomic_inc_unless_negative > static inline int atomic_inc_unless_negative(atomic_t *p) > { > int v, v1; > for (v = 0; v >= 0; v = v1) { > v1 = atomic_cmpxchg(p, v, v + 1); > if (likely(v1 == v)) > return 1; > } > return 0; > } > #endif > > And really, I believe it would be a good cleanup if all the standard > definitions for atomic64 ops (like atomic64_add_negative) were also > defined in include/linux/atomic.h rather than individually in every > atomic*.h header throughout the kernel source, except where an arch > wants to explicitly override it. Yet again, virtually all architectures > define these in exactly the same way. > > We have more than enough code in arch/ for any architecture to worry > about, we don't need schemes to add more when there's simple and > practical solutions to avoiding doing so if the right design were > chosen (preferably from the outset.) > > So, I'm not going to offer my ack for a change which I don't believe > is the correct approach. Ok, I wanted to say that I just did what is currently done and did not offer a redesign. There is just a difference between adding something and replacing everything with something else. But I am fine with not getting the ack because now somebody at least made a statement. Kind regards, Sven --nextPart3657609.EYmP6sRycV Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABCgAGBQJO2/dnAAoJEF2HCgfBJntGyQ0QAIBBy0k5Ojh2hoFJjUN3q8eQ vZBnCgn1UKsHdR+ZzytDM+uRDynaUUdu5UbSIOwJRs+r9rfjWROlRffX3YadvzO4 0jOfcA7SF2pIPmrEKAMr01f3dBtvu6EdTCLm8kZKCUGopEPXGz12MuD2Y+Eil4yD S/ygNYFug9o3xhSZ7HJ6ms/3KFuS6yOy2lrnr8ASZ18F98/Y970YlBC3yxTDQP31 FHarn2wiNx0GcQh367skpe7Dev0dKT2+NWUQ4kQ8CinG+S9/pk9vGNnx8gByLtd/ pAx3KGF6RhUWD8OoGgZUGkSosJJM18bpgRk7ms5iScbAxX5TGs+DT47nFw6qRyn+ 4pAxECzmWoLdnqNxSaFX7D2ow8OIH5eZnRJObWbkjTIGvySlCOzJdfVSZ/HdPq+w mqvlODmgWrA5dvizMQpYxZ1JdLVoLZ/5tK2OM+r18dw0H9Qn1HMqjJ8yNYCJFlfn UwfqdOkXi+UxOCDjZhPxjqWl1uTG54TwFQaMsyZP3YtnB9AcIr0NGAYAocl9mW0S 0lrYVt87X9HOtf8ndkDbJu4EWz+vGFIMn1SuWkpbhVKQZ96Q6/RmhTiOzj6NCTY7 sEWiX3ralejgfHqwjxze0zCkNbFFIVyePq0Y63fNq9TTf8/CNpIbCl01YBBZ315v l+QWfR8ALrDtInryuh9G =WCs5 -----END PGP SIGNATURE----- --nextPart3657609.EYmP6sRycV-- From benh@kernel.crashing.org Sun Dec 4 23:43:33 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 04 Dec 2011 23:43:39 +0100 (CET) Received: from gate.crashing.org ([63.228.1.57]:59030 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903649Ab1LDWnd (ORCPT ); Sun, 4 Dec 2011 23:43:33 +0100 Received: from [IPv6:::1] (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id pB4MfwWn026726; Sun, 4 Dec 2011 16:41:59 -0600 Message-ID: <1323038515.11728.26.camel@pasglop> Subject: Re: Re: [PATCHv5] atomic: add *_dec_not_zero From: Benjamin Herrenschmidt To: Russell King - ARM Linux Cc: Sven Eckelmann , linux-m32r-ja@ml.linux-m32r.org, linux-mips@linux-mips.org, linux-ia64@vger.kernel.org, linux-doc@vger.kernel.org, "H. Peter Anvin" , Heiko Carstens , Randy Dunlap , Paul Mackerras , Helge Deller , sparclinux@vger.kernel.org, linux-hexagon@vger.kernel.org, linux-arch@vger.kernel.org, linux-s390@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net, Richard Weinberger , Hirokazu Takata , x86@kernel.org, "James E.J. Bottomley" , Ingo Molnar , Matt Turner , Fenghua Yu , Arnd Bergma nn , Jeff Dike , Chris Metcalf , linux-m32r@ml.linux-m32r.org, Ivan Kokshaysky , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Richard Henderson , Tony Luck , linux-parisc@vger.kernel.org, b.a.t.m.a.n@lists.open-mesh.org, linux-kernel@vger.kernel.org, Ralf Baechle , Kyle McMartin , linux-alpha@vger.kernel.org, Martin Schwidefsky , linux390@de.ibm.com, Andrew Morton , linuxppc-dev@lists.ozlabs.org, "David S. Miller" Date: Mon, 05 Dec 2011 09:41:55 +1100 In-Reply-To: <20111204221850.GC14542@n2100.arm.linux.org.uk> References: <1323013369-29691-1-git-send-email-sven@narfation.org> <20111204213316.GB14542@n2100.arm.linux.org.uk> <1699880.NTdz2k3W9O@sven-laptop.home.narfation.org> <20111204221850.GC14542@n2100.arm.linux.org.uk> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.1- Content-Transfer-Encoding: 7bit Mime-Version: 1.0 X-archive-position: 32026 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: benh@kernel.crashing.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2749 Content-Length: 970 Lines: 26 On Sun, 2011-12-04 at 22:18 +0000, Russell King - ARM Linux wrote: .../... > And really, I believe it would be a good cleanup if all the standard > definitions for atomic64 ops (like atomic64_add_negative) were also > defined in include/linux/atomic.h rather than individually in every > atomic*.h header throughout the kernel source, except where an arch > wants to explicitly override it. Yet again, virtually all architectures > define these in exactly the same way. > > We have more than enough code in arch/ for any architecture to worry > about, we don't need schemes to add more when there's simple and > practical solutions to avoiding doing so if the right design were > chosen (preferably from the outset.) > > So, I'm not going to offer my ack for a change which I don't believe > is the correct approach. I agree with Russell, his approach is a lot easier to maintain long run, we should even consider converting existing definitions. Cheers, Ben. From hpa@zytor.com Mon Dec 5 01:15:37 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 05 Dec 2011 01:15:45 +0100 (CET) Received: from terminus.zytor.com ([198.137.202.10]:49777 "EHLO mail.zytor.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903650Ab1LEAPh (ORCPT ); Mon, 5 Dec 2011 01:15:37 +0100 Received: from tazenda.hos.anvin.org ([IPv6:2001:470:861f::feed:face:f00d]) (authenticated bits=0) by mail.zytor.com (8.14.5/8.14.5) with ESMTP id pB50EIGm007983 (version=TLSv1/SSLv3 cipher=DHE-RSA-CAMELLIA256-SHA bits=256 verify=OK); Sun, 4 Dec 2011 16:14:19 -0800 Message-ID: <4EDC0CD5.2090601@zytor.com> Date: Sun, 04 Dec 2011 16:14:13 -0800 From: "H. Peter Anvin" User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:8.0) Gecko/20111115 Thunderbird/8.0 MIME-Version: 1.0 To: Benjamin Herrenschmidt CC: Russell King - ARM Linux , Sven Eckelmann , linux-m32r-ja@ml.linux-m32r.org, linux-mips@linux-mips.org, linux-ia64@vger.kernel.org, linux-doc@vger.kernel.org, Heiko Carstens , Randy Dunlap , Paul Mackerras , Helge Deller , sparclinux@vger.kernel.org, linux-hexagon@vger.kernel.org, linux-arch@vger.kernel.org, linux-s390@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net, Richard Weinberger , Hirokazu Takata , x86@kernel.org, "James E.J. Bottomley" , Ingo Molnar , Matt Turner , Fenghua Yu , Arnd Bergma nn , Jeff Dike , Chris Metcalf , linux-m32r@ml.linux-m32r.org, Ivan Kokshaysky , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Richard Henderson , Tony Luck , linux-parisc@vger.kernel.org, b.a.t.m.a.n@lists.open-mesh.org, linux-kernel@vger.kernel.org, Ralf Baechle , Kyle McMartin , linux-alpha@vger.kernel.org, Martin Schwidefsky , linux390@de.ibm.com, Andrew Morton , linuxppc-dev@lists.ozlabs.org, "David S. Miller" Subject: Re: [PATCHv5] atomic: add *_dec_not_zero References: <1323013369-29691-1-git-send-email-sven@narfation.org> <20111204213316.GB14542@n2100.arm.linux.org.uk> <1699880.NTdz2k3W9O@sven-laptop.home.narfation.org> <20111204221850.GC14542@n2100.arm.linux.org.uk> <1323038515.11728.26.camel@pasglop> In-Reply-To: <1323038515.11728.26.camel@pasglop> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-archive-position: 32027 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hpa@zytor.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2789 Content-Length: 320 Lines: 15 On 12/04/2011 02:41 PM, Benjamin Herrenschmidt wrote: > > I agree with Russell, his approach is a lot easier to maintain long run, > we should even consider converting existing definitions. > Thirded. -hpa -- H. Peter Anvin, Intel Open Source Technology Center I work for Intel. I don't speak on their behalf. From sven@narfation.org Mon Dec 5 08:57:35 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 05 Dec 2011 08:57:41 +0100 (CET) Received: from narfation.org ([79.140.41.39]:49631 "EHLO v3-1039.vlinux.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903605Ab1LEH5f (ORCPT ); Mon, 5 Dec 2011 08:57:35 +0100 Received: from sven-laptop.home.narfation.org (i59F6D8E2.versanet.de [89.246.216.226]) by v3-1039.vlinux.de (Postfix) with ESMTPSA id 89B9094013; Mon, 5 Dec 2011 08:59:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=narfation.org; s=mail; t=1323071957; bh=WePDqzBwJCP0hF2CSPHbcjn+dXDe7R1+UWj3jvcP9G8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type:Content-Transfer-Encoding; b=YLhX+3v2w/adgdJYo1WmVJXz+V/tTXwaYeuoK1R0np6NA/cIqn0rcMrC6N2J0TwiJ xaLo7SM19N/C9LE8VBq9pO+FWZhy621FtR4czTVA0FSt772SkwhixuzNJzTqkPR4RS 2sZhWGw2Dqq442a5TkoI9jRYd53Qjqf+HGJe/Y7o= From: Sven Eckelmann To: Benjamin Herrenschmidt Cc: Russell King - ARM Linux , linux-m32r-ja@ml.linux-m32r.org, linux-mips@linux-mips.org, linux-ia64@vger.kernel.org, linux-doc@vger.kernel.org, "H. Peter Anvin" , Heiko Carstens , Randy Dunlap , Paul Mackerras , Helge Deller , sparclinux@vger.kernel.org, linux-hexagon@vger.kernel.org, linux-arch@vger.kernel.org, linux-s390@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net, Richard Weinberger , Hirokazu Takata , x86@kernel.org, "James E.J. Bottomley" , Ingo Molnar , Matt Turner , Fenghua Yu , Arnd Bergma nn , Jeff Dike , Chris Metcalf , linux-m32r@ml.linux-m32r.org, Ivan Kokshaysky , Thomas Gleixner , linux-arm-kernel@lists.in fradead.org, Richard Henderson , Tony Luck , linux-parisc@vger.kernel.org, b.a.t.m.a.n@lists.open-mesh.org, linux-kernel@vger.kernel.org, Ralf Baechle , Kyle McMartin , linux-alpha@vger.kernel.org, Martin Schwidefsky , linux390@de.ibm.com, Andrew Morton , linuxppc-dev@lists.ozlabs.org, "David S. Miller" Subject: Re: Re: Re: [PATCHv5] atomic: add *_dec_not_zero Date: Mon, 05 Dec 2011 08:57:27 +0100 Message-ID: <3836467.I5Tqg6MFf9@sven-laptop.home.narfation.org> User-Agent: KMail/4.6.0 (Linux/3.1.0-1-686-pae; KDE/4.6.5; i686; ; ) In-Reply-To: <1323038515.11728.26.camel@pasglop> References: <1323013369-29691-1-git-send-email-sven@narfation.org> <20111204221850.GC14542@n2100.arm.linux.org.uk> <1323038515.11728.26.camel@pasglop> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="nextPart1410499.ht9VK84Yej"; micalg="pgp-sha512"; protocol="application/pgp-signature" Content-Transfer-Encoding: 7Bit X-archive-position: 32028 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sven@narfation.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2942 Content-Length: 2615 Lines: 61 --nextPart1410499.ht9VK84Yej Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="UTF-8" On Monday 05 December 2011 09:41:55 Benjamin Herrenschmidt wrote: > On Sun, 2011-12-04 at 22:18 +0000, Russell King - ARM Linux wrote: > > .../... > > > And really, I believe it would be a good cleanup if all the standard > > definitions for atomic64 ops (like atomic64_add_negative) were also > > defined in include/linux/atomic.h rather than individually in every > > atomic*.h header throughout the kernel source, except where an arch > > wants to explicitly override it. Yet again, virtually all architectures > > define these in exactly the same way. > > > > We have more than enough code in arch/ for any architecture to worry > > about, we don't need schemes to add more when there's simple and > > practical solutions to avoiding doing so if the right design were > > chosen (preferably from the outset.) > > > > So, I'm not going to offer my ack for a change which I don't believe > > is the correct approach. > > I agree with Russell, his approach is a lot easier to maintain long run, > we should even consider converting existing definitions. I would rather go with "the existing definitions have to converted" and this means "not by this patch". At the moment, the atomic64 stuff exist only as separate generic or arch specific implementation. It is fine that Russell King noticed that people like Arun Sharma did a lot of work to made it true for atomic_t, but atomic64_t is a little bit different right now (at least as I understand it). Kind regards, Sven --nextPart1410499.ht9VK84Yej Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABCgAGBQJO3HlnAAoJEF2HCgfBJntGIwEP+wbmx8RBe4+2rxtioZSWADVS WTLVEVXMSXyL/WFdHGHydFJouj+fsSCSeLiqUq64xJF0J/zUZiT5YZNcqc67bG0I D/m3R1NSDP8Rzuxs8xeCpMaG6Iy2AcaHL+FBHotuWZ4bGgvUDZioti3wt9UFJPar JOUBH3BowE007CtAlEc0i5pMu0YGAvu1Y2OlGuSAdernpzsSkfsL+B9ArK5rrpgT 0YaP8HWLFnjclXES0jgoad5exyh+ItgQltR/yGIOTU0zyIsv/3mtwIUw0/K0ZTGX U/UgN6KWLyxmDW0wCr6QseA73mqT5SyAxFmCRzsDbyZTSXgEr6qZIWxLzr7kQNet ki2ZdeyjIWuklCWqvrjStrIY1+Q3dAzh0P7q75/INBCujMio3LqdsmaPaIvyJdzr R6Q5xzsOtkqUVZYKscBJfHah2fzuEJ04ulfAda7OarzQynA2FvP+Wb7MP+Z1NNby 7lDV1AyhHqiWh6gPey7GJJ5qQqMsJn2ladR68rt74GyULv7XHJ6fhzDx6CUYk35K 2MPFB2O66C6UI1osCbJWxYeuO2myGtRwWo4MLJ6w4UGqBEV4k5x3TBUlHg5fDdJR lhGVpPrS/1CzOh8tMCyiRWADxN1wYyIGTVMyY7SbF/iLfECGQeqPYDcIhgzjDBB9 eaY9hfOs3nyq/zSRPmrD =esnW -----END PGP SIGNATURE----- --nextPart1410499.ht9VK84Yej-- From benh@kernel.crashing.org Mon Dec 5 09:29:08 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 05 Dec 2011 09:29:15 +0100 (CET) Received: from gate.crashing.org ([63.228.1.57]:51060 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903606Ab1LEI3I (ORCPT ); Mon, 5 Dec 2011 09:29:08 +0100 Received: from [IPv6:::1] (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id pB58Qunn015240; Mon, 5 Dec 2011 02:26:56 -0600 Message-ID: <1323073615.660.11.camel@pasglop> Subject: Re: Re: Re: [PATCHv5] atomic: add *_dec_not_zero From: Benjamin Herrenschmidt To: Sven Eckelmann Cc: Russell King - ARM Linux , linux-m32r-ja@ml.linux-m32r.org, linux-mips@linux-mips.org, linux-ia64@vger.kernel.org, linux-doc@vger.kernel.org, "H. Peter Anvin" , Heiko Carstens , Randy Dunlap , Paul Mackerras , Helge Deller , sparclinux@vger.kernel.org, linux-hexagon@vger.kernel.org, linux-arch@vger.kernel.org, linux-s390@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net, Richard Weinberger , Hirokazu Takata , x86@kernel.org, "James E.J. Bottomley" , Ingo Molnar , Matt Turner , Fenghua Yu , Arnd Bergma nn , Jeff Dike , Chris Metcalf , linux-m32r@ml.linux-m32r.org, Ivan Kokshaysky , Thomas Gleixner , linux-arm-kernel@lists.in.fradead.org, Richard Henderson , Tony Luck , linux-parisc@vger.kernel.org, b.a.t.m.a.n@lists.open-mesh.org, linux-kernel@vger.kernel.org, Ralf Baechle , Kyle McMartin , linux-alpha@vger.kernel.org, Martin Schwidefsky , linux390@de.ibm.com, Andrew Morton , linuxppc-dev@lists.ozlabs.org, "David S. Miller" Date: Mon, 05 Dec 2011 19:26:55 +1100 In-Reply-To: <3836467.I5Tqg6MFf9@sven-laptop.home.narfation.org> References: <1323013369-29691-1-git-send-email-sven@narfation.org> <20111204221850.GC14542@n2100.arm.linux.org.uk> <1323038515.11728.26.camel@pasglop> <3836467.I5Tqg6MFf9@sven-laptop.home.narfation.org> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.1- Content-Transfer-Encoding: 7bit Mime-Version: 1.0 X-archive-position: 32029 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: benh@kernel.crashing.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 2966 Content-Length: 1673 Lines: 39 On Mon, 2011-12-05 at 08:57 +0100, Sven Eckelmann wrote: > On Monday 05 December 2011 09:41:55 Benjamin Herrenschmidt wrote: > > On Sun, 2011-12-04 at 22:18 +0000, Russell King - ARM Linux wrote: > > > > .../... > > > > > And really, I believe it would be a good cleanup if all the standard > > > definitions for atomic64 ops (like atomic64_add_negative) were also > > > defined in include/linux/atomic.h rather than individually in every > > > atomic*.h header throughout the kernel source, except where an arch > > > wants to explicitly override it. Yet again, virtually all architectures > > > define these in exactly the same way. > > > > > > We have more than enough code in arch/ for any architecture to worry > > > about, we don't need schemes to add more when there's simple and > > > practical solutions to avoiding doing so if the right design were > > > chosen (preferably from the outset.) > > > > > > So, I'm not going to offer my ack for a change which I don't believe > > > is the correct approach. > > > > I agree with Russell, his approach is a lot easier to maintain long run, > > we should even consider converting existing definitions. > > I would rather go with "the existing definitions have to converted" and this > means "not by this patch". Right. I didn't suggest -you- had to do it as a pre-req to your patch. > At the moment, the atomic64 stuff exist only as > separate generic or arch specific implementation. It is fine that Russell King > noticed that people like Arun Sharma did a lot of work to made it true for > atomic_t, but atomic64_t is a little bit different right now (at least as I > understand it). Cheers, Ben. From David.Laight@ACULAB.COM Mon Dec 5 12:44:28 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 05 Dec 2011 12:44:32 +0100 (CET) Received: from mx0.aculab.com ([213.249.233.131]:41891 "HELO mx0.aculab.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with SMTP id S1903609Ab1LELo2 convert rfc822-to-8bit (ORCPT ); Mon, 5 Dec 2011 12:44:28 +0100 Received: (qmail 12983 invoked from network); 5 Dec 2011 11:44:20 -0000 Received: from localhost (127.0.0.1) by mx0.aculab.com with SMTP; 5 Dec 2011 11:44:20 -0000 Received: from mx0.aculab.com ([127.0.0.1]) by localhost (mx0.aculab.com [127.0.0.1]) (amavisd-new, port 10024) with SMTP id 12870-04 for ; Mon, 5 Dec 2011 11:44:20 +0000 (GMT) Received: (qmail 12709 invoked by uid 599); 5 Dec 2011 11:44:16 -0000 Received: from unknown (HELO saturn3.Aculab.com) (10.202.163.5) by mx0.aculab.com (qpsmtpd/0.28) with ESMTP; Mon, 05 Dec 2011 11:44:16 +0000 Received: from saturn3.Aculab.com ([10.202.163.5]) by saturn3.Aculab.com with Microsoft SMTPSVC(6.0.3790.4675); Mon, 5 Dec 2011 11:44:10 +0000 X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT Subject: RE: Re: [PATCHv5] atomic: add *_dec_not_zero Date: Mon, 5 Dec 2011 11:44:10 -0000 Message-ID: In-Reply-To: <20111204221850.GC14542@n2100.arm.linux.org.uk> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: Re: [PATCHv5] atomic: add *_dec_not_zero Thread-Index: Acyy0x4HjkbAO+BaTWSu0XHw1HNtUwAb8ndQ From: "David Laight" To: "Russell King - ARM Linux" , "Sven Eckelmann" Cc: , , , , "H. Peter Anvin" , "Heiko Carstens" , "Randy Dunlap" , "Paul Mackerras" , "Helge Deller" , , , , , , "Richard Weinberger" , "Hirokazu Takata" , , "James E.J. Bottomley" , "Ingo Molnar" , "Matt Turner" , "Fenghua Yu" , "Arnd Bergma nn" , "Jeff Dike" , "Chris Metcalf" , , "Ivan Kokshaysky" , "Thomas Gleixner" , , "Richard Henderson" , "Tony Luck" , , , , "Ralf Baechle" , "Kyle McMartin" , , "Martin Schwidefsky" , , "Andrew Morton" , , "David S. Miller" X-OriginalArrivalTime: 05 Dec 2011 11:44:10.0781 (UTC) FILETIME=[3441CCD0:01CCB343] X-Virus-Scanned: by iCritical at mx0.aculab.com X-archive-position: 32030 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: David.Laight@ACULAB.COM Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3141 Content-Length: 517 Lines: 22 Looking at this: > #ifndef atomic_inc_unless_negative > static inline int atomic_inc_unless_negative(atomic_t *p) > { > int v, v1; > for (v = 0; v >= 0; v = v1) { > v1 = atomic_cmpxchg(p, v, v + 1); > if (likely(v1 == v)) > return 1; > } > return 0; > } > #endif why is it optimised for '*p' being zero?? I'd have though the initial assignment to 'v' should be made by reading '*p' without any memory barriers (etc). David From jonas.gorski@gmail.com Mon Dec 5 16:09:03 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 05 Dec 2011 16:09:16 +0100 (CET) Received: from mail-fx0-f49.google.com ([209.85.161.49]:35640 "EHLO mail-fx0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903611Ab1LEPJD (ORCPT ); Mon, 5 Dec 2011 16:09:03 +0100 Received: by fabs1 with SMTP id s1so1350830fab.36 for ; Mon, 05 Dec 2011 07:08:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=fv9iO90vlTjYW9SvfXQ5p3NfHH/BPRt8w2QqRxh8k6I=; b=Z5E9wBkRB9LKQHVjPt87HH5Vy/xiKTiLQIQz/JpOgRYOdxJqsXvjQeis6N0azJoAPb IflnS+YO7Jk0wIy5WQGS0r3tPIkUChvvQuUcLJIm7lUcXWHrBwWVCR7OE6nYW3hMmGO+ T2wgTL/HXd4vEHLj+Jx5BiMUoc8Je2Mjnkw9U= Received: by 10.227.205.14 with SMTP id fo14mr15754791wbb.22.1323097737992; Mon, 05 Dec 2011 07:08:57 -0800 (PST) Received: from shaker64.lan (dslb-088-073-137-229.pools.arcor-ip.net. [88.73.137.229]) by mx.google.com with ESMTPS id dd4sm10772157wib.1.2011.12.05.07.08.56 (version=SSLv3 cipher=OTHER); Mon, 05 Dec 2011 07:08:57 -0800 (PST) From: Jonas Gorski To: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org, Ralf Baechle , Florian Fainelli , David Woodhouse , Artem Bityutskiy Subject: [PATCH 0/7] MTD: MAPS: remove bcm963xx-flash Date: Mon, 5 Dec 2011 16:08:04 +0100 Message-Id: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 X-archive-position: 32031 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3348 Content-Length: 2297 Lines: 53 While trying to improve the bcm963xx CFE partition parsing, I noticed that it could be completely replaced by the generic physmap flash driver using a custom parser. The following patch set tries to accomplish that. The first few patches clean take care of some minor code style issues first to prevent checkpatch from complaining when moving code around. After that I move the CFE partition parsing into a parser and make bcm963xx-flash use it to make sure I don't create a non working version. Finally I'll allow physmap_flash_data to take partition parser names for overriding the default parsers list (the OF version already allows that), let BCM63XX use it, and remove the bcm963xx-flash driver as it is now completely replaced by physmap + CFE parser. While most patches are limited to the MTD tree, patch 6/7 touches MIPS, so it could go in either tree. But since the MTD tree already has some modifications for bcm963xx-flash, I think it's better to let it go through the MTD tree, to reduce the (potential for) conflicts. Regards Jonas P.S: This patchset is based on l2-mtd-2.6.git, which seems to be the "correct" tree now (the website says mtd-2.6.git, but it doesn't look like the correct one, having no commits). Jonas Gorski (7): MTD: MAPS: bcm963xx-flash: fix word order for spare partition MTD: MAPS: bcm963xx-flash: remove superfluous semicolons MTD: MAPS: bcm963xx-flash: clean up printk usage MTD: MAPS: bcm963xx-flash: make CFE partition parsing an mtd parser MTD: MAPS: physmap: allow partition parsers for physmap_flash_data MIPS: BCM63XX: use the new bcm63xxpart parser MTD: MAPS: remove the now unused bcm963xx-flash arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 + drivers/mtd/Kconfig | 8 + drivers/mtd/Makefile | 1 + drivers/mtd/bcm63xxpart.c | 189 ++++++++++++++++++++ drivers/mtd/maps/Kconfig | 1 + drivers/mtd/maps/bcm963xx-flash.c | 265 ----------------------------- drivers/mtd/maps/physmap.c | 5 +- include/linux/mtd/physmap.h | 1 + 8 files changed, 207 insertions(+), 266 deletions(-) create mode 100644 drivers/mtd/bcm63xxpart.c delete mode 100644 drivers/mtd/maps/bcm963xx-flash.c -- 1.7.2.5 From jonas.gorski@gmail.com Mon Dec 5 16:09:04 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 05 Dec 2011 16:09:57 +0100 (CET) Received: from mail-fx0-f49.google.com ([209.85.161.49]:54807 "EHLO mail-fx0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903616Ab1LEPJE (ORCPT ); Mon, 5 Dec 2011 16:09:04 +0100 Received: by fabs1 with SMTP id s1so1350875fab.36 for ; Mon, 05 Dec 2011 07:08:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=NgvFaSOAgUlrGn4fBX2C6noWvV6wslTqLCwTQvd1ciY=; b=TLi4y1OZ3OCtP+2nCIjvIPtg6GsQD3de3AFm4cVE+xhfzwCNbjL2g2syetsmEBhV88 QKtpjRVyFWSOdeC6FNnOn53rTo8DbAplUJEhx4bA7NxByc6AogOYp4ArJPnUox7iCFn6 H80kyFBpYCi/0uqShjtNpmVOBrSj6KyGc6Eu0= Received: by 10.216.220.208 with SMTP id o58mr2249122wep.39.1323097739303; Mon, 05 Dec 2011 07:08:59 -0800 (PST) Received: from shaker64.lan (dslb-088-073-137-229.pools.arcor-ip.net. [88.73.137.229]) by mx.google.com with ESMTPS id dd4sm10772157wib.1.2011.12.05.07.08.58 (version=SSLv3 cipher=OTHER); Mon, 05 Dec 2011 07:08:58 -0800 (PST) From: Jonas Gorski To: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org, Ralf Baechle , Florian Fainelli , David Woodhouse , Artem Bityutskiy Subject: [PATCH 1/7] MTD: MAPS: bcm963xx-flash: fix word order for spare partition Date: Mon, 5 Dec 2011 16:08:05 +0100 Message-Id: <1323097691-16414-2-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> References: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> X-archive-position: 32032 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3349 Content-Length: 730 Lines: 21 Signed-off-by: Jonas Gorski --- drivers/mtd/maps/bcm963xx-flash.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/mtd/maps/bcm963xx-flash.c b/drivers/mtd/maps/bcm963xx-flash.c index c7d3949..b908d92 100644 --- a/drivers/mtd/maps/bcm963xx-flash.c +++ b/drivers/mtd/maps/bcm963xx-flash.c @@ -144,7 +144,7 @@ static int parse_cfe_partitions(struct mtd_info *master, (long unsigned int)(parts[i].offset), (long unsigned int)(parts[i].size)); - printk(KERN_INFO PFX "Spare partition is %x offset and length %x\n", + printk(KERN_INFO PFX "Spare partition is offset %x and length %x\n", spareaddr, sparelen); *pparts = parts; vfree(buf); -- 1.7.2.5 From jonas.gorski@gmail.com Mon Dec 5 16:09:06 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 05 Dec 2011 16:10:23 +0100 (CET) Received: from mail-ey0-f177.google.com ([209.85.215.177]:61880 "EHLO mail-ey0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903618Ab1LEPJG (ORCPT ); Mon, 5 Dec 2011 16:09:06 +0100 Received: by eaac10 with SMTP id c10so5209125eaa.36 for ; Mon, 05 Dec 2011 07:09:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=KwMUBMJre1a38LIrNZA0okTyRZ+Oiyv0U1tVcOv8rxg=; b=lr2Qz5Pc7uh6l81Kekq1GkYnPrxj8sef6xeNs2ah1XlhSI34IFyS2CgJEpYGsNNgbm afzYxqWu2GSyWwZF9mphyio6N5xOm3nKuREYZtPnnk6tsTompqDgwtUfjTnuRMi6M/fc GjkWqdpv33SbLxBUSG5tvsSLR4ZTCPOyHymL0= Received: by 10.216.196.155 with SMTP id r27mr2625399wen.9.1323097740643; Mon, 05 Dec 2011 07:09:00 -0800 (PST) Received: from shaker64.lan (dslb-088-073-137-229.pools.arcor-ip.net. [88.73.137.229]) by mx.google.com with ESMTPS id dd4sm10772157wib.1.2011.12.05.07.08.59 (version=SSLv3 cipher=OTHER); Mon, 05 Dec 2011 07:09:00 -0800 (PST) From: Jonas Gorski To: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org, Ralf Baechle , Florian Fainelli , David Woodhouse , Artem Bityutskiy Subject: [PATCH 2/7] MTD: MAPS: bcm963xx-flash: remove superfluous semicolons Date: Mon, 5 Dec 2011 16:08:06 +0100 Message-Id: <1323097691-16414-3-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> References: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> X-archive-position: 32033 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3352 Content-Length: 1297 Lines: 52 Signed-off-by: Jonas Gorski --- drivers/mtd/maps/bcm963xx-flash.c | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/maps/bcm963xx-flash.c b/drivers/mtd/maps/bcm963xx-flash.c index b908d92..58cbaf2 100644 --- a/drivers/mtd/maps/bcm963xx-flash.c +++ b/drivers/mtd/maps/bcm963xx-flash.c @@ -93,18 +93,18 @@ static int parse_cfe_partitions(struct mtd_info *master, if (rootfslen > 0) { nrparts++; namelen += 6; - }; + } if (kernellen > 0) { nrparts++; namelen += 6; - }; + } /* Ask kernel for more memory */ parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL); if (!parts) { vfree(buf); return -ENOMEM; - }; + } /* Start building partition list */ parts[curpart].name = "CFE"; @@ -117,7 +117,7 @@ static int parse_cfe_partitions(struct mtd_info *master, parts[curpart].offset = kerneladdr; parts[curpart].size = kernellen; curpart++; - }; + } if (rootfslen > 0) { parts[curpart].name = "rootfs"; @@ -126,7 +126,7 @@ static int parse_cfe_partitions(struct mtd_info *master, if (sparelen > 0) parts[curpart].size += sparelen; curpart++; - }; + } parts[curpart].name = "nvram"; parts[curpart].offset = master->size - master->erasesize; -- 1.7.2.5 From jonas.gorski@gmail.com Mon Dec 5 16:09:06 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 05 Dec 2011 16:10:46 +0100 (CET) Received: from mail-fx0-f49.google.com ([209.85.161.49]:35640 "EHLO mail-fx0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903621Ab1LEPJG (ORCPT ); Mon, 5 Dec 2011 16:09:06 +0100 Received: by mail-fx0-f49.google.com with SMTP id s1so1350830fab.36 for ; Mon, 05 Dec 2011 07:09:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=v6NzR+90mvqgabZ3Jol6wF7QptTTlXP8k5sVL+egcd8=; b=PTciu7hyRjX5Pbi+3d3Vg0UtfR9TGcRMfpuXOzf2xZa7JGVZAebn7f29lMZUstD6C9 CrDgWKRT9QiKxz4xYjStVUcxNSr3LDyAVHSpPQ/xq6atcliVOW36HH2BJdhLyjI2FUca W8uiYbyQulAfAyExrwY+ayg97zPAKL1i1sUsM= Received: by 10.227.205.130 with SMTP id fq2mr10291192wbb.17.1323097746355; Mon, 05 Dec 2011 07:09:06 -0800 (PST) Received: from shaker64.lan (dslb-088-073-137-229.pools.arcor-ip.net. [88.73.137.229]) by mx.google.com with ESMTPS id dd4sm10772157wib.1.2011.12.05.07.09.05 (version=SSLv3 cipher=OTHER); Mon, 05 Dec 2011 07:09:05 -0800 (PST) From: Jonas Gorski To: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org, Ralf Baechle , Florian Fainelli , David Woodhouse , Artem Bityutskiy Subject: [PATCH 6/7] MIPS: BCM63XX: use the new bcm63xxpart parser Date: Mon, 5 Dec 2011 16:08:10 +0100 Message-Id: <1323097691-16414-7-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> References: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> X-archive-position: 32034 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3360 Content-Length: 780 Lines: 26 Signed-off-by: Jonas Gorski --- arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c index 40b223b..c223854 100644 --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c @@ -834,10 +834,13 @@ static struct mtd_partition mtd_partitions[] = { } }; +static const char *bcm63xx_part_types[] = { "bcm63xxpart", NULL }; + static struct physmap_flash_data flash_data = { .width = 2, .nr_parts = ARRAY_SIZE(mtd_partitions), .parts = mtd_partitions, + .part_probe_types = bcm63xx_part_types, }; static struct resource mtd_resources[] = { -- 1.7.2.5 From jonas.gorski@gmail.com Mon Dec 5 16:09:07 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 05 Dec 2011 16:11:23 +0100 (CET) Received: from mail-ey0-f177.google.com ([209.85.215.177]:58578 "EHLO mail-ey0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903622Ab1LEPJH (ORCPT ); Mon, 5 Dec 2011 16:09:07 +0100 Received: by eaac10 with SMTP id c10so5209157eaa.36 for ; Mon, 05 Dec 2011 07:09:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=HH9j5+lJqJszAGboUKgVhkLh3HTQd8A5c//Nug/l3mI=; b=EgYIrTG3ZcWC2HBGKDeTtd8PRbh/pZ+2l5TqdH17FAhkplB21zJaMZd1JOUw9ydjHe 54+fItnSjoAr/ybsa9kfw44HbKyMFG01iZ4dv0qgvvE00T3MYfitAAInkJykDB9jzn6H PhtHiAB+oP7R2Ck82Jj9uPO5PGSZ1qS+uT44Y= Received: by 10.216.14.37 with SMTP id c37mr2195912wec.86.1323097741982; Mon, 05 Dec 2011 07:09:01 -0800 (PST) Received: from shaker64.lan (dslb-088-073-137-229.pools.arcor-ip.net. [88.73.137.229]) by mx.google.com with ESMTPS id dd4sm10772157wib.1.2011.12.05.07.09.00 (version=SSLv3 cipher=OTHER); Mon, 05 Dec 2011 07:09:01 -0800 (PST) From: Jonas Gorski To: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org, Ralf Baechle , Florian Fainelli , David Woodhouse , Artem Bityutskiy Subject: [PATCH 3/7] MTD: MAPS: bcm963xx-flash: clean up printk usage Date: Mon, 5 Dec 2011 16:08:07 +0100 Message-Id: <1323097691-16414-4-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> References: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> X-archive-position: 32035 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3361 Content-Length: 2222 Lines: 66 Replace raw printk's with their pr_XXX equivalent and unify broken up strings so they become grepable. Also replace the PFX definition with a pr_fmt(). Signed-off-by: Jonas Gorski --- drivers/mtd/maps/bcm963xx-flash.c | 20 ++++++++++---------- 1 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/maps/bcm963xx-flash.c b/drivers/mtd/maps/bcm963xx-flash.c index 58cbaf2..ce2ca2a 100644 --- a/drivers/mtd/maps/bcm963xx-flash.c +++ b/drivers/mtd/maps/bcm963xx-flash.c @@ -18,6 +18,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include #include #include @@ -33,8 +35,6 @@ #define BCM63XX_BUSWIDTH 2 /* Buswidth */ #define BCM63XX_EXTENDED_SIZE 0xBFC00000 /* Extended flash address */ -#define PFX KBUILD_MODNAME ": " - static struct mtd_partition *parsed_parts; static struct mtd_info *bcm963xx_mtd_info; @@ -79,8 +79,8 @@ static int parse_cfe_partitions(struct mtd_info *master, tagversion = &(buf->tag_version[0]); boardid = &(buf->board_id[0]); - printk(KERN_INFO PFX "CFE boot tag found with version %s " - "and board type %s\n", tagversion, boardid); + pr_info("CFE boot tag found with version %s and board type %s\n", + tagversion, boardid); kerneladdr = kerneladdr - BCM63XX_EXTENDED_SIZE; rootfsaddr = kerneladdr + kernellen; @@ -139,13 +139,13 @@ static int parse_cfe_partitions(struct mtd_info *master, parts[curpart].size = master->size - parts[0].size - parts[3].size; for (i = 0; i < nrparts; i++) - printk(KERN_INFO PFX "Partition %d is %s offset %lx and " - "length %lx\n", i, parts[i].name, - (long unsigned int)(parts[i].offset), - (long unsigned int)(parts[i].size)); + pr_info("Partition %d is %s offset %lx and length %lx\n", i, + parts[i].name, (long unsigned int)(parts[i].offset), + (long unsigned int)(parts[i].size)); + + pr_info("Spare partition is offset %x and length %x\n", spareaddr, + sparelen); - printk(KERN_INFO PFX "Spare partition is offset %x and length %x\n", - spareaddr, sparelen); *pparts = parts; vfree(buf); -- 1.7.2.5 From jonas.gorski@gmail.com Mon Dec 5 16:09:07 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 05 Dec 2011 16:11:48 +0100 (CET) Received: from mail-fx0-f49.google.com ([209.85.161.49]:54807 "EHLO mail-fx0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903627Ab1LEPJH (ORCPT ); Mon, 5 Dec 2011 16:09:07 +0100 Received: by mail-fx0-f49.google.com with SMTP id s1so1350875fab.36 for ; Mon, 05 Dec 2011 07:09:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=wKUdCQ6+s5SdlbUNxCt5PX1e3m17hLI4asgPVvgJGp8=; b=I56AgDbjFY6pfzdcYUpHR+MSFhFYnbFRrO/70J2jMkyYdW4iL9S7dRxBT/n932z6WU gwwZkKZJPNcjRs6TPcX1AT6d5LCArV6D/u0BT1KWCRvDo8dpN8fP5OMbgV0mw9v0yBui h2OkknBEwfDRe2j1bld1yTr+sr5npPIqmgzfU= Received: by 10.227.204.197 with SMTP id fn5mr15951040wbb.15.1323097747571; Mon, 05 Dec 2011 07:09:07 -0800 (PST) Received: from shaker64.lan (dslb-088-073-137-229.pools.arcor-ip.net. [88.73.137.229]) by mx.google.com with ESMTPS id dd4sm10772157wib.1.2011.12.05.07.09.06 (version=SSLv3 cipher=OTHER); Mon, 05 Dec 2011 07:09:07 -0800 (PST) From: Jonas Gorski To: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org, Ralf Baechle , Florian Fainelli , David Woodhouse , Artem Bityutskiy Subject: =?UTF-8?q?=5BPATCH=207/7=5D=20MTD=3A=20MAPS=3A=20remove=20the=20now=20unused=20bcm963xx-flash?= Date: Mon, 5 Dec 2011 16:08:11 +0100 Message-Id: <1323097691-16414-8-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> References: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-archive-position: 32036 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3362 Content-Length: 3910 Lines: 135 bcm963xx-flash does nothing meaningful anymore. Signed-off-by: Jonas Gorski --- drivers/mtd/maps/bcm963xx-flash.c | 118 ------------------------------------- 1 files changed, 0 insertions(+), 118 deletions(-) delete mode 100644 drivers/mtd/maps/bcm963xx-flash.c diff --git a/drivers/mtd/maps/bcm963xx-flash.c b/drivers/mtd/maps/bcm963xx-flash.c deleted file mode 100644 index c106632..0000000 --- a/drivers/mtd/maps/bcm963xx-flash.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * Copyright © 2006-2008 Florian Fainelli - * Mike Albon - * Copyright © 2009-2010 Daniel Dickinson - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -#include -#include -#include -#include -#include -#include -#include -#include - -#define BCM63XX_BUSWIDTH 2 /* Buswidth */ - -static struct mtd_info *bcm963xx_mtd_info; - -static struct map_info bcm963xx_map = { - .name = "bcm963xx", - .bankwidth = BCM63XX_BUSWIDTH, -}; - -static const char *part_types[] = { "bcm63xxpart", NULL }; - -static int bcm963xx_probe(struct platform_device *pdev) -{ - int err = 0; - struct resource *r; - - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!r) { - dev_err(&pdev->dev, "no resource supplied\n"); - return -ENODEV; - } - - bcm963xx_map.phys = r->start; - bcm963xx_map.size = resource_size(r); - bcm963xx_map.virt = ioremap(r->start, resource_size(r)); - if (!bcm963xx_map.virt) { - dev_err(&pdev->dev, "failed to ioremap\n"); - return -EIO; - } - - dev_info(&pdev->dev, "0x%08lx at 0x%08x\n", - bcm963xx_map.size, bcm963xx_map.phys); - - simple_map_init(&bcm963xx_map); - - bcm963xx_mtd_info = do_map_probe("cfi_probe", &bcm963xx_map); - if (!bcm963xx_mtd_info) { - dev_err(&pdev->dev, "failed to probe using CFI\n"); - bcm963xx_mtd_info = do_map_probe("jedec_probe", &bcm963xx_map); - if (bcm963xx_mtd_info) - goto probe_ok; - dev_err(&pdev->dev, "failed to probe using JEDEC\n"); - err = -EIO; - goto err_probe; - } - -probe_ok: - bcm963xx_mtd_info->owner = THIS_MODULE; - - return mtd_device_parse_register(bcm963xx_mtd_info, part_types, NULL, - NULL, 0); -err_probe: - iounmap(bcm963xx_map.virt); - return err; -} - -static int bcm963xx_remove(struct platform_device *pdev) -{ - if (bcm963xx_mtd_info) { - mtd_device_unregister(bcm963xx_mtd_info); - map_destroy(bcm963xx_mtd_info); - } - - if (bcm963xx_map.virt) { - iounmap(bcm963xx_map.virt); - bcm963xx_map.virt = 0; - } - - return 0; -} - -static struct platform_driver bcm63xx_mtd_dev = { - .probe = bcm963xx_probe, - .remove = bcm963xx_remove, - .driver = { - .name = "bcm963xx-flash", - .owner = THIS_MODULE, - }, -}; - -module_platform_driver(bcm63xx_mtd_dev); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("Broadcom BCM63xx MTD driver for CFE and RedBoot"); -MODULE_AUTHOR("Daniel Dickinson "); -MODULE_AUTHOR("Florian Fainelli "); -MODULE_AUTHOR("Mike Albon "); -- 1.7.2.5 From jonas.gorski@gmail.com Mon Dec 5 16:09:09 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 05 Dec 2011 16:12:55 +0100 (CET) Received: from mail-bw0-f49.google.com ([209.85.214.49]:43785 "EHLO mail-bw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903628Ab1LEPJJ (ORCPT ); Mon, 5 Dec 2011 16:09:09 +0100 Received: by bkcje16 with SMTP id je16so4360331bkc.36 for ; Mon, 05 Dec 2011 07:09:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=6W4IjZ57fVgR32oPLRimFhhe/BoFZN9f55aiHZ5rjT0=; b=DkVj3AYo8L2uLw+pYKKSDRhBeEt84K/JqDogDOo7K9AGtEKLletXoYoBXNO2s9Pqzy Z2Vn7G/TlmUQ2FmWcFQXPyCEL/jSjAyNkMBGCGEqY8QTnslregw3YgUjmErdYgavz9VA s/xjqpfhYOdYbCN2A/DYnrJUJcSlIg28YlPL4= Received: by 10.180.104.35 with SMTP id gb3mr13534154wib.11.1323097743879; Mon, 05 Dec 2011 07:09:03 -0800 (PST) Received: from shaker64.lan (dslb-088-073-137-229.pools.arcor-ip.net. [88.73.137.229]) by mx.google.com with ESMTPS id dd4sm10772157wib.1.2011.12.05.07.09.02 (version=SSLv3 cipher=OTHER); Mon, 05 Dec 2011 07:09:02 -0800 (PST) From: Jonas Gorski To: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org, Ralf Baechle , Florian Fainelli , David Woodhouse , Artem Bityutskiy Subject: =?UTF-8?q?=5BPATCH=204/7=5D=20MTD=3A=20MAPS=3A=20bcm963xx-flash=3A=20make=20CFE=20partition=20parsing=20an=20mtd=20parser?= Date: Mon, 5 Dec 2011 16:08:08 +0100 Message-Id: <1323097691-16414-5-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> References: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-archive-position: 32037 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3363 Content-Length: 12783 Lines: 442 Recent BCM63XX devices support a variety of flash types (parallel, SPI, NAND) and share the partition layout. To prevent code duplication make the CFE partition parsing code a stand alone mtd parser to allow SPI or NAND flash drivers to use it. Signed-off-by: Jonas Gorski --- drivers/mtd/Kconfig | 8 ++ drivers/mtd/Makefile | 1 + drivers/mtd/bcm63xxpart.c | 189 +++++++++++++++++++++++++++++++++++++ drivers/mtd/maps/Kconfig | 1 + drivers/mtd/maps/bcm963xx-flash.c | 153 +----------------------------- 5 files changed, 202 insertions(+), 150 deletions(-) create mode 100644 drivers/mtd/bcm63xxpart.c diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 318a869..1be6218 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -140,6 +140,14 @@ config MTD_AR7_PARTS ---help--- TI AR7 partitioning support +config MTD_BCM63XX_PARTS + tristate "BCM63XX CFE partitioning support" + depends on BCM63XX + select CRC32 + help + This provides partions parsing for BCM63xx devices with CFE + bootloaders. + comment "User Modules And Translation Layers" config MTD_CHAR diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile index 9aaac3a..f901354 100644 --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o obj-$(CONFIG_MTD_AFS_PARTS) += afs.o obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o +obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o # 'Users' - code which presents functionality to userspace. obj-$(CONFIG_MTD_CHAR) += mtdchar.o diff --git a/drivers/mtd/bcm63xxpart.c b/drivers/mtd/bcm63xxpart.c new file mode 100644 index 0000000..ac7d3c8 --- /dev/null +++ b/drivers/mtd/bcm63xxpart.c @@ -0,0 +1,189 @@ +/* + * BCM63XX CFE image tag parser + * + * Copyright © 2006-2008 Florian Fainelli + * Mike Albon + * Copyright © 2009-2010 Daniel Dickinson + * Copyright © 2011 Jonas Gorski + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include + +#include + +#define BCM63XX_EXTENDED_SIZE 0xBFC00000 /* Extended flash address */ + +static int bcm63xx_detect_cfe(struct mtd_info *master) +{ + int idoffset = 0x4e0; + static char idstring[8] = "CFE1CFE1"; + char buf[9]; + int ret; + size_t retlen; + + ret = master->read(master, idoffset, 8, &retlen, (void *)buf); + buf[retlen] = 0; + pr_info("Read Signature value of %s\n", buf); + + return strncmp(idstring, buf, 8); +} + +static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, + struct mtd_partition **pparts, + struct mtd_part_parser_data *data) +{ + /* CFE, NVRAM and global Linux are always present */ + int nrparts = 3, curpart = 0; + struct bcm_tag *buf; + struct mtd_partition *parts; + int ret; + size_t retlen; + unsigned int rootfsaddr, kerneladdr, spareaddr; + unsigned int rootfslen, kernellen, sparelen, totallen; + int namelen = 0; + int i; + char *boardid; + char *tagversion; + + if (bcm63xx_detect_cfe(master)) + return -EINVAL; + + /* Allocate memory for buffer */ + buf = vmalloc(sizeof(struct bcm_tag)); + if (!buf) + return -ENOMEM; + + /* Get the tag */ + ret = master->read(master, master->erasesize, sizeof(struct bcm_tag), + &retlen, (void *)buf); + if (retlen != sizeof(struct bcm_tag)) { + vfree(buf); + return -EIO; + } + + sscanf(buf->kernel_address, "%u", &kerneladdr); + sscanf(buf->kernel_length, "%u", &kernellen); + sscanf(buf->total_length, "%u", &totallen); + tagversion = &(buf->tag_version[0]); + boardid = &(buf->board_id[0]); + + pr_info("CFE boot tag found with version %s and board type %s\n", + tagversion, boardid); + + kerneladdr = kerneladdr - BCM63XX_EXTENDED_SIZE; + rootfsaddr = kerneladdr + kernellen; + spareaddr = roundup(totallen, master->erasesize) + master->erasesize; + sparelen = master->size - spareaddr - master->erasesize; + rootfslen = spareaddr - rootfsaddr; + + /* Determine number of partitions */ + namelen = 8; + if (rootfslen > 0) { + nrparts++; + namelen += 6; + } + if (kernellen > 0) { + nrparts++; + namelen += 6; + } + + /* Ask kernel for more memory */ + parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL); + if (!parts) { + vfree(buf); + return -ENOMEM; + } + + /* Start building partition list */ + parts[curpart].name = "CFE"; + parts[curpart].offset = 0; + parts[curpart].size = master->erasesize; + curpart++; + + if (kernellen > 0) { + parts[curpart].name = "kernel"; + parts[curpart].offset = kerneladdr; + parts[curpart].size = kernellen; + curpart++; + } + + if (rootfslen > 0) { + parts[curpart].name = "rootfs"; + parts[curpart].offset = rootfsaddr; + parts[curpart].size = rootfslen; + if (sparelen > 0) + parts[curpart].size += sparelen; + curpart++; + } + + parts[curpart].name = "nvram"; + parts[curpart].offset = master->size - master->erasesize; + parts[curpart].size = master->erasesize; + + /* Global partition "linux" to make easy firmware upgrade */ + curpart++; + parts[curpart].name = "linux"; + parts[curpart].offset = parts[0].size; + parts[curpart].size = master->size - parts[0].size - parts[3].size; + + for (i = 0; i < nrparts; i++) + pr_info("Partition %d is %s offset %lx and length %lx\n", i, + parts[i].name, (long unsigned int)(parts[i].offset), + (long unsigned int)(parts[i].size)); + + pr_info("Spare partition is offset %x and length %x\n", spareaddr, + sparelen); + + *pparts = parts; + vfree(buf); + + return nrparts; +}; + +static struct mtd_part_parser bcm63xx_cfe_parser = { + .owner = THIS_MODULE, + .parse_fn = bcm63xx_parse_cfe_partitions, + .name = "bcm63xxpart", +}; + +static int __init bcm63xx_cfe_parser_init(void) +{ + return register_mtd_parser(&bcm63xx_cfe_parser); +} + +static void __exit bcm63xx_cfe_parser_exit(void) +{ + deregister_mtd_parser(&bcm63xx_cfe_parser); +} + +module_init(bcm63xx_cfe_parser_init); +module_exit(bcm63xx_cfe_parser_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Daniel Dickinson "); +MODULE_AUTHOR("Florian Fainelli "); +MODULE_AUTHOR("Mike Albon "); +MODULE_AUTHOR("Jonas Gorski #include #include -#include #include #include -#include - #define BCM63XX_BUSWIDTH 2 /* Buswidth */ -#define BCM63XX_EXTENDED_SIZE 0xBFC00000 /* Extended flash address */ - -static struct mtd_partition *parsed_parts; static struct mtd_info *bcm963xx_mtd_info; @@ -44,134 +38,11 @@ static struct map_info bcm963xx_map = { .bankwidth = BCM63XX_BUSWIDTH, }; -static int parse_cfe_partitions(struct mtd_info *master, - struct mtd_partition **pparts) -{ - /* CFE, NVRAM and global Linux are always present */ - int nrparts = 3, curpart = 0; - struct bcm_tag *buf; - struct mtd_partition *parts; - int ret; - size_t retlen; - unsigned int rootfsaddr, kerneladdr, spareaddr; - unsigned int rootfslen, kernellen, sparelen, totallen; - int namelen = 0; - int i; - char *boardid; - char *tagversion; - - /* Allocate memory for buffer */ - buf = vmalloc(sizeof(struct bcm_tag)); - if (!buf) - return -ENOMEM; - - /* Get the tag */ - ret = master->read(master, master->erasesize, sizeof(struct bcm_tag), - &retlen, (void *)buf); - if (retlen != sizeof(struct bcm_tag)) { - vfree(buf); - return -EIO; - } - - sscanf(buf->kernel_address, "%u", &kerneladdr); - sscanf(buf->kernel_length, "%u", &kernellen); - sscanf(buf->total_length, "%u", &totallen); - tagversion = &(buf->tag_version[0]); - boardid = &(buf->board_id[0]); - - pr_info("CFE boot tag found with version %s and board type %s\n", - tagversion, boardid); - - kerneladdr = kerneladdr - BCM63XX_EXTENDED_SIZE; - rootfsaddr = kerneladdr + kernellen; - spareaddr = roundup(totallen, master->erasesize) + master->erasesize; - sparelen = master->size - spareaddr - master->erasesize; - rootfslen = spareaddr - rootfsaddr; - - /* Determine number of partitions */ - namelen = 8; - if (rootfslen > 0) { - nrparts++; - namelen += 6; - } - if (kernellen > 0) { - nrparts++; - namelen += 6; - } - - /* Ask kernel for more memory */ - parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL); - if (!parts) { - vfree(buf); - return -ENOMEM; - } - - /* Start building partition list */ - parts[curpart].name = "CFE"; - parts[curpart].offset = 0; - parts[curpart].size = master->erasesize; - curpart++; - - if (kernellen > 0) { - parts[curpart].name = "kernel"; - parts[curpart].offset = kerneladdr; - parts[curpart].size = kernellen; - curpart++; - } - - if (rootfslen > 0) { - parts[curpart].name = "rootfs"; - parts[curpart].offset = rootfsaddr; - parts[curpart].size = rootfslen; - if (sparelen > 0) - parts[curpart].size += sparelen; - curpart++; - } - - parts[curpart].name = "nvram"; - parts[curpart].offset = master->size - master->erasesize; - parts[curpart].size = master->erasesize; - - /* Global partition "linux" to make easy firmware upgrade */ - curpart++; - parts[curpart].name = "linux"; - parts[curpart].offset = parts[0].size; - parts[curpart].size = master->size - parts[0].size - parts[3].size; - - for (i = 0; i < nrparts; i++) - pr_info("Partition %d is %s offset %lx and length %lx\n", i, - parts[i].name, (long unsigned int)(parts[i].offset), - (long unsigned int)(parts[i].size)); - - pr_info("Spare partition is offset %x and length %x\n", spareaddr, - sparelen); - - *pparts = parts; - vfree(buf); - - return nrparts; -}; - -static int bcm963xx_detect_cfe(struct mtd_info *master) -{ - int idoffset = 0x4e0; - static char idstring[8] = "CFE1CFE1"; - char buf[9]; - int ret; - size_t retlen; - - ret = master->read(master, idoffset, 8, &retlen, (void *)buf); - buf[retlen] = 0; - printk(KERN_INFO PFX "Read Signature value of %s\n", buf); - - return strncmp(idstring, buf, 8); -} +static const char *part_types[] = { "bcm63xxpart", NULL }; static int bcm963xx_probe(struct platform_device *pdev) { int err = 0; - int parsed_nr_parts = 0; - char *part_type; struct resource *r; r = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -207,26 +78,8 @@ static int bcm963xx_probe(struct platform_device *pdev) probe_ok: bcm963xx_mtd_info->owner = THIS_MODULE; - /* This is mutually exclusive */ - if (bcm963xx_detect_cfe(bcm963xx_mtd_info) == 0) { - dev_info(&pdev->dev, "CFE bootloader detected\n"); - if (parsed_nr_parts == 0) { - int ret = parse_cfe_partitions(bcm963xx_mtd_info, - &parsed_parts); - if (ret > 0) { - part_type = "CFE"; - parsed_nr_parts = ret; - } - } - } else { - dev_info(&pdev->dev, "unsupported bootloader\n"); - err = -ENODEV; - goto err_probe; - } - - return mtd_device_register(bcm963xx_mtd_info, parsed_parts, - parsed_nr_parts); - + return mtd_device_parse_register(bcm963xx_mtd_info, part_types, NULL, + NULL, 0); err_probe: iounmap(bcm963xx_map.virt); return err; -- 1.7.2.5 From jonas.gorski@gmail.com Mon Dec 5 16:09:10 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 05 Dec 2011 16:13:25 +0100 (CET) Received: from mail-bw0-f49.google.com ([209.85.214.49]:56553 "EHLO mail-bw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903629Ab1LEPJK (ORCPT ); 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[88.73.137.229]) by mx.google.com with ESMTPS id dd4sm10772157wib.1.2011.12.05.07.09.03 (version=SSLv3 cipher=OTHER); Mon, 05 Dec 2011 07:09:04 -0800 (PST) From: Jonas Gorski To: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org, Ralf Baechle , Florian Fainelli , David Woodhouse , Artem Bityutskiy Subject: [PATCH 5/7] MTD: MAPS: physmap: allow partition parsers for physmap_flash_data Date: Mon, 5 Dec 2011 16:08:09 +0100 Message-Id: <1323097691-16414-6-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> References: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> X-archive-position: 32038 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3364 Content-Length: 1489 Lines: 47 Arch setup code might want to use their own partition parsers, but still use the generic physmap flash driver. Signed-off-by: Jonas Gorski --- drivers/mtd/maps/physmap.c | 5 ++++- include/linux/mtd/physmap.h | 1 + 2 files changed, 5 insertions(+), 1 deletions(-) diff --git a/drivers/mtd/maps/physmap.c b/drivers/mtd/maps/physmap.c index 66e8200..1f749d58 100644 --- a/drivers/mtd/maps/physmap.c +++ b/drivers/mtd/maps/physmap.c @@ -85,6 +85,7 @@ static int physmap_flash_probe(struct platform_device *dev) struct physmap_flash_data *physmap_data; struct physmap_flash_info *info; const char **probe_type; + const char **part_types; int err = 0; int i; int devices_found = 0; @@ -171,7 +172,9 @@ static int physmap_flash_probe(struct platform_device *dev) if (err) goto err_out; - mtd_device_parse_register(info->cmtd, part_probe_types, 0, + part_types = physmap_data->part_probe_types ? : part_probe_types; + + mtd_device_parse_register(info->cmtd, part_types, 0, physmap_data->parts, physmap_data->nr_parts); return 0; diff --git a/include/linux/mtd/physmap.h b/include/linux/mtd/physmap.h index 04e0181..d2887e7 100644 --- a/include/linux/mtd/physmap.h +++ b/include/linux/mtd/physmap.h @@ -30,6 +30,7 @@ struct physmap_flash_data { unsigned int pfow_base; char *probe_type; struct mtd_partition *parts; + const char **part_probe_types; }; #endif /* __LINUX_MTD_PHYSMAP__ */ -- 1.7.2.5 From plagnioj@jcrosoft.com Mon Dec 5 16:58:32 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 05 Dec 2011 16:58:40 +0100 (CET) Received: from 12.mo1.mail-out.ovh.net ([87.98.162.229]:59400 "EHLO mo1.mail-out.ovh.net" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1903618Ab1LEP6c (ORCPT ); Mon, 5 Dec 2011 16:58:32 +0100 Received: from mail99.ha.ovh.net (b6.ovh.net [213.186.33.56]) by mo1.mail-out.ovh.net (Postfix) with SMTP id 0D0DBFFB6D9 for ; Mon, 5 Dec 2011 16:58:38 +0100 (CET) Received: from b0.ovh.net (HELO queueout) (213.186.33.50) by b0.ovh.net with SMTP; 5 Dec 2011 17:58:30 +0200 Received: from ns32433.ovh.net (HELO localhost) (plagnioj%jcrosoft.com@213.251.161.87) by ns0.ovh.net with SMTP; 5 Dec 2011 17:57:33 +0200 Date: Mon, 5 Dec 2011 16:53:59 +0100 From: Jean-Christophe PLAGNIOL-VILLARD To: rtc-linux@googlegroups.com Cc: a.zummo@towertech.it, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, ralf@linux-mips.org, keguang.zhang@gmail.com, wuzhangjin@gmail.com, r0bertz@gentoo.org, zhao zhang X-Ovh-Mailout: 178.32.228.1 (mo1.mail-out.ovh.net) Subject: Re: [rtc-linux] [PATCH] MIPS: Add RTC support for loongson1B Message-ID: <20111205155359.GF9192@game.jcrosoft.org> References: <1322729078-6141-1-git-send-email-zhzhl555@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1322729078-6141-1-git-send-email-zhzhl555@gmail.com> X-PGP-Key: http://uboot.jcrosoft.org/plagnioj.asc X-PGP-key-fingerprint: 6309 2BBA 16C8 3A07 1772 CC24 DEFC FFA3 279C CE7C User-Agent: Mutt/1.5.20 (2009-06-14) X-Ovh-Tracer-Id: 16856128980892036017 X-Ovh-Remote: 213.251.161.87 (ns32433.ovh.net) X-Ovh-Local: 213.186.33.20 (ns0.ovh.net) X-OVH-SPAMSTATE: OK X-OVH-SPAMSCORE: 0 X-OVH-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeefjedruddvucetggdotefuucfrrhhofhhilhgvmecuqfggjfenuceurghilhhouhhtmecufedttdenucenucfjughrpeffhffvuffkfhggtggujggfsehttdfttddtredvnecuhfhrohhmpeflvggrnhdqvehhrhhishhtohhphhgvucfrnfetiffpkffqnfdqggfknffnteftffcuoehplhgrghhnihhojhesjhgtrhhoshhofhhtrdgtohhmqeenucffohhmrghinhepne X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: 0 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeefjedruddvucetggdotefuucfrrhhofhhilhgvmecuqfggjfenuceurghilhhouhhtmecufedttdenucenucfjughrpeffhffvuffkfhggtggujggfsehttdfttddtredvnecuhfhrohhmpeflvggrnhdqvehhrhhishhtohhphhgvucfrnfetiffpkffqnfdqggfknffnteftffcuoehplhgrghhnihhojhesjhgtrhhoshhofhhtrdgtohhmqeenucffohhmrghinhepne X-archive-position: 32039 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: plagnioj@jcrosoft.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3400 Content-Length: 1657 Lines: 50 On 16:44 Thu 01 Dec , zhzhl555@gmail.com wrote: > From: zhao zhang > > V2: use new module_platform_driver macro. > thanks for Wolfram's advice. > > This patch adds RTC support(TOY counter0) for loongson1B. > Signed-off-by: zhao zhang > --- > drivers/rtc/Kconfig | 10 ++ > drivers/rtc/Makefile | 1 + > drivers/rtc/rtc-ls1x.c | 214 ++++++++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 225 insertions(+), 0 deletions(-) > create mode 100644 drivers/rtc/rtc-ls1x.c > > diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig > index 5a538fc..6f8c2d7 100644 > --- a/drivers/rtc/Kconfig > +++ b/drivers/rtc/Kconfig > @@ -1070,4 +1070,14 @@ config RTC_DRV_PUV3 > This drive can also be built as a module. If so, the module > will be called rtc-puv3. > > +config RTC_DRV_LOONGSON1 > + tristate "loongson1 RTC support" > + depends on MACH_LOONGSON1 > + help > + This is a driver for the loongson1 on-chip Counter0 (Time-Of-Year > + counter) to be used as a RTC. > + > + This driver can also be built as a module. If so, the module > + will be called rtc-ls1x. > + > endif # RTC_CLASS > diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile > index 6e69823..48153fe 100644 > --- a/drivers/rtc/Makefile > +++ b/drivers/rtc/Makefile > @@ -109,3 +109,4 @@ obj-$(CONFIG_RTC_DRV_VT8500) += rtc-vt8500.o > obj-$(CONFIG_RTC_DRV_WM831X) += rtc-wm831x.o > obj-$(CONFIG_RTC_DRV_WM8350) += rtc-wm8350.o > obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o > +obj-$(CONFIG_RTC_DRV_LOONGSON1) += rtc-ls1x.o keep it ordered you have no alarm, irq on this hardware? Best Regards, J. From florian@openwrt.org Mon Dec 5 23:36:22 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 05 Dec 2011 23:36:32 +0100 (CET) Received: from mail-bw0-f49.google.com ([209.85.214.49]:34326 "EHLO mail-bw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903629Ab1LEWgW convert rfc822-to-8bit (ORCPT ); Mon, 5 Dec 2011 23:36:22 +0100 Received: by bkcje16 with SMTP id je16so5048188bkc.36 for ; Mon, 05 Dec 2011 14:36:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=sender:from:to:subject:date:user-agent:cc:references:in-reply-to :mime-version:content-type:content-transfer-encoding:message-id; bh=acEQrSGQLmFvFWOfYABMT/by1y8REsa1/RX14icVQGI=; b=U1DB1jzr5uRq2d2yt63pD/7lyL67DaMb88uKxq4rRNe3e3kPBUESVd0XqfUGCV6gA+ tizIoScsjgUpi9xMMN4J0LZhCPgvSsPixR+LIL2a3548kWHtA0GjC9k+JHoKThpvLnnQ Mi+sQHaw3fEUA4eJwZaxrZSMq2IeJVnMyUb+8= Received: by 10.180.4.167 with SMTP id l7mr14947247wil.51.1323124576730; Mon, 05 Dec 2011 14:36:16 -0800 (PST) Received: from lenovo.localnet ([2a01:e35:2f70:4010:21d:7dff:fe45:5399]) by mx.google.com with ESMTPS id d17sm30224723wbh.19.2011.12.05.14.36.09 (version=SSLv3 cipher=OTHER); Mon, 05 Dec 2011 14:36:11 -0800 (PST) From: Florian Fainelli To: Jonas Gorski Subject: Re: [PATCH 0/7] MTD: MAPS: remove bcm963xx-flash Date: Mon, 5 Dec 2011 23:36:07 +0100 User-Agent: KMail/1.13.7 (Linux/3.1.0-1-amd64; KDE/4.6.5; x86_64; ; ) Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, Ralf Baechle , David Woodhouse , Artem Bityutskiy References: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> In-Reply-To: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-15" Content-Transfer-Encoding: 8BIT Message-Id: <201112052336.07901.florian@openwrt.org> X-archive-position: 32040 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3874 Content-Length: 2571 Lines: 63 Hello Jonas, Le lundi 05 décembre 2011 16:08:04, Jonas Gorski a écrit : > While trying to improve the bcm963xx CFE partition parsing, I noticed > that it could be completely replaced by the generic physmap flash > driver using a custom parser. > > The following patch set tries to accomplish that. > > The first few patches clean take care of some minor code style issues > first to prevent checkpatch from complaining when moving code around. > > After that I move the CFE partition parsing into a parser and make > bcm963xx-flash use it to make sure I don't create a non working version. > > Finally I'll allow physmap_flash_data to take partition parser names for > overriding the default parsers list (the OF version already allows that), > let BCM63XX use it, and remove the bcm963xx-flash driver as it is now > completely replaced by physmap + CFE parser. > > While most patches are limited to the MTD tree, patch 6/7 touches MIPS, > so it could go in either tree. But since the MTD tree already has some > modifications for bcm963xx-flash, I think it's better to let it go > through the MTD tree, to reduce the (potential for) conflicts. For the whole series, feel free to add my: Acked-by: Florian Fainelli thanks! > > Regards > Jonas > > P.S: This patchset is based on l2-mtd-2.6.git, which seems to be the > "correct" tree now (the website says mtd-2.6.git, but it doesn't look > like the correct one, having no commits). > > Jonas Gorski (7): > MTD: MAPS: bcm963xx-flash: fix word order for spare partition > MTD: MAPS: bcm963xx-flash: remove superfluous semicolons > MTD: MAPS: bcm963xx-flash: clean up printk usage > MTD: MAPS: bcm963xx-flash: make CFE partition parsing an mtd parser > MTD: MAPS: physmap: allow partition parsers for physmap_flash_data > MIPS: BCM63XX: use the new bcm63xxpart parser > MTD: MAPS: remove the now unused bcm963xx-flash > > arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 + > drivers/mtd/Kconfig | 8 + > drivers/mtd/Makefile | 1 + > drivers/mtd/bcm63xxpart.c | 189 ++++++++++++++++++++ > drivers/mtd/maps/Kconfig | 1 + > drivers/mtd/maps/bcm963xx-flash.c | 265 > ----------------------------- drivers/mtd/maps/physmap.c | > 5 +- > include/linux/mtd/physmap.h | 1 + > 8 files changed, 207 insertions(+), 266 deletions(-) > create mode 100644 drivers/mtd/bcm63xxpart.c > delete mode 100644 drivers/mtd/maps/bcm963xx-flash.c -- Florian From david.daney@cavium.com Tue Dec 6 01:49:37 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 06 Dec 2011 01:49:42 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:14337 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903632Ab1LFAth (ORCPT ); Tue, 6 Dec 2011 01:49:37 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Mon, 05 Dec 2011 16:51:04 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Mon, 5 Dec 2011 16:49:36 -0800 Received: from dd1.caveonetworks.com ([64.2.3.195]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Mon, 5 Dec 2011 16:49:35 -0800 Message-ID: <4EDD669F.30207@cavium.com> Date: Mon, 05 Dec 2011 16:49:35 -0800 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: binutils CC: linux-mips , Manuel Lauss , Debian MIPS Subject: [Patch]: Fix ld pr11138 FAILures on mips*. Content-Type: multipart/mixed; boundary="------------080709040708040308010506" X-OriginalArrivalTime: 06 Dec 2011 00:49:35.0825 (UTC) FILETIME=[ECF8DC10:01CCB3B0] X-archive-position: 32041 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: david.daney@cavium.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 3970 Content-Length: 3666 Lines: 97 This is a multi-part message in MIME format. --------------080709040708040308010506 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit The pr11138 testcase links an executable with a version script. On mips64-linux the presence of a version script was causing the MIPS_RLD_MAP dynamic tag to be populated with a NULL value. When such an executable was run ld.so would try to dereference this and receive SIGSEGV, thus killing the process. The root cause of this is that the mips linker synthesizes a special symbol "__RLD_MAP", and then sets MIPS_RLD_MAP to point to it. When a version script is present, this symbol gets versioned along with all the rest, and when it is time to take its address, the symbol can no longer be found as it has had version information appended to its name. Since "__RLD_MAP" is really part of the ABI, we want to exclude it from symbol versioning. To this end, I introduced a new symbol flag 'no_sym_version' to tag this type of symbol. When the "__RLD_MAP" symbol is created, we set this flag. In _bfd_elf_link_assign_sym_version, we then skip all symbols that have 'no_sym_version' set, and everything now works. This problem has also been reported in the wild when linking the firefox executable. Tested on mips64-linux-gnu and x86_64-linux-gnu Ok to commit? 2011-12-05 David Daney * elf-bfd.h (elf_link_hash_entry): Add no_sym_version field. * elflink.c (_bfd_elf_link_assign_sym_version): Don't assign a version if no_sym_version is set. * elfxx-mips.c (_bfd_mips_elf_create_dynamic_sections): Set no_sym_version for "__RLD_MAP". --------------080709040708040308010506 Content-Type: text/plain; name="dd-2.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="dd-2.patch" Index: bfd/elf-bfd.h =================================================================== RCS file: /cvs/src/src/bfd/elf-bfd.h,v retrieving revision 1.329 diff -u -p -r1.329 elf-bfd.h --- bfd/elf-bfd.h 17 Aug 2011 00:39:38 -0000 1.329 +++ bfd/elf-bfd.h 5 Dec 2011 20:15:49 -0000 @@ -198,6 +198,8 @@ struct elf_link_hash_entry unsigned int pointer_equality_needed : 1; /* Symbol is a unique global symbol. */ unsigned int unique_global : 1; + /* Symbol should not be versioned. It is part of the ABI */ + unsigned int no_sym_version : 1; /* String table index in .dynstr if this is a dynamic symbol. */ unsigned long dynstr_index; Index: bfd/elflink.c =================================================================== RCS file: /cvs/src/src/bfd/elflink.c,v retrieving revision 1.430 diff -u -p -r1.430 elflink.c --- bfd/elflink.c 15 Nov 2011 11:33:57 -0000 1.430 +++ bfd/elflink.c 5 Dec 2011 20:15:50 -0000 @@ -1946,6 +1946,9 @@ _bfd_elf_link_assign_sym_version (struct if (!h->def_regular) return TRUE; + if (h->no_sym_version) + return TRUE; + bed = get_elf_backend_data (info->output_bfd); p = strchr (h->root.root.string, ELF_VER_CHR); if (p != NULL && h->verinfo.vertree == NULL) Index: bfd/elfxx-mips.c =================================================================== RCS file: /cvs/src/src/bfd/elfxx-mips.c,v retrieving revision 1.296 diff -u -p -r1.296 elfxx-mips.c --- bfd/elfxx-mips.c 29 Nov 2011 20:28:54 -0000 1.296 +++ bfd/elfxx-mips.c 5 Dec 2011 20:15:50 -0000 @@ -7260,6 +7260,7 @@ _bfd_mips_elf_create_dynamic_sections (b h = (struct elf_link_hash_entry *) bh; h->non_elf = 0; h->def_regular = 1; + h->no_sym_version = 1; h->type = STT_OBJECT; if (! bfd_elf_link_record_dynamic_symbol (info, h)) --------------080709040708040308010506-- From amodra@gmail.com Tue Dec 6 06:40:32 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 06 Dec 2011 06:40:37 +0100 (CET) Received: from mail-gx0-f177.google.com ([209.85.161.177]:44934 "EHLO mail-gx0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903541Ab1LFFkc (ORCPT ); Tue, 6 Dec 2011 06:40:32 +0100 Received: by ggnp4 with SMTP id p4so224671ggn.36 for ; Mon, 05 Dec 2011 21:40:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=date:from:to:cc:subject:message-id:mail-followup-to:references :mime-version:content-type:content-disposition:in-reply-to :user-agent; bh=v1etU3VmvQqtrxXpPwwvz5vnrxajMJQSBIC6pSlOdms=; b=JA0FGJ+BF9ARc5CreuSEn5DMh/DN62UNFD43ek3+3BQoO46zaMobEHLSnnCPoOnjo3 BEhUzBYEHJs07sWsCCYjgx4gB40vYl3uRVM4U1OF+MvHQaH39HR1+W/69tt4c/K0KKVN I9GBmVba8RpcMFFQ3tUyvai3g7yAHVG1Zd00s= Received: by 10.236.131.82 with SMTP id l58mr16612006yhi.36.1323150026848; Mon, 05 Dec 2011 21:40:26 -0800 (PST) Received: from bubble.grove.modra.org ([115.187.252.19]) by mx.google.com with ESMTPS id f7sm30953333and.17.2011.12.05.21.40.23 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 05 Dec 2011 21:40:26 -0800 (PST) Received: by bubble.grove.modra.org (Postfix, from userid 1000) id 189C4170C2BF; Tue, 6 Dec 2011 16:10:19 +1030 (CST) Date: Tue, 6 Dec 2011 16:10:19 +1030 From: Alan Modra To: David Daney Cc: binutils , linux-mips , Manuel Lauss , Debian MIPS Subject: Re: [Patch]: Fix ld pr11138 FAILures on mips*. Message-ID: <20111206054018.GB21034@bubble.grove.modra.org> Mail-Followup-To: David Daney , binutils , linux-mips , Manuel Lauss , Debian MIPS References: <4EDD669F.30207@cavium.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4EDD669F.30207@cavium.com> User-Agent: Mutt/1.5.20 (2009-06-14) X-archive-position: 32042 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: amodra@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4089 Content-Length: 756 Lines: 24 On Mon, Dec 05, 2011 at 04:49:35PM -0800, David Daney wrote: > The root cause of this is that the mips linker synthesizes a special > symbol "__RLD_MAP", and then sets MIPS_RLD_MAP to point to it. When > a version script is present, this symbol gets versioned along with > all the rest, and when it is time to take its address, the symbol > can no longer be found as it has had version information appended to > its name. Why not just change && (strcmp (name, "__rld_map") == 0 || strcmp (name, "__RLD_MAP") == 0)) to && (strncmp (name, "__rld_map", 9) == 0 || strncmp (name, "__RLD_MAP", 9) == 0)) in _bfd_mips_elf_finish_dynamic_symbol? Perhaps the same for other syms there too? -- Alan Modra Australia Development Lab, IBM From dedekind1@gmail.com Tue Dec 6 13:02:51 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 06 Dec 2011 13:02:59 +0100 (CET) Received: from mail-lpp01m010-f49.google.com ([209.85.215.49]:44844 "EHLO mail-lpp01m010-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903632Ab1LFMCv (ORCPT ); Tue, 6 Dec 2011 13:02:51 +0100 Received: by laah2 with SMTP id h2so507675laa.36 for ; Tue, 06 Dec 2011 04:02:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:date:in-reply-to:references :content-type:x-mailer:content-transfer-encoding:message-id :mime-version; bh=Nfp3KLGNYjOHzVKMuy3x7k2+jy1GcNZB8S1WdT5hDG8=; b=RHdyyL6LQ7OvfnJwvGstAeV36NkTMzWrM5ITaR3apHkrv4zSk1JQwiCKZV3DJQ9Li2 SEWODygTwsLD2CRGcIGUxXoCuOCz/ILdNl8nAjTwEDlDX81v2fJ2TlBvcTq9PBuZkNyu zfKtw6+V/UIrhP6vw4jFBFjvXuEvdMVzxO9Ug= Received: by 10.152.102.173 with SMTP id fp13mr8881702lab.24.1323172966088; Tue, 06 Dec 2011 04:02:46 -0800 (PST) Received: from [192.168.255.2] (host-94-101-1-70.igua.fi. [94.101.1.70]) by mx.google.com with ESMTPS id py2sm3653786lab.2.2011.12.06.04.02.44 (version=SSLv3 cipher=OTHER); Tue, 06 Dec 2011 04:02:45 -0800 (PST) Subject: Re: [PATCH 0/7] MTD: MAPS: remove bcm963xx-flash From: Artem Bityutskiy Reply-To: dedekind1@gmail.com To: Jonas Gorski Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, Artem Bityutskiy , David Woodhouse , Florian Fainelli , Ralf Baechle Date: Tue, 06 Dec 2011 14:02:44 +0200 In-Reply-To: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> References: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.0.3 (3.0.3-1.fc15) Content-Transfer-Encoding: 7bit Message-ID: <1323172965.2163.5.camel@koala> Mime-Version: 1.0 X-archive-position: 32043 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dedekind1@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4397 Content-Length: 379 Lines: 14 On Mon, 2011-12-05 at 16:08 +0100, Jonas Gorski wrote: > While trying to improve the bcm963xx CFE partition parsing, I noticed > that it could be completely replaced by the generic physmap flash > driver using a custom parser. Hi, would you please send a version which applies cleanly to my l2-mtd-2.6.git tree: http://git.infradead.org/users/dedekind/l2-mtd-2.6.git Artem. From jonas.gorski@gmail.com Tue Dec 6 13:13:29 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 06 Dec 2011 13:13:37 +0100 (CET) Received: from mail-fx0-f49.google.com ([209.85.161.49]:57756 "EHLO mail-fx0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903632Ab1LFMN3 (ORCPT ); Tue, 6 Dec 2011 13:13:29 +0100 Received: by fabs1 with SMTP id s1so2447250fab.36 for ; Tue, 06 Dec 2011 04:13:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type; bh=qo+Ikvpk1uOUCq2zTGn9vGEF1soTk/Vzi3peI1CAeVU=; b=gF9b57mj33HP4eQxorXmQXV85v0ig8meHeOGhHwTX+e9f55IfMVrZVN+OmdDExRGhe uVfRDF+rONWJpZCNsCoHS/hwDHz1jcDZtP7+BeYJRJ44hxxESZtvLDjlGwTxhNu+/PBh Ppp36dAnwQE+D/EQQ/D80GOAY2qYf2K0YiG2w= Received: by 10.216.137.215 with SMTP id y65mr2758533wei.66.1323173604348; Tue, 06 Dec 2011 04:13:24 -0800 (PST) MIME-Version: 1.0 Received: by 10.223.14.151 with HTTP; Tue, 6 Dec 2011 04:13:03 -0800 (PST) In-Reply-To: <1323172965.2163.5.camel@koala> References: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> <1323172965.2163.5.camel@koala> From: Jonas Gorski Date: Tue, 6 Dec 2011 13:13:03 +0100 Message-ID: Subject: Re: [PATCH 0/7] MTD: MAPS: remove bcm963xx-flash To: dedekind1@gmail.com Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, Artem Bityutskiy , David Woodhouse , Florian Fainelli , Ralf Baechle Content-Type: text/plain; charset=UTF-8 X-archive-position: 32044 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4420 Content-Length: 844 Lines: 24 On 6 December 2011 13:02, Artem Bityutskiy wrote: > On Mon, 2011-12-05 at 16:08 +0100, Jonas Gorski wrote: >> While trying to improve the bcm963xx CFE partition parsing, I noticed >> that it could be completely replaced by the generic physmap flash >> driver using a custom parser. > > Hi, > > would you please send a version which applies cleanly to my > l2-mtd-2.6.git tree: > > http://git.infradead.org/users/dedekind/l2-mtd-2.6.git On Mon, 2011-12-05 at 16:08 +0100, Jonas Gorski wrote: > P.S: This patchset is based on l2-mtd-2.6.git, which seems to be the > "correct" tree now (the website says mtd-2.6.git, but it doesn't look > like the correct one, having no commits). And these patches do apply cleanly for me on my local copy of your git (latest commit from 29 hours ago according to gitweb). Regards Jonas From david.daney@cavium.com Tue Dec 6 21:20:17 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 06 Dec 2011 21:20:21 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:16199 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903633Ab1LFUUR (ORCPT ); Tue, 6 Dec 2011 21:20:17 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Tue, 06 Dec 2011 12:21:43 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Tue, 6 Dec 2011 12:20:14 -0800 Received: from dd1.caveonetworks.com ([64.2.3.195]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Tue, 6 Dec 2011 12:20:14 -0800 Message-ID: <4EDE78FE.2050509@cavium.com> Date: Tue, 06 Dec 2011 12:20:14 -0800 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: binutils CC: linux-mips , Manuel Lauss , Debian MIPS Subject: Re: [Patch]: Fix ld pr11138 FAILures on mips*. References: <4EDD669F.30207@cavium.com> <20111206054018.GB21034@bubble.grove.modra.org> In-Reply-To: <20111206054018.GB21034@bubble.grove.modra.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 06 Dec 2011 20:20:14.0912 (UTC) FILETIME=[76BAFC00:01CCB454] X-archive-position: 32045 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: david.daney@cavium.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4951 Content-Length: 1565 Lines: 45 On 12/05/2011 09:40 PM, Alan Modra wrote: > On Mon, Dec 05, 2011 at 04:49:35PM -0800, David Daney wrote: >> The root cause of this is that the mips linker synthesizes a special >> symbol "__RLD_MAP", and then sets MIPS_RLD_MAP to point to it. When >> a version script is present, this symbol gets versioned along with >> all the rest, and when it is time to take its address, the symbol >> can no longer be found as it has had version information appended to >> its name. > > Why not just change > > && (strcmp (name, "__rld_map") == 0 > || strcmp (name, "__RLD_MAP") == 0)) > > to > > && (strncmp (name, "__rld_map", 9) == 0 > || strncmp (name, "__RLD_MAP", 9) == 0)) > > in _bfd_mips_elf_finish_dynamic_symbol? Perhaps the same for other > syms there too? Because that doesn't work. Perhpas I should have been a bit more detailed in my description of what is happening (at least in one case). If the version script contains something like: { global: main; local: *; }; Then "__RLD_MAP" gets hidden and we never see it in _bfd_mips_elf_finish_dynamic_symbol(). This hiding gets done precisely in _bfd_elf_link_assign_sym_version() after the version information is calculated. So as the patch stands, we bail out of _bfd_elf_link_assign_sym_version() before the symbol is hidden (or modified in any way). It is possible that 'no_sym_version' is not the best name for the flag, but I think we really some sort of flag to exclude ABI symbols from being mangled in _bfd_elf_link_assign_sym_version(). David Daney From dedekind1@gmail.com Tue Dec 6 22:01:42 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 06 Dec 2011 22:01:46 +0100 (CET) Received: from mail-lpp01m010-f49.google.com ([209.85.215.49]:60931 "EHLO mail-lpp01m010-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903633Ab1LFVBm (ORCPT ); Tue, 6 Dec 2011 22:01:42 +0100 Received: by laah2 with SMTP id h2so882785laa.36 for ; Tue, 06 Dec 2011 13:01:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:date:in-reply-to:references :content-type:x-mailer:content-transfer-encoding:message-id :mime-version; bh=6xPmG5q/GPSWaSaDrEKTed2oIT0hLQ6nIugpCeI3dOU=; b=gY7TEvuqkxKB52+ZwzsBVaFOfry7jmUhewa2fiH4OPCL6SSAk5tvYOMmJQ0mRAup/p t05qQsvNTcww5+ipiyM7obfI/bPIWYM91tbb1Ms/jx0zUQVMGanHRvwwqjAVvc9tg3E0 6qRQcciLOQyhAqw75tLDjB6gZ1hw4eXh6RBSA= Received: by 10.152.110.102 with SMTP id hz6mr10080198lab.11.1323205296940; Tue, 06 Dec 2011 13:01:36 -0800 (PST) Received: from [192.168.255.2] (host-94-101-1-70.igua.fi. [94.101.1.70]) by mx.google.com with ESMTPS id py2sm4918016lab.2.2011.12.06.13.01.34 (version=SSLv3 cipher=OTHER); Tue, 06 Dec 2011 13:01:36 -0800 (PST) Subject: Re: [PATCH 0/7] MTD: MAPS: remove bcm963xx-flash From: Artem Bityutskiy Reply-To: dedekind1@gmail.com To: Jonas Gorski Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, Artem Bityutskiy , David Woodhouse , Florian Fainelli , Ralf Baechle Date: Tue, 06 Dec 2011 23:01:33 +0200 In-Reply-To: References: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> <1323172965.2163.5.camel@koala> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.0.3 (3.0.3-1.fc15) Content-Transfer-Encoding: 7bit Message-ID: <1323205296.2710.1.camel@koala> Mime-Version: 1.0 X-archive-position: 32046 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dedekind1@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 4983 Content-Length: 284 Lines: 9 On Tue, 2011-12-06 at 13:13 +0100, Jonas Gorski wrote: > And these patches do apply cleanly for me on my local copy of your git > (latest commit from 29 hours ago according to gitweb). Sorry, indeed they apply cleanly, I used wrong branch. Pushed to l2-mtd-2.6.git, thanks. Artem. From rdsandiford@googlemail.com Tue Dec 6 22:16:34 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 06 Dec 2011 22:16:38 +0100 (CET) Received: from mail-ww0-f43.google.com ([74.125.82.43]:59710 "EHLO mail-ww0-f43.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903545Ab1LFVQe (ORCPT ); Tue, 6 Dec 2011 22:16:34 +0100 Received: by wgbds11 with SMTP id ds11so5919547wgb.24 for ; Tue, 06 Dec 2011 13:16:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=from:to:mail-followup-to:cc:subject:references:date:in-reply-to :message-id:user-agent:mime-version:content-type; bh=NKs5iUFpFJXPWx53fHX+Mb3r8bxuop+yKg/bBWdsiPw=; b=SXQZsitBCSkhLlfcb1i2AOPvAP2Z9wp0p3U/n8H+atKXCiGJC7LAfZRQ6QeEk3Kq6f 9WNcqfwenV5EVH0oF1BHgbN4gvJ5i1BTfWFa6zRkBVVYqPy64SxJGtQrac5EiWPHOc/t XkZu0BHdyK5dqvqKhLhYHl+dIgPwZRUfiG2qo= Received: by 10.227.198.19 with SMTP id em19mr4008861wbb.14.1323206189431; Tue, 06 Dec 2011 13:16:29 -0800 (PST) Received: from localhost (rsandifo.gotadsl.co.uk. [82.133.89.107]) by mx.google.com with ESMTPS id u5sm29117323wbm.2.2011.12.06.13.16.26 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 06 Dec 2011 13:16:27 -0800 (PST) From: Richard Sandiford To: David Daney Mail-Followup-To: David Daney ,binutils , linux-mips , Manuel Lauss , Debian MIPS , rdsandiford@googlemail.com Cc: binutils , linux-mips , Manuel Lauss , Debian MIPS Subject: Re: [Patch]: Fix ld pr11138 FAILures on mips*. References: <4EDD669F.30207@cavium.com> <20111206054018.GB21034@bubble.grove.modra.org> Date: Tue, 06 Dec 2011 21:16:22 +0000 In-Reply-To: <20111206054018.GB21034@bubble.grove.modra.org> (Alan Modra's message of "Tue, 6 Dec 2011 16:10:19 +1030") Message-ID: <8762ht2yft.fsf@firetop.home> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-archive-position: 32047 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: rdsandiford@googlemail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5003 Content-Length: 1259 Lines: 33 Alan Modra writes: > On Mon, Dec 05, 2011 at 04:49:35PM -0800, David Daney wrote: >> The root cause of this is that the mips linker synthesizes a special >> symbol "__RLD_MAP", and then sets MIPS_RLD_MAP to point to it. When >> a version script is present, this symbol gets versioned along with >> all the rest, and when it is time to take its address, the symbol >> can no longer be found as it has had version information appended to >> its name. > > Why not just change > > && (strcmp (name, "__rld_map") == 0 > || strcmp (name, "__RLD_MAP") == 0)) > > to > > && (strncmp (name, "__rld_map", 9) == 0 > || strncmp (name, "__RLD_MAP", 9) == 0)) > > in _bfd_mips_elf_finish_dynamic_symbol? Perhaps the same for other > syms there too? Showing my ignorance here, but is that the usual behaviour for this kind of thing? I wouldn't have expected versions to apply to internally-created symbols. There again, is this symbol (as opposed to the DT_MIPS_RLD_MAP tag) actually part of the ABI? I can't find any reference to it in the original psABI, the SGI ELF64 spec, gdb or glibc. If it's just an internal thing, maybe we could get rid of it altogether, or at least make it bind locally rather than globally. Richard From david.daney@cavium.com Tue Dec 6 23:13:09 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 06 Dec 2011 23:13:16 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:1707 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903545Ab1LFWNJ (ORCPT ); Tue, 6 Dec 2011 23:13:09 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Tue, 06 Dec 2011 14:14:35 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Tue, 6 Dec 2011 14:13:07 -0800 Received: from dd1.caveonetworks.com ([64.2.3.195]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Tue, 6 Dec 2011 14:13:07 -0800 Message-ID: <4EDE9373.4070707@cavium.com> Date: Tue, 06 Dec 2011 14:13:07 -0800 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: binutils , rdsandiford@googlemail.com, Alan Modra CC: linux-mips , Manuel Lauss , Debian MIPS Subject: Re: [Patch]: Fix ld pr11138 FAILures on mips*. References: <4EDD669F.30207@cavium.com> <20111206054018.GB21034@bubble.grove.modra.org> <8762ht2yft.fsf@firetop.home> In-Reply-To: <8762ht2yft.fsf@firetop.home> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 06 Dec 2011 22:13:07.0431 (UTC) FILETIME=[3B775F70:01CCB464] X-archive-position: 32048 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: david.daney@cavium.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5061 Content-Length: 2218 Lines: 60 On 12/06/2011 01:16 PM, Richard Sandiford wrote: > Alan Modra writes: >> On Mon, Dec 05, 2011 at 04:49:35PM -0800, David Daney wrote: >>> The root cause of this is that the mips linker synthesizes a special >>> symbol "__RLD_MAP", and then sets MIPS_RLD_MAP to point to it. When >>> a version script is present, this symbol gets versioned along with >>> all the rest, and when it is time to take its address, the symbol >>> can no longer be found as it has had version information appended to >>> its name. >> >> Why not just change >> >> && (strcmp (name, "__rld_map") == 0 >> || strcmp (name, "__RLD_MAP") == 0)) >> >> to >> >> && (strncmp (name, "__rld_map", 9) == 0 >> || strncmp (name, "__RLD_MAP", 9) == 0)) >> >> in _bfd_mips_elf_finish_dynamic_symbol? Perhaps the same for other >> syms there too? > > Showing my ignorance here, I don't buy it, you are probably the most knowledgeable about this. > but is that the usual behaviour for this kind > of thing? I wouldn't have expected versions to apply to internally-created > symbols. Yes, that is what I was trying to accomplish. > > There again, is this symbol (as opposed to the DT_MIPS_RLD_MAP tag) > actually part of the ABI? I can't find any reference to it in the > original psABI, the SGI ELF64 spec, gdb or glibc. If it's just an > internal thing, maybe we could get rid of it altogether, or at least > make it bind locally rather than globally. > That is an option too I suppose. I would say that it is part of a de facto ABI if nothing else. The question of weather anybody uses it it a different question. I thought boehm-gc may have used it, but I cannot find it there now. I don't know for sure why the symbol was created, but it seems like it may just be for the side effect of having _bfd_mips_elf_finish_dynamic_symbol() called. This lets us determine mips_elf_hash_table(info)->rld_value at a time when the output sections have already been laid out. It might be possible to #define elf_backend_output_arch_local_syms and then handle calculation of the rld_value value there instead. If this seems like a good approach, I can prepare and test a patch that does that. David Daney From amodra@gmail.com Wed Dec 7 00:43:59 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 07 Dec 2011 00:44:03 +0100 (CET) Received: from mail-gx0-f177.google.com ([209.85.161.177]:63612 "EHLO mail-gx0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903626Ab1LFXn7 (ORCPT ); Wed, 7 Dec 2011 00:43:59 +0100 Received: by ggnp4 with SMTP id p4so1403578ggn.36 for ; Tue, 06 Dec 2011 15:43:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=date:from:to:cc:subject:message-id:mail-followup-to:references :mime-version:content-type:content-disposition:in-reply-to :user-agent; bh=fXdpyfC+sq4VIISAS3BfE8BMznan0nC98A3O9CFQh6U=; b=hzp+3XAsgFspHk7amLEhkavttjaXHIjG+wBkGWLGz0XLHMb05E2feqUTVNTs5GG1W+ VU932tbqy7v3SJY8xyDHAhG5blDn1OpVHYjxIzZ+5ht41ShVHpzfthdl3k798Ve+b8ru IHL4zOFeTJEnvYOcwsrzT9uF8pKNxYGzLCSyk= Received: by 10.100.76.4 with SMTP id y4mr40126ana.33.1323215033816; Tue, 06 Dec 2011 15:43:53 -0800 (PST) Received: from bubble.grove.modra.org ([115.187.252.19]) by mx.google.com with ESMTPS id f47sm39950835yhh.8.2011.12.06.15.43.50 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 06 Dec 2011 15:43:53 -0800 (PST) Received: by bubble.grove.modra.org (Postfix, from userid 1000) id 2B0BE170C2BF; Wed, 7 Dec 2011 10:13:46 +1030 (CST) Date: Wed, 7 Dec 2011 10:13:46 +1030 From: Alan Modra To: David Daney Cc: binutils , linux-mips , Manuel Lauss , Debian MIPS Subject: Re: [Patch]: Fix ld pr11138 FAILures on mips*. Message-ID: <20111206234345.GC21034@bubble.grove.modra.org> Mail-Followup-To: David Daney , binutils , linux-mips , Manuel Lauss , Debian MIPS References: <4EDD669F.30207@cavium.com> <20111206054018.GB21034@bubble.grove.modra.org> <4EDE78FE.2050509@cavium.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4EDE78FE.2050509@cavium.com> User-Agent: Mutt/1.5.20 (2009-06-14) X-archive-position: 32049 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: amodra@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5146 Content-Length: 514 Lines: 13 On Tue, Dec 06, 2011 at 12:20:14PM -0800, David Daney wrote: > Then "__RLD_MAP" gets hidden and we never see it in > _bfd_mips_elf_finish_dynamic_symbol(). I see. Well, the real question is whether this symbol needs to be dynamic. If it does, then you can't allow it to be hidden. That would best be accomplished by writing a mips elf_backend_hide_symbol function, which is nicer than adding another field used by only one target to struct elf_link_hash_entry. -- Alan Modra Australia Development Lab, IBM From amodra@gmail.com Wed Dec 7 01:07:35 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 07 Dec 2011 01:07:39 +0100 (CET) Received: from mail-gy0-f177.google.com ([209.85.160.177]:63341 "EHLO mail-gy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903626Ab1LGAHf (ORCPT ); Wed, 7 Dec 2011 01:07:35 +0100 Received: by ghrr19 with SMTP id r19so5954469ghr.36 for ; Tue, 06 Dec 2011 16:07:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=date:from:to:subject:message-id:mail-followup-to:references :mime-version:content-type:content-disposition:in-reply-to :user-agent; bh=qUXhZZ21clLHrBg9tsR54TIRJUApuy5LN8/qaTBUNkA=; b=HQy0HgftZssyMC4n2MKTrDcK44Cnt0KsAQv/A4zefZxBkzUwhnZUde2wf95R9G25Yo B+vvVzK0ES1OXEQffEe6fR34au/+31LQvPm95D2+97b7+ZgwTR7GF9p1l4uk1fqUqjqx OseYrd8LQlIUu6jiI4L1tJQ+HULQIMBbmi5fw= Received: by 10.236.200.201 with SMTP id z49mr23670917yhn.20.1323216449564; Tue, 06 Dec 2011 16:07:29 -0800 (PST) Received: from bubble.grove.modra.org ([115.187.252.19]) by mx.google.com with ESMTPS id f7sm6308120and.17.2011.12.06.16.07.25 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 06 Dec 2011 16:07:28 -0800 (PST) Received: by bubble.grove.modra.org (Postfix, from userid 1000) id 76718170C2BF; Wed, 7 Dec 2011 10:37:21 +1030 (CST) Date: Wed, 7 Dec 2011 10:37:21 +1030 From: Alan Modra To: David Daney , binutils , linux-mips , Manuel Lauss , Debian MIPS , rdsandiford@googlemail.com Subject: Re: [Patch]: Fix ld pr11138 FAILures on mips*. Message-ID: <20111207000721.GD21034@bubble.grove.modra.org> Mail-Followup-To: David Daney , binutils , linux-mips , Manuel Lauss , Debian MIPS , rdsandiford@googlemail.com References: <4EDD669F.30207@cavium.com> <20111206054018.GB21034@bubble.grove.modra.org> <8762ht2yft.fsf@firetop.home> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <8762ht2yft.fsf@firetop.home> User-Agent: Mutt/1.5.20 (2009-06-14) X-archive-position: 32050 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: amodra@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5164 Content-Length: 512 Lines: 13 On Tue, Dec 06, 2011 at 09:16:22PM +0000, Richard Sandiford wrote: > Showing my ignorance here, but is that the usual behaviour for this kind > of thing? I wouldn't have expected versions to apply to internally-created > symbols. Normally this sort of symbol isn't dynamic, at least nowadays. Earlier versions of GNU ld made many symbols like _GLOBAL_OFFSET_TABLE_ dynamic unnecessarily, so it might be just a case of old mips code following even older practice. -- Alan Modra Australia Development Lab, IBM From zhzhl555@gmail.com Wed Dec 7 03:18:35 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 07 Dec 2011 03:18:42 +0100 (CET) Received: from mail-ey0-f177.google.com ([209.85.215.177]:59723 "EHLO mail-ey0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903633Ab1LGCSf (ORCPT ); Wed, 7 Dec 2011 03:18:35 +0100 Received: by eaac10 with SMTP id c10so50320eaa.36 for ; Tue, 06 Dec 2011 18:18:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=nHl4cDf67s7CHam8QkZXjbO3iXjMiGPlwjqX0Yibs9c=; b=T7s1HxFgtoyYErfWbi1saRJgVQuLKjaVE/O25VV8wNWAQzYUHE5Zpv4ROwfM+Junrp YMehWWRNTvMiWMsCmU+r2tWlZk9xKDTspigTSugfG0KB0pTb55Gvg7DM6i2X5JbjGkKt 30RuXxpzMNQxjTpeSYAtVg63+yG/UJNHw52u8= MIME-Version: 1.0 Received: by 10.213.29.138 with SMTP id q10mr3091029ebc.35.1323224309445; Tue, 06 Dec 2011 18:18:29 -0800 (PST) Received: by 10.14.37.15 with HTTP; Tue, 6 Dec 2011 18:18:29 -0800 (PST) In-Reply-To: <20111205155359.GF9192@game.jcrosoft.org> References: <1322729078-6141-1-git-send-email-zhzhl555@gmail.com> <20111205155359.GF9192@game.jcrosoft.org> Date: Wed, 7 Dec 2011 10:18:29 +0800 Message-ID: Subject: Re: [rtc-linux] [PATCH] MIPS: Add RTC support for loongson1B From: zhao zhang To: Jean-Christophe PLAGNIOL-VILLARD Cc: rtc-linux@googlegroups.com, a.zummo@towertech.it, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, ralf@linux-mips.org, keguang.zhang@gmail.com, wuzhangjin@gmail.com, r0bertz@gentoo.org Content-Type: multipart/alternative; boundary=0015174be8faec36bb04b3772ad0 X-archive-position: 32051 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zhzhl555@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5241 Content-Length: 5541 Lines: 144 --0015174be8faec36bb04b3772ad0 Content-Type: text/plain; charset=GB2312 Content-Transfer-Encoding: quoted-printable sorry, i didn't see the rule in that Makefile. the loongson1B SOC has the alarm,irq. but that's my next plan. i am adding other IP's support for this SOC right now. =D4=DA 2011=C4=EA12=D4=C25=C8=D5 =CF=C2=CE=E711:53=A3=ACJean-Christophe PLA= GNIOL-VILLARD =D0=B4=B5=C0=A3=BA > On 16:44 Thu 01 Dec , zhzhl555@gmail.com wrote: > > From: zhao zhang > > > > V2: use new module_platform_driver macro. > > thanks for Wolfram's advice. > > > > This patch adds RTC support(TOY counter0) for loongson1B. > > Signed-off-by: zhao zhang > > --- > > drivers/rtc/Kconfig | 10 ++ > > drivers/rtc/Makefile | 1 + > > drivers/rtc/rtc-ls1x.c | 214 > ++++++++++++++++++++++++++++++++++++++++++++++++ > > 3 files changed, 225 insertions(+), 0 deletions(-) > > create mode 100644 drivers/rtc/rtc-ls1x.c > > > > diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig > > index 5a538fc..6f8c2d7 100644 > > --- a/drivers/rtc/Kconfig > > +++ b/drivers/rtc/Kconfig > > @@ -1070,4 +1070,14 @@ config RTC_DRV_PUV3 > > This drive can also be built as a module. If so, the module > > will be called rtc-puv3. > > > > +config RTC_DRV_LOONGSON1 > > + tristate "loongson1 RTC support" > > + depends on MACH_LOONGSON1 > > + help > > + This is a driver for the loongson1 on-chip Counter0 (Time-Of-Ye= ar > > + counter) to be used as a RTC. > > + > > + This driver can also be built as a module. If so, the module > > + will be called rtc-ls1x. > > + > > endif # RTC_CLASS > > diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile > > index 6e69823..48153fe 100644 > > --- a/drivers/rtc/Makefile > > +++ b/drivers/rtc/Makefile > > @@ -109,3 +109,4 @@ obj-$(CONFIG_RTC_DRV_VT8500) +=3D rtc-vt8500.o > > obj-$(CONFIG_RTC_DRV_WM831X) +=3D rtc-wm831x.o > > obj-$(CONFIG_RTC_DRV_WM8350) +=3D rtc-wm8350.o > > obj-$(CONFIG_RTC_DRV_X1205) +=3D rtc-x1205.o > > +obj-$(CONFIG_RTC_DRV_LOONGSON1) +=3D rtc-ls1x.o > keep it ordered > > > you have no alarm, irq on this hardware? > > Best Regards, > J. > --0015174be8faec36bb04b3772ad0 Content-Type: text/html; charset=GB2312 Content-Transfer-Encoding: quoted-printable sorry, i didn't see the rule in that Makefile.

the loongson1B S= OC has the alarm,irq. but that's my next plan.
i am adding other IP&= #39;s support for this SOC right now. 



=D4=DA 2011=C4=EA12=D4=C25=C8=D5 =CF=C2=CE=E711:53=A3=ACJean-Christophe PLA= GNIOL-VILLARD <plagnioj@jcrosoft.com>=D0=B4=B5=C0=A3=BA
On 16:44 Thu 01 Dec     , zhzhl555@gmail.com wrote:
> From: zhao zhang <zhzhl555@gm= ail.com>
>
> V2: use new module_platform_driver macro.
> thanks for Wolfram's advice.
>
> This patch adds RTC support(TOY counter0) for loongson1B.
> Signed-off-by: zhao zhang <zh= zhl555@gmail.com>
> ---
>  drivers/rtc/Kconfig    |   10 ++
>  drivers/rtc/Makefile   |    1 +
>  drivers/rtc/rtc-ls1x.c |  214 +++++++++++++++++++++++++++++= +++++++++++++++++++
>  3 files changed, 225 insertions(+), 0 deletions(-)
>  create mode 100644 drivers/rtc/rtc-ls1x.c
>
> diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
> index 5a538fc..6f8c2d7 100644
> --- a/drivers/rtc/Kconfig
> +++ b/drivers/rtc/Kconfig
> @@ -1070,4 +1070,14 @@ config RTC_DRV_PUV3
>         This drive can also be built as a module. = If so, the module
>         will be called rtc-puv3.
>
> +config RTC_DRV_LOONGSON1
> +     tristate "loongson1 RTC support"
> +     depends on MACH_LOONGSON1
> +     help
> +       This is a driver for the loongson1 on-chip Coun= ter0 (Time-Of-Year
> +       counter) to be used as a RTC.
> +
> +       This driver can also be built as a module. If s= o, the module
> +       will be called rtc-ls1x.
> +
>  endif # RTC_CLASS
> diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
> index 6e69823..48153fe 100644
> --- a/drivers/rtc/Makefile
> +++ b/drivers/rtc/Makefile
> @@ -109,3 +109,4 @@ obj-$(CONFIG_RTC_DRV_VT8500)      += =3D rtc-vt8500.o
>  obj-$(CONFIG_RTC_DRV_WM831X) +=3D rtc-wm831x.o
>  obj-$(CONFIG_RTC_DRV_WM8350) +=3D rtc-wm8350.o
>  obj-$(CONFIG_RTC_DRV_X1205)  +=3D rtc-x1205.o
> +obj-$(CONFIG_RTC_DRV_LOONGSON1)      +=3D rtc-ls1x.o
keep it ordered


you have no alarm, irq on this hardware?

Best Regards,
J.

--0015174be8faec36bb04b3772ad0-- From computersforpeace@gmail.com Wed Dec 7 06:45:21 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 07 Dec 2011 06:45:28 +0100 (CET) Received: from mail-ww0-f43.google.com ([74.125.82.43]:59091 "EHLO mail-ww0-f43.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903542Ab1LGFpV (ORCPT ); Wed, 7 Dec 2011 06:45:21 +0100 Received: by wgbds11 with SMTP id ds11so377438wgb.24 for ; Tue, 06 Dec 2011 21:45:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=lG6RBUWgZIEMMkxaH+1H/U0HVmj/YLKeH9mKlPjAykY=; b=tEwjoOzl0LBxIsKRk45yW4/XKWhezfvXPS6GoS8jk0Sw2zhQNWPWlnNN2Sj+QQG1O7 xZ+k1nuZC5c5ak7VIC6uIRPFLDLbRqzubzxFqNunxiSteuY2SDt2Jn4xpmIgPcqYQ5fM RP8zwVz4IhI2i36AtfiCeUR5Vz8mm6oDuNscM= MIME-Version: 1.0 Received: by 10.180.85.4 with SMTP id d4mr21729844wiz.19.1323236716159; Tue, 06 Dec 2011 21:45:16 -0800 (PST) Received: by 10.216.180.195 with HTTP; Tue, 6 Dec 2011 21:45:16 -0800 (PST) In-Reply-To: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> References: <1323097691-16414-1-git-send-email-jonas.gorski@gmail.com> Date: Tue, 6 Dec 2011 21:45:16 -0800 Message-ID: Subject: Re: [PATCH 0/7] MTD: MAPS: remove bcm963xx-flash From: Brian Norris To: Jonas Gorski Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, Artem Bityutskiy , David Woodhouse , Florian Fainelli , Ralf Baechle Content-Type: text/plain; charset=ISO-8859-1 X-archive-position: 32052 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: computersforpeace@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5313 Content-Length: 646 Lines: 19 On Mon, Dec 5, 2011 at 7:08 AM, Jonas Gorski wrote: > P.S: This patchset is based on l2-mtd-2.6.git, which seems to be the > "correct" tree now (the website says mtd-2.6.git, but it doesn't look > like the correct one, having no commits). Hi Jonas, I see that you are nowhere near the first one to have at least a little bit of trouble with the mtd-2.6.git vs. l2-mtd-2.6.git question. Artem or David, Is it sensible to change the website documentation to reflect the fact that most MTD development is tracked in Artem's l2 repository primarily? I can send a patch against mtd-www.git sometime to update this. Brian From ralf@linux-mips.org Wed Dec 7 12:35:28 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 07 Dec 2011 12:35:32 +0100 (CET) Received: from h5.dl5rb.org.uk ([81.2.74.5]:42219 "EHLO linux-mips.org" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1903656Ab1LGLf2 (ORCPT ); Wed, 7 Dec 2011 12:35:28 +0100 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.4) with ESMTP id pB7BZSQ2007776 for ; Wed, 7 Dec 2011 11:35:28 GMT Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id pB7BZRuD007774 for linux-mips@linux-mips.org; Wed, 7 Dec 2011 11:35:27 GMT Date: Wed, 7 Dec 2011 11:35:27 +0000 From: Ralf Baechle To: linux-mips@linux-mips.org Subject: Patchwork Message-ID: <20111207113527.GA7389@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 32053 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 5566 Content-Length: 698 Lines: 18 Account creation in patchwork was broken a long time ago and some unrelated bug had caused a ugly junk in the listings of patches that contain non-ASCII characters. I've fixed both along with upgrading patchwork to the latest and greatest version. What this mean: - the junk names displayed in the listings is gone - you can create new patchwork accounts and use those accounts for example to administrate your own patches, for example when submitting a new version or when you discover a bug and want to withdraw a patch. The upgrade went more than rough and involved lots of manual database patching. If something doesn't work right, please let me know. Happy patchworking! Ralf From w.sang@pengutronix.de Wed Dec 7 22:27:17 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 07 Dec 2011 22:27:21 +0100 (CET) Received: from metis.ext.pengutronix.de ([92.198.50.35]:45659 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903662Ab1LGV1R (ORCPT ); Wed, 7 Dec 2011 22:27:17 +0100 Received: from katana.hi.pengutronix.de ([2001:6f8:1178:2:221:70ff:fe71:1890] helo=pengutronix.de) by metis.ext.pengutronix.de with esmtp (Exim 4.72) (envelope-from ) id 1RYP1D-0003B5-C3; Wed, 07 Dec 2011 22:27:11 +0100 Date: Wed, 7 Dec 2011 22:27:10 +0100 From: Wolfram Sang To: Florian Fainelli Cc: Shubhrajyoti Datta , Tanguy Bouzeloc , linux-mips@linux-mips.org, ralf@linux-mips.org, spi-devel-general@lists.sourceforge.net Subject: Re: [PATCH spi-next] spi: add Broadcom BCM63xx SPI controller driver Message-ID: <20111207212710.GD3744@pengutronix.de> References: <1321906615-11392-1-git-send-email-florian@openwrt.org> <201111232041.18477.florian@openwrt.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="VMt1DrMGOVs3KQwf" Content-Disposition: inline In-Reply-To: <201111232041.18477.florian@openwrt.org> User-Agent: Mutt/1.5.20 (2009-06-14) X-SA-Exim-Connect-IP: 2001:6f8:1178:2:221:70ff:fe71:1890 X-SA-Exim-Mail-From: w.sang@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-mips@linux-mips.org X-archive-position: 32054 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: w.sang@pengutronix.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6279 Content-Length: 805 Lines: 34 --VMt1DrMGOVs3KQwf Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable > > Could we move to dev pm ops? >=20 > Sure, I have fixed that in version 2 of the patch. Have you sent that already? Regards, Wolfram --=20 Pengutronix e.K. | Wolfram Sang | Industrial Linux Solutions | http://www.pengutronix.de/ | --VMt1DrMGOVs3KQwf Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iEYEARECAAYFAk7f2i4ACgkQD27XaX1/VRt0HgCgi4KsJr9qog+cdPc9JN7UC8T1 HtcAnjY1GMMe+lhyQlZfQYPph6wlvBhs =+6TV -----END PGP SIGNATURE----- --VMt1DrMGOVs3KQwf-- From florian@openwrt.org Wed Dec 7 23:02:36 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 07 Dec 2011 23:02:43 +0100 (CET) Received: from mail-bw0-f49.google.com ([209.85.214.49]:64909 "EHLO mail-bw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903682Ab1LGWCg convert rfc822-to-8bit (ORCPT ); Wed, 7 Dec 2011 23:02:36 +0100 Received: by bkcje16 with SMTP id je16so1286545bkc.36 for ; Wed, 07 Dec 2011 14:02:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=sender:from:to:subject:date:user-agent:cc:references:in-reply-to :mime-version:content-type:content-transfer-encoding:message-id; bh=tUDSeakOcJcsMIRRA/ZjfzPsf+PlWX4tmuNM0CRsK8k=; b=gIhSGcQ/Gc7EqIAwvWd1N/pbwdEJZjBuhgvYqdd03FYZSgJ6eFrW/JzGj0uTfutfW/ d1XufTLxkt7EG0ELTKwUitGf9Z0Hw/j1RXPNdNJKV6oH9yJOxWyrD20UJQj+N6fFTx03 fGL3MeLdG1EN7es4IdvCdz3A/lsM/J2vaSWow= Received: by 10.180.105.232 with SMTP id gp8mr252907wib.65.1323295350907; Wed, 07 Dec 2011 14:02:30 -0800 (PST) Received: from lenovo.localnet ([2a01:e35:2f70:4010:21d:7dff:fe45:5399]) by mx.google.com with ESMTPS id dy1sm5066515wib.18.2011.12.07.14.02.22 (version=SSLv3 cipher=OTHER); Wed, 07 Dec 2011 14:02:27 -0800 (PST) From: Florian Fainelli To: Wolfram Sang Subject: Re: [PATCH spi-next] spi: add Broadcom BCM63xx SPI controller driver Date: Wed, 7 Dec 2011 23:02:24 +0100 User-Agent: KMail/1.13.7 (Linux/3.1.0-1-amd64; KDE/4.6.5; x86_64; ; ) Cc: Shubhrajyoti Datta , Tanguy Bouzeloc , linux-mips@linux-mips.org, ralf@linux-mips.org, spi-devel-general@lists.sourceforge.net References: <1321906615-11392-1-git-send-email-florian@openwrt.org> <201111232041.18477.florian@openwrt.org> <20111207212710.GD3744@pengutronix.de> In-Reply-To: <20111207212710.GD3744@pengutronix.de> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-15" Content-Transfer-Encoding: 8BIT Message-Id: <201112072302.25001.florian@openwrt.org> X-archive-position: 32055 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6304 Content-Length: 353 Lines: 15 Hello Wolfram, Le mercredi 07 décembre 2011 22:27:10, Wolfram Sang a écrit : > > > Could we move to dev pm ops? > > > > Sure, I have fixed that in version 2 of the patch. > > Have you sent that already? Not yet, so if you have any other comments, feel free to let me know so that I can fold the fixes in version 2 of the patch. Thanks -- Florian From w.sang@pengutronix.de Wed Dec 7 23:51:28 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 07 Dec 2011 23:51:33 +0100 (CET) Received: from metis.ext.pengutronix.de ([92.198.50.35]:58514 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903684Ab1LGWv2 (ORCPT ); Wed, 7 Dec 2011 23:51:28 +0100 Received: from katana.hi.pengutronix.de ([2001:6f8:1178:2:221:70ff:fe71:1890] helo=pengutronix.de) by metis.ext.pengutronix.de with esmtp (Exim 4.72) (envelope-from ) id 1RYQKg-0006ev-Tp; Wed, 07 Dec 2011 23:51:22 +0100 Date: Wed, 7 Dec 2011 23:51:22 +0100 From: Wolfram Sang To: John Crispin Cc: Ralf Baechle , linux-mips@linux-mips.org, spi-devel-general@lists.sourceforge.net, Thomas Langer Subject: Re: [PATCH] SPI: MIPS: lantiq: add FALC-ON spi driver Message-ID: <20111207225122.GF3744@pengutronix.de> References: <1321454237-4041-1-git-send-email-blogic@openwrt.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="IvGM3kKqwtniy32b" Content-Disposition: inline In-Reply-To: <1321454237-4041-1-git-send-email-blogic@openwrt.org> User-Agent: Mutt/1.5.20 (2009-06-14) X-SA-Exim-Connect-IP: 2001:6f8:1178:2:221:70ff:fe71:1890 X-SA-Exim-Mail-From: w.sang@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-mips@linux-mips.org X-archive-position: 32056 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: w.sang@pengutronix.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6323 Content-Length: 9259 Lines: 370 --IvGM3kKqwtniy32b Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Nov 16, 2011 at 03:37:17PM +0100, John Crispin wrote: > The external bus unit (EBU) found on the FALC-ON SoC has spi emulation th= at is > designed for serial flash access. This driver has only been tested with m= 25p80 > type chips. The hardware has no support for other types of spi peripheral= s. >=20 > Signed-off-by: Thomas Langer > Signed-off-by: John Crispin > Cc: spi-devel-general@lists.sourceforge.net Rough review. > --- >=20 > arch/mips/lantiq/falcon/devices.c | 13 + > arch/mips/lantiq/falcon/devices.h | 4 + > arch/mips/lantiq/falcon/mach-easy98000.c | 27 ++ > drivers/spi/Kconfig | 4 + > drivers/spi/Makefile | 1 + > drivers/spi/spi-falcon.c | 483 ++++++++++++++++++++++++= ++++++ > 6 files changed, 532 insertions(+), 0 deletions(-) > create mode 100644 drivers/spi/spi-falcon.c You need to split up the arch-specific changes and driver-specific changes into seperate patches. > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig > index a1fd73d..f244553 100644 > --- a/drivers/spi/Kconfig > +++ b/drivers/spi/Kconfig > @@ -180,6 +180,10 @@ config SPI_MPC52xx > This drivers supports the MPC52xx SPI controller in master SPI > mode. > =20 > +config SPI_FALCON > + tristate "Falcon SPI controller support" > + depends on SOC_FALCON > + Kconfig is alphabetically sorted. Please keep that. > config SPI_MPC52xx_PSC > tristate "Freescale MPC52xx PSC SPI controller" > depends on PPC_MPC52xx && EXPERIMENTAL > diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile > index 61c3261..570894c 100644 > --- a/drivers/spi/Makefile > +++ b/drivers/spi/Makefile > @@ -25,6 +25,7 @@ obj-$(CONFIG_SPI_DW_MMIO) +=3D spi-dw-mmio.o > obj-$(CONFIG_SPI_DW_PCI) +=3D spi-dw-midpci.o > spi-dw-midpci-objs :=3D spi-dw-pci.o spi-dw-mid.o > obj-$(CONFIG_SPI_EP93XX) +=3D spi-ep93xx.o > +obj-$(CONFIG_SPI_FALCON) +=3D spi-falcon.o > obj-$(CONFIG_SPI_FSL_LIB) +=3D spi-fsl-lib.o > obj-$(CONFIG_SPI_FSL_ESPI) +=3D spi-fsl-espi.o > obj-$(CONFIG_SPI_FSL_SPI) +=3D spi-fsl-spi.o > diff --git a/drivers/spi/spi-falcon.c b/drivers/spi/spi-falcon.c > new file mode 100644 > index 0000000..8b81aa2 > --- /dev/null > +++ b/drivers/spi/spi-falcon.c > @@ -0,0 +1,483 @@ > +/* > + * This program is free software; you can redistribute it and/or modify= it > + * under the terms of the GNU General Public License version 2 as publi= shed > + * by the Free Software Foundation. > + * > + * Copyright (C) 2010 Thomas Langer > + */ > + =2E.. > +int > +falcon_spi_xfer(struct spi_device *spi, > + struct spi_transfer *t, > + unsigned long flags) I'd prefer to squash the lines, dunno Grant's preference. > +{ > + struct device *dev =3D &spi->dev; > + struct falcon_spi *priv =3D spi_master_get_devdata(spi->master); > + const u8 *txp =3D t->tx_buf; > + u8 *rxp =3D t->rx_buf; > + unsigned int bytelen =3D ((8 * t->len + 7) / 8); > + unsigned int len, alen, dumlen; > + u32 val; > + enum { > + state_init, > + state_command_prepare, > + state_write, > + state_read, > + state_disable_cs, > + state_end > + } state =3D state_init; > + > + do { > + switch (state) { > + case state_init: /* detect phase of upper layer sequence */ > + { > + /* initial write ? */ > + if (flags & FALCON_SPI_XFER_BEGIN) { > + if (!txp) { > + dev_err(dev, > + "BEGIN without tx data!\n"); > + return -1; -Esomething perhaps (for all occurences)? > + } > + /* > + * Prepare the parts of the sfcmd register, > + * which should not > + * change during a sequence! > + * Only exception are the length fields, > + * especially alen and dumlen. > + */ I think some lines could be squashed again. > + > + priv->sfcmd =3D ((spi->chip_select > + << SFCMD_CS_OFFSET) > + & SFCMD_CS_MASK); > + priv->sfcmd |=3D SFCMD_KEEP_CS_KEEP_SELECTED; > + priv->sfcmd |=3D *txp; > + txp++; > + bytelen--; > + if (bytelen) { > + /* > + * more data: > + * maybe address and/or dummy > + */ > + state =3D state_command_prepare; > + break; > + } else { > + dev_dbg(dev, "write cmd %02X\n", > + priv->sfcmd & SFCMD_OPC_MASK); > + } > + } > + /* continued write ? */ > + if (txp && bytelen) { > + state =3D state_write; > + break; > + } > + /* read data? */ > + if (rxp && bytelen) { > + state =3D state_read; > + break; > + } > + /* end of sequence? */ > + if (flags & FALCON_SPI_XFER_END) > + state =3D state_disable_cs; > + else > + state =3D state_end; > + break; > + } > + /* collect tx data for address and dummy phase */ > + case state_command_prepare: > + { > + /* txp is valid, already checked */ > + val =3D 0; > + alen =3D 0; > + dumlen =3D 0; > + while (bytelen > 0) { > + if (alen < 3) { > + val =3D (val<<8)|(*txp++); Spaces around operators. > + alen++; > + } else if ((dumlen < 15) && (*txp =3D=3D 0)) { > + /* > + * assume dummy bytes are set to 0 > + * from upper layer > + */ > + dumlen++; > + txp++; > + } else > + break; > + bytelen--; > + } =2E.. > +static int > +falcon_spi_setup(struct spi_device *spi) > +{ > + struct device *dev =3D &spi->dev; > + const u32 ebuclk =3D CLOCK_100M; > + unsigned int i; > + unsigned long flags; > + > + dev_dbg(dev, "setup\n"); I'd think these debug outputs at the beginning of functions could simply go. > + > + if (spi->master->bus_num > 0 || spi->chip_select > 0) > + return -ENODEV; > + =2E.. > +static int > +falcon_spi_transfer(struct spi_device *spi, struct spi_message *m) > +{ > + struct falcon_spi *priv =3D spi_master_get_devdata(spi->master); > + struct spi_transfer *t; > + unsigned long spi_flags; > + unsigned long flags; > + int ret =3D 0; > + > + priv->sfcmd =3D 0; > + m->actual_length =3D 0; > + > + spi_flags =3D FALCON_SPI_XFER_BEGIN; > + list_for_each_entry(t, &m->transfers, transfer_list) { > + if (list_is_last(&t->transfer_list, &m->transfers)) > + spi_flags |=3D FALCON_SPI_XFER_END; > + > + spin_lock_irqsave(&ebu_lock, flags); > + ret =3D falcon_spi_xfer(spi, t, spi_flags); > + spin_unlock_irqrestore(&ebu_lock, flags); > + > + if (ret) > + break; > + > + m->actual_length +=3D t->len; > + > + if (t->delay_usecs || t->cs_change) > + BUG(); No garceful way of handling that? > + > + spi_flags =3D 0; > + } > + > + m->status =3D ret; > + m->complete(m->context); > + > + return 0; > +} > + > +static void > +falcon_spi_cleanup(struct spi_device *spi) > +{ > + struct device *dev =3D &spi->dev; > + > + dev_dbg(dev, "cleanup\n"); > +} > + > +static int __devinit > +falcon_spi_probe(struct platform_device *pdev) > +{ > + struct device *dev =3D &pdev->dev; > + struct falcon_spi *priv; > + struct spi_master *master; > + int ret; > + > + dev_dbg(dev, "probing\n"); > + > + master =3D spi_alloc_master(&pdev->dev, sizeof(*priv)); > + if (!master) { > + dev_err(dev, "no memory for spi_master\n"); I think -ENOMEM tells enough. > + return -ENOMEM; > + } > + > + priv =3D spi_master_get_devdata(master); > + priv->master =3D master; > + > + master->mode_bits =3D SPI_MODE_3; > + master->num_chipselect =3D 1; > + master->bus_num =3D 0; > + > + master->setup =3D falcon_spi_setup; > + master->transfer =3D falcon_spi_transfer; > + master->cleanup =3D falcon_spi_cleanup; > + > + platform_set_drvdata(pdev, priv); > + > + ret =3D spi_register_master(master); > + if (ret) > + spi_master_put(master); > + > + return ret; > +} > + > +static int __devexit > +falcon_spi_remove(struct platform_device *pdev) > +{ > + struct device *dev =3D &pdev->dev; > + struct falcon_spi *priv =3D platform_get_drvdata(pdev); > + > + dev_dbg(dev, "removed\n"); > + > + spi_unregister_master(priv->master); > + > + return 0; > +} > + > +static struct platform_driver falcon_spi_driver =3D { > + .probe =3D falcon_spi_probe, > + .remove =3D __devexit_p(falcon_spi_remove), > + .driver =3D { > + .name =3D DRV_NAME, > + .owner =3D THIS_MODULE > + } > +}; Use module_platform_driver here. > + > +static int __init > +falcon_spi_init(void) > +{ > + return platform_driver_register(&falcon_spi_driver); > +} > + > +static void __exit > +falcon_spi_exit(void) > +{ > + platform_driver_unregister(&falcon_spi_driver); > +} > + > +module_init(falcon_spi_init); > +module_exit(falcon_spi_exit); > + > +MODULE_LICENSE("GPL"); > +MODULE_DESCRIPTION("Lantiq Falcon SPI controller driver"); Thanks, Wolfram --=20 Pengutronix e.K. | Wolfram Sang | Industrial Linux Solutions | http://www.pengutronix.de/ | --IvGM3kKqwtniy32b Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iEYEARECAAYFAk7f7eoACgkQD27XaX1/VRv6TgCdGM8uHqRb02rhiws/8d6BG5Wn 7eMAoILjTVpIWSIoRmuza+KcOJH7eqOg =DhoE -----END PGP SIGNATURE----- --IvGM3kKqwtniy32b-- From w.sang@pengutronix.de Thu Dec 8 00:04:29 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 08 Dec 2011 00:04:33 +0100 (CET) Received: from metis.ext.pengutronix.de ([92.198.50.35]:47436 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903682Ab1LGXE3 (ORCPT ); Thu, 8 Dec 2011 00:04:29 +0100 Received: from katana.hi.pengutronix.de ([2001:6f8:1178:2:221:70ff:fe71:1890] helo=pengutronix.de) by metis.ext.pengutronix.de with esmtp (Exim 4.72) (envelope-from ) id 1RYQXB-00072o-Mh; Thu, 08 Dec 2011 00:04:17 +0100 Date: Thu, 8 Dec 2011 00:04:17 +0100 From: Wolfram Sang To: Florian Fainelli Cc: Grant Likely , Tanguy Bouzeloc , spi-devel-general@lists.sourceforge.net, ralf@linux-mips.org, linux-mips@linux-mips.org Subject: Re: [PATCH spi-next] spi: add Broadcom BCM63xx SPI controller driver Message-ID: <20111207230417.GG3744@pengutronix.de> References: <1321906615-11392-1-git-send-email-florian@openwrt.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="oXNgvKVxGWJ0RPMJ" Content-Disposition: inline In-Reply-To: <1321906615-11392-1-git-send-email-florian@openwrt.org> User-Agent: Mutt/1.5.20 (2009-06-14) X-SA-Exim-Connect-IP: 2001:6f8:1178:2:221:70ff:fe71:1890 X-SA-Exim-Mail-From: w.sang@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-mips@linux-mips.org X-archive-position: 32057 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: w.sang@pengutronix.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6334 Content-Length: 3696 Lines: 152 --oXNgvKVxGWJ0RPMJ Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, > +static int __init bcm63xx_spi_probe(struct platform_device *pdev) > +{ > + struct resource *r; > + struct device *dev =3D &pdev->dev; > + struct bcm63xx_spi_pdata *pdata =3D pdev->dev.platform_data; > + int irq; > + struct spi_master *master; > + struct clk *clk; > + struct bcm63xx_spi *bs; > + int ret; > + > + r =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); > + if (!r) { > + dev_err(dev, "no iomem\n"); > + ret =3D -ENXIO; > + goto out; > + } > + > + irq =3D platform_get_irq(pdev, 0); > + if (irq < 0) { > + dev_err(dev, "no irq\n"); > + ret =3D -ENXIO; > + goto out; > + } > + > + clk =3D clk_get(dev, "spi"); > + if (IS_ERR(clk)) { > + dev_err(dev, "no clock for device\n"); > + ret =3D -ENODEV; > + goto out; > + } > + > + master =3D spi_alloc_master(dev, sizeof(*bs)); > + if (!master) { > + dev_err(dev, "out of memory\n"); > + ret =3D -ENOMEM; > + goto out_free; > + } > + > + bs =3D spi_master_get_devdata(master); > + init_completion(&bs->done); > + > + platform_set_drvdata(pdev, master); > + bs->pdev =3D pdev; > + > + if (!request_mem_region(r->start, resource_size(r), PFX)) { > + dev_err(dev, "iomem request failed\n"); > + ret =3D -ENXIO; > + goto out_put_master; > + } If you'd use managed devices here (devm_*), you would not leak the mem_region in the error path :) If you use the shiny new devm_request_and_ioremap() from linux-next, you'd save a few more lines. > +#ifdef CONFIG_PM > +static int bcm63xx_spi_suspend(struct platform_device *pdev, pm_message_= t mesg) > +{ > + struct spi_master *master =3D platform_get_drvdata(pdev); > + struct bcm63xx_spi *bs =3D spi_master_get_devdata(master); > + > + clk_disable(bs->clk); > + > + return 0; > +} > + > +static int bcm63xx_spi_resume(struct platform_device *pdev) > +{ > + struct spi_master *master =3D platform_get_drvdata(pdev); > + struct bcm63xx_spi *bs =3D spi_master_get_devdata(master); > + > + clk_enable(bs->clk); > + > + return 0; > +} > +#else > +#define bcm63xx_spi_suspend NULL > +#define bcm63xx_spi_resume NULL > +#endif dev_pm_ops? > + > +static struct platform_driver bcm63xx_spi_driver =3D { > + .driver =3D { > + .name =3D "bcm63xx-spi", > + .owner =3D THIS_MODULE, > + }, > + .probe =3D bcm63xx_spi_probe, > + .remove =3D __exit_p(bcm63xx_spi_remove), > + .suspend =3D bcm63xx_spi_suspend, > + .resume =3D bcm63xx_spi_resume, > +}; > + > + module_platform_driver? > +static int __init bcm63xx_spi_init(void) > +{ > + return platform_driver_register(&bcm63xx_spi_driver); > +} > + > +static void __exit bcm63xx_spi_exit(void) > +{ > + platform_driver_unregister(&bcm63xx_spi_driver); > +} > + > +module_init(bcm63xx_spi_init); > +module_exit(bcm63xx_spi_exit); > + > +MODULE_ALIAS("platform:bcm63xx_spi"); > +MODULE_AUTHOR("Florian Fainelli "); > +MODULE_AUTHOR("Tanguy Bouzeloc "); > +MODULE_DESCRIPTION("Broadcom BCM63xx SPI Controller driver"); > +MODULE_LICENSE("GPL"); > +MODULE_VERSION(DRV_VER); VERSION is not needed. Regards, Wolfram --=20 Pengutronix e.K. | Wolfram Sang | Industrial Linux Solutions | http://www.pengutronix.de/ | --oXNgvKVxGWJ0RPMJ Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iEYEARECAAYFAk7f8PEACgkQD27XaX1/VRujAACeMkAgaWlSMQdzWExVazH9ErEH UNUAnjEpLkJMTyPDvPPiuSUSvrVmWazu =XB1b -----END PGP SIGNATURE----- --oXNgvKVxGWJ0RPMJ-- From ralf@linux-mips.org Thu Dec 8 11:45:26 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 08 Dec 2011 11:45:39 +0100 (CET) Received: from h5.dl5rb.org.uk ([81.2.74.5]:49302 "EHLO linux-mips.org" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1903698Ab1LHKp0 (ORCPT ); Thu, 8 Dec 2011 11:45:26 +0100 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.4) with ESMTP id pB8AjNOA009085; Thu, 8 Dec 2011 10:45:23 GMT Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id pB8AjNSt009083; Thu, 8 Dec 2011 10:45:23 GMT Date: Thu, 8 Dec 2011 10:45:23 +0000 From: Ralf Baechle To: Artem Bityutskiy Cc: Axel Lin , linux-mips@linux-mips.org, Manuel Lauss , linux-mtd@lists.infradead.org Subject: Re: [PATCH] MTD: nand: Convert au1550nd to use module_platform_driver() Message-ID: <20111208104522.GA21777@linux-mips.org> References: <1322748247.31743.1.camel@phoenix> <1323008139.9400.59.camel@sauron.fi.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1323008139.9400.59.camel@sauron.fi.intel.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 32058 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6697 Content-Length: 644 Lines: 18 On Sun, Dec 04, 2011 at 04:15:32PM +0200, Artem Bityutskiy wrote: > > Hi Ralf, > > This patch converts au1550nd to use module_platform_driver(). > > You have committed a5bd32fd "MTD: nand: make au1550nd.c a platform_driver". > > Currently this patch can only apply to either your tree or linux-next. > > Could you help to take it. > > ( committed a5bd32fd does not exist in l2-mtd-2.6.git, > > so Artem cannot apply it.) > > Yes, please, merge the au1550nd.c piece via Ralf, thanks! No point in adding code to change it again first commit so I've folded this patch into "MTD: nand: make au1550nd.c a platform_driver". Thanks folks! Ralf From ralf@linux-mips.org Thu Dec 8 13:35:19 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 08 Dec 2011 13:35:23 +0100 (CET) Received: from h5.dl5rb.org.uk ([81.2.74.5]:50064 "EHLO linux-mips.org" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1903698Ab1LHMfT (ORCPT ); Thu, 8 Dec 2011 13:35:19 +0100 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.4) with ESMTP id pB8CZA5f012175; Thu, 8 Dec 2011 12:35:10 GMT Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id pB8CZ9bD012173; Thu, 8 Dec 2011 12:35:09 GMT Date: Thu, 8 Dec 2011 12:35:09 +0000 From: Ralf Baechle To: David Daney Cc: linux-mips@linux-mips.org, David Daney Subject: Re: [PATCH] MIPS: Octeon: Don't increase PCIe payload sizes. Message-ID: <20111208123509.GA10113@linux-mips.org> References: <1322761877-30221-1-git-send-email-ddaney.cavm@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1322761877-30221-1-git-send-email-ddaney.cavm@gmail.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 32059 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6728 Content-Length: 497 Lines: 14 On Thu, Dec 01, 2011 at 09:51:17AM -0800, David Daney wrote: > The existing code breaks devices that are capable of large PCIe > transfers (Silicon Image SATA controllers for example). We don't have > code to properly determine the maximum payload size on a per-bus > basis, so the easiest thing to do is just have all devices use the > default (128). Folded into 53ba9ae0 [MIPS: Octeon: Update PCI Latency timer, PCIe payload, and PCIe max read to allow larger transactions]. Thanks, Ralf From ralf@linux-mips.org Thu Dec 8 14:08:56 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 08 Dec 2011 14:09:00 +0100 (CET) Received: from h5.dl5rb.org.uk ([81.2.74.5]:50262 "EHLO linux-mips.org" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1903697Ab1LHNI4 (ORCPT ); Thu, 8 Dec 2011 14:08:56 +0100 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.4) with ESMTP id pB8D8clX013177; Thu, 8 Dec 2011 13:08:38 GMT Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id pB8D8ZOY013175; Thu, 8 Dec 2011 13:08:35 GMT Date: Thu, 8 Dec 2011 13:08:35 +0000 From: Ralf Baechle To: zhzhl555@gmail.com Cc: a.zummo@towertech.it, rtc-linux@googlegroups.com, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, keguang.zhang@gmail.com, wuzhangjin@gmail.com, r0bertz@gentoo.org Subject: Re: [PATCH] MIPS: Add RTC support for loongson1B Message-ID: <20111208130835.GC10113@linux-mips.org> References: <1322729078-6141-1-git-send-email-zhzhl555@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1322729078-6141-1-git-send-email-zhzhl555@gmail.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 32060 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6786 Content-Length: 795 Lines: 21 On Thu, Dec 01, 2011 at 04:44:38PM +0800, zhzhl555@gmail.com wrote: > + writel(t, SYS_TOYWRITE1); > + __asm__ volatile ("sync"); > + c = 0x10000; > + while ((readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TS) && --c) > + usleep_range(1000, 3000); Why the SYNC instruction? This is an uncached write and on all MIPS CPUs the SYNC instruction will only make sure the write has left the CPU's write buffers. There is no guarantee that by the time the SYNC has completed the write has actually reached its destination. If that is what you want, read something from device. Reads will only complete after all preceeding writes have completed. In this driver all instances of SYNC instructions are followed by polling loops reading from the RTC which means all SYNCs should be unnecessary. Or? Ralf From florian@openwrt.org Thu Dec 8 16:30:47 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 08 Dec 2011 16:30:52 +0100 (CET) Received: from zmc.proxad.net ([212.27.53.206]:34710 "EHLO zmc.proxad.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903700Ab1LHPar (ORCPT ); Thu, 8 Dec 2011 16:30:47 +0100 Received: from localhost (localhost [127.0.0.1]) by zmc.proxad.net (Postfix) with ESMTP id 7A7DA3D994B; Thu, 8 Dec 2011 16:30:46 +0100 (CET) X-Virus-Scanned: amavisd-new at Received: from zmc.proxad.net ([127.0.0.1]) by localhost (zmc.proxad.net [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TU09voyOASnS; Thu, 8 Dec 2011 16:30:45 +0100 (CET) Received: from flexo.iliad.local (freebox.vlq16.iliad.fr [213.36.7.13]) by zmc.proxad.net (Postfix) with ESMTPSA id 215FA3D9944; Thu, 8 Dec 2011 16:30:45 +0100 (CET) From: Florian Fainelli To: Grant Likely Cc: spi-devel-general@lists.sourceforge.net, linux-mips@linux-mips.org, ralf@linux-mips.org, w.sang@pengutronix.de, Florian Fainelli , Tanguy Bouzeloc Subject: [PATCH v2] spi: add Broadcom BCM63xx SPI controller driver Date: Thu, 8 Dec 2011 16:30:02 +0100 Message-Id: <1323358202-25714-1-git-send-email-florian@openwrt.org> X-Mailer: git-send-email 1.7.5.4 X-archive-position: 32061 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6872 Content-Length: 14322 Lines: 550 This patch adds support for the SPI controller found on the Broadcom BCM63xx SoCs. Signed-off-by: Tanguy Bouzeloc Signed-off-by: Florian Fainelli --- The platform related changes have been submitted on the linux-mips ml: http://www.linux-mips.org/archives/linux-mips/2011-11/msg00547.html Ralf, if Grant is okay with that patch, it probably makes sense to merge this controller via your tree since it depends on the arch/mips/bcm63xx knobs. Changes since v1: - switched to the devm_* API which frees resources automatically - switched to dev_pm_ops - use module_platform_driver - remove MODULE_VERSION() - fixed return value when clock is not present using PTR_ERR() - fixed probe() error path to disable clock in case of failure drivers/spi/Kconfig | 6 + drivers/spi/Makefile | 1 + drivers/spi/spi-bcm63xx.c | 485 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 492 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/spi-bcm63xx.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 52e2900..8aecc4e 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -94,6 +94,12 @@ config SPI_AU1550 If you say yes to this option, support will be included for the Au1550 SPI controller (may also work with Au1200,Au1210,Au1250). +config SPI_BCM63XX + tristate "Broadcom BCM63xx SPI controller" + depends on BCM63XX + help + Enable support for the SPI controller on the Broadcom BCM63xx SoCs. + config SPI_BITBANG tristate "Utilities for Bitbanging SPI masters" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 61c3261..be38f73 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_SPI_ALTERA) += spi-altera.o obj-$(CONFIG_SPI_ATMEL) += spi-atmel.o obj-$(CONFIG_SPI_ATH79) += spi-ath79.o obj-$(CONFIG_SPI_AU1550) += spi-au1550.o +obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o obj-$(CONFIG_SPI_BFIN) += spi-bfin5xx.o obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o obj-$(CONFIG_SPI_BITBANG) += spi-bitbang.o diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c new file mode 100644 index 0000000..5f2f1bc --- /dev/null +++ b/drivers/spi/spi-bcm63xx.c @@ -0,0 +1,485 @@ +/* + * Broadcom BCM63xx SPI controller support + * + * Copyright (C) 2009-2011 Florian Fainelli + * Copyright (C) 2010 Tanguy Bouzeloc + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the + * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define PFX KBUILD_MODNAME +#define DRV_VER "0.1.2" + +struct bcm63xx_spi { + spinlock_t lock; + int stopping; + struct completion done; + + void __iomem *regs; + int irq; + + /* Platform data */ + u32 speed_hz; + unsigned fifo_size; + + /* Data buffers */ + const unsigned char *tx_ptr; + unsigned char *rx_ptr; + + /* data iomem */ + u8 __iomem *tx_io; + const u8 __iomem *rx_io; + + int remaining_bytes; + + struct clk *clk; + struct platform_device *pdev; +}; + +static inline u8 bcm_spi_readb(struct bcm63xx_spi *bs, + unsigned int offset) +{ + return bcm_readw(bs->regs + bcm63xx_spireg(offset)); +} + +static inline u16 bcm_spi_readw(struct bcm63xx_spi *bs, + unsigned int offset) +{ + return bcm_readw(bs->regs + bcm63xx_spireg(offset)); +} + +static inline void bcm_spi_writeb(struct bcm63xx_spi *bs, + u8 value, unsigned int offset) +{ + bcm_writeb(value, bs->regs + bcm63xx_spireg(offset)); +} + +static inline void bcm_spi_writew(struct bcm63xx_spi *bs, + u16 value, unsigned int offset) +{ + bcm_writew(value, bs->regs + bcm63xx_spireg(offset)); +} + +static int bcm63xx_spi_setup_transfer(struct spi_device *spi, + struct spi_transfer *t) +{ + struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); + u8 bits_per_word; + u8 clk_cfg; + u32 hz; + unsigned int div; + + bits_per_word = (t) ? t->bits_per_word : spi->bits_per_word; + hz = (t) ? t->speed_hz : spi->max_speed_hz; + if (bits_per_word != 8) { + dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n", + __func__, bits_per_word); + return -EINVAL; + } + + if (spi->chip_select > spi->master->num_chipselect) { + dev_err(&spi->dev, "%s, unsupported slave %d\n", + __func__, spi->chip_select); + return -EINVAL; + } + + /* Check clock setting */ + div = (bs->speed_hz / hz); + switch (div) { + case 2: + clk_cfg = SPI_CLK_25MHZ; + break; + case 4: + clk_cfg = SPI_CLK_12_50MHZ; + break; + case 8: + clk_cfg = SPI_CLK_6_250MHZ; + break; + case 16: + clk_cfg = SPI_CLK_3_125MHZ; + break; + case 32: + clk_cfg = SPI_CLK_1_563MHZ; + break; + case 64: + clk_cfg = SPI_CLK_0_781MHZ; + break; + case 128: + default: + /* Set to slowest mode for compatibility */ + clk_cfg = SPI_CLK_0_391MHZ; + break; + } + + bcm_spi_writeb(bs, clk_cfg, SPI_CLK_CFG); + dev_dbg(&spi->dev, "Setting clock register to %d (hz %d, cmd %02x)\n", + div, hz, clk_cfg); + + return 0; +} + +/* the spi->mode bits understood by this driver: */ +#define MODEBITS (SPI_CPOL | SPI_CPHA) + +static int bcm63xx_spi_setup(struct spi_device *spi) +{ + struct bcm63xx_spi *bs; + int ret; + + bs = spi_master_get_devdata(spi->master); + + if (bs->stopping) + return -ESHUTDOWN; + + if (!spi->bits_per_word) + spi->bits_per_word = 8; + + if (spi->mode & ~MODEBITS) { + dev_err(&spi->dev, "%s, unsupported mode bits %x\n", + __func__, spi->mode & ~MODEBITS); + return -EINVAL; + } + + ret = bcm63xx_spi_setup_transfer(spi, NULL); + if (ret < 0) { + dev_err(&spi->dev, "setup: unsupported mode bits %x\n", + spi->mode & ~MODEBITS); + return ret; + } + + dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n", + __func__, spi->mode & MODEBITS, spi->bits_per_word, 0); + + return 0; +} + +/* Fill the TX FIFO with as many bytes as possible */ +static void bcm63xx_spi_fill_tx_fifo(struct bcm63xx_spi *bs) +{ + u8 size; + + /* Fill the Tx FIFO with as many bytes as possible */ + size = bs->remaining_bytes < bs->fifo_size ? bs->remaining_bytes : + bs->fifo_size; + memcpy_toio(bs->tx_io, bs->tx_ptr, size); + bs->remaining_bytes -= size; +} + +static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) +{ + struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); + u16 msg_ctl; + u16 cmd; + + dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n", + t->tx_buf, t->rx_buf, t->len); + + /* Transmitter is inhibited */ + bs->tx_ptr = t->tx_buf; + bs->rx_ptr = t->rx_buf; + init_completion(&bs->done); + + if (t->tx_buf) { + bs->remaining_bytes = t->len; + bcm63xx_spi_fill_tx_fifo(bs); + } + + /* Enable the command done interrupt which + * we use to determine completion of a command */ + bcm_spi_writeb(bs, SPI_INTR_CMD_DONE, SPI_INT_MASK); + + /* Fill in the Message control register */ + msg_ctl = (t->len << SPI_BYTE_CNT_SHIFT); + + if (t->rx_buf && t->tx_buf) + msg_ctl |= (SPI_FD_RW << SPI_MSG_TYPE_SHIFT); + else if (t->rx_buf) + msg_ctl |= (SPI_HD_R << SPI_MSG_TYPE_SHIFT); + else if (t->tx_buf) + msg_ctl |= (SPI_HD_W << SPI_MSG_TYPE_SHIFT); + + bcm_spi_writew(bs, msg_ctl, SPI_MSG_CTL); + + /* Issue the transfer */ + cmd = SPI_CMD_START_IMMEDIATE; + cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT); + cmd |= (spi->chip_select << SPI_CMD_DEVICE_ID_SHIFT); + bcm_spi_writew(bs, cmd, SPI_CMD); + wait_for_completion(&bs->done); + + /* Disable the CMD_DONE interrupt */ + bcm_spi_writeb(bs, 0, SPI_INT_MASK); + + return t->len - bs->remaining_bytes; +} + +static int bcm63xx_transfer(struct spi_device *spi, struct spi_message *m) +{ + struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); + struct spi_transfer *t; + int ret = 0; + + if (unlikely(list_empty(&m->transfers))) + return -EINVAL; + + if (bs->stopping) + return -ESHUTDOWN; + + list_for_each_entry(t, &m->transfers, transfer_list) { + ret += bcm63xx_txrx_bufs(spi, t); + } + + m->complete(m->context); + + return ret; +} + +/* This driver supports single master mode only. Hence + * CMD_DONE is the only interrupt we care about + */ +static irqreturn_t bcm63xx_spi_interrupt(int irq, void *dev_id) +{ + struct spi_master *master = (struct spi_master *)dev_id; + struct bcm63xx_spi *bs = spi_master_get_devdata(master); + u8 intr; + u16 cmd; + + /* Read interupts and clear them immediately */ + intr = bcm_spi_readb(bs, SPI_INT_STATUS); + bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS); + bcm_spi_writeb(bs, 0, SPI_INT_MASK); + + /* A tansfer completed */ + if (intr & SPI_INTR_CMD_DONE) { + u8 rx_tail; + + rx_tail = bcm_spi_readb(bs, SPI_RX_TAIL); + + /* Read out all the data */ + if (rx_tail) + memcpy_fromio(bs->rx_ptr, bs->rx_io, rx_tail); + + /* See if there is more data to send */ + if (bs->remaining_bytes > 0) { + bcm63xx_spi_fill_tx_fifo(bs); + + /* Start the transfer */ + bcm_spi_writew(bs, SPI_HD_W << SPI_MSG_TYPE_SHIFT, + SPI_MSG_CTL); + cmd = bcm_spi_readw(bs, SPI_CMD); + cmd |= SPI_CMD_START_IMMEDIATE; + cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT); + bcm_spi_writeb(bs, SPI_INTR_CMD_DONE, SPI_INT_MASK); + bcm_spi_writew(bs, cmd, SPI_CMD); + } else + complete(&bs->done); + } + + return IRQ_HANDLED; +} + + +static int __init bcm63xx_spi_probe(struct platform_device *pdev) +{ + struct resource *r; + struct device *dev = &pdev->dev; + struct bcm63xx_spi_pdata *pdata = pdev->dev.platform_data; + int irq; + struct spi_master *master; + struct clk *clk; + struct bcm63xx_spi *bs; + int ret; + + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r) { + dev_err(dev, "no iomem\n"); + ret = -ENXIO; + goto out; + } + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + dev_err(dev, "no irq\n"); + ret = -ENXIO; + goto out; + } + + clk = clk_get(dev, "spi"); + if (IS_ERR(clk)) { + dev_err(dev, "no clock for device\n"); + ret = PTR_ERR(clk); + goto out; + } + + master = spi_alloc_master(dev, sizeof(*bs)); + if (!master) { + dev_err(dev, "out of memory\n"); + ret = -ENOMEM; + goto out; + } + + bs = spi_master_get_devdata(master); + init_completion(&bs->done); + + platform_set_drvdata(pdev, master); + bs->pdev = pdev; + + if (!devm_request_mem_region(&pdev->dev, r->start, + resource_size(r), PFX)) { + dev_err(dev, "iomem request failed\n"); + ret = -ENXIO; + goto out_err; + } + + bs->regs = devm_ioremap_nocache(&pdev->dev, r->start, + resource_size(r)); + if (!bs->regs) { + dev_err(dev, "unable to ioremap regs\n"); + ret = -ENOMEM; + goto out_err; + } + + bs->irq = irq; + bs->clk = clk; + bs->fifo_size = pdata->fifo_size; + + ret = devm_request_irq(&pdev->dev, irq, bcm63xx_spi_interrupt, 0, + pdev->name, master); + if (ret) { + dev_err(dev, "unable to request irq\n"); + goto out_err; + } + + master->bus_num = pdata->bus_num; + master->num_chipselect = pdata->num_chipselect; + master->setup = bcm63xx_spi_setup; + master->transfer = bcm63xx_transfer; + bs->speed_hz = pdata->speed_hz; + bs->stopping = 0; + bs->tx_io = (u8 *)(bs->regs + bcm63xx_spireg(SPI_MSG_DATA)); + bs->rx_io = (const u8 *)(bs->regs + bcm63xx_spireg(SPI_RX_DATA)); + spin_lock_init(&bs->lock); + + /* Initialize hardware */ + clk_enable(bs->clk); + bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS); + + /* register and we are done */ + ret = spi_register_master(master); + if (ret) { + dev_err(dev, "spi register failed\n"); + goto out_clk_disable; + } + + dev_info(dev, "at 0x%08x (irq %d, FIFOs size %d) v%s\n", + r->start, irq, bs->fifo_size, DRV_VER); + + return 0; + +out_clk_disable: + clk_disable(clk); +out_err: + platform_set_drvdata(pdev, NULL); + spi_master_put(master); + clk_put(clk); +out: + return ret; +} + +static int __exit bcm63xx_spi_remove(struct platform_device *pdev) +{ + struct spi_master *master = platform_get_drvdata(pdev); + struct bcm63xx_spi *bs = spi_master_get_devdata(master); + + /* reset spi block */ + bcm_spi_writeb(bs, 0, SPI_INT_MASK); + spin_lock(&bs->lock); + bs->stopping = 1; + + /* HW shutdown */ + clk_disable(bs->clk); + clk_put(bs->clk); + + spin_unlock(&bs->lock); + platform_set_drvdata(pdev, 0); + spi_unregister_master(master); + + return 0; +} + +#ifdef CONFIG_PM +static int bcm63xx_spi_suspend(struct device *dev) +{ + struct spi_master *master = + platform_get_drvdata(to_platform_device(dev)); + struct bcm63xx_spi *bs = spi_master_get_devdata(master); + + clk_disable(bs->clk); + + return 0; +} + +static int bcm63xx_spi_resume(struct device *dev) +{ + struct spi_master *master = + platform_get_drvdata(to_platform_device(dev)); + struct bcm63xx_spi *bs = spi_master_get_devdata(master); + + clk_enable(bs->clk); + + return 0; +} + +static const struct dev_pm_ops bcm63xx_spi_pm_ops = { + .suspend = bcm63xx_spi_suspend, + .resume = bcm63xx_spi_resume, +}; + +#define BCM63XX_SPI_PM_OPS (&bcm63xx_spi_pm_ops) +#else +#define BCM63XX_SPI_PM_OPS NULL +#endif + +static struct platform_driver bcm63xx_spi_driver = { + .driver = { + .name = "bcm63xx-spi", + .owner = THIS_MODULE, + .pm = BCM63XX_SPI_PM_OPS, + }, + .probe = bcm63xx_spi_probe, + .remove = __exit_p(bcm63xx_spi_remove), +}; + +module_platform_driver(bcm63xx_spi_driver); + +MODULE_ALIAS("platform:bcm63xx_spi"); +MODULE_AUTHOR("Florian Fainelli "); +MODULE_AUTHOR("Tanguy Bouzeloc "); +MODULE_DESCRIPTION("Broadcom BCM63xx SPI Controller driver"); +MODULE_LICENSE("GPL"); -- 1.7.5.4 From ralf@linux-mips.org Thu Dec 8 17:23:55 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 08 Dec 2011 17:24:00 +0100 (CET) Received: from h5.dl5rb.org.uk ([81.2.74.5]:50948 "EHLO linux-mips.org" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1903700Ab1LHQXz (ORCPT ); Thu, 8 Dec 2011 17:23:55 +0100 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.4) with ESMTP id pB8GJfpm017919; Thu, 8 Dec 2011 16:19:41 GMT Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id pB8GJVbq017911; Thu, 8 Dec 2011 16:19:31 GMT Date: Thu, 8 Dec 2011 16:19:31 +0000 From: Ralf Baechle To: Tejun Heo Cc: benh@kernel.crashing.org, yinghai@kernel.org, hpa@zytor.com, tony.luck@intel.com, schwidefsky@de.ibm.com, liqin.chen@sunplusct.com, lethal@linux-sh.org, davem@davemloft.net, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, mingo@redhat.com, jonas@southpole.se, lennox.wu@gmail.com, linux-mips@linux-mips.org Subject: Re: [PATCH 19/23] mips: Use HAVE_MEMBLOCK_NODE_MAP Message-ID: <20111208161931.GA17864@linux-mips.org> References: <1322508685-32532-1-git-send-email-tj@kernel.org> <1322508685-32532-20-git-send-email-tj@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1322508685-32532-20-git-send-email-tj@kernel.org> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 32062 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 6902 Content-Length: 313 Lines: 11 On Mon, Nov 28, 2011 at 11:31:21AM -0800, Tejun Heo wrote: > mips used early_node_map[] just to prime free_area_init_nodes(). Now > memblock can be used for the same purpose and early_node_map[] is > scheduled to be dropped. Use memblock instead. Acked-by: Ralf Baechle Thanks, Ralf From rdsandiford@googlemail.com Thu Dec 8 21:34:21 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 08 Dec 2011 21:34:25 +0100 (CET) Received: from mail-ey0-f177.google.com ([209.85.215.177]:53838 "EHLO mail-ey0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903723Ab1LHUeV (ORCPT ); Thu, 8 Dec 2011 21:34:21 +0100 Received: by eaac10 with SMTP id c10so1670608eaa.36 for ; Thu, 08 Dec 2011 12:34:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=from:to:mail-followup-to:cc:subject:references:date:in-reply-to :message-id:user-agent:mime-version:content-type; bh=gfCgPFsEIYC4yOzBEmqt/460hMFac5y67Cf9urWWtOQ=; b=X+4ZuaWpV2MXJr2MLVPEwT4E3Vf75YsUlQXmX9vkUe1yQwhwPnWGVXCs4LzxYwIxk5 5p3U7uA5miJrqaClhOC8U949f5Vz/8EATMe0Fqwwk3A6cBgv1Ns4Eks6LHbl4qpNaFuz m4iVh5RjCX/1YiGFyAkyNiBLoeip+07rZzf8M= Received: by 10.213.114.3 with SMTP id c3mr325010ebq.146.1323376455976; Thu, 08 Dec 2011 12:34:15 -0800 (PST) Received: from localhost (rsandifo.gotadsl.co.uk. [82.133.89.107]) by mx.google.com with ESMTPS id 58sm21793725eet.11.2011.12.08.12.34.13 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 08 Dec 2011 12:34:13 -0800 (PST) From: Richard Sandiford To: David Daney Mail-Followup-To: David Daney ,binutils , Alan Modra , linux-mips , Manuel Lauss , Debian MIPS , rdsandiford@googlemail.com Cc: binutils , Alan Modra , linux-mips , Manuel Lauss , Debian MIPS Subject: Re: [Patch]: Fix ld pr11138 FAILures on mips*. References: <4EDD669F.30207@cavium.com> <20111206054018.GB21034@bubble.grove.modra.org> <8762ht2yft.fsf@firetop.home> <4EDE9373.4070707@cavium.com> Date: Thu, 08 Dec 2011 20:34:12 +0000 In-Reply-To: <4EDE9373.4070707@cavium.com> (David Daney's message of "Tue, 06 Dec 2011 14:13:07 -0800") Message-ID: <87liqm7qgr.fsf@firetop.home> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-archive-position: 32063 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: rdsandiford@googlemail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7069 Content-Length: 2199 Lines: 51 David Daney writes: >> There again, is this symbol (as opposed to the DT_MIPS_RLD_MAP tag) >> actually part of the ABI? I can't find any reference to it in the >> original psABI, the SGI ELF64 spec, gdb or glibc. If it's just an >> internal thing, maybe we could get rid of it altogether, or at least >> make it bind locally rather than globally. >> > > That is an option too I suppose. I would say that it is part of a de > facto ABI if nothing else. The question of weather anybody uses it it a > different question. I thought boehm-gc may have used it, but I cannot > find it there now. Yeah, good point. It occured to me rather belatedly that if wasn't part of the de facto ABI, it wouldn't have two distinct names... So if we were just doing this for the tag, the simplest way would have been to find the .rld_map section in _bfd_mips_elf_finish_dynamic_sections. But I agree that we should keep the symbol Just In Case. So... > It might be possible to #define elf_backend_output_arch_local_syms and > then handle calculation of the rld_value value there instead. > > If this seems like a good approach, I can prepare and test a patch that > does that. ...how about caching the hash table entry for __rld_map/__RLD_MAP/ __rld_obj_head in mips_elf_link_hash_entry, instead of rld_value. (One field shared by all three should be enough.) We can then use that in _bfd_mips_elf_finish_dynamic_sections. The code to set sym->st_value in _bfd_mips_elf_finish_dynamic_symbol should already be redundant: the symbol is defined as being at the start of .rld_map by: s = bfd_get_section_by_name (abfd, ".rld_map"); BFD_ASSERT (s != NULL); name = SGI_COMPAT (abfd) ? "__rld_map" : "__RLD_MAP"; bh = NULL; if (!(_bfd_generic_link_add_one_symbol (info, abfd, name, BSF_GLOBAL, s, 0, NULL, FALSE, get_elf_backend_data (abfd)->collect, &bh))) return FALSE; And the code to clear the first word should be redundant too, since _bfd_mips_elf_size_dynamic_sections uses bfd_zalloc to allocate the section's contents. So if we do cache the hash table entry, the whole _bfd_mips_elf_finish_dynamic_symbol handling should become dead. Richard From david.daney@cavium.com Thu Dec 8 21:53:28 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 08 Dec 2011 21:53:32 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:16779 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903723Ab1LHUx2 (ORCPT ); Thu, 8 Dec 2011 21:53:28 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Thu, 08 Dec 2011 12:54:55 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Thu, 8 Dec 2011 12:53:26 -0800 Received: from dd1.caveonetworks.com ([64.2.3.195]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Thu, 8 Dec 2011 12:53:26 -0800 Message-ID: <4EE123C6.5050703@cavium.com> Date: Thu, 08 Dec 2011 12:53:26 -0800 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: binutils , Alan Modra , linux-mips , Manuel Lauss , Debian MIPS , rdsandiford@googlemail.com Subject: Re: [Patch]: Fix ld pr11138 FAILures on mips*. References: <4EDD669F.30207@cavium.com> <20111206054018.GB21034@bubble.grove.modra.org> <8762ht2yft.fsf@firetop.home> <4EDE9373.4070707@cavium.com> <87liqm7qgr.fsf@firetop.home> In-Reply-To: <87liqm7qgr.fsf@firetop.home> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 08 Dec 2011 20:53:26.0605 (UTC) FILETIME=[6EB2B7D0:01CCB5EB] X-archive-position: 32064 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: david.daney@cavium.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7087 Content-Length: 2722 Lines: 68 On 12/08/2011 12:34 PM, Richard Sandiford wrote: > David Daney writes: >>> There again, is this symbol (as opposed to the DT_MIPS_RLD_MAP tag) >>> actually part of the ABI? I can't find any reference to it in the >>> original psABI, the SGI ELF64 spec, gdb or glibc. If it's just an >>> internal thing, maybe we could get rid of it altogether, or at least >>> make it bind locally rather than globally. >>> >> >> That is an option too I suppose. I would say that it is part of a de >> facto ABI if nothing else. The question of weather anybody uses it it a >> different question. I thought boehm-gc may have used it, but I cannot >> find it there now. > > Yeah, good point. It occured to me rather belatedly that if wasn't > part of the de facto ABI, it wouldn't have two distinct names... > > So if we were just doing this for the tag, the simplest way would have > been to find the .rld_map section in _bfd_mips_elf_finish_dynamic_sections. > But I agree that we should keep the symbol Just In Case. So... > >> It might be possible to #define elf_backend_output_arch_local_syms and >> then handle calculation of the rld_value value there instead. >> >> If this seems like a good approach, I can prepare and test a patch that >> does that. > > ...how about caching the hash table entry for __rld_map/__RLD_MAP/ > __rld_obj_head in mips_elf_link_hash_entry, instead of rld_value. > (One field shared by all three should be enough.) We can then use > that in _bfd_mips_elf_finish_dynamic_sections. > > The code to set sym->st_value in _bfd_mips_elf_finish_dynamic_symbol > should already be redundant: the symbol is defined as being at the > start of .rld_map by: > > s = bfd_get_section_by_name (abfd, ".rld_map"); > BFD_ASSERT (s != NULL); > > name = SGI_COMPAT (abfd) ? "__rld_map" : "__RLD_MAP"; > bh = NULL; > if (!(_bfd_generic_link_add_one_symbol > (info, abfd, name, BSF_GLOBAL, s, 0, NULL, FALSE, > get_elf_backend_data (abfd)->collect,&bh))) > return FALSE; > > And the code to clear the first word should be redundant too, since > _bfd_mips_elf_size_dynamic_sections uses bfd_zalloc to allocate the > section's contents. That's right, also elsewhere we set the size of the section to 4, which is not correct for ELF64 targets. > So if we do cache the hash table entry, the whole > _bfd_mips_elf_finish_dynamic_symbol handling should become dead. > > Richard Thanks Richard, Those are all good ideas, so I think I will hack up a new patch to try and implement this plan. Some care also needs to be taken for the SGI case as there the symbol seems to come from one of the input objects rather than being synthesized by the linker. David Daney From zhzhl555@gmail.com Fri Dec 9 07:44:33 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 09 Dec 2011 07:44:40 +0100 (CET) Received: from mail-ey0-f177.google.com ([209.85.215.177]:61299 "EHLO mail-ey0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903707Ab1LIGod (ORCPT ); Fri, 9 Dec 2011 07:44:33 +0100 Received: by eaac10 with SMTP id c10so1871158eaa.36 for ; Thu, 08 Dec 2011 22:44:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=yMmjZk3lJDxGN/zDeoK9iof7ArEnaB66jZ1dBxOdzB0=; b=KLihlJzyZ09SsE/GluPXBdxa0DgsThuIZrUNI2hKY59f65JwQTeZLPapL4WUwZC24H 396UH7yrYm/RkfF/gNeCUDTPfn++v+dhR17KICzJTc3dUk9EYzgySEf3b57ZLPKpOkOg dptSbLyYKPRS9RQxXKeM+iul8v5coUXpx10N8= MIME-Version: 1.0 Received: by 10.213.29.138 with SMTP id q10mr581387ebc.35.1323413067768; Thu, 08 Dec 2011 22:44:27 -0800 (PST) Received: by 10.14.37.15 with HTTP; Thu, 8 Dec 2011 22:44:27 -0800 (PST) In-Reply-To: <20111208130835.GC10113@linux-mips.org> References: <1322729078-6141-1-git-send-email-zhzhl555@gmail.com> <20111208130835.GC10113@linux-mips.org> Date: Fri, 9 Dec 2011 14:44:27 +0800 Message-ID: Subject: Re: [PATCH] MIPS: Add RTC support for loongson1B From: zhao zhang To: Ralf Baechle Cc: a.zummo@towertech.it, rtc-linux@googlegroups.com, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, keguang.zhang@gmail.com, wuzhangjin@gmail.com, r0bertz@gentoo.org Content-Type: multipart/alternative; boundary=0015174be8facba57504b3a31d38 X-archive-position: 32065 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: zhzhl555@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7420 Content-Length: 3747 Lines: 110 --0015174be8facba57504b3a31d38 Content-Type: text/plain; charset=GB2312 Content-Transfer-Encoding: quoted-printable Thanks for Ralf's replay. Since the read address and the write address are different, so i am worry about the out-of-order execution. I just want make sure the read instruction *not* ahead of that write instruction. I didn't know about the detail principle of out-of-order execution on this SOC, and i didn't know the read for different address will also complete after all preceeding writes have completed. =D4=DA 2011=C4=EA12=D4=C28=C8=D5 =CF=C2=CE=E79:08=A3=ACRalf Baechle =D0=B4=B5=C0=A3=BA > On Thu, Dec 01, 2011 at 04:44:38PM +0800, zhzhl555@gmail.com wrote: > > > + writel(t, SYS_TOYWRITE1); > > + __asm__ volatile ("sync"); > > + c =3D 0x10000; > > + while ((readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TS) && --c) > > + usleep_range(1000, 3000); > > Why the SYNC instruction? This is an uncached write and on all MIPS CPUs > the SYNC instruction will only make sure the write has left the CPU's > write buffers. There is no guarantee that by the time the SYNC has > completed > the write has actually reached its destination. If that is what you want= , > read something from device. Reads will only complete after all preceedin= g > writes have completed. > > In this driver all instances of SYNC instructions are followed by polling > loops reading from the RTC which means all SYNCs should be unnecessary. > > Or? > > Ralf > --0015174be8facba57504b3a31d38 Content-Type: text/html; charset=GB2312 Content-Transfer-Encoding: quoted-printable Thanks for Ralf's replay.

Since the read address and the write address are different, so i am=20 worry about
the out-of-order execution. I just want make=20 sure the read instruction *not*
ahead of that write =20 instruction.

I didn't know about the detail principle of out-of-o= rder execution on this SOC, and
i didn't know the read for different address will also complete after= =20 all preceeding
writes have completed.




=D4=DA 2011=C4=EA12=D4=C28=C8= =D5 =CF=C2=CE=E79:08=A3=ACRalf Baechle <ralf@linux-mips.org>=D0=B4=B5=C0=A3= =BA
On Thu, Dec 01, 2011 at 04:44:38PM +0800, zhzhl555@gmail.com wrote:

> +     writel(t, SYS_TOYWRITE1);
> +     __asm__ volatile ("sync");
> +     c =3D 0x10000;
> +     while ((readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_TS) &= amp;& --c)
> +             usleep_range(1000, 3000);<= br>
Why the SYNC instruction?  This is an uncached write and on all = MIPS CPUs
the SYNC instruction will only make sure the write has left the CPU's write buffers.  There is no guarantee that by the time the SYNC has co= mpleted
the write has actually reached its destination.  If that is what you w= ant,
read something from device.  Reads will only complete after all precee= ding
writes have completed.

In this driver all instances of SYNC instructions are followed by polling loops reading from the RTC which means all SYNCs should be unnecessary.

Or?

 Ralf

--0015174be8facba57504b3a31d38-- From blogic@openwrt.org Fri Dec 9 15:17:15 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 09 Dec 2011 15:17:24 +0100 (CET) Received: from nbd.name ([46.4.11.11]:40222 "EHLO nbd.name" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903728Ab1LIORP (ORCPT ); Fri, 9 Dec 2011 15:17:15 +0100 From: John Crispin To: Ralf Baechle Cc: Wolfram Sang , linux-mips@linux-mips.org, John Crispin , Thomas Langer , spi-devel-general@lists.sourceforge.net Subject: [PATCH V2 2/2] SPI: MIPS: lantiq: add platform code for FALC-ON spi driver Date: Fri, 9 Dec 2011 15:17:03 +0100 Message-Id: <1323440223-10636-2-git-send-email-blogic@openwrt.org> X-Mailer: git-send-email 1.7.7.1 In-Reply-To: <1323440223-10636-1-git-send-email-blogic@openwrt.org> References: <1323440223-10636-1-git-send-email-blogic@openwrt.org> X-archive-position: 32066 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: blogic@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7686 Content-Length: 3209 Lines: 107 Add code to register the spi driver on FALC-ON based boards. Signed-off-by: Thomas Langer Signed-off-by: John Crispin Cc: spi-devel-general@lists.sourceforge.net --- arch/mips/lantiq/falcon/devices.c | 13 +++++++++++++ arch/mips/lantiq/falcon/devices.h | 4 ++++ arch/mips/lantiq/falcon/mach-easy98000.c | 27 +++++++++++++++++++++++++++ 3 files changed, 44 insertions(+), 0 deletions(-) diff --git a/arch/mips/lantiq/falcon/devices.c b/arch/mips/lantiq/falcon/devices.c index 851d7a6..a585c41 100644 --- a/arch/mips/lantiq/falcon/devices.c +++ b/arch/mips/lantiq/falcon/devices.c @@ -143,3 +143,16 @@ falcon_register_i2c(void) falcon_i2c_resources, ARRAY_SIZE(falcon_i2c_resources)); ltq_sysctl_activate(SYSCTL_SYS1, ACTS_I2C_ACT); } + +/* spi flash */ +static struct platform_device ltq_spi = { + .name = "falcon_spi", + .num_resources = 0, +}; + +void __init +falcon_register_spi_flash(struct spi_board_info *data) +{ + spi_register_board_info(data, 1); + platform_device_register(<q_spi); +} diff --git a/arch/mips/lantiq/falcon/devices.h b/arch/mips/lantiq/falcon/devices.h index 2fdcb08..fd27e91 100644 --- a/arch/mips/lantiq/falcon/devices.h +++ b/arch/mips/lantiq/falcon/devices.h @@ -11,11 +11,15 @@ #ifndef _FALCON_DEVICES_H__ #define _FALCON_DEVICES_H__ +#include +#include + #include "../devices.h" extern void falcon_register_nand(void); extern void falcon_register_gpio(void); extern void falcon_register_gpio_extra(void); extern void falcon_register_i2c(void); +extern void falcon_register_spi_flash(struct spi_board_info *data); #endif diff --git a/arch/mips/lantiq/falcon/mach-easy98000.c b/arch/mips/lantiq/falcon/mach-easy98000.c index 411af10..fc5720d 100644 --- a/arch/mips/lantiq/falcon/mach-easy98000.c +++ b/arch/mips/lantiq/falcon/mach-easy98000.c @@ -40,6 +40,21 @@ struct physmap_flash_data easy98000_nor_flash_data = { .parts = easy98000_nor_partitions, }; +static struct flash_platform_data easy98000_spi_flash_platform_data = { + .name = "sflash", + .parts = easy98000_nor_partitions, + .nr_parts = ARRAY_SIZE(easy98000_nor_partitions) +}; + +static struct spi_board_info easy98000_spi_flash_data __initdata = { + .modalias = "m25p80", + .bus_num = 0, + .chip_select = 0, + .max_speed_hz = 10 * 1000 * 1000, + .mode = SPI_MODE_3, + .platform_data = &easy98000_spi_flash_platform_data +}; + /* setup gpio based spi bus/device for access to the eeprom on the board */ #define SPI_GPIO_MRST 102 #define SPI_GPIO_MTSR 103 @@ -94,6 +109,13 @@ easy98000_init(void) } static void __init +easy98000sf_init(void) +{ + easy98000_init_common(); + falcon_register_spi_flash(&easy98000_spi_flash_data); +} + +static void __init easy98000nand_init(void) { easy98000_init_common(); @@ -105,6 +127,11 @@ MIPS_MACHINE(LANTIQ_MACH_EASY98000, "EASY98000 Eval Board", easy98000_init); +MIPS_MACHINE(LANTIQ_MACH_EASY98000SF, + "EASY98000SF", + "EASY98000 Eval Board (Serial Flash)", + easy98000sf_init); + MIPS_MACHINE(LANTIQ_MACH_EASY98000NAND, "EASY98000NAND", "EASY98000 Eval Board (NAND Flash)", -- 1.7.7.1 From blogic@openwrt.org Fri Dec 9 15:17:15 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 09 Dec 2011 15:17:51 +0100 (CET) Received: from nbd.name ([46.4.11.11]:40218 "EHLO nbd.name" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903727Ab1LIORP (ORCPT ); Fri, 9 Dec 2011 15:17:15 +0100 From: John Crispin To: Ralf Baechle Cc: Wolfram Sang , linux-mips@linux-mips.org, John Crispin , Thomas Langer , spi-devel-general@lists.sourceforge.net Subject: [PATCH V2 1/2] SPI: MIPS: lantiq: add FALC-ON spi driver Date: Fri, 9 Dec 2011 15:17:02 +0100 Message-Id: <1323440223-10636-1-git-send-email-blogic@openwrt.org> X-Mailer: git-send-email 1.7.7.1 X-archive-position: 32067 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: blogic@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7688 Content-Length: 13592 Lines: 514 The external bus unit (EBU) found on the FALC-ON SoC has spi emulation that is designed for serial flash access. This driver has only been tested with m25p80 type chips. The hardware has no support for other types of spi peripherals. Signed-off-by: Thomas Langer Signed-off-by: John Crispin Cc: spi-devel-general@lists.sourceforge.net --- These 2 patches should go upstream via the MIPS tree Changes in V2 * remove several superflous calls to dev_dbg * make use of module_platform_driver * remove falcon_spi_cleanup as it was an empty function * return real error codes instead of -1 * fixes operator spacing errors * split arch and driver specific patches * squash some lines to make use of the full 80 available chars * Kconfig is now alphabetic again * replace BUG() with WARN_ON() drivers/spi/Kconfig | 9 + drivers/spi/Makefile | 1 + drivers/spi/spi-falcon.c | 445 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 455 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/spi-falcon.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index a1fd73d..e5ce95d 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -138,6 +138,15 @@ config SPI_EP93XX This enables using the Cirrus EP93xx SPI controller in master mode. +config SPI_FALCON + tristate "Falcon SPI controller support" + depends on SOC_FALCON + help + The external bus unit (EBU) found on the FALC-ON SoC has SPI + emulation that is designed for serial flash access. This driver + has only been tested with m25p80 type chips. The hardware has no + support for other types of spi peripherals. + config SPI_GPIO tristate "GPIO-based bitbanging SPI Master" depends on GENERIC_GPIO diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 61c3261..570894c 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_SPI_DW_MMIO) += spi-dw-mmio.o obj-$(CONFIG_SPI_DW_PCI) += spi-dw-midpci.o spi-dw-midpci-objs := spi-dw-pci.o spi-dw-mid.o obj-$(CONFIG_SPI_EP93XX) += spi-ep93xx.o +obj-$(CONFIG_SPI_FALCON) += spi-falcon.o obj-$(CONFIG_SPI_FSL_LIB) += spi-fsl-lib.o obj-$(CONFIG_SPI_FSL_ESPI) += spi-fsl-espi.o obj-$(CONFIG_SPI_FSL_SPI) += spi-fsl-spi.o diff --git a/drivers/spi/spi-falcon.c b/drivers/spi/spi-falcon.c new file mode 100644 index 0000000..7aa044d --- /dev/null +++ b/drivers/spi/spi-falcon.c @@ -0,0 +1,445 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + * Copyright (C) 2010 Thomas Langer + */ + +#include +#include +#include +#include +#include +#include + +#include + +#define DRV_NAME "falcon_spi" + +#define FALCON_SPI_XFER_BEGIN (1 << 0) +#define FALCON_SPI_XFER_END (1 << 1) + +/* Bus Read Configuration Register0 */ +#define LTQ_BUSRCON0 0x00000010 +/* Bus Write Configuration Register0 */ +#define LTQ_BUSWCON0 0x00000018 +/* Serial Flash Configuration Register */ +#define LTQ_SFCON 0x00000080 +/* Serial Flash Time Register */ +#define LTQ_SFTIME 0x00000084 +/* Serial Flash Status Register */ +#define LTQ_SFSTAT 0x00000088 +/* Serial Flash Command Register */ +#define LTQ_SFCMD 0x0000008C +/* Serial Flash Address Register */ +#define LTQ_SFADDR 0x00000090 +/* Serial Flash Data Register */ +#define LTQ_SFDATA 0x00000094 +/* Serial Flash I/O Control Register */ +#define LTQ_SFIO 0x00000098 +/* EBU Clock Control Register */ +#define LTQ_EBUCC 0x000000C4 + +/* Dummy Phase Length */ +#define SFCMD_DUMLEN_OFFSET 16 +#define SFCMD_DUMLEN_MASK 0x000F0000 +/* Chip Select */ +#define SFCMD_CS_OFFSET 24 +#define SFCMD_CS_MASK 0x07000000 +/* field offset */ +#define SFCMD_ALEN_OFFSET 20 +#define SFCMD_ALEN_MASK 0x00700000 +/* SCK Rise-edge Position */ +#define SFTIME_SCKR_POS_OFFSET 8 +#define SFTIME_SCKR_POS_MASK 0x00000F00 +/* SCK Period */ +#define SFTIME_SCK_PER_OFFSET 0 +#define SFTIME_SCK_PER_MASK 0x0000000F +/* SCK Fall-edge Position */ +#define SFTIME_SCKF_POS_OFFSET 12 +#define SFTIME_SCKF_POS_MASK 0x0000F000 +/* Device Size */ +#define SFCON_DEV_SIZE_A23_0 0x03000000 +#define SFCON_DEV_SIZE_MASK 0x0F000000 +/* Read Data Position */ +#define SFTIME_RD_POS_MASK 0x000F0000 +/* Data Output */ +#define SFIO_UNUSED_WD_MASK 0x0000000F +/* Command Opcode mask */ +#define SFCMD_OPC_MASK 0x000000FF +/* dlen bytes of data to write */ +#define SFCMD_DIR_WRITE 0x00000100 +/* Data Length offset */ +#define SFCMD_DLEN_OFFSET 9 +/* Command Error */ +#define SFSTAT_CMD_ERR 0x20000000 +/* Access Command Pending */ +#define SFSTAT_CMD_PEND 0x00400000 +/* Frequency set to 100MHz. */ +#define EBUCC_EBUDIV_SELF100 0x00000001 +/* Serial Flash */ +#define BUSRCON0_AGEN_SERIAL_FLASH 0xF0000000 +/* 8-bit multiplexed */ +#define BUSRCON0_PORTW_8_BIT_MUX 0x00000000 +/* Serial Flash */ +#define BUSWCON0_AGEN_SERIAL_FLASH 0xF0000000 +/* Chip Select after opcode */ +#define SFCMD_KEEP_CS_KEEP_SELECTED 0x00008000 + +struct falcon_spi { + u32 sfcmd; /* for caching of opcode, direction, ... */ + struct spi_master *master; +}; + +int +falcon_spi_xfer(struct spi_device *spi, struct spi_transfer *t, + unsigned long flags) +{ + struct device *dev = &spi->dev; + struct falcon_spi *priv = spi_master_get_devdata(spi->master); + const u8 *txp = t->tx_buf; + u8 *rxp = t->rx_buf; + unsigned int bytelen = ((8 * t->len + 7) / 8); + unsigned int len, alen, dumlen; + u32 val; + enum { + state_init, + state_command_prepare, + state_write, + state_read, + state_disable_cs, + state_end + } state = state_init; + + do { + switch (state) { + case state_init: /* detect phase of upper layer sequence */ + { + /* initial write ? */ + if (flags & FALCON_SPI_XFER_BEGIN) { + if (!txp) { + dev_err(dev, + "BEGIN without tx data!\n"); + return -ENODATA; + } + /* + * Prepare the parts of the sfcmd register, + * which should not change during a sequence! + * Only exception are the length fields, + * especially alen and dumlen. + */ + + priv->sfcmd = ((spi->chip_select + << SFCMD_CS_OFFSET) + & SFCMD_CS_MASK); + priv->sfcmd |= SFCMD_KEEP_CS_KEEP_SELECTED; + priv->sfcmd |= *txp; + txp++; + bytelen--; + if (bytelen) { + /* + * more data: + * maybe address and/or dummy + */ + state = state_command_prepare; + break; + } else { + dev_dbg(dev, "write cmd %02X\n", + priv->sfcmd & SFCMD_OPC_MASK); + } + } + /* continued write ? */ + if (txp && bytelen) { + state = state_write; + break; + } + /* read data? */ + if (rxp && bytelen) { + state = state_read; + break; + } + /* end of sequence? */ + if (flags & FALCON_SPI_XFER_END) + state = state_disable_cs; + else + state = state_end; + break; + } + /* collect tx data for address and dummy phase */ + case state_command_prepare: + { + /* txp is valid, already checked */ + val = 0; + alen = 0; + dumlen = 0; + while (bytelen > 0) { + if (alen < 3) { + val = (val << 8) | (*txp++); + alen++; + } else if ((dumlen < 15) && (*txp == 0)) { + /* + * assume dummy bytes are set to 0 + * from upper layer + */ + dumlen++; + txp++; + } else + break; + bytelen--; + } + priv->sfcmd &= ~(SFCMD_ALEN_MASK | SFCMD_DUMLEN_MASK); + priv->sfcmd |= (alen << SFCMD_ALEN_OFFSET) | + (dumlen << SFCMD_DUMLEN_OFFSET); + if (alen > 0) + ltq_ebu_w32(val, LTQ_SFADDR); + + dev_dbg(dev, "write cmd %02X, alen=%d " + "(addr=%06X) dumlen=%d\n", + priv->sfcmd & SFCMD_OPC_MASK, + alen, val, dumlen); + + if (bytelen > 0) { + /* continue with write */ + state = state_write; + } else if (flags & FALCON_SPI_XFER_END) { + /* end of sequence? */ + state = state_disable_cs; + } else { + /* + * go to end and expect another + * call (read or write) + */ + state = state_end; + } + break; + } + case state_write: + { + /* txp still valid */ + priv->sfcmd |= SFCMD_DIR_WRITE; + len = 0; + val = 0; + do { + if (bytelen--) + val |= (*txp++) << (8 * len++); + if ((flags & FALCON_SPI_XFER_END) + && (bytelen == 0)) { + priv->sfcmd &= + ~SFCMD_KEEP_CS_KEEP_SELECTED; + } + if ((len == 4) || (bytelen == 0)) { + ltq_ebu_w32(val, LTQ_SFDATA); + ltq_ebu_w32(priv->sfcmd + | (len<sfcmd &= ~(SFCMD_ALEN_MASK + | SFCMD_DUMLEN_MASK); + } + } while (bytelen); + state = state_end; + break; + } + case state_read: + { + /* read data */ + priv->sfcmd &= ~SFCMD_DIR_WRITE; + do { + if ((flags & FALCON_SPI_XFER_END) + && (bytelen <= 4)) { + priv->sfcmd &= + ~SFCMD_KEEP_CS_KEEP_SELECTED; + } + len = (bytelen > 4) ? 4 : bytelen; + bytelen -= len; + ltq_ebu_w32(priv->sfcmd + |(len<sfcmd &= ~(SFCMD_ALEN_MASK + | SFCMD_DUMLEN_MASK); + do { + val = ltq_ebu_r32(LTQ_SFSTAT); + if (val & SFSTAT_CMD_ERR) { + /* reset error status */ + dev_err(dev, "SFSTAT: CMD_ERR " + "(%x)\n", val); + ltq_ebu_w32(SFSTAT_CMD_ERR, + LTQ_SFSTAT); + return -EBADE; + } + } while (val & SFSTAT_CMD_PEND); + val = ltq_ebu_r32(LTQ_SFDATA); + do { + *rxp = (val & 0xFF); + rxp++; + val >>= 8; + len--; + } while (len); + } while (bytelen); + state = state_end; + break; + } + case state_disable_cs: + { + priv->sfcmd &= ~SFCMD_KEEP_CS_KEEP_SELECTED; + ltq_ebu_w32(priv->sfcmd | (0 << SFCMD_DLEN_OFFSET), + LTQ_SFCMD); + val = ltq_ebu_r32(LTQ_SFSTAT); + if (val & SFSTAT_CMD_ERR) { + /* reset error status */ + dev_err(dev, "SFSTAT: CMD_ERR (%x)\n", val); + ltq_ebu_w32(SFSTAT_CMD_ERR, LTQ_SFSTAT); + return -EBADE; + } + state = state_end; + break; + } + case state_end: + break; + } + } while (state != state_end); + + return 0; +} + +static int +falcon_spi_setup(struct spi_device *spi) +{ + const u32 ebuclk = CLOCK_100M; + unsigned int i; + unsigned long flags; + + if (spi->master->bus_num > 0 || spi->chip_select > 0) + return -ENODEV; + + spin_lock_irqsave(&ebu_lock, flags); + + if (ebuclk < spi->max_speed_hz) { + /* set EBU clock to 100 MHz */ + ltq_sys1_w32_mask(0, EBUCC_EBUDIV_SELF100, LTQ_EBUCC); + i = 1; /* divider */ + } else { + /* set EBU clock to 50 MHz */ + ltq_sys1_w32_mask(EBUCC_EBUDIV_SELF100, 0, LTQ_EBUCC); + + /* search for suitable divider */ + for (i = 1; i < 7; i++) { + if (ebuclk / i <= spi->max_speed_hz) + break; + } + } + + /* setup period of serial clock */ + ltq_ebu_w32_mask(SFTIME_SCKF_POS_MASK + | SFTIME_SCKR_POS_MASK + | SFTIME_SCK_PER_MASK, + (i << SFTIME_SCKR_POS_OFFSET) + | (i << (SFTIME_SCK_PER_OFFSET + 1)), + LTQ_SFTIME); + + /* + * set some bits of unused_wd, to not trigger HOLD/WP + * signals on non QUAD flashes + */ + ltq_ebu_w32((SFIO_UNUSED_WD_MASK & (0x8 | 0x4)), LTQ_SFIO); + + ltq_ebu_w32(BUSRCON0_AGEN_SERIAL_FLASH | BUSRCON0_PORTW_8_BIT_MUX, + LTQ_BUSRCON0); + ltq_ebu_w32(BUSWCON0_AGEN_SERIAL_FLASH, LTQ_BUSWCON0); + /* set address wrap around to maximum for 24-bit addresses */ + ltq_ebu_w32_mask(SFCON_DEV_SIZE_MASK, SFCON_DEV_SIZE_A23_0, LTQ_SFCON); + + spin_unlock_irqrestore(&ebu_lock, flags); + + return 0; +} + +static int +falcon_spi_transfer(struct spi_device *spi, struct spi_message *m) +{ + struct falcon_spi *priv = spi_master_get_devdata(spi->master); + struct spi_transfer *t; + unsigned long spi_flags; + unsigned long flags; + int ret = 0; + + priv->sfcmd = 0; + m->actual_length = 0; + + spi_flags = FALCON_SPI_XFER_BEGIN; + list_for_each_entry(t, &m->transfers, transfer_list) { + if (list_is_last(&t->transfer_list, &m->transfers)) + spi_flags |= FALCON_SPI_XFER_END; + + spin_lock_irqsave(&ebu_lock, flags); + ret = falcon_spi_xfer(spi, t, spi_flags); + spin_unlock_irqrestore(&ebu_lock, flags); + + if (ret) + break; + + m->actual_length += t->len; + + WARN_ON(t->delay_usecs || t->cs_change); + spi_flags = 0; + } + + m->status = ret; + m->complete(m->context); + + return 0; +} + +static int __devinit +falcon_spi_probe(struct platform_device *pdev) +{ + struct falcon_spi *priv; + struct spi_master *master; + int ret; + + master = spi_alloc_master(&pdev->dev, sizeof(*priv)); + if (!master) + return -ENOMEM; + + priv = spi_master_get_devdata(master); + priv->master = master; + + master->mode_bits = SPI_MODE_3; + master->num_chipselect = 1; + master->bus_num = 0; + master->setup = falcon_spi_setup; + master->transfer = falcon_spi_transfer; + + platform_set_drvdata(pdev, priv); + + ret = spi_register_master(master); + if (ret) + spi_master_put(master); + + return ret; +} + +static int __devexit +falcon_spi_remove(struct platform_device *pdev) +{ + struct falcon_spi *priv = platform_get_drvdata(pdev); + + spi_unregister_master(priv->master); + + return 0; +} + +static struct platform_driver falcon_spi_driver = { + .probe = falcon_spi_probe, + .remove = __devexit_p(falcon_spi_remove), + .driver = { + .name = DRV_NAME, + .owner = THIS_MODULE + } +}; + +module_platform_driver(falcon_spi_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Lantiq Falcon SPI controller driver"); -- 1.7.7.1 From ralf@linux-mips.org Fri Dec 9 17:07:05 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 09 Dec 2011 17:07:10 +0100 (CET) Received: from h5.dl5rb.org.uk ([81.2.74.5]:57319 "EHLO linux-mips.org" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1903731Ab1LIQHF (ORCPT ); Fri, 9 Dec 2011 17:07:05 +0100 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.4) with ESMTP id pB9G6i4Z008710; Fri, 9 Dec 2011 16:06:44 GMT Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id pB9G6esI008708; Fri, 9 Dec 2011 16:06:40 GMT Date: Fri, 9 Dec 2011 16:06:40 +0000 From: Ralf Baechle To: Cong Wang Cc: linux-kernel@vger.kernel.org, akpm@linux-foundation.org, "David S. Miller" , Jiri Kosina , Kevin Cernekee , "Justin P. Mattock" , Peter Zijlstra , David Daney , linux-mips@linux-mips.org Subject: Re: [PATCH 04/62] mips: remove the second argument of k[un]map_atomic() Message-ID: <20111209160639.GA30988@linux-mips.org> References: <1322371662-26166-1-git-send-email-amwang@redhat.com> <1322371662-26166-5-git-send-email-amwang@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1322371662-26166-5-git-send-email-amwang@redhat.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 32068 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7777 Content-Length: 180 Lines: 7 On Sun, Nov 27, 2011 at 01:26:44PM +0800, Cong Wang wrote: Acked-by: Ralf Baechle I assume you want to merge this patch as part of a single series? Ralf From ralf@linux-mips.org Fri Dec 9 17:10:57 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 09 Dec 2011 17:11:01 +0100 (CET) Received: from h5.dl5rb.org.uk ([81.2.74.5]:57382 "EHLO linux-mips.org" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1903731Ab1LIQK5 (ORCPT ); Fri, 9 Dec 2011 17:10:57 +0100 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.4) with ESMTP id pB9G7VIw008738; Fri, 9 Dec 2011 16:07:31 GMT Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id pB9G7MwM008731; Fri, 9 Dec 2011 16:07:22 GMT Date: Fri, 9 Dec 2011 16:07:22 +0000 From: Ralf Baechle To: Cong Wang Cc: linux-kernel@vger.kernel.org, akpm@linux-foundation.org, Russell King , David Howells , Koichi Yasutake , Kyle McMartin , Helge Deller , "James E.J. Bottomley" , Benjamin Herrenschmidt , Paul Mackerras , "David S. Miller" , Chris Metcalf , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Nicolas Pitre , James Bottomley , Paul Gortmaker , Christoph Lameter , Tejun Heo , linux-arm-kernel@lists.infradead.org, linux-mips@linux-mips.org, linux-am33-list@redhat.com, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org Subject: Re: [PATCH 61/62] highmem: kill all __kmap_atomic() Message-ID: <20111209160722.GB30988@linux-mips.org> References: <1322371662-26166-1-git-send-email-amwang@redhat.com> <1322371662-26166-62-git-send-email-amwang@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1322371662-26166-62-git-send-email-amwang@redhat.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 32069 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7778 Content-Length: 113 Lines: 5 On Sun, Nov 27, 2011 at 01:27:41PM +0800, Cong Wang wrote: Acked-by: Ralf Baechle Ralf From florian@openwrt.org Fri Dec 9 20:01:54 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 09 Dec 2011 20:01:58 +0100 (CET) Received: from zmc.proxad.net ([212.27.53.206]:59802 "EHLO zmc.proxad.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903739Ab1LITBy (ORCPT ); Fri, 9 Dec 2011 20:01:54 +0100 Received: from localhost (localhost [127.0.0.1]) by zmc.proxad.net (Postfix) with ESMTP id 1C2AB35E2DB; Fri, 9 Dec 2011 20:01:54 +0100 (CET) X-Virus-Scanned: amavisd-new at Received: from zmc.proxad.net ([127.0.0.1]) by localhost (zmc.proxad.net [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fQ3QzXfAI9Xi; Fri, 9 Dec 2011 20:01:53 +0100 (CET) Received: from flexo.iliad.local (freebox.vlq16.iliad.fr [213.36.7.13]) by zmc.proxad.net (Postfix) with ESMTPSA id AED03360DCA; Fri, 9 Dec 2011 20:01:53 +0100 (CET) From: Florian Fainelli To: Matt Mackall Cc: Herbert Xu , ralf@linux-mips.org, linux-mips@linux-mips.org, Florian Fainelli Subject: [PATCH 1/5] MIPS: BCM63XX: fix BCM6368 IPSec clock bit Date: Fri, 9 Dec 2011 20:01:06 +0100 Message-Id: <1323457270-16330-2-git-send-email-florian@openwrt.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1323457270-16330-1-git-send-email-florian@openwrt.org> References: <1323457270-16330-1-git-send-email-florian@openwrt.org> X-archive-position: 32070 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7985 Content-Length: 816 Lines: 23 The IPsec clock bit is 18 and not 17. Signed-off-by: Florian Fainelli --- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h index 94d4faa..fdcd78c 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h @@ -99,7 +99,7 @@ #define CKCTL_6368_USBH_CLK_EN (1 << 15) #define CKCTL_6368_DISABLE_GLESS_EN (1 << 16) #define CKCTL_6368_NAND_CLK_EN (1 << 17) -#define CKCTL_6368_IPSEC_CLK_EN (1 << 17) +#define CKCTL_6368_IPSEC_CLK_EN (1 << 18) #define CKCTL_6368_ALL_SAFE_EN (CKCTL_6368_SWPKT_USB_EN | \ CKCTL_6368_SWPKT_SAR_EN | \ -- 1.7.5.4 From florian@openwrt.org Fri Dec 9 20:01:54 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 09 Dec 2011 20:02:22 +0100 (CET) Received: from zmc.proxad.net ([212.27.53.206]:59803 "EHLO zmc.proxad.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903738Ab1LITBy (ORCPT ); Fri, 9 Dec 2011 20:01:54 +0100 Received: from localhost (localhost [127.0.0.1]) by zmc.proxad.net (Postfix) with ESMTP id 2527D360DCA; Fri, 9 Dec 2011 20:01:54 +0100 (CET) X-Virus-Scanned: amavisd-new at Received: from zmc.proxad.net ([127.0.0.1]) by localhost (zmc.proxad.net [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id chRBsQK6THr4; Fri, 9 Dec 2011 20:01:53 +0100 (CET) Received: from flexo.iliad.local (freebox.vlq16.iliad.fr [213.36.7.13]) by zmc.proxad.net (Postfix) with ESMTPSA id C0ED138FEB9; Fri, 9 Dec 2011 20:01:53 +0100 (CET) From: Florian Fainelli To: Matt Mackall Cc: Herbert Xu , ralf@linux-mips.org, linux-mips@linux-mips.org, Florian Fainelli Subject: [PATCH 3/5] MIPS: BCM63XX: add TRNG peripheral definitions Date: Fri, 9 Dec 2011 20:01:08 +0100 Message-Id: <1323457270-16330-4-git-send-email-florian@openwrt.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1323457270-16330-1-git-send-email-florian@openwrt.org> References: <1323457270-16330-1-git-send-email-florian@openwrt.org> X-archive-position: 32071 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7986 Content-Length: 3620 Lines: 107 Signed-off-by: Florian Fainelli --- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 9 +++++++++ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 13 +++++++++++++ 2 files changed, 22 insertions(+), 0 deletions(-) diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h index 5b8d15b..f0ab172 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h @@ -130,6 +130,7 @@ enum bcm63xx_regs_set { RSET_PCMDMA, RSET_PCMDMAC, RSET_PCMDMAS, + RSET_TRNG }; #define RSET_DSL_LMEM_SIZE (64 * 1024 * 4) @@ -149,6 +150,7 @@ enum bcm63xx_regs_set { #define RSET_XTMDMA_SIZE 256 #define RSET_XTMDMAC_SIZE(chans) (16 * (chans)) #define RSET_XTMDMAS_SIZE(chans) (16 * (chans)) +#define RSET_TRNG_SIZE 20 /* * 6338 register sets base address @@ -193,6 +195,7 @@ enum bcm63xx_regs_set { #define BCM_6338_PCMDMA_BASE (0xdeadbeef) #define BCM_6338_PCMDMAC_BASE (0xdeadbeef) #define BCM_6338_PCMDMAS_BASE (0xdeadbeef) +#define BCM_6338_TRNG_BASE (0xdeadbeef) /* * 6345 register sets base address @@ -237,6 +240,7 @@ enum bcm63xx_regs_set { #define BCM_6345_PCMDMA_BASE (0xdeadbeef) #define BCM_6345_PCMDMAC_BASE (0xdeadbeef) #define BCM_6345_PCMDMAS_BASE (0xdeadbeef) +#define BCM_6345_TRNG_BASE (0xdeadbeef) /* * 6348 register sets base address @@ -278,6 +282,7 @@ enum bcm63xx_regs_set { #define BCM_6348_PCMDMA_BASE (0xdeadbeef) #define BCM_6348_PCMDMAC_BASE (0xdeadbeef) #define BCM_6348_PCMDMAS_BASE (0xdeadbeef) +#define BCM_6348_TRNG_BASE (0xdeadbeef) /* * 6358 register sets base address @@ -319,6 +324,7 @@ enum bcm63xx_regs_set { #define BCM_6358_PCMDMA_BASE (0xfffe1800) #define BCM_6358_PCMDMAC_BASE (0xfffe1900) #define BCM_6358_PCMDMAS_BASE (0xfffe1a00) +#define BCM_6358_TRNG_BASE (0xdeadbeef) /* @@ -361,6 +367,7 @@ enum bcm63xx_regs_set { #define BCM_6368_PCMDMA_BASE (0xb0005800) #define BCM_6368_PCMDMAC_BASE (0xb0005a00) #define BCM_6368_PCMDMAS_BASE (0xb0005c00) +#define BCM_6368_TRNG_BASE (0xb0004180) extern const unsigned long *bcm63xx_regs_base; @@ -407,6 +414,7 @@ extern const unsigned long *bcm63xx_regs_base; __GEN_RSET_BASE(__cpu, PCMDMA) \ __GEN_RSET_BASE(__cpu, PCMDMAC) \ __GEN_RSET_BASE(__cpu, PCMDMAS) \ + __GEN_RSET_BASE(__cpu, TRNG) \ } #define __GEN_CPU_REGS_TABLE(__cpu) \ @@ -446,6 +454,7 @@ extern const unsigned long *bcm63xx_regs_base; [RSET_PCMDMA] = BCM_## __cpu ##_PCMDMA_BASE, \ [RSET_PCMDMAC] = BCM_## __cpu ##_PCMDMAC_BASE, \ [RSET_PCMDMAS] = BCM_## __cpu ##_PCMDMAS_BASE, \ + [RSET_TRNG] = BCM_## __cpu ##_TRNG_BASE, \ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set) diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h index fdcd78c..0de0bd9 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h @@ -973,4 +973,17 @@ #define M2M_SRCID_REG(x) ((x) * 0x40 + 0x14) #define M2M_DSTID_REG(x) ((x) * 0x40 + 0x18) +/************************************************************************* + * _REG relative to RSET_TRNG + *************************************************************************/ +#define TRNG_CTRL 0x00 +#define TRNG_EN (1 << 0) + +#define TRNG_STAT 0x04 +#define TRNG_AVAIL_MASK (0xff000000) + +#define TRNG_DATA 0x08 +#define TRNG_THRES 0x0c +#define TRNG_MASK 0x10 + #endif /* BCM63XX_REGS_H_ */ -- 1.7.5.4 From florian@openwrt.org Fri Dec 9 20:01:54 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 09 Dec 2011 20:02:51 +0100 (CET) Received: from zmc.proxad.net ([212.27.53.206]:59807 "EHLO zmc.proxad.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903742Ab1LITBy (ORCPT ); Fri, 9 Dec 2011 20:01:54 +0100 Received: from localhost (localhost [127.0.0.1]) by zmc.proxad.net (Postfix) with ESMTP id 48D513616BD; Fri, 9 Dec 2011 20:01:54 +0100 (CET) X-Virus-Scanned: amavisd-new at Received: from zmc.proxad.net ([127.0.0.1]) by localhost (zmc.proxad.net [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qgemnSX-G33b; Fri, 9 Dec 2011 20:01:53 +0100 (CET) Received: from flexo.iliad.local (freebox.vlq16.iliad.fr [213.36.7.13]) by zmc.proxad.net (Postfix) with ESMTPSA id D03BD39884E; Fri, 9 Dec 2011 20:01:53 +0100 (CET) From: Florian Fainelli To: Matt Mackall Cc: Herbert Xu , ralf@linux-mips.org, linux-mips@linux-mips.org, Florian Fainelli Subject: [PATCH 4/5] MIPS: BCM63XX: add RNG driver platform_device stub Date: Fri, 9 Dec 2011 20:01:09 +0100 Message-Id: <1323457270-16330-5-git-send-email-florian@openwrt.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1323457270-16330-1-git-send-email-florian@openwrt.org> References: <1323457270-16330-1-git-send-email-florian@openwrt.org> X-archive-position: 32072 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7987 Content-Length: 1995 Lines: 68 Signed-off-by: Florian Fainelli --- arch/mips/bcm63xx/Makefile | 3 ++- arch/mips/bcm63xx/dev-trng.c | 40 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+), 1 deletions(-) create mode 100644 arch/mips/bcm63xx/dev-trng.c diff --git a/arch/mips/bcm63xx/Makefile b/arch/mips/bcm63xx/Makefile index 6dfdc69..95c45b5 100644 --- a/arch/mips/bcm63xx/Makefile +++ b/arch/mips/bcm63xx/Makefile @@ -1,5 +1,6 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \ - dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o + dev-dsp.o dev-enet.o dev-pcmcia.o dev-trng.o dev-uart.o \ + dev-wdt.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += boards/ diff --git a/arch/mips/bcm63xx/dev-trng.c b/arch/mips/bcm63xx/dev-trng.c new file mode 100644 index 0000000..19ccfbf --- /dev/null +++ b/arch/mips/bcm63xx/dev-trng.c @@ -0,0 +1,40 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2011 Florian Fainelli + */ + +#include +#include +#include +#include + +static struct resource trng_resources[] = { + { + .start = -1, /* filled at runtime */ + .end = -1, /* filled at runtime */ + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device bcm63xx_trng_device = { + .name = "bcm63xx-trng", + .id = 0, + .num_resources = ARRAY_SIZE(trng_resources), + .resource = trng_resources, +}; + +int __init bcm63xx_trng_register(void) +{ + if (!BCMCPU_IS_6368()) + return -ENODEV; + + trng_resources[0].start = bcm63xx_regset_address(RSET_TRNG); + trng_resources[0].end = trng_resources[0].start; + trng_resources[0].end += RSET_TRNG_SIZE - 1; + + return platform_device_register(&bcm63xx_trng_device); +} +arch_initcall(bcm63xx_trng_register); -- 1.7.5.4 From florian@openwrt.org Fri Dec 9 20:01:54 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 09 Dec 2011 20:03:18 +0100 (CET) Received: from zmc.proxad.net ([212.27.53.206]:59800 "EHLO zmc.proxad.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903741Ab1LITBy (ORCPT ); Fri, 9 Dec 2011 20:01:54 +0100 Received: from localhost (localhost [127.0.0.1]) by zmc.proxad.net (Postfix) with ESMTP id 2C7AE38F867; Fri, 9 Dec 2011 20:01:54 +0100 (CET) X-Virus-Scanned: amavisd-new at Received: from zmc.proxad.net ([127.0.0.1]) by localhost (zmc.proxad.net [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id akVCdUtynodv; Fri, 9 Dec 2011 20:01:53 +0100 (CET) Received: from flexo.iliad.local (freebox.vlq16.iliad.fr [213.36.7.13]) by zmc.proxad.net (Postfix) with ESMTPSA id BD7893616BD; Fri, 9 Dec 2011 20:01:53 +0100 (CET) From: Florian Fainelli To: Matt Mackall Cc: Herbert Xu , ralf@linux-mips.org, linux-mips@linux-mips.org, Florian Fainelli Subject: [PATCH 2/5] MIPS: BCM63XX: add support for "ipsec" clock Date: Fri, 9 Dec 2011 20:01:07 +0100 Message-Id: <1323457270-16330-3-git-send-email-florian@openwrt.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1323457270-16330-1-git-send-email-florian@openwrt.org> References: <1323457270-16330-1-git-send-email-florian@openwrt.org> X-archive-position: 32073 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7988 Content-Length: 1007 Lines: 43 This module is only available on BCM6368 so far and does not require resetting the block. Signed-off-by: Florian Fainelli --- arch/mips/bcm63xx/clk.c | 14 ++++++++++++++ 1 files changed, 14 insertions(+), 0 deletions(-) diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c index 9d57c71..28137d5 100644 --- a/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c @@ -222,6 +222,18 @@ static struct clk clk_xtm = { }; /* + * IPsec clock + */ +static void ipsec_set(struct clk *clk, int enable) +{ + bcm_hwclock_set(CKCTL_6368_IPSEC_CLK_EN, enable); +} + +static struct clk clk_ipsec = { + .set = ipsec_set, +}; + +/* * Internal peripheral clock */ static struct clk clk_periph = { @@ -278,6 +290,8 @@ struct clk *clk_get(struct device *dev, const char *id) return &clk_periph; if (BCMCPU_IS_6358() && !strcmp(id, "pcm")) return &clk_pcm; + if (BCMCPU_IS_6368() && !strcmp(id, "ipsec")) + return &clk_ipsec; return ERR_PTR(-ENOENT); } -- 1.7.5.4 From florian@openwrt.org Fri Dec 9 20:01:54 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 09 Dec 2011 20:03:42 +0100 (CET) Received: from zmc.proxad.net ([212.27.53.206]:59804 "EHLO zmc.proxad.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903740Ab1LITBy (ORCPT ); Fri, 9 Dec 2011 20:01:54 +0100 Received: from localhost (localhost [127.0.0.1]) by zmc.proxad.net (Postfix) with ESMTP id 0B660398898; Fri, 9 Dec 2011 20:01:54 +0100 (CET) X-Virus-Scanned: amavisd-new at Received: from zmc.proxad.net ([127.0.0.1]) by localhost (zmc.proxad.net [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 4WlsFwIdJoUM; Fri, 9 Dec 2011 20:01:53 +0100 (CET) Received: from flexo.iliad.local (freebox.vlq16.iliad.fr [213.36.7.13]) by zmc.proxad.net (Postfix) with ESMTPSA id A9DA035E2DB; Fri, 9 Dec 2011 20:01:53 +0100 (CET) From: Florian Fainelli To: Matt Mackall Cc: Herbert Xu , ralf@linux-mips.org, linux-mips@linux-mips.org, Florian Fainelli Subject: [PATCH 0/5] Broadcom BCM63xx RNG support Date: Fri, 9 Dec 2011 20:01:05 +0100 Message-Id: <1323457270-16330-1-git-send-email-florian@openwrt.org> X-Mailer: git-send-email 1.7.5.4 X-archive-position: 32074 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7990 Content-Length: 1115 Lines: 29 The following patch serie adds support for the Broadcom BCM63xx RNG block. Since it depends on some MIPS bits, it might be easier to merge it via the MIPS tree. Thanks! Florian Fainelli (5): MIPS: BCM63XX: fix BCM6368 IPSec clock bit MIPS: BCM63XX: add support for "ipsec" clock MIPS: BCM63XX: add TRNG peripheral definitions MIPS: BCM63XX: add RNG driver platform_device stub hw_random: add Broadcom BCM63xx RNG driver arch/mips/bcm63xx/Makefile | 3 +- arch/mips/bcm63xx/clk.c | 14 ++ arch/mips/bcm63xx/dev-trng.c | 40 +++++ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 9 + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 15 ++- drivers/char/hw_random/Kconfig | 14 ++ drivers/char/hw_random/Makefile | 1 + drivers/char/hw_random/bcm63xx-rng.c | 175 +++++++++++++++++++++ 8 files changed, 269 insertions(+), 2 deletions(-) create mode 100644 arch/mips/bcm63xx/dev-trng.c create mode 100644 drivers/char/hw_random/bcm63xx-rng.c -- 1.7.5.4 From florian@openwrt.org Fri Dec 9 20:01:55 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 09 Dec 2011 20:04:06 +0100 (CET) Received: from zmc.proxad.net ([212.27.53.206]:59820 "EHLO zmc.proxad.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903743Ab1LITBz (ORCPT ); Fri, 9 Dec 2011 20:01:55 +0100 Received: from localhost (localhost [127.0.0.1]) by zmc.proxad.net (Postfix) with ESMTP id 66E3738FEB9; Fri, 9 Dec 2011 20:01:54 +0100 (CET) X-Virus-Scanned: amavisd-new at Received: from zmc.proxad.net ([127.0.0.1]) by localhost (zmc.proxad.net [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 5uLGWDiu4hub; Fri, 9 Dec 2011 20:01:54 +0100 (CET) Received: from flexo.iliad.local (freebox.vlq16.iliad.fr [213.36.7.13]) by zmc.proxad.net (Postfix) with ESMTPSA id D55CD398038; Fri, 9 Dec 2011 20:01:53 +0100 (CET) From: Florian Fainelli To: Matt Mackall Cc: Herbert Xu , ralf@linux-mips.org, linux-mips@linux-mips.org, Florian Fainelli Subject: [PATCH 5/5] hw_random: add Broadcom BCM63xx RNG driver Date: Fri, 9 Dec 2011 20:01:10 +0100 Message-Id: <1323457270-16330-6-git-send-email-florian@openwrt.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1323457270-16330-1-git-send-email-florian@openwrt.org> References: <1323457270-16330-1-git-send-email-florian@openwrt.org> X-archive-position: 32075 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7991 Content-Length: 5883 Lines: 229 Signed-off-by: Florian Fainelli --- drivers/char/hw_random/Kconfig | 14 +++ drivers/char/hw_random/Makefile | 1 + drivers/char/hw_random/bcm63xx-rng.c | 175 ++++++++++++++++++++++++++++++++++ 3 files changed, 190 insertions(+), 0 deletions(-) create mode 100644 drivers/char/hw_random/bcm63xx-rng.c diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig index 0689bf6..f29d1bc 100644 --- a/drivers/char/hw_random/Kconfig +++ b/drivers/char/hw_random/Kconfig @@ -73,6 +73,20 @@ config HW_RANDOM_ATMEL If unsure, say Y. +config HW_RANDOM_BCM63XX + tristate "Broadcom BCM63xx Random Number Generator support" + depends on HW_RANDOM && BCM63XX + default HW_RANDOM + ---help--- + This driver provides kernel-side support for the Random Number + Generator hardware found on the Broadcom BCM63xx SoCs. + + To compile this driver as a module, choose M here: the + module will be called bcm63xx-rng + + If unusure, say Y. + + config HW_RANDOM_GEODE tristate "AMD Geode HW Random Number Generator support" depends on HW_RANDOM && X86_32 && PCI diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile index b2ff526..8cfac60 100644 --- a/drivers/char/hw_random/Makefile +++ b/drivers/char/hw_random/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o obj-$(CONFIG_HW_RANDOM_ATMEL) += atmel-rng.o +obj-$(CONFIG_HW_RANDOM_BCM63XX) += bcm63xx-rng.o obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o obj-$(CONFIG_HW_RANDOM_N2RNG) += n2-rng.o n2-rng-y := n2-drv.o n2-asm.o diff --git a/drivers/char/hw_random/bcm63xx-rng.c b/drivers/char/hw_random/bcm63xx-rng.c new file mode 100644 index 0000000..80e282d --- /dev/null +++ b/drivers/char/hw_random/bcm63xx-rng.c @@ -0,0 +1,175 @@ +/* + * Broadcom BCM63xx Random Number Generator support + * + * Copyright (C) 2011, Florian Fainelli + * Copyright (C) 2009, Broadcom Corporation + * + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +struct bcm63xx_trng_priv { + struct clk *clk; + void __iomem *regs; +}; + +#define to_trng_priv(rng) ((struct bcm63xx_trng_priv *)rng->priv) + +static int bcm63xx_trng_init(struct hwrng *rng) +{ + struct bcm63xx_trng_priv *priv = to_trng_priv(rng); + u32 val; + + val = bcm_readl(priv->regs + TRNG_CTRL); + val |= TRNG_EN; + bcm_writel(val, priv->regs + TRNG_CTRL); + + return 0; +} + +static void bcm63xx_trng_cleanup(struct hwrng *rng) +{ + struct bcm63xx_trng_priv *priv = to_trng_priv(rng); + u32 val; + + val = bcm_readl(priv->regs + TRNG_CTRL); + val &= ~TRNG_EN; + bcm_writel(val, priv->regs + TRNG_CTRL); +} + +static int bcm63xx_trng_data_present(struct hwrng *rng, int wait) +{ + struct bcm63xx_trng_priv *priv = to_trng_priv(rng); + + return bcm_readl(priv->regs + TRNG_STAT) & TRNG_AVAIL_MASK; +} + +static int bcm63xx_trng_data_read(struct hwrng *rng, u32 *data) +{ + struct bcm63xx_trng_priv *priv = to_trng_priv(rng); + + *data = bcm_readl(priv->regs + TRNG_DATA); + + return 4; +} + +static int __init bcm63xx_trng_probe(struct platform_device *pdev) +{ + struct resource *r; + struct clk *clk; + int ret; + struct bcm63xx_trng_priv *priv; + struct hwrng *rng; + + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r) { + dev_err(&pdev->dev, "no iomem resource\n"); + ret = -ENXIO; + goto out; + } + + priv = kzalloc(sizeof(*priv), GFP_KERNEL); + if (!priv) { + dev_err(&pdev->dev, "no memory for private structure\n"); + ret = -ENOMEM; + goto out; + } + + rng = kzalloc(sizeof(*rng), GFP_KERNEL); + if (!rng) { + dev_err(&pdev->dev, "no memory for rng structure\n"); + ret = -ENOMEM; + goto out_free_priv; + } + + platform_set_drvdata(pdev, rng); + rng->priv = (unsigned long)priv; + rng->name = pdev->name; + rng->init = bcm63xx_trng_init; + rng->cleanup = bcm63xx_trng_cleanup; + rng->data_present = bcm63xx_trng_data_present; + rng->data_read = bcm63xx_trng_data_read; + + clk = clk_get(&pdev->dev, "ipsec"); + if (IS_ERR(clk)) { + dev_err(&pdev->dev, "no clock for device\n"); + ret = PTR_ERR(clk); + goto out_free_rng; + } + + priv->clk = clk; + + if (!devm_request_mem_region(&pdev->dev, r->start, + resource_size(r), pdev->name)) { + dev_err(&pdev->dev, "request mem failed"); + ret = -ENOMEM; + goto out_free_rng; + } + + priv->regs = devm_ioremap_nocache(&pdev->dev, r->start, + resource_size(r)); + if (!priv->regs) { + dev_err(&pdev->dev, "ioremap failed"); + ret = -ENOMEM; + goto out_free_rng; + } + + clk_enable(clk); + + ret = hwrng_register(rng); + if (ret) { + dev_err(&pdev->dev, "failed to register rng device\n"); + goto out_clk_disable; + } + + dev_info(&pdev->dev, "registered RNG driver\n"); + + return 0; + +out_clk_disable: + clk_disable(clk); +out_free_rng: + platform_set_drvdata(pdev, NULL); + kfree(rng); +out_free_priv: + kfree(priv); +out: + return ret; +} + +static int __devexit bcm63xx_trng_remove(struct platform_device *pdev) +{ + struct hwrng *rng = platform_get_drvdata(pdev); + struct bcm63xx_trng_priv *priv = to_trng_priv(rng); + + hwrng_unregister(rng); + clk_disable(priv->clk); + kfree(priv); + kfree(rng); + platform_set_drvdata(pdev, NULL); + + return 0; +} + +static struct platform_driver bcm63xx_trng_driver = { + .probe = bcm63xx_trng_probe, + .remove = __devexit_p(bcm63xx_trng_remove), + .driver = { + .name = "bcm63xx-trng", + .owner = THIS_MODULE, + }, +}; + +module_platform_driver(bcm63xx_trng_driver); + +MODULE_AUTHOR("Florian Fainelli "); +MODULE_DESCRIPTION("Broadcom BCM63xx RNG driver"); +MODULE_LICENSE("GPL"); -- 1.7.5.4 From cmetcalf@tilera.com Fri Dec 9 20:03:45 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 09 Dec 2011 20:04:40 +0100 (CET) Received: from 206.83.70.73.ptr.us.xo.net ([206.83.70.73]:40121 "EHLO king.tilera.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903747Ab1LITDp (ORCPT ); Fri, 9 Dec 2011 20:03:45 +0100 Received: from farm-0002.internal.tilera.com ([10.2.0.32]) by king.tilera.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Fri, 9 Dec 2011 14:03:37 -0500 Received: (from cmetcalf@localhost) by farm-0002.internal.tilera.com (8.13.8/8.12.11/Submit) id pB9J39pd031553; Fri, 9 Dec 2011 14:03:09 -0500 Message-Id: <201112091903.pB9J39pd031553@farm-0002.internal.tilera.com> From: Chris Metcalf Date: Fri, 9 Dec 2011 10:29:07 -0500 Subject: [PATCH v2] ipc: provide generic compat versions of IPC syscalls References: <201112091536.pB9Fa5f7002738@farm-0002.internal.tilera.com>, <201112091602.31325.arnd@arndb.de> In-Reply-To: <201112091602.31325.arnd@arndb.de> To: Arnd Bergmann , Ralf Baechle , Benjamin Herrenschmidt , Paul Mackerras , Martin Schwidefsky , Heiko Carstens , linux390@de.ibm.com, "David S. Miller" , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, "Eric W. Biederman" , Christoph Hellwig , Lucas De Marchi , Dmitry Torokhov , Andrew Morton , "J. Bruce Fields" , NeilBrown , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org X-OriginalArrivalTime: 09 Dec 2011 19:03:37.0663 (UTC) FILETIME=[41CBB4F0:01CCB6A5] X-archive-position: 32076 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: cmetcalf@tilera.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 7992 Content-Length: 12699 Lines: 386 When using the "compat" APIs, architectures will generally want to be able to make direct syscalls to msgsnd(), shmctl(), etc., and in the kernel we would want them to be handled directly by compat_sys_xxx() functions, as is true for other compat syscalls. However, for historical reasons, several of the existing compat IPC syscalls do not do this. semctl() expects a pointer to the fourth argument, instead of the fourth argument itself. msgsnd(), msgrcv() and shmat() expect arguments in different order. This change adds an __ARCH_WANT_OLD_COMPAT_IPC define that can be set in to preserve this behavior for ports that use it (x86, sparc, powerpc, s390, and mips). No actual semantics are changed for those architectures, and there is only a minimal amount of code refactoring in ipc/compat.c. Newer architectures like tile (and perhaps future architectures such as arm64 and unicore64) should not supply this define, and thus can avoid having any IPC-specific code at all in their architecture-specific compat layer. In the same vein, if this define is omitted, IPC_64 mode is assumed, since that's what the headers expect. The workaround code in "tile" for msgsnd() and msgrcv() is removed with this change; it also fixes the bug that shmat() and semctl() were not being properly handled. Signed-off-by: Chris Metcalf --- The first version used an "__ARCH_WANT_GENERIC_COMPAT_IPC" define that was set by tile, and presumably would be set by all future architectures. Arnd Bergmann observed: > I like the patch, but I think the __ARCH_WANT_GENERIC_COMPAT_IPC > should be defined as the opposite, so all "old" architectures > have to set it while tile (and future architectures like arm64 > and unicore64) just get the default. [...] > We have powerpc, mips, s390, sparc and > x86 using the legacy method, while only parisc and tile get it right > and use the syscalls directly. arch/mips/include/asm/compat.h | 3 ++ arch/powerpc/include/asm/compat.h | 3 ++ arch/s390/include/asm/compat.h | 3 ++ arch/sparc/include/asm/compat.h | 3 ++ arch/tile/include/asm/compat.h | 11 ------ arch/tile/kernel/compat.c | 43 ---------------------- arch/x86/include/asm/compat.h | 3 ++ include/linux/compat.h | 12 ++++++- ipc/compat.c | 70 +++++++++++++++++++++++++++++++++--- 9 files changed, 90 insertions(+), 61 deletions(-) diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h index b77df03..41a57cb 100644 --- a/arch/mips/include/asm/compat.h +++ b/arch/mips/include/asm/compat.h @@ -8,6 +8,9 @@ #include #include +/* Use different 32-bit syscall convention than 64-bit for some syscalls. */ +#define __ARCH_WANT_OLD_COMPAT_IPC + #define COMPAT_USER_HZ 100 #define COMPAT_UTS_MACHINE "mips\0\0\0" diff --git a/arch/powerpc/include/asm/compat.h b/arch/powerpc/include/asm/compat.h index 88e602f..450a976 100644 --- a/arch/powerpc/include/asm/compat.h +++ b/arch/powerpc/include/asm/compat.h @@ -7,6 +7,9 @@ #include #include +/* Use different 32-bit syscall convention than 64-bit for some syscalls. */ +#define __ARCH_WANT_OLD_COMPAT_IPC + #define COMPAT_USER_HZ 100 #define COMPAT_UTS_MACHINE "ppc\0\0" diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h index 2e49748..9a38bae 100644 --- a/arch/s390/include/asm/compat.h +++ b/arch/s390/include/asm/compat.h @@ -7,6 +7,9 @@ #include #include +/* Use different 32-bit syscall convention than 64-bit for some syscalls. */ +#define __ARCH_WANT_OLD_COMPAT_IPC + #define PSW32_MASK_PER 0x40000000UL #define PSW32_MASK_DAT 0x04000000UL #define PSW32_MASK_IO 0x02000000UL diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h index b8be20d..bfd3d8b 100644 --- a/arch/sparc/include/asm/compat.h +++ b/arch/sparc/include/asm/compat.h @@ -5,6 +5,9 @@ */ #include +/* Use different 32-bit syscall convention than 64-bit for some syscalls. */ +#define __ARCH_WANT_OLD_COMPAT_IPC + #define COMPAT_USER_HZ 100 #define COMPAT_UTS_MACHINE "sparc\0\0" diff --git a/arch/tile/include/asm/compat.h b/arch/tile/include/asm/compat.h index bf95f55..4b4b289 100644 --- a/arch/tile/include/asm/compat.h +++ b/arch/tile/include/asm/compat.h @@ -242,17 +242,6 @@ long compat_sys_fallocate(int fd, int mode, long compat_sys_sched_rr_get_interval(compat_pid_t pid, struct compat_timespec __user *interval); -/* Versions of compat functions that differ from generic Linux. */ -struct compat_msgbuf; -long tile_compat_sys_msgsnd(int msqid, - struct compat_msgbuf __user *msgp, - size_t msgsz, int msgflg); -long tile_compat_sys_msgrcv(int msqid, - struct compat_msgbuf __user *msgp, - size_t msgsz, long msgtyp, int msgflg); -long tile_compat_sys_ptrace(compat_long_t request, compat_long_t pid, - compat_long_t addr, compat_long_t data); - /* Tilera Linux syscalls that don't have "compat" versions. */ #define compat_sys_flush_cache sys_flush_cache diff --git a/arch/tile/kernel/compat.c b/arch/tile/kernel/compat.c index bf5e9d7..d67459b 100644 --- a/arch/tile/kernel/compat.c +++ b/arch/tile/kernel/compat.c @@ -16,7 +16,6 @@ #define __SYSCALL_COMPAT #include -#include #include #include #include @@ -95,52 +94,10 @@ long compat_sys_sched_rr_get_interval(compat_pid_t pid, return ret; } -/* - * The usual compat_sys_msgsnd() and _msgrcv() seem to be assuming - * some different calling convention than our normal 32-bit tile code. - */ - -/* Already defined in ipc/compat.c, but we need it here. */ -struct compat_msgbuf { - compat_long_t mtype; - char mtext[1]; -}; - -long tile_compat_sys_msgsnd(int msqid, - struct compat_msgbuf __user *msgp, - size_t msgsz, int msgflg) -{ - compat_long_t mtype; - - if (get_user(mtype, &msgp->mtype)) - return -EFAULT; - return do_msgsnd(msqid, mtype, msgp->mtext, msgsz, msgflg); -} - -long tile_compat_sys_msgrcv(int msqid, - struct compat_msgbuf __user *msgp, - size_t msgsz, long msgtyp, int msgflg) -{ - long err, mtype; - - err = do_msgrcv(msqid, &mtype, msgp->mtext, msgsz, msgtyp, msgflg); - if (err < 0) - goto out; - - if (put_user(mtype, &msgp->mtype)) - err = -EFAULT; - out: - return err; -} - /* Provide the compat syscall number to call mapping. */ #undef __SYSCALL #define __SYSCALL(nr, call) [nr] = (call), -/* The generic versions of these don't work for Tile. */ -#define compat_sys_msgrcv tile_compat_sys_msgrcv -#define compat_sys_msgsnd tile_compat_sys_msgsnd - /* See comments in sys.c */ #define compat_sys_fadvise64_64 sys32_fadvise64_64 #define compat_sys_readahead sys32_readahead diff --git a/arch/x86/include/asm/compat.h b/arch/x86/include/asm/compat.h index 30d737e..a72cbe4 100644 --- a/arch/x86/include/asm/compat.h +++ b/arch/x86/include/asm/compat.h @@ -8,6 +8,9 @@ #include #include +/* Use different 32-bit syscall convention than 64-bit for some syscalls. */ +#define __ARCH_WANT_OLD_COMPAT_IPC + #define COMPAT_USER_HZ 100 #define COMPAT_UTS_MACHINE "i686\0\0" diff --git a/include/linux/compat.h b/include/linux/compat.h index 66ed067..472e66c 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -224,6 +224,7 @@ struct compat_sysinfo; struct compat_sysctl_args; struct compat_kexec_segment; struct compat_mq_attr; +struct compat_msgbuf; extern void compat_exit_robust_list(struct task_struct *curr); @@ -234,13 +235,22 @@ asmlinkage long compat_sys_get_robust_list(int pid, compat_uptr_t __user *head_ptr, compat_size_t __user *len_ptr); +#ifdef __ARCH_WANT_OLD_COMPAT_IPC long compat_sys_semctl(int first, int second, int third, void __user *uptr); long compat_sys_msgsnd(int first, int second, int third, void __user *uptr); long compat_sys_msgrcv(int first, int second, int msgtyp, int third, int version, void __user *uptr); -long compat_sys_msgctl(int first, int second, void __user *uptr); long compat_sys_shmat(int first, int second, compat_uptr_t third, int version, void __user *uptr); +#else +long compat_sys_semctl(int semid, int semnum, int cmd, int arg); +long compat_sys_msgsnd(int msqid, struct compat_msgbuf __user *msgp, + size_t msgsz, int msgflg); +long compat_sys_msgrcv(int msqid, struct compat_msgbuf __user *msgp, + size_t msgsz, long msgtyp, int msgflg); +long compat_sys_shmat(int shmid, compat_uptr_t shmaddr, int shmflg); +#endif +long compat_sys_msgctl(int first, int second, void __user *uptr); long compat_sys_shmctl(int first, int second, void __user *uptr); long compat_sys_semtimedop(int semid, struct sembuf __user *tsems, unsigned nsems, const struct compat_timespec __user *timeout); diff --git a/ipc/compat.c b/ipc/compat.c index 845a287..94ee136 100644 --- a/ipc/compat.c +++ b/ipc/compat.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include @@ -117,6 +118,7 @@ extern int sem_ctls[]; static inline int compat_ipc_parse_version(int *cmd) { +#ifdef __ARCH_WANT_OLD_COMPAT_IPC int version = *cmd & IPC_64; /* this is tricky: architectures that have support for the old @@ -128,6 +130,10 @@ static inline int compat_ipc_parse_version(int *cmd) *cmd &= ~IPC_64; #endif return version; +#else + /* With the asm-generic APIs, we always use the 64-bit versions. */ + return IPC_64; +#endif } static inline int __get_compat_ipc64_perm(struct ipc64_perm *p64, @@ -232,10 +238,9 @@ static inline int put_compat_semid_ds(struct semid64_ds *s, return err; } -long compat_sys_semctl(int first, int second, int third, void __user *uptr) +static long do_compat_semctl(int first, int second, int third, u32 pad) { union semun fourth; - u32 pad; int err, err2; struct semid64_ds s64; struct semid64_ds __user *up64; @@ -243,10 +248,6 @@ long compat_sys_semctl(int first, int second, int third, void __user *uptr) memset(&s64, 0, sizeof(s64)); - if (!uptr) - return -EINVAL; - if (get_user(pad, (u32 __user *) uptr)) - return -EFAULT; if ((third & (~IPC_64)) == SETVAL) fourth.val = (int) pad; else @@ -305,6 +306,18 @@ long compat_sys_semctl(int first, int second, int third, void __user *uptr) return err; } +#ifdef __ARCH_WANT_OLD_COMPAT_IPC +long compat_sys_semctl(int first, int second, int third, void __user *uptr) +{ + u32 pad; + + if (!uptr) + return -EINVAL; + if (get_user(pad, (u32 __user *) uptr)) + return -EFAULT; + return do_compat_semctl(first, second, third, pad); +} + long compat_sys_msgsnd(int first, int second, int third, void __user *uptr) { struct compat_msgbuf __user *up = uptr; @@ -353,6 +366,37 @@ long compat_sys_msgrcv(int first, int second, int msgtyp, int third, out: return err; } +#else +long compat_sys_semctl(int semid, int semnum, int cmd, int arg) +{ + return do_compat_semctl(semid, semnum, cmd, arg); +} + +long compat_sys_msgsnd(int msqid, struct compat_msgbuf __user *msgp, + size_t msgsz, int msgflg) +{ + compat_long_t mtype; + + if (get_user(mtype, &msgp->mtype)) + return -EFAULT; + return do_msgsnd(msqid, mtype, msgp->mtext, msgsz, msgflg); +} + +long compat_sys_msgrcv(int msqid, struct compat_msgbuf __user *msgp, + size_t msgsz, long msgtyp, int msgflg) +{ + long err, mtype; + + err = do_msgrcv(msqid, &mtype, msgp->mtext, msgsz, msgtyp, msgflg); + if (err < 0) + goto out; + + if (put_user(mtype, &msgp->mtype)) + err = -EFAULT; + out: + return err; +} +#endif static inline int get_compat_msqid64(struct msqid64_ds *m64, struct compat_msqid64_ds __user *up64) @@ -470,6 +514,7 @@ long compat_sys_msgctl(int first, int second, void __user *uptr) return err; } +#ifdef __ARCH_WANT_OLD_COMPAT_IPC long compat_sys_shmat(int first, int second, compat_uptr_t third, int version, void __user *uptr) { @@ -485,6 +530,19 @@ long compat_sys_shmat(int first, int second, compat_uptr_t third, int version, uaddr = compat_ptr(third); return put_user(raddr, uaddr); } +#else +long compat_sys_shmat(int shmid, compat_uptr_t shmaddr, int shmflg) +{ + unsigned long ret; + long err; + + err = do_shmat(shmid, compat_ptr(shmaddr), shmflg, &ret); + if (err) + return err; + force_successful_syscall_return(); + return (long)ret; +} +#endif static inline int get_compat_shmid64_ds(struct shmid64_ds *s64, struct compat_shmid64_ds __user *up64) -- 1.6.5.2 From david.daney@cavium.com Fri Dec 9 21:31:17 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 09 Dec 2011 21:31:23 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:19976 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903739Ab1LIUbR (ORCPT ); Fri, 9 Dec 2011 21:31:17 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Fri, 09 Dec 2011 12:32:44 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Fri, 9 Dec 2011 12:31:15 -0800 Received: from dd1.caveonetworks.com ([64.2.3.195]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Fri, 9 Dec 2011 12:31:14 -0800 Message-ID: <4EE27012.5030508@cavium.com> Date: Fri, 09 Dec 2011 12:31:14 -0800 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: binutils , Richard Sandiford , Alan Modra CC: Manuel Lauss , Debian MIPS , linux-mips Subject: [Patch v2]: Fix ld pr11138 FAILures on mips*. Content-Type: multipart/mixed; boundary="------------080002030204050901050102" X-OriginalArrivalTime: 09 Dec 2011 20:31:14.0976 (UTC) FILETIME=[7F660200:01CCB6B1] X-archive-position: 32077 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: david.daney@cavium.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8059 Content-Length: 6837 Lines: 186 This is a multi-part message in MIME format. --------------080002030204050901050102 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit As noted in from the first attempt at fixing this: The pr11138 testcase links an executable with a version script. On mips64-linux the presence of a version script was causing the MIPS_RLD_MAP dynamic tag to be populated with a NULL value. When such an executable was run ld.so would try to dereference this and receive SIGSEGV, thus killing the process. The root cause of this is that the mips linker synthesizes a special symbol "__RLD_MAP", and then sets MIPS_RLD_MAP to point to it. When a version script is present, this symbol gets versioned along with all the rest, and when it is time to take its address, the symbol can no longer be found as it has had version information appended to its name. ... This problem has also been reported in the wild when linking the firefox executable. This new patch, at Richard's suggestion, remembers the __RLD_MAP (which also goes by several other names) symbol before it can get hidden or renamed by the symbol versioning code. Then when it comes time to calculate the DT_MIPS_RLD_MAP value, we can get the required information from the now remembered symbol. We can get rid of a big blob of code in _bfd_mips_elf_finish_dynamic_symbol that is now unused. Also the size of the .rld_map section was not being set properly for ELF64 targets, so I fixed that as well. Tested on mips64-linux-gnu where it fixes the pr11138 testcase failures. Also tested by bootstrapping GCC with the patched binutils. Not tested on IRIX6 which has slightly different handling of these things, but I think the code 'looks plausible', so what could possibly go wrong? Comments? or OK to commit? 2011-12-09 David Daney * /elfxx-mips.c (mips_elf_link_hash_table.rld_value): Remove. (mips_elf_link_hash_table.rld_symbol): New field; (MIPS_ELF_RLD_MAP_SIZE): New macro. (_bfd_mips_elf_add_symbol_hook): Remember __rld_obj_head symbol in rld_symbol. (_bfd_mips_elf_create_dynamic_sections): Remember __rld_map symbol in rld_symbol. (_bfd_mips_elf_size_dynamic_sections): Set correct size for .rld_map. (_bfd_mips_elf_finish_dynamic_symbol): Remove .rld_map handling. (_bfd_mips_elf_finish_dynamic_sections): Use rld_symbol to calculate DT_MIPS_RLD_MAP value. (_bfd_mips_elf_link_hash_table_create): Initialize rld_symbol, quit initializing rld_value. --------------080002030204050901050102 Content-Type: text/plain; name="dd.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="dd.patch" Index: bfd/elfxx-mips.c =================================================================== RCS file: /cvs/src/src/bfd/elfxx-mips.c,v retrieving revision 1.297 diff -u -p -r1.297 elfxx-mips.c --- bfd/elfxx-mips.c 8 Dec 2011 20:47:24 -0000 1.297 +++ bfd/elfxx-mips.c 9 Dec 2011 18:47:25 -0000 @@ -436,8 +436,8 @@ struct mips_elf_link_hash_table entry is set to the address of __rld_obj_head as in IRIX5. */ bfd_boolean use_rld_obj_head; - /* This is the value of the __rld_map or __rld_obj_head symbol. */ - bfd_vma rld_value; + /* The __rld_map or __rld_obj_head symbol. */ + struct elf_link_hash_entry *rld_symbol; /* This is set if we see any mips16 stub sections. */ bfd_boolean mips16_stubs_seen; @@ -768,6 +768,10 @@ static bfd *reldyn_sorting_bfd; #define MIPS_ELF_GOT_SIZE(abfd) \ (get_elf_backend_data (abfd)->s->arch_size / 8) +/* The size of the .rld_map section. */ +#define MIPS_ELF_RLD_MAP_SIZE(abfd) \ + (get_elf_backend_data (abfd)->s->arch_size / 8) + /* The size of a symbol-table entry. */ #define MIPS_ELF_SYM_SIZE(abfd) \ (get_elf_backend_data (abfd)->s->sizeof_sym) @@ -7082,6 +7086,7 @@ _bfd_mips_elf_add_symbol_hook (bfd *abfd return FALSE; mips_elf_hash_table (info)->use_rld_obj_head = TRUE; + mips_elf_hash_table (info)->rld_symbol = h; } /* If this is a mips16 text symbol, add 1 to the value to make it @@ -7267,6 +7272,7 @@ _bfd_mips_elf_create_dynamic_sections (b if (! bfd_elf_link_record_dynamic_symbol (info, h)) return FALSE; + mips_elf_hash_table (info)->rld_symbol = h; } } @@ -9028,7 +9034,7 @@ _bfd_mips_elf_size_dynamic_sections (bfd { /* We add a room for __rld_map. It will be filled in by the rtld to contain a pointer to the _r_debug structure. */ - s->size += 4; + s->size += MIPS_ELF_RLD_MAP_SIZE(output_bfd); } else if (SGI_COMPAT (output_bfd) && CONST_STRNEQ (name, ".compact_rel")) @@ -10031,31 +10037,6 @@ _bfd_mips_elf_finish_dynamic_symbol (bfd if (IRIX_COMPAT (output_bfd) == ict_irix6) mips_elf_irix6_finish_dynamic_symbol (output_bfd, name, sym); - if (! info->shared) - { - if (! mips_elf_hash_table (info)->use_rld_obj_head - && (strcmp (name, "__rld_map") == 0 - || strcmp (name, "__RLD_MAP") == 0)) - { - asection *s = bfd_get_section_by_name (dynobj, ".rld_map"); - BFD_ASSERT (s != NULL); - sym->st_value = s->output_section->vma + s->output_offset; - bfd_put_32 (output_bfd, 0, s->contents); - if (mips_elf_hash_table (info)->rld_value == 0) - mips_elf_hash_table (info)->rld_value = sym->st_value; - } - else if (mips_elf_hash_table (info)->use_rld_obj_head - && strcmp (name, "__rld_obj_head") == 0) - { - /* IRIX6 does not use a .rld_map section. */ - if (IRIX_COMPAT (output_bfd) == ict_irix5 - || IRIX_COMPAT (output_bfd) == ict_none) - BFD_ASSERT (bfd_get_section_by_name (dynobj, ".rld_map") - != NULL); - mips_elf_hash_table (info)->rld_value = sym->st_value; - } - } - /* Keep dynamic MIPS16 symbols odd. This allows the dynamic linker to treat MIPS16 symbols like any other. */ if (ELF_ST_IS_MIPS16 (sym->st_other)) @@ -10518,7 +10499,18 @@ _bfd_mips_elf_finish_dynamic_sections (b break; case DT_MIPS_RLD_MAP: - dyn.d_un.d_ptr = mips_elf_hash_table (info)->rld_value; + { + struct elf_link_hash_entry *h; + h = mips_elf_hash_table (info)->rld_symbol; + if (!h) + { + dyn_to_skip = MIPS_ELF_DYN_SIZE (dynobj); + swap_out_p = FALSE; + } + s = h->root.u.def.section; + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset + + h->root.u.def.value; + } break; case DT_MIPS_OPTIONS: @@ -12801,7 +12793,7 @@ _bfd_mips_elf_link_hash_table_create (bf ret->procedure_count = 0; ret->compact_rel_size = 0; ret->use_rld_obj_head = FALSE; - ret->rld_value = 0; + ret->rld_symbol = NULL; ret->mips16_stubs_seen = FALSE; ret->use_plts_and_copy_relocs = FALSE; ret->is_vxworks = FALSE; --------------080002030204050901050102-- From akpm@linux-foundation.org Fri Dec 9 22:49:02 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 09 Dec 2011 22:49:10 +0100 (CET) Received: from mail.linuxfoundation.org ([140.211.169.12]:44670 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903738Ab1LIVtC (ORCPT ); Fri, 9 Dec 2011 22:49:02 +0100 Received: from akpm.mtv.corp.google.com (216-239-45-4.google.com [216.239.45.4]) by mail.linuxfoundation.org (Postfix) with ESMTPSA id 4E71441; Fri, 9 Dec 2011 21:48:06 +0000 (UTC) Date: Fri, 9 Dec 2011 13:48:52 -0800 From: Andrew Morton To: Chris Metcalf Cc: Arnd Bergmann , Ralf Baechle , Benjamin Herrenschmidt , Paul Mackerras , Martin Schwidefsky , Heiko Carstens , linux390@de.ibm.com, "David S. Miller" , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, "Eric W. Biederman" , Christoph Hellwig , Lucas De Marchi , Dmitry Torokhov , "J. Bruce Fields" , NeilBrown , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org Subject: Re: [PATCH v2] ipc: provide generic compat versions of IPC syscalls Message-Id: <20111209134852.f5b5bcbc.akpm@linux-foundation.org> In-Reply-To: <201112091903.pB9J39pd031553@farm-0002.internal.tilera.com> References: <201112091536.pB9Fa5f7002738@farm-0002.internal.tilera.com> <201112091602.31325.arnd@arndb.de> <201112091903.pB9J39pd031553@farm-0002.internal.tilera.com> X-Mailer: Sylpheed 3.0.2 (GTK+ 2.20.1; x86_64-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-archive-position: 32078 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: akpm@linux-foundation.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8102 Content-Length: 1800 Lines: 38 On Fri, 9 Dec 2011 10:29:07 -0500 Chris Metcalf wrote: > When using the "compat" APIs, architectures will generally want to > be able to make direct syscalls to msgsnd(), shmctl(), etc., and > in the kernel we would want them to be handled directly by > compat_sys_xxx() functions, as is true for other compat syscalls. > > However, for historical reasons, several of the existing compat IPC > syscalls do not do this. semctl() expects a pointer to the fourth > argument, instead of the fourth argument itself. msgsnd(), msgrcv() > and shmat() expect arguments in different order. > > This change adds an __ARCH_WANT_OLD_COMPAT_IPC define that can be > set in to preserve this behavior for ports that use it > (x86, sparc, powerpc, s390, and mips). No actual semantics are changed > for those architectures, and there is only a minimal amount of code > refactoring in ipc/compat.c. > > Newer architectures like tile (and perhaps future architectures such > as arm64 and unicore64) should not supply this define, and thus can > avoid having any IPC-specific code at all in their architecture-specific > compat layer. In the same vein, if this define is omitted, IPC_64 mode > is assumed, since that's what the headers expect. > > The workaround code in "tile" for msgsnd() and msgrcv() is removed > with this change; it also fixes the bug that shmat() and semctl() were > not being properly handled. What would we need to do to get all architectures using the new interfaces, and remove __ARCH_WANT_OLD_COMPAT_IPC? Regarding the implementation: rather than patching the header files, it would be more conventional (and arguably better) to add select ARCH_WANT_OLD_COMPAT_IPC to arch/*/Kconfig, then use CONFIG_ARCH_WANT_OLD_COMPAT_IPC. From arnd@arndb.de Sat Dec 10 00:22:36 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 10 Dec 2011 00:22:43 +0100 (CET) Received: from moutng.kundenserver.de ([212.227.126.186]:57213 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903744Ab1LIXWg (ORCPT ); Sat, 10 Dec 2011 00:22:36 +0100 Received: from wuerfel.localnet (port-92-200-84-125.dynamic.qsc.de [92.200.84.125]) by mrelayeu.kundenserver.de (node=mreu3) with ESMTP (Nemesis) id 0LblNw-1QsA2q09pc-00jXBD; Sat, 10 Dec 2011 00:21:49 +0100 From: Arnd Bergmann To: Andrew Morton Cc: Chris Metcalf , Ralf Baechle , Benjamin Herrenschmidt , Paul Mackerras , Martin Schwidefsky , Heiko Carstens , linux390@de.ibm.com, "David S. Miller" , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, "Eric W. Biederman" , Christoph Hellwig , Lucas De Marchi , Dmitry Torokhov , "J. Bruce Fields" , NeilBrown , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org Subject: Re: [PATCH v2] ipc: provide generic compat versions of IPC syscalls Date: Sat, 10 Dec 2011 00:21:35 +0100 Message-ID: <1690400.7yOAjHVqTH@wuerfel> User-Agent: KMail/4.7.2 (Linux/3.1.0-rc8nosema+; KDE/4.7.2; x86_64; ; ) In-Reply-To: <20111209134852.f5b5bcbc.akpm@linux-foundation.org> References: <201112091536.pB9Fa5f7002738@farm-0002.internal.tilera.com> <201112091903.pB9J39pd031553@farm-0002.internal.tilera.com> <20111209134852.f5b5bcbc.akpm@linux-foundation.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V02:K0:/15MQ54WxZ/BuawCVfAT2GidHxMZcpVi5BanFd0QBCc Zd45DWJOnZ6RritkMak2rkAPnsxFUHt18OrYd7I3dWSm5c+vYT EK2DRbdPqHzyex8Hya3ropKP72s2P74h2HyxRR7YGpm9MQcppr iG5zjpraZIS4yNsePCRHQ2s3WbDnMN2yBhaGpweC3WO0LomrxH +2eMs4mZsI7bo52wEEw7nnDqGclXQKPl1yuuG/89VLUfsQmcrL 9A/qXsUHnG2nPZCcan6apdxrtyMggzq7moOu8e6SsTISmVpszZ trS3YoI4kwCnxw32z5iyCEumVT8bG2LGPiHTxParLcaBf4QPIS iQTjBpKG6+wKBVFR8tJc= X-archive-position: 32079 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: arnd@arndb.de Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8152 Content-Length: 711 Lines: 20 On Friday 09 December 2011 13:48:52 Andrew Morton wrote: > What would we need to do to get all architectures using the new > interfaces, and remove __ARCH_WANT_OLD_COMPAT_IPC? We would change the various compat_sys_ipc functions (mips, powerpc, s390, sparc, x86) to call the new functions instead of the existing ones, and test each architecture. For parisc, we might not actually need the either version, but I'd have to take a closer look to be sure. > Regarding the implementation: rather than patching the header > files, it would be more conventional (and arguably better) to add > > select ARCH_WANT_OLD_COMPAT_IPC > > to arch/*/Kconfig, then use CONFIG_ARCH_WANT_OLD_COMPAT_IPC. Yes. Arnd From amodra@gmail.com Sat Dec 10 01:39:42 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 10 Dec 2011 01:39:46 +0100 (CET) Received: from mail-gy0-f177.google.com ([209.85.160.177]:40373 "EHLO mail-gy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903738Ab1LJAjm (ORCPT ); Sat, 10 Dec 2011 01:39:42 +0100 Received: by ghrr19 with SMTP id r19so3196997ghr.36 for ; Fri, 09 Dec 2011 16:39:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=date:from:to:cc:subject:message-id:mail-followup-to:references :mime-version:content-type:content-disposition:in-reply-to :user-agent; bh=jWAfHx/dRsRHMMteNCfF82lDJM0BcfUbyIStnJ714LE=; b=LOmz/R4/lYxd525l/nYDvBOSjXzK0rUh95kdd6Dmjw2gvgF06sGIGL+J5qq1i9Rxm/ Q7bX0tjfB78C8uN2ndo7u0rs9Z+9uWwJg1D7NNC/3DFShZHJx0DlMRlHAN7uoe64pGTH CY3lVwLCeYcaQbiGHTFm+ivKZDzTNOIJB4JWo= Received: by 10.236.75.230 with SMTP id z66mr15146399yhd.66.1323477576472; Fri, 09 Dec 2011 16:39:36 -0800 (PST) Received: from bubble.grove.modra.org ([115.187.252.19]) by mx.google.com with ESMTPS id 37sm3344101anu.21.2011.12.09.16.39.33 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 09 Dec 2011 16:39:35 -0800 (PST) Received: by bubble.grove.modra.org (Postfix, from userid 1000) id C8D5D170C2BF; Sat, 10 Dec 2011 11:09:28 +1030 (CST) Date: Sat, 10 Dec 2011 11:09:28 +1030 From: Alan Modra To: David Daney Cc: binutils , Richard Sandiford , Manuel Lauss , Debian MIPS , linux-mips Subject: Re: [Patch v2]: Fix ld pr11138 FAILures on mips*. Message-ID: <20111210003928.GC2461@bubble.grove.modra.org> Mail-Followup-To: David Daney , binutils , Richard Sandiford , Manuel Lauss , Debian MIPS , linux-mips References: <4EE27012.5030508@cavium.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4EE27012.5030508@cavium.com> User-Agent: Mutt/1.5.20 (2009-06-14) X-archive-position: 32080 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: amodra@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8200 Content-Length: 1164 Lines: 33 On Fri, Dec 09, 2011 at 12:31:14PM -0800, David Daney wrote: > * /elfxx-mips.c (mips_elf_link_hash_table.rld_value): Remove. > (mips_elf_link_hash_table.rld_symbol): New field; > (MIPS_ELF_RLD_MAP_SIZE): New macro. > (_bfd_mips_elf_add_symbol_hook): Remember __rld_obj_head symbol > in rld_symbol. > (_bfd_mips_elf_create_dynamic_sections): Remember __rld_map symbol > in rld_symbol. > (_bfd_mips_elf_size_dynamic_sections): Set correct size for .rld_map. > (_bfd_mips_elf_finish_dynamic_symbol): Remove .rld_map handling. > (_bfd_mips_elf_finish_dynamic_sections): Use rld_symbol to > calculate DT_MIPS_RLD_MAP value. > (_bfd_mips_elf_link_hash_table_create): Initialize rld_symbol, > quit initializing rld_value. OK. Remove stray / in ChangeLog entry > + s->size += MIPS_ELF_RLD_MAP_SIZE(output_bfd); Fix formatting here. > + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset > + + h->root.u.def.value; And it's nice to write code that emacs auto-indent won't change, so add parentheses dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset + h->root.u.def.value); -- Alan Modra Australia Development Lab, IBM From david.daney@cavium.com Sat Dec 10 01:50:03 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 10 Dec 2011 01:50:08 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:7120 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903738Ab1LJAuD (ORCPT ); Sat, 10 Dec 2011 01:50:03 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Fri, 09 Dec 2011 16:51:30 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Fri, 9 Dec 2011 16:50:01 -0800 Received: from dd1.caveonetworks.com ([64.2.3.195]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Fri, 9 Dec 2011 16:50:01 -0800 Message-ID: <4EE2ACB9.9010301@cavium.com> Date: Fri, 09 Dec 2011 16:50:01 -0800 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: binutils , Richard Sandiford , Alan Modra CC: Manuel Lauss , Debian MIPS , linux-mips Subject: Re: [Patch v2]: Fix ld pr11138 FAILures on mips*. References: <4EE27012.5030508@cavium.com> <20111210003928.GC2461@bubble.grove.modra.org> In-Reply-To: <20111210003928.GC2461@bubble.grove.modra.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 10 Dec 2011 00:50:01.0311 (UTC) FILETIME=[A5D0B6F0:01CCB6D5] X-archive-position: 32081 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: david.daney@cavium.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8203 Content-Length: 1656 Lines: 50 Thanks Alan, I will wait a couple of days to give Richard a chance to object. I think I got the address calculation correct, but having another pair of eyes look at it would be nice. I am especially concerned about what happens on IRIX where the symbol comes in from an external object rather than being generated by the linker itself. I had no way to test that. David Daney On 12/09/2011 04:39 PM, Alan Modra wrote: > On Fri, Dec 09, 2011 at 12:31:14PM -0800, David Daney wrote: >> * /elfxx-mips.c (mips_elf_link_hash_table.rld_value): Remove. >> (mips_elf_link_hash_table.rld_symbol): New field; >> (MIPS_ELF_RLD_MAP_SIZE): New macro. >> (_bfd_mips_elf_add_symbol_hook): Remember __rld_obj_head symbol >> in rld_symbol. >> (_bfd_mips_elf_create_dynamic_sections): Remember __rld_map symbol >> in rld_symbol. >> (_bfd_mips_elf_size_dynamic_sections): Set correct size for .rld_map. >> (_bfd_mips_elf_finish_dynamic_symbol): Remove .rld_map handling. >> (_bfd_mips_elf_finish_dynamic_sections): Use rld_symbol to >> calculate DT_MIPS_RLD_MAP value. >> (_bfd_mips_elf_link_hash_table_create): Initialize rld_symbol, >> quit initializing rld_value. > > OK. Remove stray / in ChangeLog entry Yes, I noticed that only after hitting Send. > >> + s->size += MIPS_ELF_RLD_MAP_SIZE(output_bfd); > > Fix formatting here. > >> + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset >> + + h->root.u.def.value; > > And it's nice to write code that emacs auto-indent won't change, so > add parentheses > > dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset > + h->root.u.def.value); > I will fix those too. From rdsandiford@googlemail.com Sat Dec 10 11:19:31 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 10 Dec 2011 11:19:35 +0100 (CET) Received: from mail-ww0-f43.google.com ([74.125.82.43]:49258 "EHLO mail-ww0-f43.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903563Ab1LJKTb (ORCPT ); Sat, 10 Dec 2011 11:19:31 +0100 Received: by wgbds11 with SMTP id ds11so6323737wgb.24 for ; Sat, 10 Dec 2011 02:19:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=from:to:mail-followup-to:cc:subject:references:date:in-reply-to :message-id:user-agent:mime-version:content-type; bh=FUD905LAPgordNukFEaefCmiCijTYj0y1kkzl0Abv38=; b=SH3ENlZ4Nzcy83AihLeoZx8iPAPoghL0CZrWo1WtirwXUc7UYYpnLjYUgpN/AdQb/G 6OOSA+Q92FG4b9ChYKSHzvnAIDu3yKCl2cTDN5nj8EwpvWOTItF8i8uhuteuVFOXIzAv p4WUOnUj6zF6VBZX4wnoXCYNcSoyoeIvoaLm0= Received: by 10.227.197.130 with SMTP id ek2mr9337696wbb.16.1323512366221; Sat, 10 Dec 2011 02:19:26 -0800 (PST) Received: from localhost (rsandifo.gotadsl.co.uk. [82.133.89.107]) by mx.google.com with ESMTPS id er5sm11037757wbb.11.2011.12.10.02.19.24 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 10 Dec 2011 02:19:25 -0800 (PST) From: Richard Sandiford To: David Daney Mail-Followup-To: David Daney ,binutils , Alan Modra , Manuel Lauss , Debian MIPS , linux-mips , rdsandiford@googlemail.com Cc: binutils , Alan Modra , Manuel Lauss , Debian MIPS , linux-mips Subject: Re: [Patch v2]: Fix ld pr11138 FAILures on mips*. References: <4EE27012.5030508@cavium.com> <20111210003928.GC2461@bubble.grove.modra.org> <4EE2ACB9.9010301@cavium.com> Date: Sat, 10 Dec 2011 10:19:20 +0000 In-Reply-To: <4EE2ACB9.9010301@cavium.com> (David Daney's message of "Fri, 09 Dec 2011 16:50:01 -0800") Message-ID: <87y5ukenkn.fsf@firetop.home> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-archive-position: 32082 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: rdsandiford@googlemail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8288 Content-Length: 950 Lines: 21 David Daney writes: > I will wait a couple of days to give Richard a chance to object. Looks good to me too. Thanks for doing this. I think it should go on the 2.22 branch as well. > I am especially concerned about what happens on IRIX where the symbol > comes in from an external object rather than being generated by the > linker itself. I had no way to test that. Me neither, unfortunately. But I agree it looks right. There's a possibility that we could create the dynamic sections before the definition of __rld_obj_head has been read in (e.g. from the check_relocs of a previous object). In that case it looks like we would create the .rld_map section and __rld_map/__RLD_MAP symbol, then later switch to __rld_obj_head. .rld_map would then be left at zero size and the __rld_map/__RLD_MAP symbol would be ignored when setting the tag value. But your patch preserves the behaviour in that case too. Richard From sshtylyov@mvista.com Sat Dec 10 15:47:54 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 10 Dec 2011 15:48:01 +0100 (CET) Received: from mail-bw0-f49.google.com ([209.85.214.49]:58158 "EHLO mail-bw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903657Ab1LJOry (ORCPT ); Sat, 10 Dec 2011 15:47:54 +0100 Received: by bkat2 with SMTP id t2so2173692bka.36 for ; Sat, 10 Dec 2011 06:47:48 -0800 (PST) Received: by 10.204.152.208 with SMTP id h16mr6299813bkw.15.1323528467866; Sat, 10 Dec 2011 06:47:47 -0800 (PST) Received: from [192.168.2.2] ([91.79.83.92]) by mx.google.com with ESMTPS id fg16sm17406062bkb.16.2011.12.10.06.47.46 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 10 Dec 2011 06:47:46 -0800 (PST) Message-ID: <4EE370D9.9090900@mvista.com> Date: Sat, 10 Dec 2011 18:46:49 +0400 From: Sergei Shtylyov User-Agent: Mozilla/5.0 (Windows NT 5.1; rv:8.0) Gecko/20111105 Thunderbird/8.0 MIME-Version: 1.0 To: Florian Fainelli CC: Matt Mackall , Herbert Xu , ralf@linux-mips.org, linux-mips@linux-mips.org Subject: Re: [PATCH 4/5] MIPS: BCM63XX: add RNG driver platform_device stub References: <1323457270-16330-1-git-send-email-florian@openwrt.org> <1323457270-16330-5-git-send-email-florian@openwrt.org> In-Reply-To: <1323457270-16330-5-git-send-email-florian@openwrt.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-archive-position: 32083 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@mvista.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8343 Content-Length: 677 Lines: 29 Hello. On 09-12-2011 23:01, Florian Fainelli wrote: > Signed-off-by: Florian Fainelli [...] > diff --git a/arch/mips/bcm63xx/dev-trng.c b/arch/mips/bcm63xx/dev-trng.c > new file mode 100644 > index 0000000..19ccfbf > --- /dev/null > +++ b/arch/mips/bcm63xx/dev-trng.c > @@ -0,0 +1,40 @@ [...] > +static struct resource trng_resources[] = { > + { > + .start = -1, /* filled at runtime */ > + .end = -1, /* filled at runtime */ > + .flags = IORESOURCE_MEM, > + }, > +}; > + > +static struct platform_device bcm63xx_trng_device = { > + .name = "bcm63xx-trng", > + .id = 0, Why not -1? Isn't there only single device of this sort? WBR, Sergei From juhosg@openwrt.org Sun Dec 11 17:12:01 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 11 Dec 2011 17:12:05 +0100 (CET) Received: from phoenix3.szarvasnet.hu ([87.101.127.16]:49972 "EHLO mail.szarvasnet.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903704Ab1LKQMB (ORCPT ); Sun, 11 Dec 2011 17:12:01 +0100 Received: from localhost (localhost [127.0.0.1]) by phoenix3.szarvasnet.hu (Postfix) with ESMTP id CE7AE140679; Sun, 11 Dec 2011 17:11:55 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at mail.szarvasnet.hu Received: from mail.szarvasnet.hu ([127.0.0.1]) by localhost (phoenix3.szarvasnet.hu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id nbF4eJSuRPhC; Sun, 11 Dec 2011 17:11:55 +0100 (CET) Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by phoenix3.szarvasnet.hu (Postfix) with ESMTPA id 3EF26140653; Sun, 11 Dec 2011 17:11:55 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, Gabor Juhos Subject: [PATCH] MIPS: ath79: avoid a kernel bug on AR913X Date: Sun, 11 Dec 2011 17:11:41 +0100 Message-Id: <1323619901-2512-1-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.1 X-archive-position: 32084 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8605 Content-Length: 605 Lines: 24 Wireless mac registration causes a BUG on AR913X SoCs due to a missing 'else'. Signed-off-by: Gabor Juhos --- arch/mips/ath79/dev-wmac.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/mips/ath79/dev-wmac.c b/arch/mips/ath79/dev-wmac.c index 24f5469..e215070 100644 --- a/arch/mips/ath79/dev-wmac.c +++ b/arch/mips/ath79/dev-wmac.c @@ -96,7 +96,7 @@ void __init ath79_register_wmac(u8 *cal_data) { if (soc_is_ar913x()) ar913x_wmac_setup(); - if (soc_is_ar933x()) + else if (soc_is_ar933x()) ar933x_wmac_setup(); else BUG(); -- 1.7.2.1 From amwang@redhat.com Mon Dec 12 03:52:58 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 12 Dec 2011 03:53:07 +0100 (CET) Received: from mx1.redhat.com ([209.132.183.28]:21012 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903717Ab1LLCw6 (ORCPT ); Mon, 12 Dec 2011 03:52:58 +0100 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id pBC2qmK9019456 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Sun, 11 Dec 2011 21:52:48 -0500 Received: from [10.67.4.31] (vpn1-4-31.sin2.redhat.com [10.67.4.31]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id pBC2qZ41006827; Sun, 11 Dec 2011 21:52:39 -0500 Message-ID: <4EE56C67.2060909@redhat.com> Date: Mon, 12 Dec 2011 10:52:23 +0800 From: Cong Wang User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.24) Gecko/20111108 Fedora/3.1.16-1.fc14 Thunderbird/3.1.16 MIME-Version: 1.0 To: Ralf Baechle CC: linux-kernel@vger.kernel.org, akpm@linux-foundation.org, "David S. Miller" , Jiri Kosina , Kevin Cernekee , "Justin P. Mattock" , Peter Zijlstra , David Daney , linux-mips@linux-mips.org Subject: Re: [PATCH 04/62] mips: remove the second argument of k[un]map_atomic() References: <1322371662-26166-1-git-send-email-amwang@redhat.com> <1322371662-26166-5-git-send-email-amwang@redhat.com> <20111209160639.GA30988@linux-mips.org> In-Reply-To: <20111209160639.GA30988@linux-mips.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-archive-position: 32085 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: amwang@redhat.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 8783 Content-Length: 324 Lines: 11 于 2011å¹´12月10æ—¥ 00:06, Ralf Baechle 写é“: > On Sun, Nov 27, 2011 at 01:26:44PM +0800, Cong Wang wrote: > > Acked-by: Ralf Baechle > > I assume you want to merge this patch as part of a single series? > I put all the patches into a single tree which is in linux-next now. :) Thanks for review! From david.daney@cavium.com Mon Dec 12 21:24:48 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 12 Dec 2011 21:24:54 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:14721 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903738Ab1LLUYs (ORCPT ); Mon, 12 Dec 2011 21:24:48 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Mon, 12 Dec 2011 12:26:14 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Mon, 12 Dec 2011 12:24:45 -0800 Received: from dd1.caveonetworks.com ([64.2.3.195]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Mon, 12 Dec 2011 12:24:45 -0800 Message-ID: <4EE6630C.2070101@cavium.com> Date: Mon, 12 Dec 2011 12:24:44 -0800 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: binutils , Alan Modra , rdsandiford@googlemail.com CC: Manuel Lauss , Debian MIPS , linux-mips Subject: Re: [Patch v2]: Fix ld pr11138 FAILures on mips*. References: <4EE27012.5030508@cavium.com> <20111210003928.GC2461@bubble.grove.modra.org> <4EE2ACB9.9010301@cavium.com> <87y5ukenkn.fsf@firetop.home> In-Reply-To: <87y5ukenkn.fsf@firetop.home> Content-Type: multipart/mixed; boundary="------------000303080504020901090505" X-OriginalArrivalTime: 12 Dec 2011 20:24:45.0141 (UTC) FILETIME=[16472850:01CCB90C] X-archive-position: 32087 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: david.daney@cavium.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9628 Content-Length: 5638 Lines: 159 This is a multi-part message in MIME format. --------------000303080504020901090505 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit On 12/10/2011 02:19 AM, Richard Sandiford wrote: > David Daney writes: >> I will wait a couple of days to give Richard a chance to object. > > Looks good to me too. Thanks for doing this. I think it should go > on the 2.22 branch as well. > FYI, this is what I committed to both MAIN and the 2.22 branch. I fixed the formatting things noted by Alan, and took the liberty of adding a missing "break;" statement. 2011-12-10 David Daney * elfxx-mips.c (mips_elf_link_hash_table.rld_value): Remove. (mips_elf_link_hash_table.rld_symbol): New field; (MIPS_ELF_RLD_MAP_SIZE): New macro. (_bfd_mips_elf_add_symbol_hook): Remember __rld_obj_head symbol in rld_symbol. (_bfd_mips_elf_create_dynamic_sections): Remember __rld_map symbol in rld_symbol. (_bfd_mips_elf_size_dynamic_sections): Set correct size for .rld_map. (_bfd_mips_elf_finish_dynamic_symbol): Remove .rld_map handling. (_bfd_mips_elf_finish_dynamic_sections): Use rld_symbol to calculate DT_MIPS_RLD_MAP value. (_bfd_mips_elf_link_hash_table_create): Initialize rld_symbol, quit initializing rld_value. --------------000303080504020901090505 Content-Type: text/plain; name="elfxx-mips.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="elfxx-mips.patch" Index: elfxx-mips.c =================================================================== RCS file: /cvs/src/src/bfd/elfxx-mips.c,v retrieving revision 1.297 retrieving revision 1.298 diff -u -p -r1.297 -r1.298 --- elfxx-mips.c 8 Dec 2011 20:47:24 -0000 1.297 +++ elfxx-mips.c 11 Dec 2011 02:05:40 -0000 1.298 @@ -436,8 +436,8 @@ struct mips_elf_link_hash_table entry is set to the address of __rld_obj_head as in IRIX5. */ bfd_boolean use_rld_obj_head; - /* This is the value of the __rld_map or __rld_obj_head symbol. */ - bfd_vma rld_value; + /* The __rld_map or __rld_obj_head symbol. */ + struct elf_link_hash_entry *rld_symbol; /* This is set if we see any mips16 stub sections. */ bfd_boolean mips16_stubs_seen; @@ -768,6 +768,10 @@ static bfd *reldyn_sorting_bfd; #define MIPS_ELF_GOT_SIZE(abfd) \ (get_elf_backend_data (abfd)->s->arch_size / 8) +/* The size of the .rld_map section. */ +#define MIPS_ELF_RLD_MAP_SIZE(abfd) \ + (get_elf_backend_data (abfd)->s->arch_size / 8) + /* The size of a symbol-table entry. */ #define MIPS_ELF_SYM_SIZE(abfd) \ (get_elf_backend_data (abfd)->s->sizeof_sym) @@ -7082,6 +7086,7 @@ _bfd_mips_elf_add_symbol_hook (bfd *abfd return FALSE; mips_elf_hash_table (info)->use_rld_obj_head = TRUE; + mips_elf_hash_table (info)->rld_symbol = h; } /* If this is a mips16 text symbol, add 1 to the value to make it @@ -7267,6 +7272,7 @@ _bfd_mips_elf_create_dynamic_sections (b if (! bfd_elf_link_record_dynamic_symbol (info, h)) return FALSE; + mips_elf_hash_table (info)->rld_symbol = h; } } @@ -9028,7 +9034,7 @@ _bfd_mips_elf_size_dynamic_sections (bfd { /* We add a room for __rld_map. It will be filled in by the rtld to contain a pointer to the _r_debug structure. */ - s->size += 4; + s->size += MIPS_ELF_RLD_MAP_SIZE (output_bfd); } else if (SGI_COMPAT (output_bfd) && CONST_STRNEQ (name, ".compact_rel")) @@ -10031,31 +10037,6 @@ _bfd_mips_elf_finish_dynamic_symbol (bfd if (IRIX_COMPAT (output_bfd) == ict_irix6) mips_elf_irix6_finish_dynamic_symbol (output_bfd, name, sym); - if (! info->shared) - { - if (! mips_elf_hash_table (info)->use_rld_obj_head - && (strcmp (name, "__rld_map") == 0 - || strcmp (name, "__RLD_MAP") == 0)) - { - asection *s = bfd_get_section_by_name (dynobj, ".rld_map"); - BFD_ASSERT (s != NULL); - sym->st_value = s->output_section->vma + s->output_offset; - bfd_put_32 (output_bfd, 0, s->contents); - if (mips_elf_hash_table (info)->rld_value == 0) - mips_elf_hash_table (info)->rld_value = sym->st_value; - } - else if (mips_elf_hash_table (info)->use_rld_obj_head - && strcmp (name, "__rld_obj_head") == 0) - { - /* IRIX6 does not use a .rld_map section. */ - if (IRIX_COMPAT (output_bfd) == ict_irix5 - || IRIX_COMPAT (output_bfd) == ict_none) - BFD_ASSERT (bfd_get_section_by_name (dynobj, ".rld_map") - != NULL); - mips_elf_hash_table (info)->rld_value = sym->st_value; - } - } - /* Keep dynamic MIPS16 symbols odd. This allows the dynamic linker to treat MIPS16 symbols like any other. */ if (ELF_ST_IS_MIPS16 (sym->st_other)) @@ -10518,7 +10499,19 @@ _bfd_mips_elf_finish_dynamic_sections (b break; case DT_MIPS_RLD_MAP: - dyn.d_un.d_ptr = mips_elf_hash_table (info)->rld_value; + { + struct elf_link_hash_entry *h; + h = mips_elf_hash_table (info)->rld_symbol; + if (!h) + { + dyn_to_skip = MIPS_ELF_DYN_SIZE (dynobj); + swap_out_p = FALSE; + break; + } + s = h->root.u.def.section; + dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset + + h->root.u.def.value); + } break; case DT_MIPS_OPTIONS: @@ -12801,7 +12794,7 @@ _bfd_mips_elf_link_hash_table_create (bf ret->procedure_count = 0; ret->compact_rel_size = 0; ret->use_rld_obj_head = FALSE; - ret->rld_value = 0; + ret->rld_symbol = NULL; ret->mips16_stubs_seen = FALSE; ret->use_plts_and_copy_relocs = FALSE; ret->is_vxworks = FALSE; --------------000303080504020901090505-- From cmetcalf@tilera.com Mon Dec 12 22:48:41 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 12 Dec 2011 22:48:52 +0100 (CET) Received: from 206.83.70.73.ptr.us.xo.net ([206.83.70.73]:11550 "EHLO king.tilera.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903738Ab1LLVsl (ORCPT ); Mon, 12 Dec 2011 22:48:41 +0100 Received: from farm-0002.internal.tilera.com ([10.2.0.32]) by king.tilera.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Mon, 12 Dec 2011 16:48:31 -0500 Received: (from cmetcalf@localhost) by farm-0002.internal.tilera.com (8.13.8/8.12.11/Submit) id pBCLmPH0023959; Mon, 12 Dec 2011 16:48:25 -0500 Message-Id: <201112122148.pBCLmPH0023959@farm-0002.internal.tilera.com> From: Chris Metcalf Date: Fri, 9 Dec 2011 10:29:07 -0500 Subject: [PATCH v3] ipc: provide generic compat versions of IPC syscalls References: <201112091536.pB9Fa5f7002738@farm-0002.internal.tilera.com> <201112091903.pB9J39pd031553@farm-0002.internal.tilera.com> <20111209134852.f5b5bcbc.akpm@linux-foundation.org> <1690400.7yOAjHVqTH@wuerfel> In-Reply-To: <1690400.7yOAjHVqTH@wuerfel> To: Arnd Bergmann , Ralf Baechle , Benjamin Herrenschmidt , Paul Mackerras , Martin Schwidefsky , Heiko Carstens , linux390@de.ibm.com, "David S. Miller" , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, "Eric W. Biederman" , Christoph Hellwig , Lucas De Marchi , Dmitry Torokhov , Andrew Morton , "J. Bruce Fields" , NeilBrown , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org X-OriginalArrivalTime: 12 Dec 2011 21:48:31.0319 (UTC) FILETIME=[CA1D0E70:01CCB917] X-archive-position: 32088 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: cmetcalf@tilera.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 9691 Content-Length: 11843 Lines: 376 When using the "compat" APIs, architectures will generally want to be able to make direct syscalls to msgsnd(), shmctl(), etc., and in the kernel we would want them to be handled directly by compat_sys_xxx() functions, as is true for other compat syscalls. However, for historical reasons, several of the existing compat IPC syscalls do not do this. semctl() expects a pointer to the fourth argument, instead of the fourth argument itself. msgsnd(), msgrcv() and shmat() expect arguments in different order. This change adds an ARCH_WANT_OLD_COMPAT_IPC config option that can be set to preserve this behavior for ports that use it (x86, sparc, powerpc, s390, and mips). No actual semantics are changed for those architectures, and there is only a minimal amount of code refactoring in ipc/compat.c. Newer architectures like tile (and perhaps future architectures such as arm64 and unicore64) should not select this option, and thus can avoid having any IPC-specific code at all in their architecture-specific compat layer. In the same vein, if this option is not selected, IPC_64 mode is assumed, since that's what the headers expect. The workaround code in "tile" for msgsnd() and msgrcv() is removed with this change; it also fixes the bug that shmat() and semctl() were not being properly handled. Signed-off-by: Chris Metcalf --- arch/Kconfig | 3 ++ arch/mips/Kconfig | 1 + arch/powerpc/Kconfig | 1 + arch/s390/Kconfig | 1 + arch/sparc/Kconfig | 1 + arch/tile/include/asm/compat.h | 11 ------ arch/tile/kernel/compat.c | 43 ------------------------ arch/x86/Kconfig | 1 + include/linux/compat.h | 12 ++++++- ipc/compat.c | 70 ++++++++++++++++++++++++++++++++++++--- 10 files changed, 83 insertions(+), 61 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 4b0669c..dfb1e07 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -181,4 +181,7 @@ config HAVE_RCU_TABLE_FREE config ARCH_HAVE_NMI_SAFE_CMPXCHG bool +config ARCH_WANT_OLD_COMPAT_IPC + bool + source "kernel/gcov/Kconfig" diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index d46f1da..ad2af82 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -2420,6 +2420,7 @@ config MIPS32_COMPAT config COMPAT bool depends on MIPS32_COMPAT + select ARCH_WANT_OLD_COMPAT_IPC default y config SYSVIPC_COMPAT diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 951e18f..e2be710 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -146,6 +146,7 @@ config COMPAT bool default y if PPC64 select COMPAT_BINFMT_ELF + select ARCH_WANT_OLD_COMPAT_IPC config SYSVIPC_COMPAT bool diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig index 373679b..2fc3bca 100644 --- a/arch/s390/Kconfig +++ b/arch/s390/Kconfig @@ -221,6 +221,7 @@ config COMPAT prompt "Kernel support for 31 bit emulation" depends on 64BIT select COMPAT_BINFMT_ELF + select ARCH_WANT_OLD_COMPAT_IPC help Select this option if you want to enable your system kernel to handle system-calls from ELF binaries for 31 bit ESA. This option diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index f92602e..846cb5c 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -577,6 +577,7 @@ config COMPAT depends on SPARC64 default y select COMPAT_BINFMT_ELF + select ARCH_WANT_OLD_COMPAT_IPC config SYSVIPC_COMPAT bool diff --git a/arch/tile/include/asm/compat.h b/arch/tile/include/asm/compat.h index bf95f55..4b4b289 100644 --- a/arch/tile/include/asm/compat.h +++ b/arch/tile/include/asm/compat.h @@ -242,17 +242,6 @@ long compat_sys_fallocate(int fd, int mode, long compat_sys_sched_rr_get_interval(compat_pid_t pid, struct compat_timespec __user *interval); -/* Versions of compat functions that differ from generic Linux. */ -struct compat_msgbuf; -long tile_compat_sys_msgsnd(int msqid, - struct compat_msgbuf __user *msgp, - size_t msgsz, int msgflg); -long tile_compat_sys_msgrcv(int msqid, - struct compat_msgbuf __user *msgp, - size_t msgsz, long msgtyp, int msgflg); -long tile_compat_sys_ptrace(compat_long_t request, compat_long_t pid, - compat_long_t addr, compat_long_t data); - /* Tilera Linux syscalls that don't have "compat" versions. */ #define compat_sys_flush_cache sys_flush_cache diff --git a/arch/tile/kernel/compat.c b/arch/tile/kernel/compat.c index bf5e9d7..d67459b 100644 --- a/arch/tile/kernel/compat.c +++ b/arch/tile/kernel/compat.c @@ -16,7 +16,6 @@ #define __SYSCALL_COMPAT #include -#include #include #include #include @@ -95,52 +94,10 @@ long compat_sys_sched_rr_get_interval(compat_pid_t pid, return ret; } -/* - * The usual compat_sys_msgsnd() and _msgrcv() seem to be assuming - * some different calling convention than our normal 32-bit tile code. - */ - -/* Already defined in ipc/compat.c, but we need it here. */ -struct compat_msgbuf { - compat_long_t mtype; - char mtext[1]; -}; - -long tile_compat_sys_msgsnd(int msqid, - struct compat_msgbuf __user *msgp, - size_t msgsz, int msgflg) -{ - compat_long_t mtype; - - if (get_user(mtype, &msgp->mtype)) - return -EFAULT; - return do_msgsnd(msqid, mtype, msgp->mtext, msgsz, msgflg); -} - -long tile_compat_sys_msgrcv(int msqid, - struct compat_msgbuf __user *msgp, - size_t msgsz, long msgtyp, int msgflg) -{ - long err, mtype; - - err = do_msgrcv(msqid, &mtype, msgp->mtext, msgsz, msgtyp, msgflg); - if (err < 0) - goto out; - - if (put_user(mtype, &msgp->mtype)) - err = -EFAULT; - out: - return err; -} - /* Provide the compat syscall number to call mapping. */ #undef __SYSCALL #define __SYSCALL(nr, call) [nr] = (call), -/* The generic versions of these don't work for Tile. */ -#define compat_sys_msgrcv tile_compat_sys_msgrcv -#define compat_sys_msgsnd tile_compat_sys_msgsnd - /* See comments in sys.c */ #define compat_sys_fadvise64_64 sys32_fadvise64_64 #define compat_sys_readahead sys32_readahead diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index cb9a104..0e1f474 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2131,6 +2131,7 @@ config IA32_AOUT config COMPAT def_bool y depends on IA32_EMULATION + select ARCH_WANT_OLD_COMPAT_IPC config COMPAT_FOR_U64_ALIGNMENT def_bool COMPAT diff --git a/include/linux/compat.h b/include/linux/compat.h index 66ed067..f295dae 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -224,6 +224,7 @@ struct compat_sysinfo; struct compat_sysctl_args; struct compat_kexec_segment; struct compat_mq_attr; +struct compat_msgbuf; extern void compat_exit_robust_list(struct task_struct *curr); @@ -234,13 +235,22 @@ asmlinkage long compat_sys_get_robust_list(int pid, compat_uptr_t __user *head_ptr, compat_size_t __user *len_ptr); +#ifdef CONFIG_ARCH_WANT_OLD_COMPAT_IPC long compat_sys_semctl(int first, int second, int third, void __user *uptr); long compat_sys_msgsnd(int first, int second, int third, void __user *uptr); long compat_sys_msgrcv(int first, int second, int msgtyp, int third, int version, void __user *uptr); -long compat_sys_msgctl(int first, int second, void __user *uptr); long compat_sys_shmat(int first, int second, compat_uptr_t third, int version, void __user *uptr); +#else +long compat_sys_semctl(int semid, int semnum, int cmd, int arg); +long compat_sys_msgsnd(int msqid, struct compat_msgbuf __user *msgp, + size_t msgsz, int msgflg); +long compat_sys_msgrcv(int msqid, struct compat_msgbuf __user *msgp, + size_t msgsz, long msgtyp, int msgflg); +long compat_sys_shmat(int shmid, compat_uptr_t shmaddr, int shmflg); +#endif +long compat_sys_msgctl(int first, int second, void __user *uptr); long compat_sys_shmctl(int first, int second, void __user *uptr); long compat_sys_semtimedop(int semid, struct sembuf __user *tsems, unsigned nsems, const struct compat_timespec __user *timeout); diff --git a/ipc/compat.c b/ipc/compat.c index 845a287..a6df704 100644 --- a/ipc/compat.c +++ b/ipc/compat.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include @@ -117,6 +118,7 @@ extern int sem_ctls[]; static inline int compat_ipc_parse_version(int *cmd) { +#ifdef CONFIG_ARCH_WANT_OLD_COMPAT_IPC int version = *cmd & IPC_64; /* this is tricky: architectures that have support for the old @@ -128,6 +130,10 @@ static inline int compat_ipc_parse_version(int *cmd) *cmd &= ~IPC_64; #endif return version; +#else + /* With the asm-generic APIs, we always use the 64-bit versions. */ + return IPC_64; +#endif } static inline int __get_compat_ipc64_perm(struct ipc64_perm *p64, @@ -232,10 +238,9 @@ static inline int put_compat_semid_ds(struct semid64_ds *s, return err; } -long compat_sys_semctl(int first, int second, int third, void __user *uptr) +static long do_compat_semctl(int first, int second, int third, u32 pad) { union semun fourth; - u32 pad; int err, err2; struct semid64_ds s64; struct semid64_ds __user *up64; @@ -243,10 +248,6 @@ long compat_sys_semctl(int first, int second, int third, void __user *uptr) memset(&s64, 0, sizeof(s64)); - if (!uptr) - return -EINVAL; - if (get_user(pad, (u32 __user *) uptr)) - return -EFAULT; if ((third & (~IPC_64)) == SETVAL) fourth.val = (int) pad; else @@ -305,6 +306,18 @@ long compat_sys_semctl(int first, int second, int third, void __user *uptr) return err; } +#ifdef CONFIG_ARCH_WANT_OLD_COMPAT_IPC +long compat_sys_semctl(int first, int second, int third, void __user *uptr) +{ + u32 pad; + + if (!uptr) + return -EINVAL; + if (get_user(pad, (u32 __user *) uptr)) + return -EFAULT; + return do_compat_semctl(first, second, third, pad); +} + long compat_sys_msgsnd(int first, int second, int third, void __user *uptr) { struct compat_msgbuf __user *up = uptr; @@ -353,6 +366,37 @@ long compat_sys_msgrcv(int first, int second, int msgtyp, int third, out: return err; } +#else +long compat_sys_semctl(int semid, int semnum, int cmd, int arg) +{ + return do_compat_semctl(semid, semnum, cmd, arg); +} + +long compat_sys_msgsnd(int msqid, struct compat_msgbuf __user *msgp, + size_t msgsz, int msgflg) +{ + compat_long_t mtype; + + if (get_user(mtype, &msgp->mtype)) + return -EFAULT; + return do_msgsnd(msqid, mtype, msgp->mtext, msgsz, msgflg); +} + +long compat_sys_msgrcv(int msqid, struct compat_msgbuf __user *msgp, + size_t msgsz, long msgtyp, int msgflg) +{ + long err, mtype; + + err = do_msgrcv(msqid, &mtype, msgp->mtext, msgsz, msgtyp, msgflg); + if (err < 0) + goto out; + + if (put_user(mtype, &msgp->mtype)) + err = -EFAULT; + out: + return err; +} +#endif static inline int get_compat_msqid64(struct msqid64_ds *m64, struct compat_msqid64_ds __user *up64) @@ -470,6 +514,7 @@ long compat_sys_msgctl(int first, int second, void __user *uptr) return err; } +#ifdef CONFIG_ARCH_WANT_OLD_COMPAT_IPC long compat_sys_shmat(int first, int second, compat_uptr_t third, int version, void __user *uptr) { @@ -485,6 +530,19 @@ long compat_sys_shmat(int first, int second, compat_uptr_t third, int version, uaddr = compat_ptr(third); return put_user(raddr, uaddr); } +#else +long compat_sys_shmat(int shmid, compat_uptr_t shmaddr, int shmflg) +{ + unsigned long ret; + long err; + + err = do_shmat(shmid, compat_ptr(shmaddr), shmflg, &ret); + if (err) + return err; + force_successful_syscall_return(); + return (long)ret; +} +#endif static inline int get_compat_shmid64_ds(struct shmid64_ds *s64, struct compat_shmid64_ds __user *up64) -- 1.6.5.2 From florian@openwrt.org Tue Dec 13 12:24:51 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 13 Dec 2011 12:24:57 +0100 (CET) Received: from zmc.proxad.net ([212.27.53.206]:59164 "EHLO zmc.proxad.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903556Ab1LMLYv (ORCPT ); Tue, 13 Dec 2011 12:24:51 +0100 Received: from localhost (localhost [127.0.0.1]) by zmc.proxad.net (Postfix) with ESMTP id B35EF3E2103; Tue, 13 Dec 2011 12:24:50 +0100 (CET) X-Virus-Scanned: amavisd-new at Received: from zmc.proxad.net ([127.0.0.1]) by localhost (zmc.proxad.net [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1CpzcSmDcNSy; Tue, 13 Dec 2011 12:24:50 +0100 (CET) Received: from flexo.iliad.local (freebox.vlq16.iliad.fr [213.36.7.13]) by zmc.proxad.net (Postfix) with ESMTPSA id 4FCC63E210B; Tue, 13 Dec 2011 12:24:50 +0100 (CET) From: Florian Fainelli To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, Florian Fainelli Subject: [PATCH 3/3] MIPS: TXX9: use IS_ENABLED() macro Date: Tue, 13 Dec 2011 12:24:06 +0100 Message-Id: <1323775446-27956-3-git-send-email-florian@openwrt.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1323775446-27956-1-git-send-email-florian@openwrt.org> References: <1323775446-27956-1-git-send-email-florian@openwrt.org> X-archive-position: 32090 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 10211 Content-Length: 4555 Lines: 124 Signed-off-by: Florian Fainelli --- arch/mips/txx9/generic/setup.c | 12 +++++------- arch/mips/txx9/generic/setup_tx4939.c | 2 +- arch/mips/txx9/rbtx4939/setup.c | 11 +++++------ 3 files changed, 11 insertions(+), 14 deletions(-) diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index ec38e00b..f9f07ba 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -632,7 +632,7 @@ void __init txx9_physmap_flash_init(int no, unsigned long addr, unsigned long size, const struct physmap_flash_data *pdata) { -#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) +#if IS_ENABLED(CONFIG_MTD_PHYSMAP) struct resource res = { .start = addr, .end = addr + size - 1, @@ -670,8 +670,7 @@ void __init txx9_physmap_flash_init(int no, unsigned long addr, void __init txx9_ndfmc_init(unsigned long baseaddr, const struct txx9ndfmc_platform_data *pdata) { -#if defined(CONFIG_MTD_NAND_TXX9NDFMC) || \ - defined(CONFIG_MTD_NAND_TXX9NDFMC_MODULE) +#if IS_ENABLED(CONFIG_MTD_NAND_TXX9NDFMC) struct resource res = { .start = baseaddr, .end = baseaddr + 0x1000 - 1, @@ -687,7 +686,7 @@ void __init txx9_ndfmc_init(unsigned long baseaddr, #endif } -#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) +#if IS_ENABLED(CONFIG_LEDS_GPIO) static DEFINE_SPINLOCK(txx9_iocled_lock); #define TXX9_IOCLED_MAXLEDS 8 @@ -810,7 +809,7 @@ void __init txx9_iocled_init(unsigned long baseaddr, void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq, const struct txx9dmac_platform_data *pdata) { -#if defined(CONFIG_TXX9_DMAC) || defined(CONFIG_TXX9_DMAC_MODULE) +#if IS_ENABLED(CONFIG_TXX9_DMAC) struct resource res[] = { { .start = baseaddr, @@ -866,8 +865,7 @@ void __init txx9_aclc_init(unsigned long baseaddr, int irq, unsigned int dma_chan_out, unsigned int dma_chan_in) { -#if defined(CONFIG_SND_SOC_TXX9ACLC) || \ - defined(CONFIG_SND_SOC_TXX9ACLC_MODULE) +#if IS_ENABLED(CONFIG_SND_SOC_TXX9ACLC) unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS; struct resource res[] = { { diff --git a/arch/mips/txx9/generic/setup_tx4939.c b/arch/mips/txx9/generic/setup_tx4939.c index ba3cec3..3cbeacc 100644 --- a/arch/mips/txx9/generic/setup_tx4939.c +++ b/arch/mips/txx9/generic/setup_tx4939.c @@ -317,7 +317,7 @@ void __init tx4939_sio_init(unsigned int sclk, unsigned int cts_mask) } } -#if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE) +#if IS_ENABLED(CONFIG_TC35815) static u32 tx4939_get_eth_speed(struct net_device *dev) { struct ethtool_cmd cmd; diff --git a/arch/mips/txx9/rbtx4939/setup.c b/arch/mips/txx9/rbtx4939/setup.c index 2ad8973..e15641d 100644 --- a/arch/mips/txx9/rbtx4939/setup.c +++ b/arch/mips/txx9/rbtx4939/setup.c @@ -40,8 +40,7 @@ static void __init rbtx4939_time_init(void) tx4939_time_init(0); } -#if defined(__BIG_ENDIAN) && \ - (defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)) +#if defined(__BIG_ENDIAN) && IS_ENABLED(CONFIG_SMC91X) #define HAVE_RBTX4939_IOSWAB #define IS_CE1_ADDR(addr) \ ((((unsigned long)(addr) - IO_BASE) & 0xfff00000) == TXX9_CE(1)) @@ -187,7 +186,7 @@ static void __init rbtx4939_update_ioc_pen(void) #define RBTX4939_MAX_7SEGLEDS 8 -#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) +#if IS_ENABLED(CONFIG_LEDS_CLASS) static u8 led_val[RBTX4939_MAX_7SEGLEDS]; struct rbtx4939_led_data { struct led_classdev cdev; @@ -263,7 +262,7 @@ static inline void rbtx4939_led_setup(void) static void __rbtx4939_7segled_putc(unsigned int pos, unsigned char val) { -#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) +#if IS_ENABLED(CONFIG_LEDS_CLASS) unsigned long flags; local_irq_save(flags); /* bit7: reserved for LED class */ @@ -287,7 +286,7 @@ static void rbtx4939_7segled_putc(unsigned int pos, unsigned char val) __rbtx4939_7segled_putc(pos, val); } -#if defined(CONFIG_MTD_RBTX4939) || defined(CONFIG_MTD_RBTX4939_MODULE) +#if IS_ENABLED(CONFIG_MTD_RBTX4939) /* special mapping for boot rom */ static unsigned long rbtx4939_flash_fixup_ofs(unsigned long ofs) { @@ -463,7 +462,7 @@ static void __init rbtx4939_device_init(void) .flags = SMC91X_USE_16BIT, }; struct platform_device *pdev; -#if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE) +#if IS_ENABLED(CONFIG_TC35815) int i, j; unsigned char ethaddr[2][6]; u8 bdipsw = readb(rbtx4939_bdipsw_addr) & 0x0f; -- 1.7.5.4 From florian@openwrt.org Tue Dec 13 12:24:51 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 13 Dec 2011 12:25:24 +0100 (CET) Received: from zmc.proxad.net ([212.27.53.206]:59165 "EHLO zmc.proxad.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903552Ab1LMLYv (ORCPT ); Tue, 13 Dec 2011 12:24:51 +0100 Received: from localhost (localhost [127.0.0.1]) by zmc.proxad.net (Postfix) with ESMTP id A70223E0518; Tue, 13 Dec 2011 12:24:50 +0100 (CET) X-Virus-Scanned: amavisd-new at Received: from zmc.proxad.net ([127.0.0.1]) by localhost (zmc.proxad.net [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id BKoRjTvOqWzd; Tue, 13 Dec 2011 12:24:50 +0100 (CET) Received: from flexo.iliad.local (freebox.vlq16.iliad.fr [213.36.7.13]) by zmc.proxad.net (Postfix) with ESMTPSA id 4BD203E2103; Tue, 13 Dec 2011 12:24:50 +0100 (CET) From: Florian Fainelli To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, Florian Fainelli Subject: [PATCH 2/3] MIPS: PNX833x: use IS_ENABLED() macro Date: Tue, 13 Dec 2011 12:24:05 +0100 Message-Id: <1323775446-27956-2-git-send-email-florian@openwrt.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1323775446-27956-1-git-send-email-florian@openwrt.org> References: <1323775446-27956-1-git-send-email-florian@openwrt.org> X-archive-position: 32091 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 10212 Content-Length: 1020 Lines: 30 Signed-off-by: Florian Fainelli --- arch/mips/pnx833x/stb22x/board.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/pnx833x/stb22x/board.c b/arch/mips/pnx833x/stb22x/board.c index 644eb7c..4b328ac 100644 --- a/arch/mips/pnx833x/stb22x/board.c +++ b/arch/mips/pnx833x/stb22x/board.c @@ -91,7 +91,7 @@ void __init pnx833x_board_setup(void) pnx833x_gpio_select_function_alt(32); pnx833x_gpio_select_function_alt(33); -#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) +#if IS_ENABLED(CONFIG_MTD_NAND_PLATFORM) /* Setup MIU for NAND access on CS0... * * (it seems that we must also configure CS1 for reliable operation, @@ -117,7 +117,7 @@ void __init pnx833x_board_setup(void) pnx833x_gpio_select_output(5); pnx833x_gpio_write(1, 5); -#elif defined(CONFIG_MTD_CFI) || defined(CONFIG_MTD_CFI_MODULE) +#elif IS_ENABLED(CONFIG_MTD_CFI) /* Set up MIU for 16-bit NOR access on CS0 and CS1... */ -- 1.7.5.4 From florian@openwrt.org Tue Dec 13 12:24:51 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 13 Dec 2011 12:25:51 +0100 (CET) Received: from zmc.proxad.net ([212.27.53.206]:59163 "EHLO zmc.proxad.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903550Ab1LMLYv (ORCPT ); Tue, 13 Dec 2011 12:24:51 +0100 Received: from localhost (localhost [127.0.0.1]) by zmc.proxad.net (Postfix) with ESMTP id 8E8043E22A9; Tue, 13 Dec 2011 12:24:50 +0100 (CET) X-Virus-Scanned: amavisd-new at Received: from zmc.proxad.net ([127.0.0.1]) by localhost (zmc.proxad.net [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id kOYrzXGrIacH; Tue, 13 Dec 2011 12:24:50 +0100 (CET) Received: from flexo.iliad.local (freebox.vlq16.iliad.fr [213.36.7.13]) by zmc.proxad.net (Postfix) with ESMTPSA id 3F7BA3E0518; Tue, 13 Dec 2011 12:24:50 +0100 (CET) From: Florian Fainelli To: ralf@linux-mips.org Cc: linux-mips@linux-mips.org, Florian Fainelli Subject: [PATCH 1/3] MIPS: Alchemy: use IS_ENABLED() macro Date: Tue, 13 Dec 2011 12:24:04 +0100 Message-Id: <1323775446-27956-1-git-send-email-florian@openwrt.org> X-Mailer: git-send-email 1.7.5.4 X-archive-position: 32092 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 10213 Content-Length: 2580 Lines: 71 Signed-off-by: Florian Fainelli --- arch/mips/alchemy/board-mtx1.c | 4 ++-- arch/mips/alchemy/devboards/pb1100.c | 4 ++-- arch/mips/alchemy/devboards/pb1500.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/mips/alchemy/board-mtx1.c b/arch/mips/alchemy/board-mtx1.c index 295f1a9..9996948 100644 --- a/arch/mips/alchemy/board-mtx1.c +++ b/arch/mips/alchemy/board-mtx1.c @@ -81,10 +81,10 @@ static void mtx1_power_off(void) void __init board_setup(void) { -#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) +#if IS_ENABLED(CONFIG_USB_OHCI_HCD) /* Enable USB power switch */ alchemy_gpio_direction_output(204, 0); -#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ +#endif /* IS_ENABLED(CONFIG_USB_OHCI_HCD) */ /* Initialize sys_pinfunc */ au_writel(SYS_PF_NI2, SYS_PINFUNC); diff --git a/arch/mips/alchemy/devboards/pb1100.c b/arch/mips/alchemy/devboards/pb1100.c index cff50d0..78c77a4 100644 --- a/arch/mips/alchemy/devboards/pb1100.c +++ b/arch/mips/alchemy/devboards/pb1100.c @@ -46,7 +46,7 @@ void __init board_setup(void) alchemy_gpio1_input_enable(); udelay(100); -#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) +#if IS_ENABLED(CONFIG_USB_OHCI_HCD) { u32 pin_func, sys_freqctrl, sys_clksrc; @@ -93,7 +93,7 @@ void __init board_setup(void) pin_func |= SYS_PF_USB; au_writel(pin_func, SYS_PINFUNC); } -#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ +#endif /* IS_ENABLED(CONFIG_USB_OHCI_HCD) */ /* Enable sys bus clock divider when IDLE state or no bus activity. */ au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); diff --git a/arch/mips/alchemy/devboards/pb1500.c b/arch/mips/alchemy/devboards/pb1500.c index e7b807b..232fee9 100644 --- a/arch/mips/alchemy/devboards/pb1500.c +++ b/arch/mips/alchemy/devboards/pb1500.c @@ -53,7 +53,7 @@ void __init board_setup(void) alchemy_gpio_direction_input(201); alchemy_gpio_direction_input(203); -#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) +#if IS_ENABLED(CONFIG_USB_OHCI_HCD) /* Zero and disable FREQ2 */ sys_freqctrl = au_readl(SYS_FREQCTRL0); @@ -87,7 +87,7 @@ void __init board_setup(void) /* 2nd USB port is USB host */ pin_func |= SYS_PF_USB; au_writel(pin_func, SYS_PINFUNC); -#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ +#endif /* IS_ENABLED(CONFIG_USB_OHCI_HCD) */ #ifdef CONFIG_PCI { -- 1.7.5.4 From ddaney.cavm@gmail.com Wed Dec 14 17:48:51 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 14 Dec 2011 17:48:58 +0100 (CET) Received: from mail-yx0-f177.google.com ([209.85.213.177]:49372 "EHLO mail-yx0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903621Ab1LNQsv (ORCPT ); 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[64.2.3.195]) by mx.google.com with ESMTPS id w68sm4529410yhe.14.2011.12.14.08.48.42 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 14 Dec 2011 08:48:42 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBEGmewc023277; Wed, 14 Dec 2011 08:48:40 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBEGmbKI023275; Wed, 14 Dec 2011 08:48:37 -0800 From: David Daney To: ralf@linux-mips.org, Linus Torvalds , Andrew Morton , linux-mips@linux-mips.org, Jeremy Fitzhardinge , Peter Zijlstra Cc: linux-kernel@vger.kernel.org, Jason Baron , David Daney Subject: [PATCH] jump-label: initialize jump-label subsystem somewhat later Date: Wed, 14 Dec 2011 08:48:35 -0800 Message-Id: <1323881315-23245-1-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 X-archive-position: 32093 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 11487 Content-Length: 1202 Lines: 42 From: David Daney commit 97ce2c88f9ad42e3c60a9beb9fca87abf3639faa breaks MIPS. The jump-lable initialization does I-Cache flushing after modifying code. On MIPS this is done by calling through the function pointer flush_icache_range(). This function pointer is initialized mm_init(). As things stand, we cannot be calling jump_label_init() until after mm_init() completes, so we move the call down to satisfy this constraint. Signed-off-by: David Daney --- init/main.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/init/main.c b/init/main.c index 217ed23..8c6a155 100644 --- a/init/main.c +++ b/init/main.c @@ -513,8 +513,6 @@ asmlinkage void __init start_kernel(void) __stop___param - __start___param, &unknown_bootoption); - jump_label_init(); - /* * These use large bootmem allocations and must precede * kmem_cache_init() @@ -526,6 +524,8 @@ asmlinkage void __init start_kernel(void) trap_init(); mm_init(); + jump_label_init(); + /* * Set up the scheduler prior starting any interrupts (such as the * timer interrupt). Full topology setup happens at smp_init() -- 1.7.2.3 From a.p.zijlstra@chello.nl Wed Dec 14 17:55:42 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 14 Dec 2011 17:55:47 +0100 (CET) Received: from [205.233.59.134] ([205.233.59.134]:33657 "EHLO merlin.infradead.org" rhost-flags-FAIL-FAIL-OK-OK) by eddie.linux-mips.org with ESMTP id S1903618Ab1LNQzm convert rfc822-to-8bit (ORCPT ); Wed, 14 Dec 2011 17:55:42 +0100 Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Ras7D-0001lG-1w; Wed, 14 Dec 2011 16:55:35 +0000 Received: from j77219.upc-j.chello.nl ([24.132.77.219] helo=twins) by canuck.infradead.org with esmtpsa (Exim 4.76 #1 (Red Hat Linux)) id 1Ras7C-0005HD-1e; Wed, 14 Dec 2011 16:55:34 +0000 Received: by twins (Postfix, from userid 1000) id 2E4848278324; Wed, 14 Dec 2011 17:54:44 +0100 (CET) Message-ID: <1323881470.28489.51.camel@twins> Subject: Re: [PATCH] jump-label: initialize jump-label subsystem somewhat later From: Peter Zijlstra To: David Daney Cc: ralf@linux-mips.org, Linus Torvalds , Andrew Morton , linux-mips@linux-mips.org, Jeremy Fitzhardinge , linux-kernel@vger.kernel.org, Jason Baron , David Daney In-Reply-To: <1323881315-23245-1-git-send-email-ddaney.cavm@gmail.com> References: <1323881315-23245-1-git-send-email-ddaney.cavm@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Date: Wed, 14 Dec 2011 17:51:10 +0100 Mime-Version: 1.0 X-Mailer: Evolution 3.2.1- X-archive-position: 32094 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: a.p.zijlstra@chello.nl Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 11497 Content-Length: 642 Lines: 16 On Wed, 2011-12-14 at 08:48 -0800, David Daney wrote: > From: David Daney > > commit 97ce2c88f9ad42e3c60a9beb9fca87abf3639faa breaks MIPS. > > The jump-lable initialization does I-Cache flushing after modifying > code. On MIPS this is done by calling through the function pointer > flush_icache_range(). This function pointer is initialized mm_init(). > > As things stand, we cannot be calling jump_label_init() until after > mm_init() completes, so we move the call down to satisfy this > constraint. I'm fine as long as it stays before sched_init(), which it does. Jeremy is this still early enough for you? From david.daney@cavium.com Wed Dec 14 18:17:08 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 14 Dec 2011 18:17:14 +0100 (CET) Received: from mail3.caviumnetworks.com ([12.108.191.235]:9355 "EHLO mail3.caviumnetworks.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903621Ab1LNRRI (ORCPT ); Wed, 14 Dec 2011 18:17:08 +0100 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by mail3.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Wed, 14 Dec 2011 09:18:36 -0800 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Wed, 14 Dec 2011 09:17:06 -0800 Received: from dd1.caveonetworks.com ([64.2.3.195]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Wed, 14 Dec 2011 09:17:06 -0800 Message-ID: <4EE8DA11.5020109@cavium.com> Date: Wed, 14 Dec 2011 09:17:05 -0800 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: Peter Zijlstra CC: David Daney , ralf@linux-mips.org, Linus Torvalds , Andrew Morton , linux-mips@linux-mips.org, Jeremy Fitzhardinge , linux-kernel@vger.kernel.org, Jason Baron Subject: Re: [PATCH] jump-label: initialize jump-label subsystem somewhat later References: <1323881315-23245-1-git-send-email-ddaney.cavm@gmail.com> <1323881470.28489.51.camel@twins> In-Reply-To: <1323881470.28489.51.camel@twins> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-OriginalArrivalTime: 14 Dec 2011 17:17:06.0203 (UTC) FILETIME=[34410EB0:01CCBA84] X-archive-position: 32095 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: david.daney@cavium.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 11521 Content-Length: 961 Lines: 28 On 12/14/2011 08:51 AM, Peter Zijlstra wrote: > On Wed, 2011-12-14 at 08:48 -0800, David Daney wrote: >> From: David Daney >> >> commit 97ce2c88f9ad42e3c60a9beb9fca87abf3639faa breaks MIPS. >> >> The jump-lable initialization does I-Cache flushing after modifying >> code. On MIPS this is done by calling through the function pointer >> flush_icache_range(). This function pointer is initialized mm_init(). Actually I misspoke, for MIPS we need jump_label_init() after trap_init(), not mm_init(). >> >> As things stand, we cannot be calling jump_label_init() until after >> mm_init() completes, so we move the call down to satisfy this >> constraint. > > I'm fine as long as it stays before sched_init(), which it does. Jeremy > is this still early enough for you? > Just tested a revised patch that moves it to between trap_init() and mm_init(), I propose that we do that instead. New patch in a couple of minutes. David Daney From ddaney.cavm@gmail.com Wed Dec 14 18:25:43 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 14 Dec 2011 18:25:47 +0100 (CET) Received: from mail-gy0-f177.google.com ([209.85.160.177]:52037 "EHLO mail-gy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903621Ab1LNRZn (ORCPT ); Wed, 14 Dec 2011 18:25:43 +0100 Received: by ghbf20 with SMTP id f20so912752ghb.36 for ; Wed, 14 Dec 2011 09:25:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=/69LPH+Z0WgRLp6qnp482QqBv7UEhotNEOHUwcGq5K0=; b=eWN8KBBZ0al+uVzHLx2+AvnHUzEVNYfdUvG9Z1fPcvmMjbTwA40PGIvKQ14ht+MXF4 2/kapnYGnedg2ltg88mCIePv6m/4lkr4EMvkkbnUWT5BybkcNFM01ydigGRzByosjBYr mH91fGuA9HgB58qjICzl0yXYCSKWN/5qwYVsc= Received: by 10.236.181.164 with SMTP id l24mr13757848yhm.22.1323883536887; Wed, 14 Dec 2011 09:25:36 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id o7sm4657990yhl.15.2011.12.14.09.25.36 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 14 Dec 2011 09:25:36 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBEHPYgi026405; Wed, 14 Dec 2011 09:25:34 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBEHPXJf026404; Wed, 14 Dec 2011 09:25:33 -0800 From: David Daney To: ralf@linux-mips.org, Linus Torvalds , Andrew Morton , linux-mips@linux-mips.org, Jeremy Fitzhardinge , Peter Zijlstra Cc: linux-kernel@vger.kernel.org, Jason Baron , David Daney Subject: [PATCH v2] jump-label: initialize jump-label subsystem somewhat later Date: Wed, 14 Dec 2011 09:25:32 -0800 Message-Id: <1323883532-26374-1-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 X-archive-position: 32096 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 11528 Content-Length: 1242 Lines: 45 From: David Daney commit 97ce2c88f9ad42e3c60a9beb9fca87abf3639faa breaks MIPS. The jump-lable initialization does I-Cache flushing after modifying code. On MIPS this is done by calling through the function pointer flush_icache_range(). This function pointer is initialized trap_init(). As things stand, we cannot be calling jump_label_init() until after trap_init() completes, so we move the call down to satisfy this constraint. Signed-off-by: David Daney --- Difference from v1: Move jump_label_init() up one so it is now before mm_init() instead of after it. init/main.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/init/main.c b/init/main.c index 217ed23..68ab12b 100644 --- a/init/main.c +++ b/init/main.c @@ -513,8 +513,6 @@ asmlinkage void __init start_kernel(void) __stop___param - __start___param, &unknown_bootoption); - jump_label_init(); - /* * These use large bootmem allocations and must precede * kmem_cache_init() @@ -524,6 +522,7 @@ asmlinkage void __init start_kernel(void) vfs_caches_init_early(); sort_main_extable(); trap_init(); + jump_label_init(); mm_init(); /* -- 1.7.2.3 From sshtylyov@mvista.com Wed Dec 14 18:33:01 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 14 Dec 2011 18:33:08 +0100 (CET) Received: from mail-fx0-f49.google.com ([209.85.161.49]:58770 "EHLO mail-fx0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903621Ab1LNRdB (ORCPT ); Wed, 14 Dec 2011 18:33:01 +0100 Received: by fabs1 with SMTP id s1so1828873fab.36 for ; Wed, 14 Dec 2011 09:32:54 -0800 (PST) Received: by 10.180.84.71 with SMTP id w7mr6750501wiy.37.1323883974690; Wed, 14 Dec 2011 09:32:54 -0800 (PST) Received: from [192.168.11.174] (mail.dev.rtsoft.ru. [213.79.90.226]) by mx.google.com with ESMTPS id hn15sm4474819wib.22.2011.12.14.09.32.52 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 14 Dec 2011 09:32:53 -0800 (PST) Message-ID: <4EE8EB95.7040901@mvista.com> Date: Wed, 14 Dec 2011 21:31:49 +0300 From: Sergei Shtylyov User-Agent: Mozilla/5.0 (X11; Linux i686; rv:6.0) Gecko/20110812 Thunderbird/6.0 MIME-Version: 1.0 To: David Daney CC: ralf@linux-mips.org, Linus Torvalds , Andrew Morton , linux-mips@linux-mips.org, Jeremy Fitzhardinge , Peter Zijlstra , linux-kernel@vger.kernel.org, Jason Baron , David Daney Subject: Re: [PATCH] jump-label: initialize jump-label subsystem somewhat later References: <1323881315-23245-1-git-send-email-ddaney.cavm@gmail.com> In-Reply-To: <1323881315-23245-1-git-send-email-ddaney.cavm@gmail.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-archive-position: 32097 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@mvista.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 11535 Content-Length: 683 Lines: 26 Hello. On 12/14/2011 07:48 PM, David Daney wrote: > From: David Daney > commit 97ce2c88f9ad42e3c60a9beb9fca87abf3639faa breaks MIPS. Please also specify that commit's summary (in parens). > The jump-lable initialization does I-Cache flushing after modifying Label. > code. On MIPS this is done by calling through the function pointer > flush_icache_range(). This function pointer is initialized mm_init(). "By" missing? > As things stand, we cannot be calling jump_label_init() until after > mm_init() completes, so we move the call down to satisfy this > constraint. > Signed-off-by: David Daney WBR, Sergei From ddaney.cavm@gmail.com Wed Dec 14 18:54:51 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 14 Dec 2011 18:54:55 +0100 (CET) Received: from mail-yw0-f49.google.com ([209.85.213.49]:56671 "EHLO mail-yw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903622Ab1LNRyv (ORCPT ); Wed, 14 Dec 2011 18:54:51 +0100 Received: by yhpp34 with SMTP id p34so1606406yhp.36 for ; Wed, 14 Dec 2011 09:54:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=42+owGGElAzj3b6ROZsvinTvdrxeXzDn4gTYL8kzt7Q=; b=tB5Ak2c20eceAcV6KNmM+pp5uChbg3uDSyShiVVDrQk4pvgKDGOHplTDio5CwTE6b4 jB0AgrXB2LWwPBs+YNXaXQ1jyaOSmoW7AfkqGstjDdVeHUd4mfGdbf2zy0Zm86U+XObJ 6asitujVv38qpVjKJd2TU0UYBC8tuZF+iy6q0= Received: by 10.236.197.97 with SMTP id s61mr13520535yhn.57.1323885285353; Wed, 14 Dec 2011 09:54:45 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id n24sm4760540yhj.13.2011.12.14.09.54.43 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 14 Dec 2011 09:54:44 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBEHsguM026881; Wed, 14 Dec 2011 09:54:42 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBEHsejq026880; Wed, 14 Dec 2011 09:54:40 -0800 From: David Daney To: ralf@linux-mips.org, Linus Torvalds , Andrew Morton , linux-mips@linux-mips.org, Jeremy Fitzhardinge , Peter Zijlstra Cc: linux-kernel@vger.kernel.org, Jason Baron , David Daney Subject: [PATCH v2a] jump-label: initialize jump-label subsystem somewhat later Date: Wed, 14 Dec 2011 09:54:39 -0800 Message-Id: <1323885279-26850-1-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 X-archive-position: 32098 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 11560 Content-Length: 1496 Lines: 54 From: David Daney commit 97ce2c88f9ad42e3c60a9beb9fca87abf3639faa (jump-label: initialize jump-label subsystem much earlier) breaks MIPS. The jump-label initialization does I-Cache flushing after modifying code. On MIPS this is done by calling through the function pointer flush_icache_range(). This function pointer is initialized by trap_init(). As things stand, we cannot be calling jump_label_init() until after trap_init() completes, so we move the call down to satisfy this constraint. Signed-off-by: David Daney --- Sorry for spamming this out again, but Sergei keeps flagging my poor grammar. Difference from v2: Fix grammar and spelling issues in changelog. No change to the patch. Difference from v1: Move jump_label_init() up one so it is now before mm_init() instead of after it. init/main.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/init/main.c b/init/main.c index 217ed23..68ab12b 100644 --- a/init/main.c +++ b/init/main.c @@ -513,8 +513,6 @@ asmlinkage void __init start_kernel(void) __stop___param - __start___param, &unknown_bootoption); - jump_label_init(); - /* * These use large bootmem allocations and must precede * kmem_cache_init() @@ -524,6 +522,7 @@ asmlinkage void __init start_kernel(void) vfs_caches_init_early(); sort_main_extable(); trap_init(); + jump_label_init(); mm_init(); /* -- 1.7.2.3 From ddaney.cavm@gmail.com Wed Dec 14 23:23:12 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 14 Dec 2011 23:23:19 +0100 (CET) Received: from mail-yx0-f177.google.com ([209.85.213.177]:56880 "EHLO mail-yx0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903622Ab1LNWXM (ORCPT ); Wed, 14 Dec 2011 23:23:12 +0100 Received: by yenl2 with SMTP id l2so1082656yen.36 for ; Wed, 14 Dec 2011 14:23:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=q5cZrpvPooLWtWy6axJ23sticwLHgS0zcqefS/zs1DE=; b=kjb6xbG9a1FGDf9rxt9CSYDCGuH45dSmrkiCYQIlIHuHNPeEXhatlIgqHBP7JD0JwL lXKoZrILLsyczWyMsRtjGw84A3zJwwtUb46n24wMJbUnW7X5ha00viuPvqtdv9GZkD+e 86cOmwtSnpVgpyRHSIbsCIcWPt1ytf/PN+L7U= Received: by 10.236.201.200 with SMTP id b48mr732110yho.76.1323901386403; Wed, 14 Dec 2011 14:23:06 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id q52sm5717864yhh.3.2011.12.14.14.23.05 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 14 Dec 2011 14:23:05 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBEMN3lU021128; Wed, 14 Dec 2011 14:23:03 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBEMN2gG021127; Wed, 14 Dec 2011 14:23:02 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: David Daney Subject: [PATCH] MIPS: Get rid of arch specific irq_dispose_mapping. Date: Wed, 14 Dec 2011 14:23:00 -0800 Message-Id: <1323901380-21094-1-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 X-archive-position: 32099 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 11823 Content-Length: 596 Lines: 27 From: David Daney It is now defined in kernel/irq/irqdomain.c Signed-off-by: David Daney --- arch/mips/include/asm/irq.h | 4 ---- 1 files changed, 0 insertions(+), 4 deletions(-) diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h index 2354c87..dc650ae 100644 --- a/arch/mips/include/asm/irq.h +++ b/arch/mips/include/asm/irq.h @@ -16,10 +16,6 @@ #include -static inline void irq_dispose_mapping(unsigned int virq) -{ -} - #ifdef CONFIG_I8259 static inline int irq_canonicalize(int irq) { -- 1.7.2.3 From ddaney.cavm@gmail.com Thu Dec 15 03:32:23 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 15 Dec 2011 03:32:27 +0100 (CET) Received: from mail-yx0-f177.google.com ([209.85.213.177]:58183 "EHLO mail-yx0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903745Ab1LOCcX (ORCPT ); Thu, 15 Dec 2011 03:32:23 +0100 Received: by yenl2 with SMTP id l2so1214134yen.36 for ; Wed, 14 Dec 2011 18:32:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=aDO5HkfsBBEDOw/oeSYFDw5G49NMO4pKhT5EY+zzY3k=; b=JLJRtqKTsuorHrre5cmewD7fKHaoWhuhGN/q8oGWfLvhnPnouUzGv5IZA5yX8Z18bS hz8RkgpC+DozfUJ0+2Tgdt1gcyPA83Nx7As5muladzYuBCWcalqxaGhHosqBE77QEe91 XGkdWLCP3tOJgK5WaznmCGMkIrNymrT8Bd51o= Received: by 10.236.190.196 with SMTP id e44mr1636703yhn.95.1323916337404; Wed, 14 Dec 2011 18:32:17 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id 1sm5845125anp.15.2011.12.14.18.32.16 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 14 Dec 2011 18:32:17 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBF2WF1D008909; Wed, 14 Dec 2011 18:32:15 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBF2WFvK008908; Wed, 14 Dec 2011 18:32:15 -0800 From: David Daney To: Thomas Gleixner , devicetree-discuss@lists.ozlabs.org, Grant Likely , Rob Herring Cc: linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, David Daney Subject: [PATCH v2 1/4] irq: Get rid of irq_domain_for_each_hwirq(). Date: Wed, 14 Dec 2011 18:32:07 -0800 Message-Id: <1323916330-8865-2-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1323916330-8865-1-git-send-email-ddaney.cavm@gmail.com> References: <1323916330-8865-1-git-send-email-ddaney.cavm@gmail.com> X-archive-position: 32100 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 11953 Content-Length: 800 Lines: 26 From: David Daney It is not used anywhere in the kernel. Signed-off-by: David Daney --- include/linux/irqdomain.h | 3 --- 1 files changed, 0 insertions(+), 3 deletions(-) diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h index 99834e58..0914a54 100644 --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -81,9 +81,6 @@ static inline unsigned int irq_domain_to_irq(struct irq_domain *d, return d->irq_base + hwirq - d->hwirq_base; } -#define irq_domain_for_each_hwirq(d, hw) \ - for (hw = d->hwirq_base; hw < d->hwirq_base + d->nr_irq; hw++) - #define irq_domain_for_each_irq(d, hw, irq) \ for (hw = d->hwirq_base, irq = irq_domain_to_irq(d, hw); \ hw < d->hwirq_base + d->nr_irq; \ -- 1.7.2.3 From ddaney.cavm@gmail.com Thu Dec 15 03:32:23 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 15 Dec 2011 03:32:55 +0100 (CET) Received: from mail-gy0-f177.google.com ([209.85.160.177]:35640 "EHLO mail-gy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903746Ab1LOCcX (ORCPT ); Thu, 15 Dec 2011 03:32:23 +0100 Received: by ghbf20 with SMTP id f20so1309100ghb.36 for ; Wed, 14 Dec 2011 18:32:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=ugOvcCxWTTU1w4US/DLh7RcHdRIwlTGhOo60rtBHUNc=; b=iSseUYBksgyJUQgnPSdCYQnk3stQGVLrGLFYs4cYrHtCuMyIfpksqD49I4MfNeK3Xt AaMOiX8kUZBx30/jIbFHPHIzSKna3NhxRx4KBPfcbs0sVlyl/pSVL94IOEFItWjGpRXE oMxqV7axJBjDxnJnBTGcMwRWd3pvkbol9md5k= Received: by 10.101.137.7 with SMTP id p7mr371412ann.34.1323916337584; Wed, 14 Dec 2011 18:32:17 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id 37sm5831631anu.21.2011.12.14.18.32.16 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 14 Dec 2011 18:32:17 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBF2WE6Y008900; Wed, 14 Dec 2011 18:32:14 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBF2WCZG008899; Wed, 14 Dec 2011 18:32:12 -0800 From: David Daney To: Thomas Gleixner , devicetree-discuss@lists.ozlabs.org, Grant Likely , Rob Herring Cc: linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, David Daney Subject: [PATCH v2 0/4] irq/of: Cleanup and Enchance irq_domain support. Date: Wed, 14 Dec 2011 18:32:06 -0800 Message-Id: <1323916330-8865-1-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 X-archive-position: 32101 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 11956 Content-Length: 2754 Lines: 69 From: David Daney Back in early Nov. I send the first version of this patch set. Now things are heating up again in the world of irq_domain, so I wanted to try to get some closure on the issues I had. The Octeon patch is included here to show how I am using irq_domain, but is part of a much larger effort to merge Octeon device tree support. The basic problem I am attempting to solve is using irq domains when there is a 'non-linear' mapping of hwirq <--> irq within a domain. Octeon has a single set of irq numbers that is used across two different implementations of the interrupt controller as well as more than 10 different SOCs all which use different subsets of the irq number space. The result is that the hwirq to irq mapping function contains many gaps and discontinuities, it is really quite random. The existing irq domain infrastructure assumes a continuous linear mapping of hwirq to irq that can be encapsulated by the irq_base, hwirq_base and nr_irq elements of struct irq_domain. This is not suitable for the Octeon implementation. The gist of my change is to add an optional iterator function to irq_domain_ops which knows how to iterate over the irq numbers in a given domain. For simple linear domains (those currently supported), we iterate using the current method based on irq_base, hwirq_base and nr_irq. Summary of the patches: 1) Get rid of some unused code to make subsequent changes simpler. 2) Cleanup the data type used by various hwirq functions and users. 3) Add the irq iterator, and fix up the ARM GIC code to use it instead of the current irq_domain_for_each_irq(). 4) Add the Octeon users of the interface. In an earlier exchange, Rob Herring had said: ... Handling sparse irqs is a potentially common problem, so we should address that in the core irqdomain code. Which is what this patch set is doing. There was a suggestion that perhaps having .to_irq() return a magic value if there was no mapping would also work. However I prefer this approach as it separates the concepts of iteration and mapping of irq numbers. Please comment. David Daney (4): irq: Get rid of irq_domain_for_each_hwirq(). irq/of/ARM: Make irq_domain hwirq type consistent throughout the kernel. irq/of/ARM: Enhance irq iteration capability of irq_domain code. MIPS: Octeon: Add irq_create_of_mapping() and GPIO interrupts. arch/arm/common/gic.c | 34 +++-- arch/mips/Kconfig | 1 + arch/mips/cavium-octeon/octeon-irq.c | 259 +++++++++++++++++++++++++++++++++- include/linux/irqdomain.h | 23 ++-- kernel/irq/irqdomain.c | 88 ++++++++---- 5 files changed, 354 insertions(+), 51 deletions(-) -- 1.7.2.3 From ddaney.cavm@gmail.com Thu Dec 15 03:32:23 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 15 Dec 2011 03:33:19 +0100 (CET) Received: from mail-yw0-f49.google.com ([209.85.213.49]:61728 "EHLO mail-yw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903747Ab1LOCcX (ORCPT ); Thu, 15 Dec 2011 03:32:23 +0100 Received: by yhpp34 with SMTP id p34so1944072yhp.36 for ; Wed, 14 Dec 2011 18:32:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=d3wQBKkIveWv+NO6YcKXBtWcUtiMX6yvbu5KMcuhctw=; b=YcN3uWts52edntR7cBfILNNYqhXOIrHSCh28jB6vKOMA49YXmaJLWDKumF7/1x8jAE ziblL+kXfBEuByVc9QVKx+bLdszwb5llYTDy0vZtt2nCIH814MoVbgTJ7RJqYGZtq9kK epyvJfqRO6ysh9aCms7D12IFGsso1NoL6lNeM= Received: by 10.236.189.104 with SMTP id b68mr2236067yhn.21.1323916337753; Wed, 14 Dec 2011 18:32:17 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id l11sm5828976anm.22.2011.12.14.18.32.16 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 14 Dec 2011 18:32:17 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBF2WFRE008913; Wed, 14 Dec 2011 18:32:15 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBF2WFKk008912; Wed, 14 Dec 2011 18:32:15 -0800 From: David Daney To: Thomas Gleixner , devicetree-discuss@lists.ozlabs.org, Grant Likely , Rob Herring Cc: linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, David Daney Subject: [PATCH v2 2/4] irq/of/ARM: Make irq_domain hwirq type consistent throughout the kernel. Date: Wed, 14 Dec 2011 18:32:08 -0800 Message-Id: <1323916330-8865-3-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1323916330-8865-1-git-send-email-ddaney.cavm@gmail.com> References: <1323916330-8865-1-git-send-email-ddaney.cavm@gmail.com> X-archive-position: 32102 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 11959 Content-Length: 3285 Lines: 96 From: David Daney There is a mixture of unsigned long and unsigned int being used with hwirq and hwirq_base. Change it so we use unsigned int everywhere. Signed-off-by: David Daney --- arch/arm/common/gic.c | 2 +- include/linux/irqdomain.h | 6 +++--- kernel/irq/irqdomain.c | 8 ++++---- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index b2dc2dd..171061f 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -625,7 +625,7 @@ static void __init gic_pm_init(struct gic_chip_data *gic) static int gic_irq_domain_dt_translate(struct irq_domain *d, struct device_node *controller, const u32 *intspec, unsigned int intsize, - unsigned long *out_hwirq, unsigned int *out_type) + unsigned int *out_hwirq, unsigned int *out_type) { if (d->of_node != controller) return -EINVAL; diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h index 0914a54..16ba5a9 100644 --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -31,12 +31,12 @@ struct irq_domain; * the hardware irq number and linux irq type value. */ struct irq_domain_ops { - unsigned int (*to_irq)(struct irq_domain *d, unsigned long hwirq); + unsigned int (*to_irq)(struct irq_domain *d, unsigned int hwirq); #ifdef CONFIG_OF int (*dt_translate)(struct irq_domain *d, struct device_node *node, const u32 *intspec, unsigned int intsize, - unsigned long *out_hwirq, unsigned int *out_type); + unsigned int *out_hwirq, unsigned int *out_type); #endif /* CONFIG_OF */ }; @@ -72,7 +72,7 @@ struct irq_domain { * be overridden if the irq_domain implements a .to_irq() hook. */ static inline unsigned int irq_domain_to_irq(struct irq_domain *d, - unsigned long hwirq) + unsigned int hwirq) { if (d->ops->to_irq) return d->ops->to_irq(d, hwirq); diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c index 200ce83..7bae422 100644 --- a/kernel/irq/irqdomain.c +++ b/kernel/irq/irqdomain.c @@ -20,7 +20,7 @@ static DEFINE_MUTEX(irq_domain_mutex); void irq_domain_add(struct irq_domain *domain) { struct irq_data *d; - int hwirq, irq; + unsigned int hwirq, irq; /* * This assumes that the irq_domain owner has already allocated @@ -54,7 +54,7 @@ void irq_domain_add(struct irq_domain *domain) void irq_domain_del(struct irq_domain *domain) { struct irq_data *d; - int hwirq, irq; + unsigned int hwirq, irq; mutex_lock(&irq_domain_mutex); list_del(&domain->list); @@ -82,7 +82,7 @@ unsigned int irq_create_of_mapping(struct device_node *controller, const u32 *intspec, unsigned int intsize) { struct irq_domain *domain; - unsigned long hwirq; + unsigned int hwirq; unsigned int irq, type; int rc = -EINVAL; @@ -129,7 +129,7 @@ EXPORT_SYMBOL_GPL(irq_dispose_mapping); int irq_domain_simple_dt_translate(struct irq_domain *d, struct device_node *controller, const u32 *intspec, unsigned int intsize, - unsigned long *out_hwirq, unsigned int *out_type) + unsigned int *out_hwirq, unsigned int *out_type) { if (d->of_node != controller) return -EINVAL; -- 1.7.2.3 From ddaney.cavm@gmail.com Thu Dec 15 03:32:24 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 15 Dec 2011 03:33:41 +0100 (CET) Received: from mail-yw0-f49.google.com ([209.85.213.49]:62711 "EHLO mail-yw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903748Ab1LOCcY (ORCPT ); Thu, 15 Dec 2011 03:32:24 +0100 Received: by yhpp34 with SMTP id p34so1944075yhp.36 for ; Wed, 14 Dec 2011 18:32:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=ieQvm4qdX0M/K3ULILcQgmjrw7BeBTmLUzcmYGjI9ck=; b=a6mQZcgq6AAPCK2sCHd9BvFoUGcsjMq7FqKduNJnO4RBMzYKRfStgNhtU4tJandUgW p1wOKVIlXnaCX2qZzDi0DvaBVV1FFyjTRYgCJ7p1BeO1HNIBvuo9pnMzk/2rVQoVVsAY 8rS8CqsvlyRQ0WsD7cOb9VhTeq8I0j5NIuDdc= Received: by 10.236.135.77 with SMTP id t53mr1928972yhi.49.1323916338321; Wed, 14 Dec 2011 18:32:18 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id k3sm5847212ani.13.2011.12.14.18.32.16 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 14 Dec 2011 18:32:17 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBF2WFVs008917; Wed, 14 Dec 2011 18:32:15 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBF2WFeD008916; Wed, 14 Dec 2011 18:32:15 -0800 From: David Daney To: Thomas Gleixner , devicetree-discuss@lists.ozlabs.org, Grant Likely , Rob Herring Cc: linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, David Daney Subject: [PATCH v2 3/4] irq/of/ARM: Enhance irq iteration capability of irq_domain code. Date: Wed, 14 Dec 2011 18:32:09 -0800 Message-Id: <1323916330-8865-4-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1323916330-8865-1-git-send-email-ddaney.cavm@gmail.com> References: <1323916330-8865-1-git-send-email-ddaney.cavm@gmail.com> X-archive-position: 32103 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 11960 Content-Length: 7288 Lines: 235 From: David Daney Not all irq_domain have linear sequences of irq numbers, so add hooks for domain specific iteration of the irqs in the domain. There is an optional function in irq_domain_ops (each_irq) that iterates over the irqs in the domain calling a callback function on each one. If it is not present, the new helper functions irq_domain_each_irq() and irq_domain_each_hwirq() iterate using the existing semantics. arch/arm/common/gic.c had to be modified to use the new iteration method as part of the change. Signed-off-by: David Daney --- arch/arm/common/gic.c | 32 ++++++++++------- include/linux/irqdomain.h | 14 +++++--- kernel/irq/irqdomain.c | 84 ++++++++++++++++++++++++++++++++------------ 3 files changed, 89 insertions(+), 41 deletions(-) diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 171061f..2e091b7 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -345,6 +345,24 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) irq_set_chained_handler(irq, gic_handle_cascade_irq); } +static int __init gic_dist_init_domain_cb(struct irq_domain *domain, + unsigned int irq, + unsigned int hwirq) +{ + if (hwirq < 32) { + irq_set_percpu_devid(irq); + irq_set_chip_and_handler(irq, &gic_chip, + handle_percpu_devid_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN); + } else { + irq_set_chip_and_handler(irq, &gic_chip, + handle_fasteoi_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + } + irq_set_chip_data(irq, gic); + return 0; +} + static void __init gic_dist_init(struct gic_chip_data *gic) { unsigned int i, irq; @@ -392,19 +410,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic) /* * Setup the Linux IRQ subsystem. */ - irq_domain_for_each_irq(domain, i, irq) { - if (i < 32) { - irq_set_percpu_devid(irq); - irq_set_chip_and_handler(irq, &gic_chip, - handle_percpu_devid_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN); - } else { - irq_set_chip_and_handler(irq, &gic_chip, - handle_fasteoi_irq); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - } - irq_set_chip_data(irq, gic); - } + irq_domain_each_irq(domain, gic_dist_init_domain_cb); writel_relaxed(1, base + GIC_DIST_CTRL); } diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h index 16ba5a9..68d031b 100644 --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -27,12 +27,16 @@ struct irq_domain; * @to_irq: (optional) given a local hardware irq number, return the linux * irq number. If to_irq is not implemented, then the irq_domain * will use this translation: irq = (domain->irq_base + hwirq) + * @each_irq: (optional) call the cb function for each irq that is a + * member of the domain. * @dt_translate: Given a device tree node and interrupt specifier, decode * the hardware irq number and linux irq type value. */ struct irq_domain_ops { unsigned int (*to_irq)(struct irq_domain *d, unsigned int hwirq); - + int (*each_irq)(struct irq_domain *d, + int (*cb)(struct irq_domain *d, + unsigned int irq, unsigned int hwirq)); #ifdef CONFIG_OF int (*dt_translate)(struct irq_domain *d, struct device_node *node, const u32 *intspec, unsigned int intsize, @@ -81,10 +85,10 @@ static inline unsigned int irq_domain_to_irq(struct irq_domain *d, return d->irq_base + hwirq - d->hwirq_base; } -#define irq_domain_for_each_irq(d, hw, irq) \ - for (hw = d->hwirq_base, irq = irq_domain_to_irq(d, hw); \ - hw < d->hwirq_base + d->nr_irq; \ - hw++, irq = irq_domain_to_irq(d, hw)) +extern int irq_domain_each_irq(struct irq_domain *d, + int (*cb)(struct irq_domain *d, + unsigned int irq, + unsigned int hwirq)); extern void irq_domain_add(struct irq_domain *domain); extern void irq_domain_del(struct irq_domain *domain); diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c index 7bae422..c9cec12 100644 --- a/kernel/irq/irqdomain.c +++ b/kernel/irq/irqdomain.c @@ -9,6 +9,25 @@ static LIST_HEAD(irq_domain_list); static DEFINE_MUTEX(irq_domain_mutex); +static int irq_domain_add_per_irq(struct irq_domain *domain, unsigned int irq, + unsigned int hwirq) +{ + struct irq_data *d = irq_get_irq_data(irq); + + if (!d) { + WARN(1, "error: assigning domain to non existant irq_desc"); + return 1; + } + if (d->domain) { + /* things are broken; just report, don't clean up */ + WARN(1, "error: irq_desc already assigned to a domain"); + return 1; + } + d->domain = domain; + d->hwirq = hwirq; + return 0; +} + /** * irq_domain_add() - Register an irq_domain * @domain: ptr to initialized irq_domain structure @@ -19,52 +38,71 @@ static DEFINE_MUTEX(irq_domain_mutex); */ void irq_domain_add(struct irq_domain *domain) { - struct irq_data *d; - unsigned int hwirq, irq; - /* * This assumes that the irq_domain owner has already allocated * the irq_descs. This block will be removed when support for dynamic * allocation of irq_descs is added to irq_domain. */ - irq_domain_for_each_irq(domain, hwirq, irq) { - d = irq_get_irq_data(irq); - if (!d) { - WARN(1, "error: assigning domain to non existant irq_desc"); - return; - } - if (d->domain) { - /* things are broken; just report, don't clean up */ - WARN(1, "error: irq_desc already assigned to a domain"); - return; - } - d->domain = domain; - d->hwirq = hwirq; - } + irq_domain_each_irq(domain, irq_domain_add_per_irq); mutex_lock(&irq_domain_mutex); list_add(&domain->list, &irq_domain_list); mutex_unlock(&irq_domain_mutex); } +static int irq_domain_del_per_irq(struct irq_domain *domain, unsigned int irq, + unsigned int hwirq) +{ + struct irq_data *d = irq_get_irq_data(irq); + + d->domain = NULL; + return 0; +} + /** * irq_domain_del() - Unregister an irq_domain * @domain: ptr to registered irq_domain. */ void irq_domain_del(struct irq_domain *domain) { - struct irq_data *d; - unsigned int hwirq, irq; - mutex_lock(&irq_domain_mutex); list_del(&domain->list); mutex_unlock(&irq_domain_mutex); /* Clear the irq_domain assignments */ - irq_domain_for_each_irq(domain, hwirq, irq) { - d = irq_get_irq_data(irq); - d->domain = NULL; + irq_domain_each_irq(domain, irq_domain_del_per_irq); +} + +/** + * irq_domain_each_irq() - Iterate over each irq in an irq_domain + * @d: Pointer to the irq_domain to iterate over. + * @cb: Pointer to a function to be called for each irq in the + * irq_domain. + * + * The cb() function is called for each irq in the irq_domain. If it + * returns non-zero, the iteration is stopped. + * + * Returns: The value returned by the last invocation of cb(). + */ +int irq_domain_each_irq(struct irq_domain *d, + int (*cb)(struct irq_domain *d, unsigned int irq, + unsigned int hwirq)) +{ + unsigned int hw, irq; + int ret = 0; + + if (d->ops->each_irq) + return d->ops->each_irq(d, cb); + + for (hw = d->hwirq_base, irq = irq_domain_to_irq(d, hw); + hw < d->hwirq_base + d->nr_irq; + hw++, irq = irq_domain_to_irq(d, hw)) { + ret = cb(d, irq, hw); + if (ret) + break; } + + return ret; } #if defined(CONFIG_OF_IRQ) -- 1.7.2.3 From ddaney.cavm@gmail.com Thu Dec 15 03:32:25 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 15 Dec 2011 03:34:08 +0100 (CET) Received: from mail-yw0-f49.google.com ([209.85.213.49]:46229 "EHLO mail-yw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903749Ab1LOCcZ (ORCPT ); Thu, 15 Dec 2011 03:32:25 +0100 Received: by yhpp34 with SMTP id p34so1944078yhp.36 for ; Wed, 14 Dec 2011 18:32:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=rzveNjIJujWCKSY5/KvsTSJDiHGQ5+YCMzGQUA/YMbw=; b=SazqVcFxXLfXYPpevc9bL5fAzvYd/XUS3OFpuwi3hyCe1DLTDKYVEIqjDLGJggYnyR mo82ezAn4HiQXuo1lrZRT+7khi2bDbYvlUr+pB12TeWy0CzbFcZ8uAwmtCN2CbsTbkhU /sdGKesvOVhleG3Rtk3FAyfTYt9ixu/ml02j8= Received: by 10.236.200.130 with SMTP id z2mr2493628yhn.25.1323916338535; Wed, 14 Dec 2011 18:32:18 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id v48sm6700900yhk.6.2011.12.14.18.32.16 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 14 Dec 2011 18:32:17 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBF2WFGr008921; Wed, 14 Dec 2011 18:32:15 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBF2WF69008920; Wed, 14 Dec 2011 18:32:15 -0800 From: David Daney To: Thomas Gleixner , devicetree-discuss@lists.ozlabs.org, Grant Likely , Rob Herring Cc: linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, David Daney Subject: [PATCH v2 4/4] MIPS: Octeon: Add irq_create_of_mapping() and GPIO interrupts. Date: Wed, 14 Dec 2011 18:32:10 -0800 Message-Id: <1323916330-8865-5-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1323916330-8865-1-git-send-email-ddaney.cavm@gmail.com> References: <1323916330-8865-1-git-send-email-ddaney.cavm@gmail.com> X-archive-position: 32104 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 11961 Content-Length: 10177 Lines: 359 From: David Daney This is needed for Octeon to use the Device Tree. The GPIO interrupts are configured based on Device Tree properties Signed-off-by: David Daney --- arch/mips/Kconfig | 1 + arch/mips/cavium-octeon/octeon-irq.c | 259 +++++++++++++++++++++++++++++++++- 2 files changed, 259 insertions(+), 1 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 825ded9..6685497 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1432,6 +1432,7 @@ config CPU_CAVIUM_OCTEON select WEAK_ORDERING select CPU_SUPPORTS_HIGHMEM select CPU_SUPPORTS_HUGEPAGES + select IRQ_DOMAIN help The Cavium Octeon processor is a highly integrated chip containing many ethernet hardware widgets for networking tasks. The processor diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index ffd4ae6..9a9d4a7 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c @@ -7,12 +7,16 @@ */ #include +#include #include +#include #include +#include #include #include #include +#include static DEFINE_RAW_SPINLOCK(octeon_irq_ciu0_lock); static DEFINE_RAW_SPINLOCK(octeon_irq_ciu1_lock); @@ -58,6 +62,158 @@ static void __init octeon_irq_set_ciu_mapping(int irq, int line, int bit, octeon_irq_ciu_to_irq[line][bit] = irq; } +static int octeon_irq_gpio_dt_translate(struct irq_domain *d, + struct device_node *node, + const u32 *intspec, + unsigned int intsize, + unsigned int *out_hwirq, + unsigned int *out_type) +{ + unsigned int irq; + unsigned int type; + unsigned int ciu = 0, bit = 0; + unsigned int pin; + unsigned int trigger; + bool set_edge_handler = false; + + if (d->of_node != node) + return -EINVAL; + + if (intsize < 2) + return -EINVAL; + + pin = be32_to_cpup(intspec); + if (pin >= 16) + return -EINVAL; + + trigger = be32_to_cpup(intspec + 1); + + switch (trigger) { + case 1: + type = IRQ_TYPE_EDGE_RISING; + set_edge_handler = true; + break; + case 2: + type = IRQ_TYPE_EDGE_FALLING; + set_edge_handler = true; + break; + case 4: + type = IRQ_TYPE_LEVEL_HIGH; + break; + case 8: + type = IRQ_TYPE_LEVEL_LOW; + break; + default: + pr_err("Error: (%s) Invalid irq trigger specification: %x\n", + node->name, + trigger); + type = IRQ_TYPE_LEVEL_LOW; + break; + } + *out_type = type; + *out_hwirq = d->hwirq_base + pin; + + ciu = *out_hwirq >> 6; + bit = *out_hwirq & 0x3f; + + irq = octeon_irq_ciu_to_irq[ciu][bit]; + + if (set_edge_handler) + __irq_set_handler(irq, handle_edge_irq, 0, NULL); + + + return 0; +} + +/* + * octeon_irq_ciu_dt_translate - Hook to resolve OF irq specifier into a Linux irq# + * + * Octeon irq maps are a pair of indexes. The first selects either + * ciu0 or ciu1, the second is the bit within the ciu register. + */ +static int octeon_irq_ciu_dt_translate(struct irq_domain *d, + struct device_node *node, + const u32 *intspec, + unsigned int intsize, + unsigned int *out_hwirq, + unsigned int *out_type) +{ + unsigned int ciu, bit; + + ciu = be32_to_cpup(intspec); + bit = be32_to_cpup(intspec + 1); + + if (ciu > 1 || bit > 63) + return -EINVAL; + + if (octeon_irq_ciu_to_irq[ciu][bit] == 0) + return -EINVAL; + + *out_hwirq = (ciu << 6) | bit; + *out_type = 0; + + return 0; +} + +static unsigned int octeon_irq_ciu_to_irqf(struct irq_domain *d, + unsigned int hwirq) +{ + unsigned int ciu, bit; + + ciu = (hwirq >> 6) & 1; + bit = hwirq & 0x3f; + return octeon_irq_ciu_to_irq[ciu][bit]; +} + +static bool octeon_irq_ciu_in_domain(unsigned int irq) +{ + return (irq != 0) && + !(irq >= OCTEON_IRQ_GPIO0 && irq < OCTEON_IRQ_GPIO0 + 16); +} + +static int octeon_irq_ciu_each_irq(struct irq_domain *d, + int (*cb)(struct irq_domain *d, + unsigned int irq, + unsigned int hwirq)) +{ + int ciu, bit; + int ret = 0; + unsigned int irq, hwirq; + + for (ciu = 0; ciu <= 1; ciu++) + for (bit = 0; bit <= 63; bit++) { + irq = octeon_irq_ciu_to_irq[ciu][bit]; + hwirq = (ciu << 6) | bit; + if (octeon_irq_ciu_in_domain(irq)) { + ret = cb(d, irq, hwirq); + if (ret) + return ret; + } + } + return 0; +} + +static const struct irq_domain_ops octeon_irq_ciu_domain_ops = { + .to_irq = octeon_irq_ciu_to_irqf, + .each_irq = octeon_irq_ciu_each_irq, + .dt_translate = octeon_irq_ciu_dt_translate, +}; + +static const struct irq_domain_ops octeon_irq_gpio_domain_ops = { + .to_irq = octeon_irq_ciu_to_irqf, + .dt_translate = octeon_irq_gpio_dt_translate, +}; + +static struct irq_domain octeon_irq_ciu_domain = { + .ops = &octeon_irq_ciu_domain_ops +}; + +static struct irq_domain octeon_irq_gpio_domain = { + .irq_base = OCTEON_IRQ_GPIO0, + .nr_irq = 16, + .ops = &octeon_irq_gpio_domain_ops +}; + static int octeon_coreid_for_cpu(int cpu) { #ifdef CONFIG_SMP @@ -505,6 +661,72 @@ static void octeon_irq_ciu_enable_all_v2(struct irq_data *data) } } +static void octeon_irq_gpio_setup(struct irq_data *data) +{ + union cvmx_gpio_bit_cfgx cfg; + int bit = data->irq - OCTEON_IRQ_GPIO0; + u32 t = irqd_get_trigger_type(data); + + cfg.u64 = 0; + cfg.s.int_en = 1; + cfg.s.int_type = (t & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) != 0; + cfg.s.rx_xor = (t & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_EDGE_FALLING)) != 0; + + /* 1 uS glitch filter*/ + cfg.s.fil_cnt = 7; + cfg.s.fil_sel = 3; + + cvmx_write_csr(CVMX_GPIO_BIT_CFGX(bit), cfg.u64); +} + +static void octeon_irq_ciu_enable_gpio_v2(struct irq_data *data) +{ + octeon_irq_gpio_setup(data); + octeon_irq_ciu_enable_v2(data); +} + +static void octeon_irq_ciu_enable_gpio(struct irq_data *data) +{ + octeon_irq_gpio_setup(data); + octeon_irq_ciu_enable(data); +} + +static int octeon_irq_ciu_gpio_set_type(struct irq_data *data, unsigned int t) +{ + u32 current_type = irqd_get_trigger_type(data); + + /* If the type has been set, don't change it */ + if (current_type && current_type != t) + return -EINVAL; + + irqd_set_trigger_type(data, t); + return IRQ_SET_MASK_OK; +} + +static void octeon_irq_ciu_disable_gpio_v2(struct irq_data *data) +{ + int bit = data->irq - OCTEON_IRQ_GPIO0; + cvmx_write_csr(CVMX_GPIO_BIT_CFGX(bit), 0); + + octeon_irq_ciu_disable_all_v2(data); +} + +static void octeon_irq_ciu_disable_gpio(struct irq_data *data) +{ + int bit = data->irq - OCTEON_IRQ_GPIO0; + cvmx_write_csr(CVMX_GPIO_BIT_CFGX(bit), 0); + + octeon_irq_ciu_disable_all(data); +} + +static void octeon_irq_ciu_gpio_ack(struct irq_data *data) +{ + int bit = data->irq - OCTEON_IRQ_GPIO0; + u64 mask = 1ull << bit; + + cvmx_write_csr(CVMX_GPIO_INT_CLR, mask); +} + #ifdef CONFIG_SMP static void octeon_irq_cpu_offline_ciu(struct irq_data *data) @@ -717,6 +939,31 @@ static struct irq_chip octeon_irq_chip_ciu_mbox = { .flags = IRQCHIP_ONOFFLINE_ENABLED, }; +static struct irq_chip octeon_irq_chip_ciu_gpio_v2 = { + .name = "CIU-GPIO", + .irq_enable = octeon_irq_ciu_enable_gpio_v2, + .irq_disable = octeon_irq_ciu_disable_gpio_v2, + .irq_ack = octeon_irq_ciu_gpio_ack, + .irq_mask = octeon_irq_ciu_disable_local_v2, + .irq_unmask = octeon_irq_ciu_enable_v2, + .irq_set_type = octeon_irq_ciu_gpio_set_type, +#ifdef CONFIG_SMP + .irq_set_affinity = octeon_irq_ciu_set_affinity_v2, +#endif +}; + +static struct irq_chip octeon_irq_chip_ciu_gpio = { + .name = "CIU-GPIO", + .irq_enable = octeon_irq_ciu_enable_gpio, + .irq_disable = octeon_irq_ciu_disable_gpio, + .irq_mask = octeon_irq_dummy_mask, + .irq_ack = octeon_irq_ciu_gpio_ack, + .irq_set_type = octeon_irq_ciu_gpio_set_type, +#ifdef CONFIG_SMP + .irq_set_affinity = octeon_irq_ciu_set_affinity, +#endif +}; + /* * Watchdog interrupts are special. They are associated with a single * core, so we hardwire the affinity to that core. @@ -890,6 +1137,7 @@ static void __init octeon_irq_init_ciu(void) struct irq_chip *chip_edge; struct irq_chip *chip_mbox; struct irq_chip *chip_wd; + struct irq_chip *chip_gpio; octeon_irq_init_ciu_percpu(); octeon_irq_setup_secondary = octeon_irq_setup_secondary_ciu; @@ -904,6 +1152,7 @@ static void __init octeon_irq_init_ciu(void) chip_edge = &octeon_irq_chip_ciu_edge_v2; chip_mbox = &octeon_irq_chip_ciu_mbox_v2; chip_wd = &octeon_irq_chip_ciu_wd_v2; + chip_gpio = &octeon_irq_chip_ciu_gpio_v2; } else { octeon_irq_ip2 = octeon_irq_ip2_v1; octeon_irq_ip3 = octeon_irq_ip3_v1; @@ -911,6 +1160,7 @@ static void __init octeon_irq_init_ciu(void) chip_edge = &octeon_irq_chip_ciu_edge; chip_mbox = &octeon_irq_chip_ciu_mbox; chip_wd = &octeon_irq_chip_ciu_wd; + chip_gpio = &octeon_irq_chip_ciu_gpio; } octeon_irq_ip4 = octeon_irq_ip4_mask; @@ -921,7 +1171,7 @@ static void __init octeon_irq_init_ciu(void) for (i = 0; i < 16; i++) octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WORKQ0, 0, i + 0, chip, handle_level_irq); for (i = 0; i < 16; i++) - octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_GPIO0, 0, i + 16, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_GPIO0, 0, i + 16, chip_gpio, handle_level_irq); octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX0, 0, 32, chip_mbox, handle_percpu_irq); octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX1, 0, 33, chip_mbox, handle_percpu_irq); @@ -995,6 +1245,13 @@ static void __init octeon_irq_init_ciu(void) octeon_irq_set_ciu_mapping(OCTEON_IRQ_DFM, 1, 56, chip, handle_level_irq); octeon_irq_set_ciu_mapping(OCTEON_IRQ_RST, 1, 63, chip, handle_level_irq); + octeon_irq_ciu_domain.of_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-ciu"); + irq_domain_add(&octeon_irq_ciu_domain); + + octeon_irq_gpio_domain.of_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-gpio"); + octeon_irq_gpio_domain.hwirq_base = ((0 << 6) | 16); + irq_domain_add(&octeon_irq_gpio_domain); + /* Enable the CIU lines */ set_c0_status(STATUSF_IP3 | STATUSF_IP2); clear_c0_status(STATUSF_IP4); -- 1.7.2.3 From keguang.zhang@gmail.com Fri Dec 16 12:39:47 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 16 Dec 2011 12:39:56 +0100 (CET) Received: from mail-iy0-f177.google.com ([209.85.210.177]:39852 "EHLO mail-iy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903655Ab1LPLjr (ORCPT ); Fri, 16 Dec 2011 12:39:47 +0100 Received: by iadk27 with SMTP id k27so3443602iad.36 for ; Fri, 16 Dec 2011 03:39:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=nd6ypvvUbaEhNRFiIGhVdVDBlE2lb6Y2/HoMBAyNA5A=; b=Oc4oQYQyyHMlUeolOj1iuRM5XNKs1UprNrvuO5IIUZggIRghn31IvFbPTu1FWdTHyR 52T9xJQ1y3pMuz3VhwkZ/jcQturfc9pIsuAJmsl8S9AX/intjosgSf21wLP9qVQFjwkA cXOkrHeGV61mI0N1zUB+QS4Av/Q6gmapmnbXU= Received: by 10.50.42.166 with SMTP id p6mr8043284igl.17.1324035581310; Fri, 16 Dec 2011 03:39:41 -0800 (PST) Received: from kelvin-Work.chd.intersil.com ([182.148.112.76]) by mx.google.com with ESMTPS id wo4sm14335289igc.5.2011.12.16.03.39.33 (version=SSLv3 cipher=OTHER); Fri, 16 Dec 2011 03:39:40 -0800 (PST) From: Kelvin Cheung To: ralf@linux-mips.org, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org Cc: zhzhl555@gmail.com, peppe.cavallaro@st.com, wuzhangjin@gmail.com, r0bertz@gentoo.org, Kelvin Cheung Subject: [PATCH V5 0/4] MIPS: Add support for Loongson1B Date: Fri, 16 Dec 2011 19:39:00 +0800 Message-Id: <1324035544-2373-1-git-send-email-keguang.zhang@gmail.com> X-Mailer: git-send-email 1.7.1 X-archive-position: 32106 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: keguang.zhang@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 13172 Content-Length: 3604 Lines: 73 These patches add support for Loongson1B. Changelog: V5: Add IS_ENABLED() macro for platform devices. V4: Split the RTC patch, and merge the arch/mips parts into patch 2/4. Use 'KSEG1ADDR' instead of 'ioremap()' in registers definitions. V3: Add RTC device for Loongson1B. V2: Add Ethernet device for Loongson1B. V1: Add basic support for Loongson1B. ---------------- Kelvin Cheung (4): MIPS: Add CPU support for Loongson1B MIPS: Add board support for Loongson1B MIPS: Add Makefile and Kconfig for Loongson1B MIPS: Add defconfig for Loongson1B arch/mips/Kbuild.platforms | 1 + arch/mips/Kconfig | 31 ++++ arch/mips/configs/ls1b_defconfig | 90 ++++++++++++ arch/mips/include/asm/cpu.h | 3 +- arch/mips/include/asm/mach-loongson1/irq.h | 68 +++++++++ arch/mips/include/asm/mach-loongson1/loongson1.h | 44 ++++++ arch/mips/include/asm/mach-loongson1/platform.h | 22 +++ arch/mips/include/asm/mach-loongson1/prom.h | 24 +++ arch/mips/include/asm/mach-loongson1/regs-clk.h | 33 +++++ arch/mips/include/asm/mach-loongson1/regs-wdt.h | 22 +++ arch/mips/include/asm/mach-loongson1/war.h | 25 ++++ arch/mips/include/asm/module.h | 2 + arch/mips/kernel/cpu-probe.c | 15 ++ arch/mips/kernel/perf_event_mipsxx.c | 6 + arch/mips/kernel/traps.c | 1 + arch/mips/loongson1/Kconfig | 21 +++ arch/mips/loongson1/Makefile | 11 ++ arch/mips/loongson1/Platform | 7 + arch/mips/loongson1/common/Makefile | 5 + arch/mips/loongson1/common/clock.c | 165 ++++++++++++++++++++++ arch/mips/loongson1/common/irq.c | 146 +++++++++++++++++++ arch/mips/loongson1/common/platform.c | 102 +++++++++++++ arch/mips/loongson1/common/prom.c | 87 ++++++++++++ arch/mips/loongson1/common/reset.c | 45 ++++++ arch/mips/loongson1/common/setup.c | 29 ++++ arch/mips/loongson1/ls1b/Makefile | 5 + arch/mips/loongson1/ls1b/board.c | 36 +++++ arch/mips/oprofile/common.c | 1 + arch/mips/oprofile/op_model_mipsxx.c | 4 + 29 files changed, 1050 insertions(+), 1 deletions(-) create mode 100644 arch/mips/configs/ls1b_defconfig create mode 100644 arch/mips/include/asm/mach-loongson1/irq.h create mode 100644 arch/mips/include/asm/mach-loongson1/loongson1.h create mode 100644 arch/mips/include/asm/mach-loongson1/platform.h create mode 100644 arch/mips/include/asm/mach-loongson1/prom.h create mode 100644 arch/mips/include/asm/mach-loongson1/regs-clk.h create mode 100644 arch/mips/include/asm/mach-loongson1/regs-wdt.h create mode 100644 arch/mips/include/asm/mach-loongson1/war.h create mode 100644 arch/mips/loongson1/Kconfig create mode 100644 arch/mips/loongson1/Makefile create mode 100644 arch/mips/loongson1/Platform create mode 100644 arch/mips/loongson1/common/Makefile create mode 100644 arch/mips/loongson1/common/clock.c create mode 100644 arch/mips/loongson1/common/irq.c create mode 100644 arch/mips/loongson1/common/platform.c create mode 100644 arch/mips/loongson1/common/prom.c create mode 100644 arch/mips/loongson1/common/reset.c create mode 100644 arch/mips/loongson1/common/setup.c create mode 100644 arch/mips/loongson1/ls1b/Makefile create mode 100644 arch/mips/loongson1/ls1b/board.c From keguang.zhang@gmail.com Fri Dec 16 12:39:50 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 16 Dec 2011 12:40:24 +0100 (CET) Received: from mail-iy0-f177.google.com ([209.85.210.177]:39852 "EHLO mail-iy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903656Ab1LPLju (ORCPT ); Fri, 16 Dec 2011 12:39:50 +0100 Received: by mail-iy0-f177.google.com with SMTP id k27so3443602iad.36 for ; Fri, 16 Dec 2011 03:39:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=i+TicSe9HOt5rkS3uPCQnimznRGQMjaYCFLDWCwXI4U=; b=ep+qZRHtWGnnc5MYLzDKkqzdMqXOKgMKyLOpdVDStdf+yFg2VBwrGje9JRfum5SvWk jMYlSEbr3y2zAIEbf3oDp5AZ18ZBYQoY4KnmtBJQYkytv21SH2Z0WN6M69OlFLN9UHsW WVlNcfTts6CEIUh3hIxgR/800WMWJZ7uFVzJQ= Received: by 10.50.157.135 with SMTP id wm7mr8034724igb.39.1324035589372; Fri, 16 Dec 2011 03:39:49 -0800 (PST) Received: from kelvin-Work.chd.intersil.com ([182.148.112.76]) by mx.google.com with ESMTPS id wo4sm14335289igc.5.2011.12.16.03.39.41 (version=SSLv3 cipher=OTHER); Fri, 16 Dec 2011 03:39:48 -0800 (PST) From: Kelvin Cheung To: ralf@linux-mips.org, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org Cc: zhzhl555@gmail.com, peppe.cavallaro@st.com, wuzhangjin@gmail.com, r0bertz@gentoo.org, Kelvin Cheung Subject: [PATCH V5 1/4] MIPS: Add CPU support for Loongson1B Date: Fri, 16 Dec 2011 19:39:01 +0800 Message-Id: <1324035544-2373-2-git-send-email-keguang.zhang@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1324035544-2373-1-git-send-email-keguang.zhang@gmail.com> References: <1324035544-2373-1-git-send-email-keguang.zhang@gmail.com> X-archive-position: 32107 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: keguang.zhang@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 13175 Content-Length: 4772 Lines: 150 This patch adds CPU support for Loongson1B. Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS), which implements the MIPS32 release 2 instruction set. Signed-off-by: Kelvin Cheung --- arch/mips/include/asm/cpu.h | 3 ++- arch/mips/include/asm/module.h | 2 ++ arch/mips/kernel/cpu-probe.c | 15 +++++++++++++++ arch/mips/kernel/perf_event_mipsxx.c | 6 ++++++ arch/mips/kernel/traps.c | 1 + arch/mips/oprofile/common.c | 1 + arch/mips/oprofile/op_model_mipsxx.c | 4 ++++ 7 files changed, 31 insertions(+), 1 deletions(-) diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 5f95a4b..975f372 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -191,6 +191,7 @@ #define PRID_REV_34K_V1_0_2 0x0022 #define PRID_REV_LOONGSON2E 0x0002 #define PRID_REV_LOONGSON2F 0x0003 +#define PRID_REV_LOONGSON1B 0x0020 /* * Older processors used to encode processor version and revision in two @@ -253,7 +254,7 @@ enum cpu_type_enum { */ CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K, CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350, - CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, + CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_LOONGSON1, /* * MIPS64 class processors diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h index bc01a02..b53d642 100644 --- a/arch/mips/include/asm/module.h +++ b/arch/mips/include/asm/module.h @@ -116,6 +116,8 @@ search_module_dbetables(unsigned long addr) #define MODULE_PROC_FAMILY "SB1 " #elif defined CONFIG_CPU_LOONGSON2 #define MODULE_PROC_FAMILY "LOONGSON2 " +#elif defined CONFIG_CPU_LOONGSON1 +#define MODULE_PROC_FAMILY "LOONGSON1 " #elif defined CONFIG_CPU_CAVIUM_OCTEON #define MODULE_PROC_FAMILY "OCTEON " #elif defined CONFIG_CPU_XLR diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 664bc13..98d4235 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -37,6 +37,8 @@ void (*cpu_wait)(void); EXPORT_SYMBOL(cpu_wait); +static void __cpuinit decode_configs(struct cpuinfo_mips *c); + static void r3081_wait(void) { unsigned long cfg = read_c0_conf(); @@ -191,6 +193,7 @@ void __init check_wait(void) case CPU_CAVIUM_OCTEON2: case CPU_JZRISC: case CPU_XLR: + case CPU_LOONGSON1: cpu_wait = r4k_wait; break; @@ -636,6 +639,18 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) MIPS_CPU_32FPR; c->tlbsize = 64; break; + case PRID_IMP_LOONGSON1: + decode_configs(c); + + c->cputype = CPU_LOONGSON1; + + switch (c->processor_id & PRID_REV_MASK) { + case PRID_REV_LOONGSON1B: + __cpu_name[cpu] = "Loongson 1B"; + break; + } + + break; } } diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c index e5ad09a..e316b0e 100644 --- a/arch/mips/kernel/perf_event_mipsxx.c +++ b/arch/mips/kernel/perf_event_mipsxx.c @@ -1062,6 +1062,12 @@ init_hw_perf_events(void) mipsxxcore_pmu.irq = irq; mipspmu = &mipsxxcore_pmu; break; + case CPU_LOONGSON1: + mipsxxcore_pmu.name = "mips/loongson1"; + mipsxxcore_pmu.num_counters = counters; + mipsxxcore_pmu.irq = irq; + mipspmu = &mipsxxcore_pmu; + break; default: pr_cont("Either hardware does not support performance " "counters, or not yet implemented.\n"); diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 01eff7e..cd55823 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1241,6 +1241,7 @@ static inline void parity_protection_init(void) break; case CPU_5KC: + case CPU_LOONGSON1: write_c0_ecc(0x80000000); back_to_back_c0_hazard(); /* Set the PE bit (bit 31) in the c0_errctl register. */ diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c index d1f2d4c..99216f0 100644 --- a/arch/mips/oprofile/common.c +++ b/arch/mips/oprofile/common.c @@ -89,6 +89,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) case CPU_R10000: case CPU_R12000: case CPU_R14000: + case CPU_LOONGSON1: lmodel = &op_model_mipsxx_ops; break; diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index 54759f1..03be670 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c @@ -365,6 +365,10 @@ static int __init mipsxx_init(void) op_model_mipsxx_ops.cpu_type = "mips/sb1"; break; + case CPU_LOONGSON1: + op_model_mipsxx_ops.cpu_type = "mips/loongson1"; + break; + default: printk(KERN_ERR "Profiling unsupported for this CPU\n"); -- 1.7.1 From keguang.zhang@gmail.com Fri Dec 16 12:39:59 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 16 Dec 2011 12:40:50 +0100 (CET) Received: from mail-iy0-f177.google.com ([209.85.210.177]:39852 "EHLO mail-iy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903661Ab1LPLj7 (ORCPT ); Fri, 16 Dec 2011 12:39:59 +0100 Received: by mail-iy0-f177.google.com with SMTP id k27so3443602iad.36 for ; Fri, 16 Dec 2011 03:39:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=ksrJr2SyoXctXHf14zOGcxUY+f3OQ9cwc/iSb7xnO1Y=; b=m68NxiZTm4HDUMYJnZVxdKYsN02YNG0xSsrrdwjXmwQ/7LFvySnoUqWqI75frJQ4Dl X1A737c60RvCFZ3TKMpqL2TE254dM1njS+bWMO3z5RVH8fJMGqbF1fxgi5cllYz3mlms uvm8Au8EhFk4ixV67ggpdvBCoGXPHWwk6cR6A= Received: by 10.50.219.135 with SMTP id po7mr8377522igc.11.1324035598332; Fri, 16 Dec 2011 03:39:58 -0800 (PST) Received: from kelvin-Work.chd.intersil.com ([182.148.112.76]) by mx.google.com with ESMTPS id wo4sm14335289igc.5.2011.12.16.03.39.49 (version=SSLv3 cipher=OTHER); Fri, 16 Dec 2011 03:39:57 -0800 (PST) From: Kelvin Cheung To: ralf@linux-mips.org, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org Cc: zhzhl555@gmail.com, peppe.cavallaro@st.com, wuzhangjin@gmail.com, r0bertz@gentoo.org, Kelvin Cheung Subject: [PATCH V5 2/4] MIPS: Add board support for Loongson1B Date: Fri, 16 Dec 2011 19:39:02 +0800 Message-Id: <1324035544-2373-3-git-send-email-keguang.zhang@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1324035544-2373-1-git-send-email-keguang.zhang@gmail.com> References: <1324035544-2373-1-git-send-email-keguang.zhang@gmail.com> X-archive-position: 32108 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: keguang.zhang@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 13178 Content-Length: 26911 Lines: 979 This patch adds basic platform devices for Loongson1B, including serial port, ethernet, rtc and interrupt handler. Loongson1B UART is compatible with NS16550A. Loongson1B GMAC is built around Synopsys IP Core. Use normal descriptor instead of enhanced descriptor. Thanks to Giuseppe for updating the normal descriptor in stmmac driver. Thanks to Zhao Zhang for implementing the RTC driver. Signed-off-by: Kelvin Cheung --- arch/mips/include/asm/mach-loongson1/irq.h | 68 +++++++++ arch/mips/include/asm/mach-loongson1/loongson1.h | 44 ++++++ arch/mips/include/asm/mach-loongson1/platform.h | 22 +++ arch/mips/include/asm/mach-loongson1/prom.h | 24 +++ arch/mips/include/asm/mach-loongson1/regs-clk.h | 33 +++++ arch/mips/include/asm/mach-loongson1/regs-wdt.h | 22 +++ arch/mips/include/asm/mach-loongson1/war.h | 25 ++++ arch/mips/loongson1/common/clock.c | 165 ++++++++++++++++++++++ arch/mips/loongson1/common/irq.c | 146 +++++++++++++++++++ arch/mips/loongson1/common/platform.c | 102 +++++++++++++ arch/mips/loongson1/common/prom.c | 87 ++++++++++++ arch/mips/loongson1/common/reset.c | 45 ++++++ arch/mips/loongson1/common/setup.c | 29 ++++ arch/mips/loongson1/ls1b/board.c | 36 +++++ 14 files changed, 848 insertions(+), 0 deletions(-) create mode 100644 arch/mips/include/asm/mach-loongson1/irq.h create mode 100644 arch/mips/include/asm/mach-loongson1/loongson1.h create mode 100644 arch/mips/include/asm/mach-loongson1/platform.h create mode 100644 arch/mips/include/asm/mach-loongson1/prom.h create mode 100644 arch/mips/include/asm/mach-loongson1/regs-clk.h create mode 100644 arch/mips/include/asm/mach-loongson1/regs-wdt.h create mode 100644 arch/mips/include/asm/mach-loongson1/war.h create mode 100644 arch/mips/loongson1/common/clock.c create mode 100644 arch/mips/loongson1/common/irq.c create mode 100644 arch/mips/loongson1/common/platform.c create mode 100644 arch/mips/loongson1/common/prom.c create mode 100644 arch/mips/loongson1/common/reset.c create mode 100644 arch/mips/loongson1/common/setup.c create mode 100644 arch/mips/loongson1/ls1b/board.c diff --git a/arch/mips/include/asm/mach-loongson1/irq.h b/arch/mips/include/asm/mach-loongson1/irq.h new file mode 100644 index 0000000..762bd2b --- /dev/null +++ b/arch/mips/include/asm/mach-loongson1/irq.h @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2011 Zhang, Keguang + * + * IRQ mappings for Loongson1. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + + +#ifndef __ASM_MACH_LOONGSON1_IRQ_H +#define __ASM_MACH_LOONGSON1_IRQ_H + +/* + * CPU core Interrupt Numbers + */ +#define MIPS_CPU_IRQ_BASE 0 +#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x)) +#define SOFTINT0_IRQ MIPS_CPU_IRQ(0) +#define SOFTINT1_IRQ MIPS_CPU_IRQ(1) +#define INT0_IRQ MIPS_CPU_IRQ(2) +#define INT1_IRQ MIPS_CPU_IRQ(3) +#define INT2_IRQ MIPS_CPU_IRQ(4) +#define INT3_IRQ MIPS_CPU_IRQ(5) +#define INT4_IRQ MIPS_CPU_IRQ(6) +#define TIMER_IRQ MIPS_CPU_IRQ(7) /* cpu timer */ + +/* + * INT0~3 Interrupt Numbers + */ +#define LS1X_IRQ_BASE 8 +#define LS1X_IRQ(n, x) (LS1X_IRQ_BASE + (n << 5) + (x)) + +#define LS1X_UART0_IRQ LS1X_IRQ(0, 2) +#define LS1X_UART1_IRQ LS1X_IRQ(0, 3) +#define LS1X_UART2_IRQ LS1X_IRQ(0, 4) +#define LS1X_UART3_IRQ LS1X_IRQ(0, 5) +#define LS1X_CAN0_IRQ LS1X_IRQ(0, 6) +#define LS1X_CAN1_IRQ LS1X_IRQ(0, 7) +#define LS1X_SPI0_IRQ LS1X_IRQ(0, 8) +#define LS1X_SPI1_IRQ LS1X_IRQ(0, 9) +#define LS1X_AC97_IRQ LS1X_IRQ(0, 10) +#define LS1X_DMA0_IRQ LS1X_IRQ(0, 13) +#define LS1X_DMA1_IRQ LS1X_IRQ(0, 14) +#define LS1X_DMA2_IRQ LS1X_IRQ(0, 15) +#define LS1X_PWM0_IRQ LS1X_IRQ(0, 17) +#define LS1X_PWM1_IRQ LS1X_IRQ(0, 18) +#define LS1X_PWM2_IRQ LS1X_IRQ(0, 19) +#define LS1X_PWM3_IRQ LS1X_IRQ(0, 20) +#define LS1X_RTC_INT0_IRQ LS1X_IRQ(0, 21) +#define LS1X_RTC_INT1_IRQ LS1X_IRQ(0, 22) +#define LS1X_RTC_INT2_IRQ LS1X_IRQ(0, 23) +#define LS1X_TOY_INT0_IRQ LS1X_IRQ(0, 24) +#define LS1X_TOY_INT1_IRQ LS1X_IRQ(0, 25) +#define LS1X_TOY_INT2_IRQ LS1X_IRQ(0, 26) +#define LS1X_RTC_TICK_IRQ LS1X_IRQ(0, 27) +#define LS1X_TOY_TICK_IRQ LS1X_IRQ(0, 28) + +#define LS1X_EHCI_IRQ LS1X_IRQ(1, 0) +#define LS1X_OHCI_IRQ LS1X_IRQ(1, 1) +#define LS1X_GMAC0_IRQ LS1X_IRQ(1, 2) +#define LS1X_GMAC1_IRQ LS1X_IRQ(1, 3) + +#define NR_IRQS LS1X_GMAC1_IRQ + +#endif /* __ASM_MACH_LOONGSON1_IRQ_H */ diff --git a/arch/mips/include/asm/mach-loongson1/loongson1.h b/arch/mips/include/asm/mach-loongson1/loongson1.h new file mode 100644 index 0000000..0440627 --- /dev/null +++ b/arch/mips/include/asm/mach-loongson1/loongson1.h @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2011 Zhang, Keguang + * + * Register mappings for Loongson1. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + + +#ifndef __ASM_MACH_LOONGSON1_LOONGSON1_H +#define __ASM_MACH_LOONGSON1_LOONGSON1_H + +#define DEFAULT_MEMSIZE 256 /* If no memsize provided */ + +/* Loongson1 Register Bases */ +#define LS1X_INTC_BASE 0x1fd01040 +#define LS1X_EHCI_BASE 0x1fe00000 +#define LS1X_OHCI_BASE 0x1fe08000 +#define LS1X_GMAC0_BASE 0x1fe10000 +#define LS1X_GMAC1_BASE 0x1fe20000 + +#define LS1X_UART0_BASE 0x1fe40000 +#define LS1X_UART1_BASE 0x1fe44000 +#define LS1X_UART2_BASE 0x1fe48000 +#define LS1X_UART3_BASE 0x1fe4c000 +#define LS1X_CAN0_BASE 0x1fe50000 +#define LS1X_CAN1_BASE 0x1fe54000 +#define LS1X_I2C0_BASE 0x1fe58000 +#define LS1X_I2C1_BASE 0x1fe68000 +#define LS1X_I2C2_BASE 0x1fe70000 +#define LS1X_PWM_BASE 0x1fe5c000 +#define LS1X_WDT_BASE 0x1fe5c060 +#define LS1X_RTC_BASE 0x1fe64000 +#define LS1X_AC97_BASE 0x1fe74000 +#define LS1X_NAND_BASE 0x1fe78000 +#define LS1X_CLK_BASE 0x1fe78030 + +#include +#include + +#endif /* __ASM_MACH_LOONGSON1_LOONGSON1_H */ diff --git a/arch/mips/include/asm/mach-loongson1/platform.h b/arch/mips/include/asm/mach-loongson1/platform.h new file mode 100644 index 0000000..327df09 --- /dev/null +++ b/arch/mips/include/asm/mach-loongson1/platform.h @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2011 Zhang, Keguang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + + +#ifndef __ASM_MACH_LOONGSON1_PLATFORM_H +#define __ASM_MACH_LOONGSON1_PLATFORM_H + +#include + +extern struct platform_device ls1x_uart_device; +extern struct platform_device ls1x_eth0_device; +extern struct platform_device ls1x_rtc_device; + +void ls1x_serial_setup(void); + +#endif /* __ASM_MACH_LOONGSON1_PLATFORM_H */ diff --git a/arch/mips/include/asm/mach-loongson1/prom.h b/arch/mips/include/asm/mach-loongson1/prom.h new file mode 100644 index 0000000..b871dc4 --- /dev/null +++ b/arch/mips/include/asm/mach-loongson1/prom.h @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2011 Zhang, Keguang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __ASM_MACH_LOONGSON1_PROM_H +#define __ASM_MACH_LOONGSON1_PROM_H + +#include +#include +#include + +/* environment arguments from bootloader */ +extern unsigned long memsize, highmemsize; + +/* loongson-specific command line, env and memory initialization */ +extern char *prom_getenv(char *name); +extern void __init prom_init_cmdline(void); + +#endif /* __ASM_MACH_LOONGSON1_PROM_H */ diff --git a/arch/mips/include/asm/mach-loongson1/regs-clk.h b/arch/mips/include/asm/mach-loongson1/regs-clk.h new file mode 100644 index 0000000..5b9635a --- /dev/null +++ b/arch/mips/include/asm/mach-loongson1/regs-clk.h @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2011 Zhang, Keguang + * + * Loongson1 Clock Register Definitions. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __ASM_MACH_LOONGSON1_REGS_CLK_H +#define __ASM_MACH_LOONGSON1_REGS_CLK_H + +#define LS1X_CLK_REG(x) \ + ((void __iomem *)KSEG1ADDR(LS1X_CLK_BASE + (x))) + +#define LS1X_CLK_PLL_FREQ LS1X_CLK_REG(0x0) +#define LS1X_CLK_PLL_DIV LS1X_CLK_REG(0x4) + +/* Clock PLL Divisor Register Bits */ +#define DIV_DC_EN (0x1 << 31) +#define DIV_DC (0x1f << 26) +#define DIV_CPU_EN (0x1 << 25) +#define DIV_CPU (0x1f << 20) +#define DIV_DDR_EN (0x1 << 19) +#define DIV_DDR (0x1f << 14) + +#define DIV_DC_SHIFT 26 +#define DIV_CPU_SHIFT 20 +#define DIV_DDR_SHIFT 14 + +#endif /* __ASM_MACH_LOONGSON1_REGS_CLK_H */ diff --git a/arch/mips/include/asm/mach-loongson1/regs-wdt.h b/arch/mips/include/asm/mach-loongson1/regs-wdt.h new file mode 100644 index 0000000..d339fe7 --- /dev/null +++ b/arch/mips/include/asm/mach-loongson1/regs-wdt.h @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2011 Zhang, Keguang + * + * Loongson1 Watchdog register definitions. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __ASM_MACH_LOONGSON1_REGS_WDT_H +#define __ASM_MACH_LOONGSON1_REGS_WDT_H + +#define LS1X_WDT_REG(x) \ + ((void __iomem *)KSEG1ADDR(LS1X_WDT_BASE + (x))) + +#define LS1X_WDT_EN LS1X_WDT_REG(0x0) +#define LS1X_WDT_SET LS1X_WDT_REG(0x4) +#define LS1X_WDT_TIMER LS1X_WDT_REG(0x8) + +#endif /* __ASM_MACH_LOONGSON1_REGS_WDT_H */ diff --git a/arch/mips/include/asm/mach-loongson1/war.h b/arch/mips/include/asm/mach-loongson1/war.h new file mode 100644 index 0000000..e3680a8 --- /dev/null +++ b/arch/mips/include/asm/mach-loongson1/war.h @@ -0,0 +1,25 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2002, 2004, 2007 by Ralf Baechle + */ +#ifndef __ASM_MACH_LOONGSON1_WAR_H +#define __ASM_MACH_LOONGSON1_WAR_H + +#define R4600_V1_INDEX_ICACHEOP_WAR 0 +#define R4600_V1_HIT_CACHEOP_WAR 0 +#define R4600_V2_HIT_CACHEOP_WAR 0 +#define R5432_CP0_INTERRUPT_WAR 0 +#define BCM1250_M3_WAR 0 +#define SIBYTE_1956_WAR 0 +#define MIPS4K_ICACHE_REFILL_WAR 0 +#define MIPS_CACHE_SYNC_WAR 0 +#define TX49XX_ICACHE_INDEX_INV_WAR 0 +#define RM9000_CDEX_SMP_WAR 0 +#define ICACHE_REFILLS_WORKAROUND_WAR 0 +#define R10000_LLSC_WAR 0 +#define MIPS34K_MISSED_ITLB_WAR 0 + +#endif /* __ASM_MACH_LOONGSON1_WAR_H */ diff --git a/arch/mips/loongson1/common/clock.c b/arch/mips/loongson1/common/clock.c new file mode 100644 index 0000000..2d98fb0 --- /dev/null +++ b/arch/mips/loongson1/common/clock.c @@ -0,0 +1,165 @@ +/* + * Copyright (c) 2011 Zhang, Keguang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +static LIST_HEAD(clocks); +static DEFINE_MUTEX(clocks_mutex); + +struct clk *clk_get(struct device *dev, const char *name) +{ + struct clk *c; + struct clk *ret = NULL; + + mutex_lock(&clocks_mutex); + list_for_each_entry(c, &clocks, node) { + if (!strcmp(c->name, name)) { + ret = c; + break; + } + } + mutex_unlock(&clocks_mutex); + + return ret; +} +EXPORT_SYMBOL(clk_get); + +unsigned long clk_get_rate(struct clk *clk) +{ + return clk->rate; +} +EXPORT_SYMBOL(clk_get_rate); + +static void pll_clk_init(struct clk *clk) +{ + u32 pll; + + pll = __raw_readl(LS1X_CLK_PLL_FREQ); + clk->rate = (12 + (pll & 0x3f)) * 33 / 2 + + ((pll >> 8) & 0x3ff) * 33 / 1024 / 2; + clk->rate *= 1000000; +} + +static void cpu_clk_init(struct clk *clk) +{ + u32 pll, ctrl; + + pll = clk_get_rate(clk->parent); + ctrl = __raw_readl(LS1X_CLK_PLL_DIV) & DIV_CPU; + clk->rate = pll / (ctrl >> DIV_CPU_SHIFT); +} + +static void ddr_clk_init(struct clk *clk) +{ + u32 pll, ctrl; + + pll = clk_get_rate(clk->parent); + ctrl = __raw_readl(LS1X_CLK_PLL_DIV) & DIV_DDR; + clk->rate = pll / (ctrl >> DIV_DDR_SHIFT); +} + +static void dc_clk_init(struct clk *clk) +{ + u32 pll, ctrl; + + pll = clk_get_rate(clk->parent); + ctrl = __raw_readl(LS1X_CLK_PLL_DIV) & DIV_DC; + clk->rate = pll / (ctrl >> DIV_DC_SHIFT); +} + +static struct clk_ops pll_clk_ops = { + .init = pll_clk_init, +}; + +static struct clk_ops cpu_clk_ops = { + .init = cpu_clk_init, +}; + +static struct clk_ops ddr_clk_ops = { + .init = ddr_clk_init, +}; + +static struct clk_ops dc_clk_ops = { + .init = dc_clk_init, +}; + +static struct clk pll_clk = { + .name = "pll", + .ops = &pll_clk_ops, +}; + +static struct clk cpu_clk = { + .name = "cpu", + .parent = &pll_clk, + .ops = &cpu_clk_ops, +}; + +static struct clk ddr_clk = { + .name = "ddr", + .parent = &pll_clk, + .ops = &ddr_clk_ops, +}; + +static struct clk dc_clk = { + .name = "dc", + .parent = &pll_clk, + .ops = &dc_clk_ops, +}; + +int clk_register(struct clk *clk) +{ + mutex_lock(&clocks_mutex); + list_add(&clk->node, &clocks); + if (clk->ops->init) + clk->ops->init(clk); + mutex_unlock(&clocks_mutex); + + return 0; +} +EXPORT_SYMBOL(clk_register); + +static struct clk *ls1x_clks[] = { + &pll_clk, + &cpu_clk, + &ddr_clk, + &dc_clk, +}; + +int __init ls1x_clock_init(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(ls1x_clks); i++) + clk_register(ls1x_clks[i]); + + return 0; +} + +void __init plat_time_init(void) +{ + struct clk *clk; + + /* Initialize LS1X clocks */ + ls1x_clock_init(); + + /* setup mips r4k timer */ + clk = clk_get(NULL, "cpu"); + if (IS_ERR(clk)) + panic("unable to get dc clock, err=%ld", PTR_ERR(clk)); + + mips_hpt_frequency = clk_get_rate(clk) / 2; +} diff --git a/arch/mips/loongson1/common/irq.c b/arch/mips/loongson1/common/irq.c new file mode 100644 index 0000000..5465baf --- /dev/null +++ b/arch/mips/loongson1/common/irq.c @@ -0,0 +1,146 @@ +/* + * Copyright (c) 2011 Zhang, Keguang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include + +#include +#include + +#define LS1X_INTC_REG(n, x) \ + ((void __iomem *)KSEG1ADDR(LS1X_INTC_BASE + (n * 0x18) + (x))) + +#define LS1X_INTC_INTISR(n) LS1X_INTC_REG(n, 0x0) +#define LS1X_INTC_INTIEN(n) LS1X_INTC_REG(n, 0x4) +#define LS1X_INTC_INTSET(n) LS1X_INTC_REG(n, 0x8) +#define LS1X_INTC_INTCLR(n) LS1X_INTC_REG(n, 0xc) +#define LS1X_INTC_INTPOL(n) LS1X_INTC_REG(n, 0x10) +#define LS1X_INTC_INTEDGE(n) LS1X_INTC_REG(n, 0x14) + +static void ls1x_irq_ack(struct irq_data *d) +{ + unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; + unsigned int n = (d->irq - LS1X_IRQ_BASE) >> 5; + + __raw_writel(__raw_readl(LS1X_INTC_INTCLR(n)) + | (1 << bit), LS1X_INTC_INTCLR(n)); +} + +static void ls1x_irq_mask(struct irq_data *d) +{ + unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; + unsigned int n = (d->irq - LS1X_IRQ_BASE) >> 5; + + __raw_writel(__raw_readl(LS1X_INTC_INTIEN(n)) + & ~(1 << bit), LS1X_INTC_INTIEN(n)); +} + +static void ls1x_irq_mask_ack(struct irq_data *d) +{ + unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; + unsigned int n = (d->irq - LS1X_IRQ_BASE) >> 5; + + __raw_writel(__raw_readl(LS1X_INTC_INTIEN(n)) + & ~(1 << bit), LS1X_INTC_INTIEN(n)); + __raw_writel(__raw_readl(LS1X_INTC_INTCLR(n)) + | (1 << bit), LS1X_INTC_INTCLR(n)); +} + +static void ls1x_irq_unmask(struct irq_data *d) +{ + unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; + unsigned int n = (d->irq - LS1X_IRQ_BASE) >> 5; + + __raw_writel(__raw_readl(LS1X_INTC_INTIEN(n)) + | (1 << bit), LS1X_INTC_INTIEN(n)); +} + +static struct irq_chip ls1x_irq_chip = { + .name = "LS1X-INTC", + .irq_ack = ls1x_irq_ack, + .irq_mask = ls1x_irq_mask, + .irq_mask_ack = ls1x_irq_mask_ack, + .irq_unmask = ls1x_irq_unmask, +}; + +static void ls1x_irq_dispatch(int n) +{ + u32 int_status, irq; + + /* Get pending sources, masked by current enables */ + int_status = __raw_readl(LS1X_INTC_INTISR(n)) & + __raw_readl(LS1X_INTC_INTIEN(n)); + + if (int_status) { + irq = LS1X_IRQ(n, __ffs(int_status)); + do_IRQ(irq); + } +} + +asmlinkage void plat_irq_dispatch(void) +{ + unsigned int pending; + + pending = read_c0_cause() & read_c0_status() & ST0_IM; + + if (pending & CAUSEF_IP7) + do_IRQ(TIMER_IRQ); + else if (pending & CAUSEF_IP2) + ls1x_irq_dispatch(0); /* INT0 */ + else if (pending & CAUSEF_IP3) + ls1x_irq_dispatch(1); /* INT1 */ + else if (pending & CAUSEF_IP4) + ls1x_irq_dispatch(2); /* INT2 */ + else if (pending & CAUSEF_IP5) + ls1x_irq_dispatch(3); /* INT3 */ + else if (pending & CAUSEF_IP6) + ls1x_irq_dispatch(4); /* INT4 */ + else + spurious_interrupt(); + +} + +struct irqaction cascade_irqaction = { + .handler = no_action, + .name = "cascade", + .flags = IRQF_NO_THREAD, +}; + +static void __init ls1x_irq_init(int base) +{ + int n; + + /* Disable interrupts and clear pending, + * setup all IRQs as high level triggered + */ + for (n = 0; n < 4; n++) { + __raw_writel(0x0, LS1X_INTC_INTIEN(n)); + __raw_writel(0xffffffff, LS1X_INTC_INTCLR(n)); + __raw_writel(0xffffffff, LS1X_INTC_INTPOL(n)); + __raw_writel(0x0, LS1X_INTC_INTEDGE(n)); + } + + + for (n = base; n < NR_IRQS; n++) { + irq_set_chip_and_handler(n, &ls1x_irq_chip, + handle_level_irq); + } + + setup_irq(INT0_IRQ, &cascade_irqaction); + setup_irq(INT1_IRQ, &cascade_irqaction); + setup_irq(INT2_IRQ, &cascade_irqaction); + setup_irq(INT3_IRQ, &cascade_irqaction); +} + +void __init arch_init_irq(void) +{ + mips_cpu_irq_init(); + ls1x_irq_init(LS1X_IRQ_BASE); +} diff --git a/arch/mips/loongson1/common/platform.c b/arch/mips/loongson1/common/platform.c new file mode 100644 index 0000000..b74e87b --- /dev/null +++ b/arch/mips/loongson1/common/platform.c @@ -0,0 +1,102 @@ +/* + * Copyright (c) 2011 Zhang, Keguang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include + +#include + +#define LS1X_UART(_id) \ + { \ + .mapbase = LS1X_UART ## _id ## _BASE, \ + .irq = LS1X_UART ## _id ## _IRQ, \ + .iotype = UPIO_MEM, \ + .flags = UPF_IOREMAP | UPF_FIXED_TYPE, \ + .type = PORT_16550A, \ + } + +static struct plat_serial8250_port ls1x_serial8250_port[] = { + LS1X_UART(0), + LS1X_UART(1), + LS1X_UART(2), + LS1X_UART(3), + {}, +}; + +struct platform_device ls1x_uart_device = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = ls1x_serial8250_port, + }, +}; + +void __init ls1x_serial_setup(void) +{ + struct clk *clk; + struct plat_serial8250_port *p; + + clk = clk_get(NULL, "dc"); + if (IS_ERR(clk)) + panic("unable to get dc clock, err=%ld", PTR_ERR(clk)); + + for (p = ls1x_serial8250_port; p->flags != 0; ++p) + p->uartclk = clk_get_rate(clk); +} + +/* Synopsys Ethernet GMAC */ +#if IS_ENABLED(CONFIG_STMMAC_ETH) +static struct resource ls1x_eth0_resources[] = { + [0] = { + .start = LS1X_GMAC0_BASE, + .end = LS1X_GMAC0_BASE + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "macirq", + .start = LS1X_GMAC0_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct stmmac_mdio_bus_data ls1x_mdio_bus_data = { + .bus_id = 0, + .phy_mask = 0, +}; + +static struct plat_stmmacenet_data ls1x_eth_data = { + .bus_id = 0, + .phy_addr = -1, + .mdio_bus_data = &ls1x_mdio_bus_data, + .pbl = 32, + .has_gmac = 1, + .tx_coe = 1, +}; + +struct platform_device ls1x_eth0_device = { + .name = "stmmaceth", + .id = 0, + .num_resources = ARRAY_SIZE(ls1x_eth0_resources), + .resource = ls1x_eth0_resources, + .dev = { + .platform_data = &ls1x_eth_data, + }, +}; +#endif + +#if IS_ENABLED(CONFIG_RTC_DRV_LOONGSON1) +struct platform_device ls1x_rtc_device = { + .name = "ls1x-rtc", + .id = -1, +}; +#endif diff --git a/arch/mips/loongson1/common/prom.c b/arch/mips/loongson1/common/prom.c new file mode 100644 index 0000000..57f88ea --- /dev/null +++ b/arch/mips/loongson1/common/prom.c @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2011 Zhang, Keguang + * + * Modified from arch/mips/pnx833x/common/prom.c. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include + +#include +#include + +int prom_argc; +char **prom_argv, **prom_envp; +unsigned long memsize, highmemsize; + +char *prom_getenv(char *envname) +{ + char **env = prom_envp; + int i; + + i = strlen(envname); + + while (*env) { + if (strncmp(envname, *env, i) == 0 && *(*env+i) == '=') + return *env + i + 1; + env++; + } + + return 0; +} + +static inline unsigned long env_or_default(char *env, unsigned long dfl) +{ + char *str = prom_getenv(env); + return str ? simple_strtol(str, 0, 0) : dfl; +} + +void __init prom_init_cmdline(void) +{ + char *c = &(arcs_cmdline[0]); + int i; + + for (i = 1; i < prom_argc; i++) { + strcpy(c, prom_argv[i]); + c += strlen(prom_argv[i]); + if (i < prom_argc-1) + *c++ = ' '; + } + *c = 0; +} + +void __init prom_init(void) +{ + prom_argc = fw_arg0; + prom_argv = (char **)fw_arg1; + prom_envp = (char **)fw_arg2; + + prom_init_cmdline(); + + memsize = env_or_default("memsize", DEFAULT_MEMSIZE); + highmemsize = env_or_default("highmemsize", 0x0); +} + +void __init prom_free_prom_memory(void) +{ +} + +#define PORT(offset) (u8 *)KSEG1ADDR(LS1X_UART0_BASE + offset) + +void __init prom_putchar(char c) +{ + int timeout; + + timeout = 1024; + + while (((readb(PORT(UART_LSR)) & UART_LSR_THRE) == 0) + && (timeout-- > 0)) + ; + + writeb(c, PORT(UART_TX)); +} diff --git a/arch/mips/loongson1/common/reset.c b/arch/mips/loongson1/common/reset.c new file mode 100644 index 0000000..fb979a7 --- /dev/null +++ b/arch/mips/loongson1/common/reset.c @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2011 Zhang, Keguang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include + +#include + +static void ls1x_restart(char *command) +{ + __raw_writel(0x1, LS1X_WDT_EN); + __raw_writel(0x5000000, LS1X_WDT_TIMER); + __raw_writel(0x1, LS1X_WDT_SET); +} + +static void ls1x_halt(void) +{ + while (1) { + if (cpu_wait) + cpu_wait(); + } +} + +static void ls1x_power_off(void) +{ + ls1x_halt(); +} + +static int __init ls1x_reboot_setup(void) +{ + _machine_restart = ls1x_restart; + _machine_halt = ls1x_halt; + pm_power_off = ls1x_power_off; + + return 0; +} + +arch_initcall(ls1x_reboot_setup); diff --git a/arch/mips/loongson1/common/setup.c b/arch/mips/loongson1/common/setup.c new file mode 100644 index 0000000..62128cc --- /dev/null +++ b/arch/mips/loongson1/common/setup.c @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2011 Zhang, Keguang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include + +#include + +void __init plat_mem_setup(void) +{ + add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM); +} + +const char *get_system_type(void) +{ + unsigned int processor_id = (¤t_cpu_data)->processor_id; + + switch (processor_id & PRID_REV_MASK) { + case PRID_REV_LOONGSON1B: + return "LOONGSON LS1B"; + default: + return "LOONGSON (unknown)"; + } +} diff --git a/arch/mips/loongson1/ls1b/board.c b/arch/mips/loongson1/ls1b/board.c new file mode 100644 index 0000000..02952ef --- /dev/null +++ b/arch/mips/loongson1/ls1b/board.c @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2011 Zhang, Keguang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include + +#include +#include + +static struct platform_device *ls1b_platform_devices[] __initdata = { + &ls1x_uart_device, +#if IS_ENABLED(CONFIG_STMMAC_ETH) + &ls1x_eth0_device, +#endif +#if IS_ENABLED(CONFIG_RTC_DRV_LOONGSON1) + &ls1x_rtc_device, +#endif +}; + +static int __init ls1b_platform_init(void) +{ + int err; + + ls1x_serial_setup(); + + err = platform_add_devices(ls1b_platform_devices, + ARRAY_SIZE(ls1b_platform_devices)); + return err; +} + +arch_initcall(ls1b_platform_init); -- 1.7.1 From keguang.zhang@gmail.com Fri Dec 16 12:40:07 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 16 Dec 2011 12:41:14 +0100 (CET) Received: from mail-iy0-f177.google.com ([209.85.210.177]:39852 "EHLO mail-iy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903664Ab1LPLkH (ORCPT ); Fri, 16 Dec 2011 12:40:07 +0100 Received: by mail-iy0-f177.google.com with SMTP id k27so3443602iad.36 for ; Fri, 16 Dec 2011 03:40:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=Mn7ZxyBPx8E5XMOBCkRETMFUSebMbPv3h+xXhuXxE/M=; b=FzDLTLoNEgp1WJKuNq/fgr8M/KaZR8ue+jisQNctop6gMSEMcEjltVZU4d+o/tn5PT Aiwmt2oapy33QQkrafxwI6afIUQ7VCmpYlTQhKqz3MfTNGAZ99aFvyKLdLZD4vK8s/YE /7OZYDbvIZYB+EiAVFKu5846B4mQPpfLVkchE= Received: by 10.50.236.5 with SMTP id uq5mr8337112igc.47.1324035606417; Fri, 16 Dec 2011 03:40:06 -0800 (PST) Received: from kelvin-Work.chd.intersil.com ([182.148.112.76]) by mx.google.com with ESMTPS id wo4sm14335289igc.5.2011.12.16.03.39.58 (version=SSLv3 cipher=OTHER); Fri, 16 Dec 2011 03:40:05 -0800 (PST) From: Kelvin Cheung To: ralf@linux-mips.org, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org Cc: zhzhl555@gmail.com, peppe.cavallaro@st.com, wuzhangjin@gmail.com, r0bertz@gentoo.org, Kelvin Cheung Subject: [PATCH V5 3/4] MIPS: Add Makefile and Kconfig for Loongson1B Date: Fri, 16 Dec 2011 19:39:03 +0800 Message-Id: <1324035544-2373-4-git-send-email-keguang.zhang@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1324035544-2373-1-git-send-email-keguang.zhang@gmail.com> References: <1324035544-2373-1-git-send-email-keguang.zhang@gmail.com> X-archive-position: 32109 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: keguang.zhang@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 13179 Content-Length: 5185 Lines: 182 This patch adds Makefile and Kconfig related to Loongson1B. Signed-off-by: Kelvin Cheung --- arch/mips/Kbuild.platforms | 1 + arch/mips/Kconfig | 31 +++++++++++++++++++++++++++++++ arch/mips/loongson1/Kconfig | 21 +++++++++++++++++++++ arch/mips/loongson1/Makefile | 11 +++++++++++ arch/mips/loongson1/Platform | 7 +++++++ arch/mips/loongson1/common/Makefile | 5 +++++ arch/mips/loongson1/ls1b/Makefile | 5 +++++ 7 files changed, 81 insertions(+), 0 deletions(-) create mode 100644 arch/mips/loongson1/Kconfig create mode 100644 arch/mips/loongson1/Makefile create mode 100644 arch/mips/loongson1/Platform create mode 100644 arch/mips/loongson1/common/Makefile create mode 100644 arch/mips/loongson1/ls1b/Makefile diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms index 5ce8029..d64786d 100644 --- a/arch/mips/Kbuild.platforms +++ b/arch/mips/Kbuild.platforms @@ -14,6 +14,7 @@ platforms += jz4740 platforms += lantiq platforms += lasat platforms += loongson +platforms += loongson1 platforms += mipssim platforms += mti-malta platforms += netlogic diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index d9b8ea8..4c6ad4f 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -262,6 +262,17 @@ config MACH_LOONGSON Chinese Academy of Sciences (CAS) in the People's Republic of China. The chief architect is Professor Weiwu Hu. +config MACH_LOONGSON1 + bool "Loongson1 family of machines" + select SYS_SUPPORTS_ZBOOT + help + This enables the support of Loongson1 family of machines. + + Loongson1 is a family of 32-bit MIPS-compatible SoCs. + developed at Institute of Computing Technology (ICT), + Chinese Academy of Sciences (CAS) in the People's Republic + of China. + config MIPS_MALTA bool "MIPS Malta board" select ARCH_MAY_HAVE_PC_FDC @@ -808,6 +819,7 @@ source "arch/mips/txx9/Kconfig" source "arch/mips/vr41xx/Kconfig" source "arch/mips/cavium-octeon/Kconfig" source "arch/mips/loongson/Kconfig" +source "arch/mips/loongson1/Kconfig" source "arch/mips/netlogic/Kconfig" endmenu @@ -1201,6 +1213,14 @@ config CPU_LOONGSON2F have a similar programming interface with FPGA northbridge used in Loongson2E. +config CPU_LOONGSON1B + bool "Loongson 1B" + depends on SYS_HAS_CPU_LOONGSON1B + select CPU_LOONGSON1 + help + The Loongson 1B is a 32-bit SoC, which implements the MIPS32 + release 2 instruction set. + config CPU_MIPS32_R1 bool "MIPS32 Release 1" depends on SYS_HAS_CPU_MIPS32_R1 @@ -1529,6 +1549,14 @@ config CPU_LOONGSON2 select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HIGHMEM +config CPU_LOONGSON1 + bool + select CPU_MIPS32 + select CPU_MIPSR2 + select CPU_HAS_PREFETCH + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM + config SYS_HAS_CPU_LOONGSON2E bool @@ -1538,6 +1566,9 @@ config SYS_HAS_CPU_LOONGSON2F select CPU_SUPPORTS_ADDRWINCFG if 64BIT select CPU_SUPPORTS_UNCACHED_ACCELERATED +config SYS_HAS_CPU_LOONGSON1B + bool + config SYS_HAS_CPU_MIPS32_R1 bool diff --git a/arch/mips/loongson1/Kconfig b/arch/mips/loongson1/Kconfig new file mode 100644 index 0000000..237fa21 --- /dev/null +++ b/arch/mips/loongson1/Kconfig @@ -0,0 +1,21 @@ +if MACH_LOONGSON1 + +choice + prompt "Machine Type" + +config LOONGSON1_LS1B + bool "Loongson LS1B board" + select CEVT_R4K + select CSRC_R4K + select SYS_HAS_CPU_LOONGSON1B + select DMA_NONCOHERENT + select BOOT_ELF32 + select IRQ_CPU + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select SYS_HAS_EARLY_PRINTK + +endchoice + +endif # MACH_LOONGSON1 diff --git a/arch/mips/loongson1/Makefile b/arch/mips/loongson1/Makefile new file mode 100644 index 0000000..e9123c2 --- /dev/null +++ b/arch/mips/loongson1/Makefile @@ -0,0 +1,11 @@ +# +# Common code for all Loongson1 based systems +# + +obj-$(CONFIG_MACH_LOONGSON1) += common/ + +# +# Loongson LS1B board +# + +obj-$(CONFIG_LOONGSON1_LS1B) += ls1b/ diff --git a/arch/mips/loongson1/Platform b/arch/mips/loongson1/Platform new file mode 100644 index 0000000..92804c6 --- /dev/null +++ b/arch/mips/loongson1/Platform @@ -0,0 +1,7 @@ +cflags-$(CONFIG_CPU_LOONGSON1) += \ + $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ + -Wa,-mips32r2 -Wa,--trap + +platform-$(CONFIG_MACH_LOONGSON1) += loongson1/ +cflags-$(CONFIG_MACH_LOONGSON1) += -I$(srctree)/arch/mips/include/asm/mach-loongson1 +load-$(CONFIG_LOONGSON1_LS1B) += 0xffffffff80010000 diff --git a/arch/mips/loongson1/common/Makefile b/arch/mips/loongson1/common/Makefile new file mode 100644 index 0000000..b279770 --- /dev/null +++ b/arch/mips/loongson1/common/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for common code of loongson1 based machines. +# + +obj-y += clock.o irq.o platform.o prom.o reset.o setup.o diff --git a/arch/mips/loongson1/ls1b/Makefile b/arch/mips/loongson1/ls1b/Makefile new file mode 100644 index 0000000..891eac4 --- /dev/null +++ b/arch/mips/loongson1/ls1b/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for loongson1B based machines. +# + +obj-y += board.o -- 1.7.1 From keguang.zhang@gmail.com Fri Dec 16 12:40:15 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 16 Dec 2011 12:41:42 +0100 (CET) Received: from mail-iy0-f177.google.com ([209.85.210.177]:39852 "EHLO mail-iy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903655Ab1LPLkP (ORCPT ); Fri, 16 Dec 2011 12:40:15 +0100 Received: by mail-iy0-f177.google.com with SMTP id k27so3443602iad.36 for ; Fri, 16 Dec 2011 03:40:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=SCZjSw/HO31rkAl/VE41iAheXjO5Ur5fER4+fLv00dQ=; b=gwB+xiNayxaXNl8MWkLijwBAWaWAZocD8HtD1wT04dyfId2+frvcE5UI8vruDCPt7Y nzqmYZIQTV6Hm0tMc3p/vlmZjIvZLJ/47/cJIMMfpgeoJskntl3yGgaRqauI6o8aTqYX 9WREqvmtmJ66jlNHXBQhwI2dNHPfiW4UHYUQ0= Received: by 10.50.51.234 with SMTP id n10mr8308241igo.10.1324035614570; Fri, 16 Dec 2011 03:40:14 -0800 (PST) Received: from kelvin-Work.chd.intersil.com ([182.148.112.76]) by mx.google.com with ESMTPS id wo4sm14335289igc.5.2011.12.16.03.40.07 (version=SSLv3 cipher=OTHER); Fri, 16 Dec 2011 03:40:14 -0800 (PST) From: Kelvin Cheung To: ralf@linux-mips.org, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org Cc: zhzhl555@gmail.com, peppe.cavallaro@st.com, wuzhangjin@gmail.com, r0bertz@gentoo.org, Kelvin Cheung Subject: [PATCH V5 4/4] MIPS: Add defconfig for Loongson1B Date: Fri, 16 Dec 2011 19:39:04 +0800 Message-Id: <1324035544-2373-5-git-send-email-keguang.zhang@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1324035544-2373-1-git-send-email-keguang.zhang@gmail.com> References: <1324035544-2373-1-git-send-email-keguang.zhang@gmail.com> X-archive-position: 32110 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: keguang.zhang@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 13180 Content-Length: 2944 Lines: 107 This patch adds defconfig for Loongson1B. Signed-off-by: Kelvin Cheung --- arch/mips/configs/ls1b_defconfig | 90 ++++++++++++++++++++++++++++++++++++++ 1 files changed, 90 insertions(+), 0 deletions(-) create mode 100644 arch/mips/configs/ls1b_defconfig diff --git a/arch/mips/configs/ls1b_defconfig b/arch/mips/configs/ls1b_defconfig new file mode 100644 index 0000000..42954bc --- /dev/null +++ b/arch/mips/configs/ls1b_defconfig @@ -0,0 +1,90 @@ +CONFIG_MACH_LOONGSON1=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT=y +# CONFIG_SECCOMP is not set +CONFIG_EXPERIMENTAL=y +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SYSVIPC=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TINY_RCU=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_BLK_DEV_INITRD=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_EXPERT=y +CONFIG_KALLSYMS_ALL=y +CONFIG_PERF_EVENTS=y +# CONFIG_COMPAT_BRK is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_LBDAF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +# CONFIG_SUSPEND is not set +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_SYN_COOKIES=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_DIAG is not set +# CONFIG_IPV6 is not set +# CONFIG_WIRELESS is not set +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_STANDALONE is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_NETDEVICES=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_DA=y +# CONFIG_NETDEV_10000 is not set +# CONFIG_WLAN is not set +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_SERIO is not set +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_LEGACY_PTY_COUNT=8 +# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +# CONFIG_HW_RANDOM is not set +# CONFIG_HWMON is not set +# CONFIG_MFD_SUPPORT is not set +# CONFIG_VGA_CONSOLE is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_LOONGSON1=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +# CONFIG_DNOTIFY is not set +CONFIG_PROC_KCORE=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_MISC_FILESYSTEMS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SCHED_DEBUG is not set +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +# CONFIG_FTRACE is not set +# CONFIG_EARLY_PRINTK is not set -- 1.7.1 From florian@openwrt.org Fri Dec 16 16:04:37 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 16 Dec 2011 16:04:45 +0100 (CET) Received: from mail-ee0-f49.google.com ([74.125.83.49]:60840 "EHLO mail-ee0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903656Ab1LPPEh (ORCPT ); Fri, 16 Dec 2011 16:04:37 +0100 Received: by eekc13 with SMTP id c13so2092864eek.36 for ; Fri, 16 Dec 2011 07:04:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=sender:message-id:date:from:organization:user-agent:mime-version:to :cc:subject:references:in-reply-to:content-type :content-transfer-encoding; bh=SaA2YNdFsQvC0pqVQTohzWthVBlIcBLHNozXKssSb4M=; b=sJBVCz8rUzN7ft1NAH1gIcI2tnrVRYfTNpjTtISvFWUF6k/MP0fCO4dxEXZvQEmmcO /Zkig7cjDvfKCd8GnIl4Ux0LhTRhKdCyHSEb9I4KE4fLLk2MEcuCPH+ZEcKYgvdfLWaD QidC8EbUbuU+Qfyx3DLOIK+RWLcWfQ7bVjLyM= Received: by 10.205.122.133 with SMTP id gg5mr3028331bkc.65.1324047872327; Fri, 16 Dec 2011 07:04:32 -0800 (PST) Received: from [192.168.108.37] (freebox.vlq16.iliad.fr. [213.36.7.13]) by mx.google.com with ESMTPS id q16sm23518688bky.10.2011.12.16.07.04.28 (version=SSLv3 cipher=OTHER); Fri, 16 Dec 2011 07:04:29 -0800 (PST) Message-ID: <4EEB5DCE.70904@openwrt.org> Date: Fri, 16 Dec 2011 16:03:42 +0100 From: Florian Fainelli Organization: OpenWrt User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:8.0) Gecko/20111124 Thunderbird/8.0 MIME-Version: 1.0 To: Sergei Shtylyov CC: Matt Mackall , Herbert Xu , ralf@linux-mips.org, linux-mips@linux-mips.org Subject: Re: [PATCH 4/5] MIPS: BCM63XX: add RNG driver platform_device stub References: <1323457270-16330-1-git-send-email-florian@openwrt.org> <1323457270-16330-5-git-send-email-florian@openwrt.org> <4EE370D9.9090900@mvista.com> In-Reply-To: <4EE370D9.9090900@mvista.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-archive-position: 32111 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: florian@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 13293 Content-Length: 904 Lines: 35 Hello Sergei, On 12/10/11 15:46, Sergei Shtylyov wrote: > Hello. > > On 09-12-2011 23:01, Florian Fainelli wrote: > >> Signed-off-by: Florian Fainelli > [...] > >> diff --git a/arch/mips/bcm63xx/dev-trng.c b/arch/mips/bcm63xx/dev-trng.c >> new file mode 100644 >> index 0000000..19ccfbf >> --- /dev/null >> +++ b/arch/mips/bcm63xx/dev-trng.c >> @@ -0,0 +1,40 @@ > [...] >> +static struct resource trng_resources[] = { >> + { >> + .start = -1, /* filled at runtime */ >> + .end = -1, /* filled at runtime */ >> + .flags = IORESOURCE_MEM, >> + }, >> +}; >> + >> +static struct platform_device bcm63xx_trng_device = { >> + .name = "bcm63xx-trng", >> + .id = 0, > > Why not -1? Isn't there only single device of this sort? There is a single device, I will fix that in a second version of the patchset. -- Florian From bhelgaas@google.com Fri Dec 16 23:31:46 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 16 Dec 2011 23:31:56 +0100 (CET) Received: from mail-ey0-f201.google.com ([209.85.215.201]:64524 "EHLO mail-ey0-f201.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903680Ab1LPWbq (ORCPT ); Fri, 16 Dec 2011 23:31:46 +0100 Received: by eaan10 with SMTP id n10so101569eaa.0 for ; Fri, 16 Dec 2011 14:31:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=beta; h=subject:to:from:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-type:content-transfer-encoding; bh=4BxWnxDCJAZNF60EvREE2vUxAkMHsb8UoQ9rAhp2sW4=; b=bgGahfAY1fTpFrxW61aWR2nqd63KVZ4B7gOAQUkqBnbKn5ZQUD8lAEUzwd6FJrNFA9 1NYrzvmQgl9Imhmi4yiQ== Received: by 10.213.34.72 with SMTP id k8mr958198ebd.9.1324074700903; Fri, 16 Dec 2011 14:31:40 -0800 (PST) Received: by 10.213.34.72 with SMTP id k8mr958185ebd.9.1324074700454; Fri, 16 Dec 2011 14:31:40 -0800 (PST) Received: from hpza9.eem.corp.google.com ([74.125.121.33]) by gmr-mx.google.com with ESMTPS id a53si446722eeg.1.2011.12.16.14.31.40 (version=TLSv1/SSLv3 cipher=AES128-SHA); Fri, 16 Dec 2011 14:31:40 -0800 (PST) Received: from bhelgaas.mtv.corp.google.com (bhelgaas.mtv.corp.google.com [172.18.96.155]) by hpza9.eem.corp.google.com (Postfix) with ESMTP id 4335B5C0050; Fri, 16 Dec 2011 14:31:40 -0800 (PST) Received: from bhelgaas.mtv.corp.google.com (unknown [IPv6:::1]) by bhelgaas.mtv.corp.google.com (Postfix) with ESMTP id A644418273A; Fri, 16 Dec 2011 14:31:39 -0800 (PST) Subject: [PATCH 2/6] MIPS: PCI: use list_for_each_entry() for bus->devices traversal To: Jesse Barnes From: Bjorn Helgaas Cc: linux-pci@vger.kernel.org, Ralf Baechle , linux-mips@linux-mips.org Date: Fri, 16 Dec 2011 15:31:39 -0700 Message-ID: <20111216223139.5963.51460.stgit@bhelgaas.mtv.corp.google.com> In-Reply-To: <20111216223043.5963.87534.stgit@bhelgaas.mtv.corp.google.com> References: <20111216223043.5963.87534.stgit@bhelgaas.mtv.corp.google.com> User-Agent: StGit/0.15 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-archive-position: 32112 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: bhelgaas@google.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 13791 Content-Length: 1685 Lines: 55 Replace open-coded list traversal with list_for_each_entry(). CC: Ralf Baechle CC: linux-mips@linux-mips.org Signed-off-by: Bjorn Helgaas --- arch/mips/pci/pci.c | 5 +---- arch/mips/pmc-sierra/yosemite/ht-irq.c | 10 ---------- 2 files changed, 1 insertions(+), 14 deletions(-) diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c index 934862c..ae5e423 100644 --- a/arch/mips/pci/pci.c +++ b/arch/mips/pci/pci.c @@ -273,7 +273,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus) { /* Propagate hose info into the subordinate devices. */ - struct list_head *ln; struct pci_dev *dev = bus->self; if (pci_probe_only && dev && @@ -282,9 +281,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus) pcibios_fixup_device_resources(dev, bus); } - for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) { - dev = pci_dev_b(ln); - + list_for_each_entry(dev, &bus->devices, bus_list) { if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) pcibios_fixup_device_resources(dev, bus); } diff --git a/arch/mips/pmc-sierra/yosemite/ht-irq.c b/arch/mips/pmc-sierra/yosemite/ht-irq.c index 86b98e9..62ead66 100644 --- a/arch/mips/pmc-sierra/yosemite/ht-irq.c +++ b/arch/mips/pmc-sierra/yosemite/ht-irq.c @@ -35,16 +35,6 @@ */ void __init titan_ht_pcibios_fixup_bus(struct pci_bus *bus) { - struct pci_bus *current_bus = bus; - struct pci_dev *devices; - struct list_head *devices_link; - - list_for_each(devices_link, &(current_bus->devices)) { - devices = pci_dev_b(devices_link); - if (devices == NULL) - continue; - } - /* * PLX and SPKT related changes go here */ From sfr@canb.auug.org.au Sat Dec 17 05:50:56 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 17 Dec 2011 05:51:03 +0100 (CET) Received: from calzone.tip.net.au ([203.10.76.15]:51004 "EHLO calzone.tip.net.au" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903679Ab1LQEu4 (ORCPT ); Sat, 17 Dec 2011 05:50:56 +0100 Received: from canb.auug.org.au (ash.rothwell.emu.id.au [IPv6:2402:b800:7003:7010:223:14ff:fe30:c8e4]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by calzone.tip.net.au (Postfix) with ESMTPSA id 48B6A128494; Sat, 17 Dec 2011 15:50:50 +1100 (EST) Date: Sat, 17 Dec 2011 15:50:44 +1100 From: Stephen Rothwell To: Ralf Baechle Cc: linux-next@vger.kernel.org, linux-kernel@vger.kernel.org, Hillf Danton , David Daney , linux-mips@linux-mips.org, "Jayachandran C." Subject: linux-next: build failure after merge of the final tree (mips tree related) Message-Id: <20111217155044.094c4c2b51af7c66e8ec90a3@canb.auug.org.au> X-Mailer: Sylpheed 3.2.0beta4 (GTK+ 2.24.8; i486-pc-linux-gnu) Mime-Version: 1.0 Content-Type: multipart/signed; protocol="application/pgp-signature"; micalg="PGP-SHA256"; boundary="Signature=_Sat__17_Dec_2011_15_50_44_+1100_uI2PGSWnWbhegEUC" X-archive-position: 32113 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sfr@canb.auug.org.au Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 13998 Content-Length: 1705 Lines: 44 --Signature=_Sat__17_Dec_2011_15_50_44_+1100_uI2PGSWnWbhegEUC Content-Type: text/plain; charset=US-ASCII Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi all, After merging the final tree, today's linux-next build (mips almost all configs) failed like this: arch/mips/mm/tlb-r4k.c: In function 'local_flush_tlb_range': arch/mips/mm/tlb-r4k.c:128: error: 'HPAGE_SIZE' undeclared (first use in th= is function) arch/mips/mm/tlb-r4k.c:130: error: 'HPAGE_SHIFT' undeclared (first use in t= his function) Probably caused by commit 0b07e859f87b ("MIPS: Flush huge TLB"). --=20 Cheers, Stephen Rothwell sfr@canb.auug.org.au http://www.canb.auug.org.au/~sfr/ --Signature=_Sat__17_Dec_2011_15_50_44_+1100_uI2PGSWnWbhegEUC Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAEBCAAGBQJO7B+kAAoJEECxmPOUX5FEw8oP/RDiFMJrX/roVS+VcSQcYgO4 x8XAHxkIwOvlDOIdqZb2xmvDZRnGtxLoE87gWKBhHHYW0M2UpXBk7b+ltT+L4EbY HeHBjybDq8un4lee240kHmZCBb/jrj8ZiO5JOwJsqx/Di9PsBikRqkTsebR7Ds9n HFnZEWy5iEcJqzuxxhsOCh+UJdJjUtGjSwFsdU33JY2UCTsHWT8mvc/Qza7YIYaJ ZTwdPFyj/S6wVo8HdyQImppWg1rpfAAaOJifDH9QHbfzGrnnGue9G4TKsWCgnuJz rI+RpAl9e8xqePF/cUGd4Tey5+uLZbWduLgmO9JWqX3NJBw9EKZOHRzFEsOtk94R AUyo8FISRyQ7IwJ7qgOmr770wlfEmJbB4LpFzwd3QiyVaivWBDnyvggVYVXkHZ5U u5gmD4ewx4/I5iIrz863zejVeU9iFKWt0cjYkm1sTVhfOvK1t8HCVS4JYBmKUijY VexfWjBLMAqYLYX/DTCV0s2D/Ty02rl+xl8djCBnOKxixFyD0t8nWEC1TYFVh86D wDHFzaRJgPQUPM9Lh7Z/6VFueLB8DHPQ5XMAtujXP4vAqEAAX+dP4HtNQMU64Q1K AQwiLl5p4Tf69HHa1mT1JkdidVZQpd/mtUYVydZ3NTiJioJO7pMM8689ryVwrTFz p7xOru4oUWGHhAo22+m+ =xFzP -----END PGP SIGNATURE----- --Signature=_Sat__17_Dec_2011_15_50_44_+1100_uI2PGSWnWbhegEUC-- From jonas.gorski@gmail.com Sat Dec 17 13:58:56 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 17 Dec 2011 13:59:00 +0100 (CET) Received: from mail-ey0-f177.google.com ([209.85.215.177]:64039 "EHLO mail-ey0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903684Ab1LQM64 (ORCPT ); Sat, 17 Dec 2011 13:58:56 +0100 Received: by eaak12 with SMTP id k12so3598636eaa.36 for ; Sat, 17 Dec 2011 04:58:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=gpcngWWP+pKnkVhEAWFpHRnlll7wcF2bdC8TYw8NK60=; b=UDk6filMV6a3fBOZks7znY6aev4+ikfYJKiEfHUQpfwPt2tuhbimZ+YQSXmOa94ws7 d2awobVVnNcWjEd5Ybfmsr1Z0ZUSw0e5FYZyEPv8SSCjmh2640BZA2xF2lvrrkTYlkAF AU2fL0d2tSmA/a5TNq4XfsDI0FXDo4NMi9Z7M= Received: by 10.213.7.145 with SMTP id d17mr1193463ebd.65.1324126730635; Sat, 17 Dec 2011 04:58:50 -0800 (PST) Received: from shaker64.lan (dslb-088-073-137-229.pools.arcor-ip.net. [88.73.137.229]) by mx.google.com with ESMTPS id s16sm14739907eef.2.2011.12.17.04.58.49 (version=SSLv3 cipher=OTHER); Sat, 17 Dec 2011 04:58:49 -0800 (PST) From: Jonas Gorski To: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org, Florian Fainelli , David Woodhouse , Artem Bityutskiy Subject: [PATCH 0/5] MTD: bcm63xxpart: improve robustness Date: Sat, 17 Dec 2011 13:58:13 +0100 Message-Id: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 X-archive-position: 32114 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14074 Content-Length: 916 Lines: 24 This patchset aims at improving the robustness of the CFE detection and image tag validation and parsing. The image tag parsing improvement is especially useful when booting a ramdisk image through tftp, since there is no guarantee that the image on the flash is valid at this point. As usual this patchset should got through the MTD tree and is based on the l2-mtd-2.6 git. Jonas Gorski (5): MTD: bcm63xxpart: check version marker string for newer CFEs MTD: bcm63xxpart: make sure CFE and NVRAM partitions are at least 64K MTD: bcm63xxpart: don't assume NVRAM is always the fourth partition MIPS: BCM63XX: bcm963xx_tag.h: make crc fields integers MTD: bcm63xxpart: check the image tag's crc32 arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h | 11 +-- drivers/mtd/bcm63xxpart.c | 89 ++++++++++++++------- 2 files changed, 66 insertions(+), 34 deletions(-) -- 1.7.2.5 From jonas.gorski@gmail.com Sat Dec 17 13:58:57 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 17 Dec 2011 13:59:29 +0100 (CET) Received: from mail-ey0-f177.google.com ([209.85.215.177]:56305 "EHLO mail-ey0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903686Ab1LQM65 (ORCPT ); Sat, 17 Dec 2011 13:58:57 +0100 Received: by eaak12 with SMTP id k12so3598651eaa.36 for ; Sat, 17 Dec 2011 04:58:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=zFS97cPSBx69fWMSCM2YAQI+DA54TAyuW507siRdLsE=; b=WKNFHPHhL4En84yhFTG3N3AJBgAQs1uaY2JeEjHKsx7kxo7lxa5WUyxvTta58ATxzf oBGQjOZmjE3NGp4kVYkfCLAwg6EuCLU7gWdY41dLXsBkkm94Of3VSerztpCR1ZTQwiCD Z6X7ThDcgmZf9UIO1xGpdRh/XSyUyUF0/T1vI= Received: by 10.213.8.199 with SMTP id i7mr1158373ebi.129.1324126731871; Sat, 17 Dec 2011 04:58:51 -0800 (PST) Received: from shaker64.lan (dslb-088-073-137-229.pools.arcor-ip.net. [88.73.137.229]) by mx.google.com with ESMTPS id s16sm14739907eef.2.2011.12.17.04.58.50 (version=SSLv3 cipher=OTHER); Sat, 17 Dec 2011 04:58:51 -0800 (PST) From: Jonas Gorski To: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org, Florian Fainelli , David Woodhouse , Artem Bityutskiy Subject: [PATCH 1/5] MTD: bcm63xxpart: check version marker string for newer CFEs Date: Sat, 17 Dec 2011 13:58:14 +0100 Message-Id: <1324126698-9919-2-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> References: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> X-archive-position: 32115 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14075 Content-Length: 1611 Lines: 56 Recent CFEs do not contain the CFE1CFE1 magic anymore, so check for the "cfe-v" version marker string instead. As very old CFEs do not have this string, leave the CFE1CFE1 magic as a fallback for detection. Signed-off-by: Jonas Gorski --- drivers/mtd/bcm63xxpart.c | 22 +++++++++++++++++----- 1 files changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/bcm63xxpart.c b/drivers/mtd/bcm63xxpart.c index ac7d3c8..9933b34 100644 --- a/drivers/mtd/bcm63xxpart.c +++ b/drivers/mtd/bcm63xxpart.c @@ -32,22 +32,34 @@ #include #include +#include #define BCM63XX_EXTENDED_SIZE 0xBFC00000 /* Extended flash address */ +#define BCM63XX_CFE_MAGIC_OFFSET 0x4e0 + static int bcm63xx_detect_cfe(struct mtd_info *master) { - int idoffset = 0x4e0; - static char idstring[8] = "CFE1CFE1"; char buf[9]; int ret; size_t retlen; - ret = master->read(master, idoffset, 8, &retlen, (void *)buf); + ret = master->read(master, BCM963XX_CFE_VERSION_OFFSET, 5, &retlen, + (void *)buf); + buf[retlen] = 0; + + if (ret) + return ret; + + if (strncmp("cfe-v", buf, 5) == 0) + return 0; + + /* very old CFE's do not have the cfe-v string, so check for magic */ + ret = master->read(master, BCM63XX_CFE_MAGIC_OFFSET, 8, &retlen, + (void *)buf); buf[retlen] = 0; - pr_info("Read Signature value of %s\n", buf); - return strncmp(idstring, buf, 8); + return strncmp("CFE1CFE1", buf, 8); } static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, -- 1.7.2.5 From jonas.gorski@gmail.com Sat Dec 17 13:58:58 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 17 Dec 2011 13:59:51 +0100 (CET) Received: from mail-ey0-f177.google.com ([209.85.215.177]:57004 "EHLO mail-ey0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903687Ab1LQM66 (ORCPT ); Sat, 17 Dec 2011 13:58:58 +0100 Received: by eaak12 with SMTP id k12so3598663eaa.36 for ; Sat, 17 Dec 2011 04:58:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=8FXy+nAo1h6TbHmJkmlG43yl7WZc92DBtFq4EYctBik=; b=cJo+2C9UF/XPnqS/M5SA0bZQmw+JL8tjdxlwdOyIotI1+UoXytjsEDbYZSj6Pjtos2 v/eswG+VmM8EUl3r5/v1mkAJ6cMnz5uAg2F8kOQly4aOiPnlgvzlF80HmnUvF7t3lHWb evBYHmmLGM8DH/JwNwHOUqVUeNqjIbRQxstGU= Received: by 10.213.15.10 with SMTP id i10mr783495eba.112.1324126733440; Sat, 17 Dec 2011 04:58:53 -0800 (PST) Received: from shaker64.lan (dslb-088-073-137-229.pools.arcor-ip.net. [88.73.137.229]) by mx.google.com with ESMTPS id s16sm14739907eef.2.2011.12.17.04.58.51 (version=SSLv3 cipher=OTHER); Sat, 17 Dec 2011 04:58:52 -0800 (PST) From: Jonas Gorski To: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org, Florian Fainelli , David Woodhouse , Artem Bityutskiy Subject: [PATCH 2/5] MTD: bcm63xxpart: make sure CFE and NVRAM partitions are at least 64K Date: Sat, 17 Dec 2011 13:58:15 +0100 Message-Id: <1324126698-9919-3-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> References: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> X-archive-position: 32116 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14076 Content-Length: 2967 Lines: 86 The CFE and NVRAM are always at least 64K big, so make sure their partitions are never smaller than this in case the flash has smaller erase sectors. Signed-off-by: Jonas Gorski --- drivers/mtd/bcm63xxpart.c | 22 +++++++++++++++------- 1 files changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/bcm63xxpart.c b/drivers/mtd/bcm63xxpart.c index 9933b34..23f6201 100644 --- a/drivers/mtd/bcm63xxpart.c +++ b/drivers/mtd/bcm63xxpart.c @@ -36,6 +36,9 @@ #define BCM63XX_EXTENDED_SIZE 0xBFC00000 /* Extended flash address */ +#define BCM63XX_MIN_CFE_SIZE 0x10000 /* always at least 64K */ +#define BCM63XX_MIN_NVRAM_SIZE 0x10000 /* always at least 64K */ + #define BCM63XX_CFE_MAGIC_OFFSET 0x4e0 static int bcm63xx_detect_cfe(struct mtd_info *master) @@ -74,6 +77,7 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, size_t retlen; unsigned int rootfsaddr, kerneladdr, spareaddr; unsigned int rootfslen, kernellen, sparelen, totallen; + unsigned int cfelen, nvramlen; int namelen = 0; int i; char *boardid; @@ -82,14 +86,18 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, if (bcm63xx_detect_cfe(master)) return -EINVAL; + cfelen = max_t(uint32_t, master->erasesize, BCM63XX_MIN_CFE_SIZE); + nvramlen = max_t(uint32_t, master->erasesize, BCM63XX_MIN_NVRAM_SIZE); + /* Allocate memory for buffer */ buf = vmalloc(sizeof(struct bcm_tag)); if (!buf) return -ENOMEM; /* Get the tag */ - ret = master->read(master, master->erasesize, sizeof(struct bcm_tag), - &retlen, (void *)buf); + ret = master->read(master, cfelen, sizeof(struct bcm_tag), &retlen, + (void *)buf); + if (retlen != sizeof(struct bcm_tag)) { vfree(buf); return -EIO; @@ -106,8 +114,8 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, kerneladdr = kerneladdr - BCM63XX_EXTENDED_SIZE; rootfsaddr = kerneladdr + kernellen; - spareaddr = roundup(totallen, master->erasesize) + master->erasesize; - sparelen = master->size - spareaddr - master->erasesize; + spareaddr = roundup(totallen, master->erasesize) + cfelen; + sparelen = master->size - spareaddr - nvramlen; rootfslen = spareaddr - rootfsaddr; /* Determine number of partitions */ @@ -131,7 +139,7 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, /* Start building partition list */ parts[curpart].name = "CFE"; parts[curpart].offset = 0; - parts[curpart].size = master->erasesize; + parts[curpart].size = cfelen; curpart++; if (kernellen > 0) { @@ -151,8 +159,8 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, } parts[curpart].name = "nvram"; - parts[curpart].offset = master->size - master->erasesize; - parts[curpart].size = master->erasesize; + parts[curpart].offset = master->size - nvramlen; + parts[curpart].size = nvramlen; /* Global partition "linux" to make easy firmware upgrade */ curpart++; -- 1.7.2.5 From jonas.gorski@gmail.com Sat Dec 17 13:59:00 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 17 Dec 2011 14:00:16 +0100 (CET) Received: from mail-ee0-f49.google.com ([74.125.83.49]:49029 "EHLO mail-ee0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903689Ab1LQM7A (ORCPT ); Sat, 17 Dec 2011 13:59:00 +0100 Received: by eekc13 with SMTP id c13so2862498eek.36 for ; Sat, 17 Dec 2011 04:58:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=tqGEHstkcsFuTBQmGziO7hkY2hpB9knhCxMEPI/gQ60=; b=wvmLVjnCuG2kKpx2J2dEO6uzlz2k0nN4P3GnMm9Tkviwa7wXZo5/HSGII6+i55MgmF KAk2abaaqlpxDubV/TOAFv2ptl2fkwFu8nPiXPY4pwZ8nvVvdHTxxmnif4JGeADWERZ3 jYXge51V9uFRCOY//RiVuTdoNNMponhJY4qyo= Received: by 10.14.120.82 with SMTP id o58mr1137674eeh.129.1324126734861; Sat, 17 Dec 2011 04:58:54 -0800 (PST) Received: from shaker64.lan (dslb-088-073-137-229.pools.arcor-ip.net. [88.73.137.229]) by mx.google.com with ESMTPS id s16sm14739907eef.2.2011.12.17.04.58.53 (version=SSLv3 cipher=OTHER); Sat, 17 Dec 2011 04:58:54 -0800 (PST) From: Jonas Gorski To: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org, Florian Fainelli , David Woodhouse , Artem Bityutskiy Subject: [PATCH 3/5] MTD: bcm63xxpart: don't assume NVRAM is always the fourth partition Date: Sat, 17 Dec 2011 13:58:16 +0100 Message-Id: <1324126698-9919-4-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> References: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> X-archive-position: 32117 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14078 Content-Length: 910 Lines: 26 Instead of referencing the sizes of fixed partitions, use the precomputed CFE/NVRAM lengths. Signed-off-by: Jonas Gorski --- drivers/mtd/bcm63xxpart.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/bcm63xxpart.c b/drivers/mtd/bcm63xxpart.c index 23f6201..3becb4d 100644 --- a/drivers/mtd/bcm63xxpart.c +++ b/drivers/mtd/bcm63xxpart.c @@ -165,8 +165,8 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, /* Global partition "linux" to make easy firmware upgrade */ curpart++; parts[curpart].name = "linux"; - parts[curpart].offset = parts[0].size; - parts[curpart].size = master->size - parts[0].size - parts[3].size; + parts[curpart].offset = cfelen; + parts[curpart].size = master->size - cfelen - nvramlen; for (i = 0; i < nrparts; i++) pr_info("Partition %d is %s offset %lx and length %lx\n", i, -- 1.7.2.5 From jonas.gorski@gmail.com Sat Dec 17 13:59:01 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 17 Dec 2011 14:00:43 +0100 (CET) Received: from mail-ee0-f49.google.com ([74.125.83.49]:48594 "EHLO mail-ee0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903690Ab1LQM7B (ORCPT ); Sat, 17 Dec 2011 13:59:01 +0100 Received: by eekc13 with SMTP id c13so2862505eek.36 for ; Sat, 17 Dec 2011 04:58:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=Z4ylx6tfBqkvZjo8jIEpfpDqW7MOWIpXcM0ArR1sZAY=; b=J3sT7HZLWdpyHtda/i3/cSf3Q8aLgUmWvTJ2cOUuNfS+DlNaqOmGwcC9udHzmMO4HK HVdTEtoNibIri2a5CTZRSdNkn/JSlvc8nUQnldhabcoHFUIRSOckjsNQAzr5QOH7Q0lT x8uyJixhzKwpqqljHKt+DOvq4NnkrXJ0AXbE4= Received: by 10.213.22.74 with SMTP id m10mr1204632ebb.40.1324126736040; Sat, 17 Dec 2011 04:58:56 -0800 (PST) Received: from shaker64.lan (dslb-088-073-137-229.pools.arcor-ip.net. [88.73.137.229]) by mx.google.com with ESMTPS id s16sm14739907eef.2.2011.12.17.04.58.54 (version=SSLv3 cipher=OTHER); Sat, 17 Dec 2011 04:58:55 -0800 (PST) From: Jonas Gorski To: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org, Florian Fainelli , David Woodhouse , Artem Bityutskiy Subject: [PATCH 4/5] MIPS: BCM63XX: bcm963xx_tag.h: make crc fields integers Date: Sat, 17 Dec 2011 13:58:17 +0100 Message-Id: <1324126698-9919-5-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> References: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> X-archive-position: 32118 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14085 Content-Length: 1925 Lines: 52 All CRC32 fields are 32 bit integers, so define them as such to prevent unnecessary casts if we want to use them. Signed-off-by: Jonas Gorski --- I decided for __u32 against u32 so that user space applications can still use the header (like image creation utilities). arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h | 11 +++++------ 1 files changed, 5 insertions(+), 6 deletions(-) diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h b/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h index ed72e6a..1e6b587 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h @@ -16,7 +16,6 @@ #define TAGINFO1_LEN 30 /* Length of vendor information field1 in tag */ #define FLASHLAYOUTVER_LEN 4 /* Length of Flash Layout Version String tag */ #define TAGINFO2_LEN 16 /* Length of vendor information field2 in tag */ -#define CRC_LEN 4 /* Length of CRC in bytes */ #define ALTTAGINFO_LEN 54 /* Alternate length for vendor information; Pirelli */ #define NUM_PIRELLI 2 @@ -77,19 +76,19 @@ struct bcm_tag { /* 192-195: Version flash layout */ char flash_layout_ver[FLASHLAYOUTVER_LEN]; /* 196-199: kernel+rootfs CRC32 */ - char fskernel_crc[CRC_LEN]; + __u32 fskernel_crc; /* 200-215: Unused except on Alice Gate where is is information */ char information2[TAGINFO2_LEN]; /* 216-219: CRC32 of image less imagetag (kernel for Alice Gate) */ - char image_crc[CRC_LEN]; + __u32 image_crc; /* 220-223: CRC32 of rootfs partition */ - char rootfs_crc[CRC_LEN]; + __u32 rootfs_crc; /* 224-227: CRC32 of kernel partition */ - char kernel_crc[CRC_LEN]; + __u32 kernel_crc; /* 228-235: Unused at present */ char reserved1[8]; /* 236-239: CRC32 of header excluding last 20 bytes */ - char header_crc[CRC_LEN]; + __u32 header_crc; /* 240-255: Unused at present */ char reserved2[16]; }; -- 1.7.2.5 From jonas.gorski@gmail.com Sat Dec 17 13:59:02 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 17 Dec 2011 14:01:05 +0100 (CET) Received: from mail-ee0-f49.google.com ([74.125.83.49]:47778 "EHLO mail-ee0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903694Ab1LQM7C (ORCPT ); Sat, 17 Dec 2011 13:59:02 +0100 Received: by eekc13 with SMTP id c13so2862512eek.36 for ; Sat, 17 Dec 2011 04:58:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=zCvAqfob3rhHAiC79HvolQ5Pp34N6v2OKIONvxARn/0=; b=pDRIgXqdKcLrvOxtLVwkmWckVLppWm0Y3jcNARze0EdUW4hRsHpbD1EXg+PEp+UlhI AUAvvAJlfdUrvHP3nM477JA5L1p7af7Fulx6ldfp7G/1Dmafwv0aUtrbBcpnXFH2V8+Q cztGJoEErrxDbTmnhrGjDuZUoQjImqqotnQQs= Received: by 10.14.52.2 with SMTP id d2mr1207426eec.60.1324126737204; Sat, 17 Dec 2011 04:58:57 -0800 (PST) Received: from shaker64.lan (dslb-088-073-137-229.pools.arcor-ip.net. [88.73.137.229]) by mx.google.com with ESMTPS id s16sm14739907eef.2.2011.12.17.04.58.56 (version=SSLv3 cipher=OTHER); Sat, 17 Dec 2011 04:58:56 -0800 (PST) From: Jonas Gorski To: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org, Florian Fainelli , David Woodhouse , Artem Bityutskiy Subject: [PATCH 5/5] MTD: bcm63xxpart: check the image tag's crc32 Date: Sat, 17 Dec 2011 13:58:18 +0100 Message-Id: <1324126698-9919-6-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> References: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> X-archive-position: 32119 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14086 Content-Length: 2674 Lines: 82 Only use the values from the image tag if it is valid. Always create the CFE, NVRAM and linux partitions, to allow flashing a new image even if the old is invalid without overwriting CFE or NVRAM. Signed-off-by: Jonas Gorski --- drivers/mtd/bcm63xxpart.c | 45 +++++++++++++++++++++++++++++---------------- 1 files changed, 29 insertions(+), 16 deletions(-) diff --git a/drivers/mtd/bcm63xxpart.c b/drivers/mtd/bcm63xxpart.c index 3becb4d..0d5fecf 100644 --- a/drivers/mtd/bcm63xxpart.c +++ b/drivers/mtd/bcm63xxpart.c @@ -24,6 +24,7 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +#include #include #include #include @@ -80,8 +81,7 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, unsigned int cfelen, nvramlen; int namelen = 0; int i; - char *boardid; - char *tagversion; + u32 computed_crc; if (bcm63xx_detect_cfe(master)) return -EINVAL; @@ -103,20 +103,33 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, return -EIO; } - sscanf(buf->kernel_address, "%u", &kerneladdr); - sscanf(buf->kernel_length, "%u", &kernellen); - sscanf(buf->total_length, "%u", &totallen); - tagversion = &(buf->tag_version[0]); - boardid = &(buf->board_id[0]); - - pr_info("CFE boot tag found with version %s and board type %s\n", - tagversion, boardid); - - kerneladdr = kerneladdr - BCM63XX_EXTENDED_SIZE; - rootfsaddr = kerneladdr + kernellen; - spareaddr = roundup(totallen, master->erasesize) + cfelen; - sparelen = master->size - spareaddr - nvramlen; - rootfslen = spareaddr - rootfsaddr; + computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf, + offsetof(struct bcm_tag, header_crc)); + if (computed_crc == buf->header_crc) { + char *boardid = &(buf->board_id[0]); + char *tagversion = &(buf->tag_version[0]); + + sscanf(buf->kernel_address, "%u", &kerneladdr); + sscanf(buf->kernel_length, "%u", &kernellen); + sscanf(buf->total_length, "%u", &totallen); + + pr_info("CFE boot tag found with version %s and board type %s\n", + tagversion, boardid); + + kerneladdr = kerneladdr - BCM63XX_EXTENDED_SIZE; + rootfsaddr = kerneladdr + kernellen; + spareaddr = roundup(totallen, master->erasesize) + cfelen; + sparelen = master->size - spareaddr - nvramlen; + rootfslen = spareaddr - rootfsaddr; + } else { + pr_warn("CFE boot tag CRC invalid (expected %08x, actual %08x)\n", + buf->header_crc, computed_crc); + kernellen = 0; + rootfslen = 0; + rootfsaddr = 0; + spareaddr = cfelen; + sparelen = master->size - cfelen - nvramlen; + } /* Determine number of partitions */ namelen = 8; -- 1.7.2.5 From glecerf@gmail.com Sat Dec 17 14:14:11 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 17 Dec 2011 14:14:14 +0100 (CET) Received: from mail-vx0-f177.google.com ([209.85.220.177]:36592 "EHLO mail-vx0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903684Ab1LQNOL convert rfc822-to-8bit (ORCPT ); Sat, 17 Dec 2011 14:14:11 +0100 Received: by vcbf11 with SMTP id f11so3031260vcb.36 for ; Sat, 17 Dec 2011 05:14:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:from:date :x-google-sender-auth:message-id:subject:to:cc:content-type :content-transfer-encoding; bh=WDDG5p9R9FxgFCBKVpGvyNN0fjOR3NnzIW1fCyTnPdM=; b=VGsX7Wmz0oXCJbkwBujLJX4M//x5tcQQnETm4DqW7yCa8ojW7X6KpzYclvQonSdClv eQRXMaiVJieo2HDspeRFAFMeHL3V+QoXNg+xuoMk+S8CWbno9aXl+xktOzpyu64lq84e 8wx/anhVluTpofM0YEbUBgB371RlELfFVQ/o8= Received: by 10.220.149.200 with SMTP id u8mr6013515vcv.35.1324127643416; Sat, 17 Dec 2011 05:14:03 -0800 (PST) MIME-Version: 1.0 Received: by 10.52.182.98 with HTTP; Sat, 17 Dec 2011 05:13:42 -0800 (PST) In-Reply-To: <1324126698-9919-3-git-send-email-jonas.gorski@gmail.com> References: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> <1324126698-9919-3-git-send-email-jonas.gorski@gmail.com> From: Guillaume LECERF Date: Sat, 17 Dec 2011 14:13:42 +0100 X-Google-Sender-Auth: wh68Xh41lObrt1Pmx4OEOqH7Ago Message-ID: Subject: Re: [PATCH 2/5] MTD: bcm63xxpart: make sure CFE and NVRAM partitions are at least 64K To: Jonas Gorski Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, Artem Bityutskiy , David Woodhouse , Florian Fainelli Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 32121 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: glecerf@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14091 Content-Length: 400 Lines: 12 Hi Jonas, 2011/12/17 Jonas Gorski : > -       spareaddr = roundup(totallen, master->erasesize) + master->erasesize; > -       sparelen = master->size - spareaddr - master->erasesize; > +       spareaddr = roundup(totallen, master->erasesize) + cfelen; spareaddr = roundup(totallen, cfelen) + cfelen ? -- Guillaume LECERF OpenBricks developer - www.openbricks.org From jonas.gorski@gmail.com Sat Dec 17 14:28:04 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 17 Dec 2011 14:28:08 +0100 (CET) Received: from mail-ww0-f43.google.com ([74.125.82.43]:59729 "EHLO mail-ww0-f43.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903686Ab1LQN2E convert rfc822-to-8bit (ORCPT ); Sat, 17 Dec 2011 14:28:04 +0100 Received: by wgbds11 with SMTP id ds11so6664531wgb.24 for ; Sat, 17 Dec 2011 05:27:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type:content-transfer-encoding; bh=hmKLZn0eq0In1d4XbqEe1muq6l/oGC5i2dQcjUBA/sg=; b=uBhMo1OGmDh/lIKTTMasPpEIiZbkc0g4vJ/Oc/8eonW/ODMxGzOP4gDrPVDLm5tTLp la1wNIlQPug7fg/6TG05uGMmaf0aN3RktOK9W3Y0Wt+uMIi1s7H1MTcdumETyM+qEFd3 9RfS28OFn8t4NvUh7Zrqu+A6MUBarfpbUVLAo= Received: by 10.227.206.6 with SMTP id fs6mr8085055wbb.20.1324128479547; Sat, 17 Dec 2011 05:27:59 -0800 (PST) MIME-Version: 1.0 Received: by 10.223.89.71 with HTTP; Sat, 17 Dec 2011 05:27:38 -0800 (PST) In-Reply-To: References: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> <1324126698-9919-3-git-send-email-jonas.gorski@gmail.com> From: Jonas Gorski Date: Sat, 17 Dec 2011 14:27:38 +0100 Message-ID: Subject: Re: [PATCH 2/5] MTD: bcm63xxpart: make sure CFE and NVRAM partitions are at least 64K To: Guillaume LECERF Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, Artem Bityutskiy , David Woodhouse , Florian Fainelli Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 32122 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14097 Content-Length: 657 Lines: 21 Hi Guillaume, On 17 December 2011 14:13, Guillaume LECERF wrote: > Hi Jonas, > > 2011/12/17 Jonas Gorski : >> -       spareaddr = roundup(totallen, master->erasesize) + master->erasesize; >> -       sparelen = master->size - spareaddr - master->erasesize; >> +       spareaddr = roundup(totallen, master->erasesize) + cfelen; > > spareaddr = roundup(totallen, cfelen) + cfelen ? The intention is to align the spareaddr to the next eraseblock (cfelen can be bigger than the erasesize). Maybe writing it as       spareaddr = roundup(cfelen + totallen, master->erasesize); would be cleaner. Jonas From glecerf@gmail.com Sat Dec 17 15:32:46 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 17 Dec 2011 15:32:50 +0100 (CET) Received: from mail-vx0-f177.google.com ([209.85.220.177]:58242 "EHLO mail-vx0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903696Ab1LQOcq convert rfc822-to-8bit (ORCPT ); Sat, 17 Dec 2011 15:32:46 +0100 Received: by vcbf11 with SMTP id f11so3069333vcb.36 for ; Sat, 17 Dec 2011 06:32:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:from:date :x-google-sender-auth:message-id:subject:to:cc:content-type :content-transfer-encoding; bh=Uyz5Z5u9EuyE3ZKkh505d5dTN2RzRZ2dtaXo57Arnhc=; b=skjtPkKcJu0eouwHZW+zJQUJaIp3B9XxrdIFR0ePYsn9/zGhVRoxqNn+L9g5gDWuZ5 EpXdrFFb8e1p59hZgz57m1GBsyZG8fjmibYkDXV7ksrkc2GARLTg4EU8o/O2+xLgPiVN XFWXIkro+D8B274lHeHmjcfzIlNmz2Hmd6tVk= Received: by 10.220.214.73 with SMTP id gz9mr6220391vcb.5.1324132360229; Sat, 17 Dec 2011 06:32:40 -0800 (PST) MIME-Version: 1.0 Received: by 10.52.182.98 with HTTP; Sat, 17 Dec 2011 06:32:19 -0800 (PST) In-Reply-To: References: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> <1324126698-9919-3-git-send-email-jonas.gorski@gmail.com> From: Guillaume LECERF Date: Sat, 17 Dec 2011 15:32:19 +0100 X-Google-Sender-Auth: WuNWVBkiH0lLrKBry4PK3OlA6bk Message-ID: Subject: Re: [PATCH 2/5] MTD: bcm63xxpart: make sure CFE and NVRAM partitions are at least 64K To: Jonas Gorski Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, Artem Bityutskiy , David Woodhouse , Florian Fainelli Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-archive-position: 32123 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: glecerf@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14113 Content-Length: 435 Lines: 18 2011/12/17 Jonas Gorski : > The intention is to align the spareaddr to the next eraseblock (cfelen > can be bigger than the erasesize). Maybe writing it as > >        spareaddr = roundup(cfelen + totallen, master->erasesize); > > would be cleaner. Humm, you're right, forget my comment. BTW I don't mind what syntax you chose. Good job ;) -- Guillaume LECERF OpenBricks developer - www.openbricks.org From david.s.daney@gmail.com Sat Dec 17 19:07:11 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 17 Dec 2011 19:07:15 +0100 (CET) Received: from mail-iy0-f177.google.com ([209.85.210.177]:57286 "EHLO mail-iy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903697Ab1LQSHL (ORCPT ); Sat, 17 Dec 2011 19:07:11 +0100 Received: by iadk27 with SMTP id k27so5762989iad.36 for ; Sat, 17 Dec 2011 10:07:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding; bh=j/iVUZMpwt9PFIpTvk5XKcQxw2ViQpBWqL0rfKZE06A=; b=ngYRUmU7AJbEPNBEPAlcJ9N3C3KHcwOllDi5ifJmkhW0GgqQyoFkMxdGYFfzBRmBVd 9a+c5TkkmNKWXxamtpKax/Xj1GwG7L+w60l1jry3SQmiKi9uICzLTITHOfH5VrFl4A+x nZvzMpN+QPfG/eo7H82XCDp40rwGlu2XqUV74= Received: by 10.50.46.167 with SMTP id w7mr16510511igm.88.1324145224181; Sat, 17 Dec 2011 10:07:04 -0800 (PST) Received: from dd_xps.caveonetworks.com (adsl-67-127-191-181.dsl.pltn13.pacbell.net. [67.127.191.181]) by mx.google.com with ESMTPS id lu10sm21119427igc.0.2011.12.17.10.07.01 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 17 Dec 2011 10:07:03 -0800 (PST) Message-ID: <4EECDA43.6040004@gmail.com> Date: Sat, 17 Dec 2011 10:06:59 -0800 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.17) Gecko/20110428 Fedora/3.1.10-1.fc13 Thunderbird/3.1.10 MIME-Version: 1.0 To: Stephen Rothwell , Ralf Baechle CC: linux-next@vger.kernel.org, linux-kernel@vger.kernel.org, Hillf Danton , David Daney , linux-mips@linux-mips.org, "Jayachandran C." Subject: Re: linux-next: build failure after merge of the final tree (mips tree related) References: <20111217155044.094c4c2b51af7c66e8ec90a3@canb.auug.org.au> In-Reply-To: <20111217155044.094c4c2b51af7c66e8ec90a3@canb.auug.org.au> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-archive-position: 32124 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: david.s.daney@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14181 Content-Length: 688 Lines: 20 On 12/16/2011 08:50 PM, Stephen Rothwell wrote: > Hi all, > > After merging the final tree, today's linux-next build (mips almost all > configs) failed like this: > > arch/mips/mm/tlb-r4k.c: In function 'local_flush_tlb_range': > arch/mips/mm/tlb-r4k.c:128: error: 'HPAGE_SIZE' undeclared (first use in this function) > arch/mips/mm/tlb-r4k.c:130: error: 'HPAGE_SHIFT' undeclared (first use in this function) > > Probably caused by commit 0b07e859f87b ("MIPS: Flush huge TLB"). Indeed that is the case. We have a patch for this issue: http://patchwork.linux-mips.org/patch/3114/ Perhaps Ralf will push out a mips-for-linux-next containing this patch in the near future. David Daney From dedekind1@gmail.com Sat Dec 17 22:34:11 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 17 Dec 2011 22:34:14 +0100 (CET) Received: from mail-lpp01m010-f49.google.com ([209.85.215.49]:58066 "EHLO mail-lpp01m010-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903702Ab1LQVeL (ORCPT ); Sat, 17 Dec 2011 22:34:11 +0100 Received: by lahc1 with SMTP id c1so2848566lah.36 for ; Sat, 17 Dec 2011 13:34:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:date:in-reply-to:references :content-type:x-mailer:content-transfer-encoding:message-id :mime-version; bh=a9k7O5a7YT2N4ciHkWrtUzDK/JcFBYQHMdCvWw3Bqqs=; b=PT0RJ792wUfkrhfKfczxRbBGOYv3V+wfVJNaFgOC9TSQCzDrMMW8R9ModfkP6vXmWX DEhzFG7Emb2xCkpCumxOJbqrfG018KyBf2ivAXGS9CCtaR48QbGVAtPzkol/X6/ZENhx 5iDTZXIr4vJvnYAF96CPOqEVKeYN0fuDbTBRw= Received: by 10.152.108.239 with SMTP id hn15mr11955236lab.44.1324157645099; Sat, 17 Dec 2011 13:34:05 -0800 (PST) Received: from [192.168.255.2] (host-94-101-1-70.igua.fi. [94.101.1.70]) by mx.google.com with ESMTPS id ng10sm12198526lab.13.2011.12.17.13.34.01 (version=SSLv3 cipher=OTHER); Sat, 17 Dec 2011 13:34:04 -0800 (PST) Subject: Re: [PATCH 2/5] MTD: bcm63xxpart: make sure CFE and NVRAM partitions are at least 64K From: Artem Bityutskiy Reply-To: dedekind1@gmail.com To: Jonas Gorski Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, Artem Bityutskiy , David Woodhouse , Florian Fainelli Date: Sat, 17 Dec 2011 23:33:58 +0200 In-Reply-To: <1324126698-9919-3-git-send-email-jonas.gorski@gmail.com> References: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> <1324126698-9919-3-git-send-email-jonas.gorski@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.0.3 (3.0.3-1.fc15) Content-Transfer-Encoding: 7bit Message-ID: <1324157643.2240.2.camel@koala> Mime-Version: 1.0 X-archive-position: 32125 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dedekind1@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14225 Content-Length: 499 Lines: 14 On Sat, 2011-12-17 at 13:58 +0100, Jonas Gorski wrote: > The CFE and NVRAM are always at least 64K big, so make sure their > partitions are never smaller than this in case the flash has smaller > erase sectors. > > Signed-off-by: Jonas Gorski Not that I have any knowledge about BCM platform, but still, I think it is good idea to explain why these partitions have to be at least 64KiB. Could you please do this, just for the sake of having good commit messages? Artem. From dedekind1@gmail.com Sat Dec 17 22:40:42 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 17 Dec 2011 22:40:45 +0100 (CET) Received: from mail-lpp01m010-f49.google.com ([209.85.215.49]:49964 "EHLO mail-lpp01m010-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903702Ab1LQVkm (ORCPT ); Sat, 17 Dec 2011 22:40:42 +0100 Received: by lahc1 with SMTP id c1so2850098lah.36 for ; Sat, 17 Dec 2011 13:40:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:date:in-reply-to:references :content-type:x-mailer:content-transfer-encoding:message-id :mime-version; bh=P4cVmkVA/23wvCvcMiAhHWzqraEdkYx3VDBQvJR0MTw=; b=LbRHFAXkqo1dLCuILeA7D7AJlyHg9tFf122hU5erJ4QdZoZM2MBpQqVyxiKP9bNP/s 9d1cDhFUnQ39Ly0swlVYamx0BarkatE2iP0eZD/2Ra8llU9gFuTQSbMAQYdD3od7s17w IE2uo12BUoFgP+UG8G3PbtTqI9nfbGZWVSUcQ= Received: by 10.152.113.101 with SMTP id ix5mr3481350lab.16.1324158036583; Sat, 17 Dec 2011 13:40:36 -0800 (PST) Received: from [192.168.255.2] (host-94-101-1-70.igua.fi. [94.101.1.70]) by mx.google.com with ESMTPS id on4sm413177lab.7.2011.12.17.13.40.32 (version=SSLv3 cipher=OTHER); Sat, 17 Dec 2011 13:40:35 -0800 (PST) Subject: Re: [PATCH 0/5] MTD: bcm63xxpart: improve robustness From: Artem Bityutskiy Reply-To: dedekind1@gmail.com To: Jonas Gorski Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, Artem Bityutskiy , David Woodhouse , Florian Fainelli Date: Sat, 17 Dec 2011 23:40:30 +0200 In-Reply-To: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> References: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.0.3 (3.0.3-1.fc15) Content-Transfer-Encoding: 7bit Message-ID: <1324158035.2240.5.camel@koala> Mime-Version: 1.0 X-archive-position: 32126 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dedekind1@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14230 Content-Length: 585 Lines: 16 On Sat, 2011-12-17 at 13:58 +0100, Jonas Gorski wrote: > This patchset aims at improving the robustness of the CFE detection and > image tag validation and parsing. > > The image tag parsing improvement is especially useful when booting a > ramdisk image through tftp, since there is no guarantee that the image > on the flash is valid at this point. > > As usual this patchset should got through the MTD tree and is based on > the l2-mtd-2.6 git. Looks good except of the "explain 64KiB" nit-pick. Pushing to l2-mtd-2.6.git, but I'll take the improved version of patch 2. Artem. From jonas.gorski@gmail.com Sat Dec 17 22:58:07 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 17 Dec 2011 22:58:11 +0100 (CET) Received: from mail-ww0-f43.google.com ([74.125.82.43]:43357 "EHLO mail-ww0-f43.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903725Ab1LQV6H (ORCPT ); Sat, 17 Dec 2011 22:58:07 +0100 Received: by wgbds11 with SMTP id ds11so7159119wgb.24 for ; Sat, 17 Dec 2011 13:58:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type; bh=61ifzSReSz8CF42YflkNthPHKKa4GlRHg7rbN/aXFm4=; b=j5DHX/QURTh1zAnQBR75ASuhkgAI1AnoRYnbuFKA9vUJOs4LO9iuv6NirHktFamIbw OmgmhHl2xx7CPyoMJ5WWlDbjOxT6pvrmz0SK0JWuoiGwghUjPH1co6GFEkmyrBsPwGQe kgnR04VwkgC+xwVON3h7IGfQ9N2HkYV5yCjvY= Received: by 10.216.135.154 with SMTP id u26mr4899667wei.20.1324159082333; Sat, 17 Dec 2011 13:58:02 -0800 (PST) MIME-Version: 1.0 Received: by 10.223.89.71 with HTTP; Sat, 17 Dec 2011 13:57:41 -0800 (PST) In-Reply-To: <1324157643.2240.2.camel@koala> References: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> <1324126698-9919-3-git-send-email-jonas.gorski@gmail.com> <1324157643.2240.2.camel@koala> From: Jonas Gorski Date: Sat, 17 Dec 2011 22:57:41 +0100 Message-ID: Subject: Re: [PATCH 2/5] MTD: bcm63xxpart: make sure CFE and NVRAM partitions are at least 64K To: dedekind1@gmail.com Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, Artem Bityutskiy , David Woodhouse , Florian Fainelli Content-Type: text/plain; charset=UTF-8 X-archive-position: 32127 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14237 Content-Length: 396 Lines: 11 On 17 December 2011 22:33, Artem Bityutskiy wrote: > Not that I have any knowledge about BCM platform, but still, I think > it is good idea to explain why these partitions have to be at least > 64KiB. Could you please do this, just for the sake of having good > commit messages? Sure, no problem. Should I sent the whole series again or is a V2 of this one enough? Jonas From kumba@gentoo.org Sun Dec 18 01:56:42 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 18 Dec 2011 01:56:49 +0100 (CET) Received: from qmta09.westchester.pa.mail.comcast.net ([76.96.62.96]:51836 "EHLO qmta09.westchester.pa.mail.comcast.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903726Ab1LRA4m (ORCPT ); Sun, 18 Dec 2011 01:56:42 +0100 Received: from omta02.westchester.pa.mail.comcast.net ([76.96.62.19]) by qmta09.westchester.pa.mail.comcast.net with comcast id AQjr1i0030QuhwU59Qwciz; Sun, 18 Dec 2011 00:56:36 +0000 Received: from [192.168.1.13] ([76.106.69.86]) by omta02.westchester.pa.mail.comcast.net with comcast id AQwb1i00r1rgsis3NQwb7F; Sun, 18 Dec 2011 00:56:36 +0000 Message-ID: <4EED3A3D.9080503@gentoo.org> Date: Sat, 17 Dec 2011 19:56:29 -0500 From: Joshua Kinard User-Agent: Mozilla/5.0 (Windows NT 6.0; WOW64; rv:8.0) Gecko/20111105 Thunderbird/8.0 MIME-Version: 1.0 To: netdev@vger.kernel.org, Linux MIPS List Subject: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery X-Enigmail-Version: 1.3.3 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 32128 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14294 Content-Length: 3327 Lines: 104 SGI IP32 (O2)'s ethernet driver (meth) lacks a set_rx_mode function, which prevents IPv6 from working completely because any ICMPv6 neighbor solicitation requests aren't picked up by the driver. So the machine can ping out and connect to other systems, but other systems will have a very hard time connecting to the O2. Signed-off-by: Joshua Kinard --- drivers/net/ethernet/sgi/meth.c | 60 +++++++++++++++++++++++++++++++++++----- 1 file changed, 53 insertions(+), 7 deletions(-) --- a/drivers/net/ethernet/sgi/meth.c 2011-12-17 15:51:44.569166824 -0500 +++ b/drivers/net/ethernet/sgi/meth.c 2011-12-17 15:51:20.259167050 -0500 @@ -28,6 +28,7 @@ #include /* struct tcphdr */ #include #include /* MII definitions */ +#include #include #include @@ -57,6 +58,12 @@ static const char *meth_str="SGI O2 Fast static int timeout = TX_TIMEOUT; module_param(timeout, int, 0); +/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). + * MACE Ethernet uses a 64 element hash table based on the Ethernet CRC. + */ +static int multicast_filter_limit = 32; + + /* * This structure is private to each device. It is used to pass * packets in and out, so there is place for a packet @@ -79,6 +86,9 @@ struct meth_private { struct sk_buff *rx_skbs[RX_RING_ENTRIES]; unsigned long rx_write; + /* Multicast filter. */ + unsigned long mcast_filter; + spinlock_t meth_lock; }; @@ -765,15 +775,51 @@ static int meth_ioctl(struct net_device } } +static void meth_set_rx_mode(struct net_device *dev) +{ + struct meth_private *priv = netdev_priv(dev); + unsigned long flags; + + netif_stop_queue(dev); + spin_lock_irqsave(&priv->meth_lock, flags); + priv->mac_ctrl &= ~(METH_PROMISC); + + if (dev->flags & IFF_PROMISC) { + priv->mac_ctrl |= METH_PROMISC; + priv->mcast_filter = 0xffffffffffffffffUL; + mace->eth.mac_ctrl = priv->mac_ctrl; + mace->eth.mcast_filter = priv->mcast_filter; + } else if ((netdev_mc_count(dev) > multicast_filter_limit) || + (dev->flags & IFF_ALLMULTI)) { + priv->mac_ctrl |= METH_ACCEPT_AMCAST; + priv->mcast_filter = 0xffffffffffffffffUL; + mace->eth.mac_ctrl = priv->mac_ctrl; + mace->eth.mcast_filter = priv->mcast_filter; + } else { + struct netdev_hw_addr *ha; + priv->mac_ctrl |= METH_ACCEPT_MCAST; + + netdev_for_each_mc_addr(ha, dev) + set_bit((ether_crc(ETH_ALEN, ha->addr) >> 26), + (volatile long unsigned int *)&priv->mcast_filter); + + mace->eth.mcast_filter = priv->mcast_filter; + } + + spin_unlock_irqrestore(&priv->meth_lock, flags); + netif_wake_queue(dev); +} + static const struct net_device_ops meth_netdev_ops = { - .ndo_open = meth_open, - .ndo_stop = meth_release, - .ndo_start_xmit = meth_tx, - .ndo_do_ioctl = meth_ioctl, - .ndo_tx_timeout = meth_tx_timeout, - .ndo_change_mtu = eth_change_mtu, - .ndo_validate_addr = eth_validate_addr, + .ndo_open = meth_open, + .ndo_stop = meth_release, + .ndo_start_xmit = meth_tx, + .ndo_do_ioctl = meth_ioctl, + .ndo_tx_timeout = meth_tx_timeout, + .ndo_change_mtu = eth_change_mtu, + .ndo_validate_addr = eth_validate_addr, .ndo_set_mac_address = eth_mac_addr, + .ndo_set_rx_mode = meth_set_rx_mode, }; /* From kumba@gentoo.org Sun Dec 18 02:28:03 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 18 Dec 2011 02:28:08 +0100 (CET) Received: from qmta10.emeryville.ca.mail.comcast.net ([76.96.30.17]:51248 "EHLO qmta10.emeryville.ca.mail.comcast.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903745Ab1LRB2D (ORCPT ); Sun, 18 Dec 2011 02:28:03 +0100 Received: from omta13.emeryville.ca.mail.comcast.net ([76.96.30.52]) by qmta10.emeryville.ca.mail.comcast.net with comcast id ARS11i00117UAYkAARTqVg; Sun, 18 Dec 2011 01:27:50 +0000 Received: from [192.168.1.13] ([76.106.69.86]) by omta13.emeryville.ca.mail.comcast.net with comcast id ARR71i00K1rgsis8ZRR8xu; Sun, 18 Dec 2011 01:25:09 +0000 Message-ID: <4EED418E.40501@gentoo.org> Date: Sat, 17 Dec 2011 20:27:42 -0500 From: Joshua Kinard User-Agent: Mozilla/5.0 (Windows NT 6.0; WOW64; rv:8.0) Gecko/20111105 Thunderbird/8.0 MIME-Version: 1.0 To: netdev@vger.kernel.org, Linux MIPS List Subject: [PATCH] net: meth: Some code cleanups for meth X-Enigmail-Version: 1.3.3 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 32129 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14305 Content-Length: 22469 Lines: 662 Clean up meth.h a fair bit, including replacing the copyright header with one more appropriate for the kernel, including the original author. Some minor cleanups were also done to meth.c, but more could be used down the road. Signed-off-by: Joshua Kinard --- drivers/net/ethernet/sgi/meth.c | 42 ++- drivers/net/ethernet/sgi/meth.h | 440 ++++++++++++++++++++++++++-------------- 2 files changed, 319 insertions(+), 163 deletions(-) --- a/drivers/net/ethernet/sgi/meth.c 2011-12-17 16:01:20.729161498 -0500 +++ b/drivers/net/ethernet/sgi/meth.c 2011-12-17 16:03:38.189160228 -0500 @@ -71,16 +71,21 @@ static int multicast_filter_limit = 32; struct meth_private { /* in-memory copy of MAC Control register */ unsigned long mac_ctrl; + /* in-memory copy of DMA Control register */ unsigned long dma_ctrl; + /* address of PHY, used by mdio_* functions, initialized in mdio_probe */ unsigned long phy_addr; + + /* TX stuff. */ tx_packet *tx_ring; dma_addr_t tx_ring_dma; struct sk_buff *tx_skbs[TX_RING_ENTRIES]; dma_addr_t tx_skb_dmas[TX_RING_ENTRIES]; unsigned long tx_read, tx_write, tx_count; + /* RX stuff. */ rx_packet *rx_ring[RX_RING_ENTRIES]; dma_addr_t rx_ring_dmas[RX_RING_ENTRIES]; struct sk_buff *rx_skbs[RX_RING_ENTRIES]; @@ -114,10 +119,11 @@ static inline void load_eaddr(struct net /* * Waits for BUSY status of mdio bus to clear */ -#define WAIT_FOR_PHY(___rval) \ - while ((___rval = mace->eth.phy_data) & MDIO_BUSY) { \ - udelay(25); \ +#define WAIT_FOR_PHY(___rval) \ + while ((___rval = mace->eth.phy_data) & MDIO_BUSY) { \ + udelay(25); \ } + /*read phy register, return value read */ static unsigned long mdio_read(struct meth_private *priv, unsigned long phyreg) { @@ -135,16 +141,20 @@ static int mdio_probe(struct meth_privat { int i; unsigned long p2, p3, flags; + /* check if phy is detected already */ if(priv->phy_addr>=0&&priv->phy_addr<32) return 0; + spin_lock_irqsave(&priv->meth_lock, flags); - for (i=0;i<32;++i){ - priv->phy_addr=i; - p2=mdio_read(priv,2); - p3=mdio_read(priv,3); + + for (i = 0; i < 32; i++){ + priv->phy_addr = i; + p2 = mdio_read(priv,2); + p3 = mdio_read(priv,3); + #if MFE_DEBUG>=2 - switch ((p2<<12)|(p3>>4)){ + switch ((p2 << 12) | (p3 >> 4)) { case PHY_QS6612X: DPRINTK("PHY is QS6612X\n"); break; @@ -159,17 +169,19 @@ static int mdio_probe(struct meth_privat break; } #endif - if(p2!=0xffff&&p2!=0x0000){ - DPRINTK("PHY code: %x\n",(p2<<12)|(p3>>4)); + + if ((p2 != 0xffff) && (p2 != 0x0000)) { + DPRINTK("PHY code: %x\n",((p2 << 12) | (p3 >> 4))); break; } } spin_unlock_irqrestore(&priv->meth_lock, flags); - if(priv->phy_addr<32) { + + if (priv->phy_addr < 32) return 0; - } - DPRINTK("Oopsie! PHY is not known!\n"); - priv->phy_addr=-1; + + DPRINTK("Error: Unknown PHY chip!\n"); + priv->phy_addr = -1; return -ENODEV; } @@ -276,7 +288,7 @@ int meth_reset(struct net_device *dev) struct meth_private *priv = netdev_priv(dev); /* Reset card */ - mace->eth.mac_ctrl = SGI_MAC_RESET; + mace->eth.mac_ctrl = METH_CORE_RESET; udelay(1); mace->eth.mac_ctrl = 0; udelay(25); --- a/drivers/net/ethernet/sgi/meth.h 2011-12-17 16:01:30.509161408 -0500 +++ b/drivers/net/ethernet/sgi/meth.h 2011-12-17 16:02:51.279160663 -0500 @@ -1,69 +1,87 @@ /* - * snull.h -- definitions for the network module + * meth.h -- definitions for the SGI O2 Fast Ethernet device * - * Copyright (C) 2001 Alessandro Rubini and Jonathan Corbet - * Copyright (C) 2001 O'Reilly & Associates + * Copyright (C) 2001-2003 Ilya Volynets + * Copyright (C) 2011 Joshua Kinard * - * The source code in this file can be freely used, adapted, - * and redistributed in source or binary form, so long as an - * acknowledgment appears in derived source files. The citation - * should list that the code comes from the book "Linux Device - * Drivers" by Alessandro Rubini and Jonathan Corbet, published - * by O'Reilly & Associates. No warranty is attached; - * we cannot take responsibility for errors or fitness for use. + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. */ - + /* version dependencies have been confined to a separate file */ /* Tunable parameters */ #define TX_RING_ENTRIES 64 /* 64-512?*/ +#define RX_RING_ENTRIES 16 /* Do not change */ -#define RX_RING_ENTRIES 16 /* Do not change */ /* Internal constants */ #define TX_RING_BUFFER_SIZE (TX_RING_ENTRIES*sizeof(tx_packet)) -#define RX_BUFFER_SIZE 1546 /* ethenet packet size */ -#define METH_RX_BUFF_SIZE 4096 -#define METH_RX_HEAD 34 /* status + 3 quad garbage-fill + 2 byte zero-pad */ +#define RX_BUFFER_SIZE 1546 /* ethenet packet size */ #define RX_BUFFER_OFFSET (sizeof(rx_status_vector)+2) /* staus vector + 2 bytes of padding */ #define RX_BUCKET_SIZE 256 +#define METH_RX_BUFF_SIZE 4096 -/* For more detailed explanations of what each field menas, - see Nick's great comments to #defines below (or docs, if - you are lucky enough toget hold of them :)*/ -/* tx status vector is written over tx command header upon - dma completion. */ +/* + * status + + * 3 quad garbage-fill + + * 2 byte zero-pad + */ +#define METH_RX_HEAD 34 + +/* + * For more detailed explanations of what each field menas, + * see Nick's great comments to #defines below (or docs, if + * you are lucky enough toget hold of them :) + */ + +/* + * tx status vector is written over tx command header upon + * dma completion. + */ typedef struct tx_status_vector { - u64 sent:1; /* always set to 1...*/ - u64 pad0:34;/* always set to 0 */ - u64 flags:9; /*I'm too lazy to specify each one separately at the moment*/ - u64 col_retry_cnt:4; /*collision retry count*/ - u64 len:16; /*Transmit length in bytes*/ + u64 sent:1; /* Always set to one */ + u64 pad0:34; /* Always filled with zeroes */ + u64 drp_late_coll:1; /* Transmit dropped due to late collision */ + u64 can_xsv_defr:1; /* Transmit cancelled due to excessive deferral */ + u64 drp_xs_coll:1; /* Transmit dropped due to excess collisions */ + u64 abrt_underrun:1; /* Transmit aborted due to underrun */ + u64 abrt_xsv_len:1; /* Transmit aborted to to excessive length */ + u64 success:1; /* Transmit completed successfully */ + u64 pkt_deferred:1; /* Packet deferred on at least one TX attempt */ + u64 crc_error:1; /* CRC error on at least one TX attempt */ + u64 late_coll:1; /* Late collision on at least one TX attempt */ + u64 col_retry_cnt:4; /* collision retry count */ + u64 len:16; /* Transmit length in bytes */ } tx_status_vector; + /* * Each packet is 128 bytes long. * It consists of header, 0-3 concatination * buffer pointers and up to 120 data bytes. */ typedef struct tx_packet_hdr { - u64 pad1:36; /*should be filled with 0 */ - u64 cat_ptr3_valid:1, /*Concatination pointer valid flags*/ - cat_ptr2_valid:1, - cat_ptr1_valid:1; - u64 tx_int_flag:1; /*Generate TX intrrupt when packet has been sent*/ - u64 term_dma_flag:1; /*Terminate transmit DMA on transmit abort conditions*/ - u64 data_offset:7; /*Starting byte offset in ring data block*/ - u64 data_len:16; /*Length of valid data in bytes-1*/ + u64 pad1:36; /*should be filled with 0 */ + u64 cat_ptr3_valid:1; /* Concatination pointer valid flags */ + u64 cat_ptr2_valid:1; + u64 cat_ptr1_valid:1; + u64 tx_int_flag:1; /* Generate TX intrrupt when packet has been sent */ + u64 term_dma_flag:1; /* Terminate transmit DMA on transmit abort conditions */ + u64 data_offset:7; /* Starting byte offset in ring data block */ + u64 data_len:16; /* Length of valid data in bytes-1 */ } tx_packet_hdr; + typedef union tx_cat_ptr { struct { - u64 pad2:16; /* should be 0 */ - u64 len:16; /*length of buffer data - 1*/ - u64 start_addr:29; /*Physical starting address*/ - u64 pad1:3; /* should be zero */ + u64 pad2:16; /* Should be 0 */ + u64 len:16; /* length of buffer data - 1 */ + u64 start_addr:29; /* Physical starting address */ + u64 pad1:3; /* Should be 0 */ } form; u64 raw; } tx_cat_ptr; @@ -82,8 +100,8 @@ typedef struct tx_packet { typedef union rx_status_vector { volatile struct { - u64 pad1:1;/*fill it with ones*/ - u64 pad2:15;/*fill with 0*/ + u64 pad1:1; /* Fill it with ones */ + u64 pad2:15; /* Fill with zeros */ u64 ip_chk_sum:16; u64 seq_num:5; u64 mac_addr_match:1; @@ -95,7 +113,7 @@ typedef union rx_status_vector { u64 broadcast:1; u64 multicast:1; u64 crc_error:1; - u64 huh:1;/*???*/ + u64 dribble:1; /* Dribble nibble? */ u64 rx_code_violation:1; u64 rx_len:16; } parsed; @@ -109,135 +127,261 @@ typedef struct rx_packet { char buf[METH_RX_BUFF_SIZE-sizeof(rx_status_vector)-3*sizeof(u64)-sizeof(u16)];/* data */ } rx_packet; -#define TX_INFO_RPTR 0x00FF0000 -#define TX_INFO_WPTR 0x000000FF +#define TX_INFO_RPTR 0x00FF0000 +#define TX_INFO_WPTR 0x000000FF + - /* Bits in METH_MAC */ -#define SGI_MAC_RESET BIT(0) /* 0: MAC110 active in run mode, 1: Global reset signal to MAC110 core is active */ -#define METH_PHY_FDX BIT(1) /* 0: Disable full duplex, 1: Enable full duplex */ -#define METH_PHY_LOOP BIT(2) /* 0: Normal operation, follows 10/100mbit and M10T/MII select, 1: loops internal MII bus */ - /* selects ignored */ -#define METH_100MBIT BIT(3) /* 0: 10meg mode, 1: 100meg mode */ -#define METH_PHY_MII BIT(4) /* 0: MII selected, 1: SIA selected */ - /* Note: when loopback is set this bit becomes collision control. Setting this bit will */ - /* cause a collision to be reported. */ +/* Bits in METH_MAC */ + +/* + * Core Reset: + * 0: MAC110 active in run mode + * 1: Global reset signal to MAC110 core is active + */ +#define METH_CORE_RESET BIT(0) - /* Bits 5 and 6 are used to determine the Destination address filter mode */ -#define METH_ACCEPT_MY 0 /* 00: Accept PHY address only */ -#define METH_ACCEPT_MCAST 0x20 /* 01: Accept physical, broadcast, and multicast filter matches only */ -#define METH_ACCEPT_AMCAST 0x40 /* 10: Accept physical, broadcast, and all multicast packets */ -#define METH_PROMISC 0x60 /* 11: Promiscious mode */ +/* + * Duplex: + * 0: Disable full duplex + * 1: Enable full duplex + */ +#define METH_PHY_FDX BIT(1) -#define METH_PHY_LINK_FAIL BIT(7) /* 0: Link failure detection disabled, 1: Hardware scans for link failure in PHY */ +/* + * Loopback Internal Select + * 0: Normal operation, follows 10/100mbit and M10T/MII select + * 1: loops internal MII bus, selects ignored. + */ +#define METH_PHY_LOOP BIT(2) -#define METH_MAC_IPG 0x1ffff00 +/* + * 10/100 Mbit Select + * 0: 10mb mode + * 1: 100mb mode + */ +#define METH_100MBIT BIT(3) -#define METH_DEFAULT_IPG ((17<<15) | (11<<22) | (21<<8)) - /* 0x172e5c00 */ /* 23, 23, 23 */ /*0x54A9500 *//*21,21,21*/ - /* Bits 8 through 14 are used to determine Inter-Packet Gap between "Back to Back" packets */ - /* The gap depends on the clock speed of the link, 80ns per increment for 100baseT, 800ns */ - /* per increment for 10BaseT */ +/* + * M10T/MII Select + * 0: MII selected + * 1: SIA selected + * + * Note: when loopback is set this bit becomes collision + * control. Setting this bit will cause a collision to + * be reported. + */ +#define METH_PHY_MII BIT(4) - /* Bits 15 through 21 are used to determine IPGR1 */ +/* + * Destination Address Filter Mode + * + * Bits 5 and 6 are written to one of the values below to + * set the destination address filtering. + */ +#define METH_ACCEPT_MY 0x00 /* 00: PHY address only */ +#define METH_ACCEPT_MCAST 0x20 /* 01: Phys, bcast, & multicast filter matches only */ +#define METH_ACCEPT_AMCAST 0x40 /* 10: Phys, bcast, and all multicast packets */ +#define METH_PROMISC 0x60 /* 11: Promiscious mode */ - /* Bits 22 through 28 are used to determine IPGR2 */ +/* + * Link Failure Enable + * 0: Link failure detection disabled + * 1: Hardware scans for link failure in PHY + */ +#define METH_PHY_LINK_FAIL BIT(7) -#define METH_REV_SHIFT 29 /* Bits 29 through 31 are used to determine the revision */ - /* 000: Initial revision */ - /* 001: First revision, Improved TX concatenation */ +/* + * Inter-packet Gap + * + * Bits 8 through 14 are used to determine Inter-Packet Gap + * between "Back to Back" packets. The gap depends on the + * clock speed of the link, 80ns per increment for 100baseT, + * 800ns per increment for 10BaseT. + * + * Bits 15 through 21 are used to determine IPGR1. + * Bits 22 through 28 are used to determine IPGR2. + * + */ +#define METH_MAC_IPG 0x1ffff00 +#define METH_DEFAULT_IPG ((17<<15) | (11<<22) | (21<<8)) +/* + * Implementation Revision (read-only) + * 000: Initial revision + * 001: First revision, Improved TX concatenation + * + * Bits 29 through 31 are used to determine the revision. + */ + #define METH_REV_MASK (BIT(29) | BIT(30) | BIT(31)) -/* DMA control bits */ -#define METH_RX_OFFSET_SHIFT 12 /* Bits 12:14 of DMA control register indicate starting offset of packet data for RX operation */ -#define METH_RX_DEPTH_SHIFT 4 /* Bits 8:4 define RX fifo depth -- when # of RX fifo entries != depth, interrupt is generted */ -#define METH_DMA_TX_EN BIT(1) /* enable TX DMA */ -#define METH_DMA_TX_INT_EN BIT(0) /* enable TX Buffer Empty interrupt */ -#define METH_DMA_RX_EN BIT(15) /* Enable RX */ -#define METH_DMA_RX_INT_EN BIT(9) /* Enable interrupt on RX packet */ +/* DMA control register */ + +/* + * RX DMA Starting Offset + * + * Bits 12:14 of indicate starting offset of packet data + * for RX operation. + */ +#define METH_RX_OFFSET_SHIFT 12 + +/* RX FIFO Depth + * + * Bits 8:4 define RX fifo depth. When the number of RX + * fifo entries != depth, then an interrupt is generated. + */ +#define METH_RX_DEPTH_SHIFT 4 + +/* + * DMA RX/TX Enable + Intr Enable + */ +#define METH_DMA_TX_EN BIT(1) /* TX DMA Enable */ +#define METH_DMA_TX_INT_EN BIT(0) /* TX Interrupt Enable */ +#define METH_DMA_RX_EN BIT(15) /* RX DMA Enable */ +#define METH_DMA_RX_INT_EN BIT(9) /* RX Interrupt Enable */ /* RX FIFO MCL Info bits */ -#define METH_RX_FIFO_WPTR(x) (((x)>>16)&0xf) -#define METH_RX_FIFO_RPTR(x) (((x)>>8)&0xf) -#define METH_RX_FIFO_DEPTH(x) ((x)&0x1f) - -/* RX status bits */ - -#define METH_RX_ST_VALID BIT(63) -#define METH_RX_ST_RCV_CODE_VIOLATION BIT(16) -#define METH_RX_ST_DRBL_NBL BIT(17) -#define METH_RX_ST_CRC_ERR BIT(18) -#define METH_RX_ST_MCAST_PKT BIT(19) -#define METH_RX_ST_BCAST_PKT BIT(20) -#define METH_RX_ST_INV_PREAMBLE_CTX BIT(21) -#define METH_RX_ST_LONG_EVT_SEEN BIT(22) -#define METH_RX_ST_BAD_PACKET BIT(23) -#define METH_RX_ST_CARRIER_EVT_SEEN BIT(24) -#define METH_RX_ST_MCAST_FILTER_MATCH BIT(25) -#define METH_RX_ST_PHYS_ADDR_MATCH BIT(26) - -#define METH_RX_STATUS_ERRORS \ - ( \ - METH_RX_ST_RCV_CODE_VIOLATION| \ - METH_RX_ST_CRC_ERR| \ - METH_RX_ST_INV_PREAMBLE_CTX| \ - METH_RX_ST_LONG_EVT_SEEN| \ - METH_RX_ST_BAD_PACKET| \ - METH_RX_ST_CARRIER_EVT_SEEN \ - ) - /* Bits in METH_INT */ - /* Write _1_ to corresponding bit to clear */ -#define METH_INT_TX_EMPTY BIT(0) /* 0: No interrupt pending, 1: The TX ring buffer is empty */ -#define METH_INT_TX_PKT BIT(1) /* 0: No interrupt pending */ - /* 1: A TX message had the INT request bit set, the packet has been sent. */ -#define METH_INT_TX_LINK_FAIL BIT(2) /* 0: No interrupt pending, 1: PHY has reported a link failure */ -#define METH_INT_MEM_ERROR BIT(3) /* 0: No interrupt pending */ - /* 1: A memory error occurred during DMA, DMA stopped, Fatal */ -#define METH_INT_TX_ABORT BIT(4) /* 0: No interrupt pending, 1: The TX aborted operation, DMA stopped, FATAL */ -#define METH_INT_RX_THRESHOLD BIT(5) /* 0: No interrupt pending, 1: Selected receive threshold condition Valid */ -#define METH_INT_RX_UNDERFLOW BIT(6) /* 0: No interrupt pending, 1: FIFO was empty, packet could not be queued */ -#define METH_INT_RX_OVERFLOW BIT(7) /* 0: No interrupt pending, 1: DMA FIFO Overflow, DMA stopped, FATAL */ - -/*#define METH_INT_RX_RPTR_MASK 0x0001F00*/ /* Bits 8 through 12 alias of RX read-pointer */ -#define METH_INT_RX_RPTR_MASK 0x0000F00 /* Bits 8 through 11 alias of RX read-pointer - so, is Rx FIFO 16 or 32 entry?*/ - - /* Bits 13 through 15 are always 0. */ - -#define METH_INT_TX_RPTR_MASK 0x1FF0000 /* Bits 16 through 24 alias of TX read-pointer */ - -#define METH_INT_RX_SEQ_MASK 0x2E000000 /* Bits 25 through 29 are the starting seq number for the message at the */ - - /* top of the queue */ - -#define METH_INT_ERROR (METH_INT_TX_LINK_FAIL| \ - METH_INT_MEM_ERROR| \ - METH_INT_TX_ABORT| \ - METH_INT_RX_OVERFLOW| \ - METH_INT_RX_UNDERFLOW) +#define METH_RX_FIFO_WPTR(x) (((x) >> 16) & 0xf) +#define METH_RX_FIFO_RPTR(x) (((x) >> 8) & 0xf) +#define METH_RX_FIFO_DEPTH(x) ((x) & 0x1f) + + +/* RX status vector bits */ +#define METH_RX_ST_VALID BIT(63) +#define METH_RX_ST_RCV_CODE_VIOLATION BIT(16) +#define METH_RX_ST_DRBL_NBL BIT(17) +#define METH_RX_ST_CRC_ERR BIT(18) +#define METH_RX_ST_MCAST_PKT BIT(19) +#define METH_RX_ST_BCAST_PKT BIT(20) +#define METH_RX_ST_INV_PREAMBLE_CTX BIT(21) +#define METH_RX_ST_LONG_EVT_SEEN BIT(22) +#define METH_RX_ST_BAD_PACKET BIT(23) +#define METH_RX_ST_CARRIER_EVT_SEEN BIT(24) +#define METH_RX_ST_MCAST_FILTER_MATCH BIT(25) +#define METH_RX_ST_PHYS_ADDR_MATCH BIT(26) + +#define METH_RX_STATUS_ERRORS \ + (METH_RX_ST_RCV_CODE_VIOLATION | \ + METH_RX_ST_CRC_ERR | \ + METH_RX_ST_INV_PREAMBLE_CTX | \ + METH_RX_ST_LONG_EVT_SEEN | \ + METH_RX_ST_BAD_PACKET | \ + METH_RX_ST_CARRIER_EVT_SEEN) + -#define METH_INT_MCAST_HASH BIT(30) /* If RX DMA is enabled the hash select logic output is latched here */ +/* + * Ethernet Interrupt Status Register + * + * Write a '1' to the corresponding bit to clear it. + */ + +/* + * TX Ring Empty Interrupt Event + * 0: No interrupt pending + * 1: The TX ring buffer is empty + */ +#define METH_INT_TX_EMPTY BIT(0) + +/* + * TX Packet User Request Interrupt Event + * 0: No interrupt pending + * 1: A TX message had the INT request bit set, the packet has been sent. + */ +#define METH_INT_TX_PKT BIT(1) + +/* + * TX Link Failure Condition Detected + * 0: No interrupt pending + * 1: PHY has reported a link failure + */ +#define METH_INT_TX_LINK_FAIL BIT(2) + +/* + * TX CRIME Memory Error Interrupt Event + * 0: No interrupt pending + * 1: A memory error occurred during a DMA transaction, + * DMA has stopped, fatal error. + */ +#define METH_INT_MEM_ERROR BIT(3) + +/* + * TX Abort Interrupt Event + * 0: No interrupt pending + * 1: The TX aborted operation, DMA has stopped, fatal error. + * Examine the TX status register for the abort reason. + */ +#define METH_INT_TX_ABORT BIT(4) + +/* + * RX Threshold INterrupt Event + * 0: No interrupt pending + * 1: Selected receive threshold condition is valid + */ +#define METH_INT_RX_THRESHOLD BIT(5) + +/* + * RX Cluster FIFO Underflow Interrupt Event + * 0: No interrupt pending + * 1: FIFO was empty, packet could not be queued + */ +#define METH_INT_RX_UNDERFLOW BIT(6) + +/* + * RX DMA FIFO Overflow Interrupt Event + * 0: No interrupt pending + * 1: DMA FIFO Overflow, DMA has stopped, fatal error + */ +#define METH_INT_RX_OVERFLOW BIT(7) + +/* Bits 8:12 are an alias of the RX MCL FIFO Read Pointer */ +//#define METH_INT_RX_RPTR_MASK 0x0001F00 +#define METH_INT_RX_RPTR_MASK 0x0000F00 + +/* Bits 13 through 15 are always 0. */ + +/* Bits 16:24 are an alias of the TX Ring Buffer Read Pointer */ +#define METH_INT_TX_RPTR_MASK 0x1FF0000 + +/* Bits 25:29 are for the RX sequence number */ +#define METH_INT_RX_SEQ_MASK 0x2E000000 + +/* top of the queue */ +#define METH_INT_ERROR \ + (METH_INT_TX_LINK_FAIL | \ + METH_INT_MEM_ERROR | \ + METH_INT_TX_ABORT | \ + METH_INT_RX_OVERFLOW | \ + METH_INT_RX_UNDERFLOW) + +/* + * Multicast Hash Output (Debug) + * + * If RX DMA is enabled, the hash select logic output is latched here. + */ +#define METH_INT_MCAST_HASH BIT(30) /* TX status bits */ -#define METH_TX_ST_DONE BIT(63) /* TX complete */ -#define METH_TX_ST_SUCCESS BIT(23) /* Packet was transmitted successfully */ -#define METH_TX_ST_TOOLONG BIT(24) /* TX abort due to excessive length */ -#define METH_TX_ST_UNDERRUN BIT(25) /* TX abort due to underrun (?) */ -#define METH_TX_ST_EXCCOLL BIT(26) /* TX abort due to excess collisions */ -#define METH_TX_ST_DEFER BIT(27) /* TX abort due to excess deferals */ -#define METH_TX_ST_LATECOLL BIT(28) /* TX abort due to late collision */ +#define METH_TX_ST_DONE BIT(63) /* TX complete */ +#define METH_TX_ST_SUCCESS BIT(23) /* Packet was transmitted successfully */ +#define METH_TX_ST_TOOLONG BIT(24) /* TX abort due to excessive length */ +#define METH_TX_ST_UNDERRUN BIT(25) /* TX abort due to underrun (?) */ +#define METH_TX_ST_EXCCOLL BIT(26) /* TX abort due to excess collisions */ +#define METH_TX_ST_DEFER BIT(27) /* TX abort due to excess deferals */ +#define METH_TX_ST_LATECOLL BIT(28) /* TX abort due to late collision */ /* Tx command header bits */ -#define METH_TX_CMD_INT_EN BIT(24) /* Generate TX interrupt when packet is sent */ +#define METH_TX_CMD_INT_EN BIT(24) /* Generate TX interrupt when packet is sent */ /* Phy MDIO interface busy flag */ -#define MDIO_BUSY BIT(16) -#define MDIO_DATA_MASK 0xFFFF +#define MDIO_BUSY BIT(16) +#define MDIO_DATA_MASK 0xFFFF + /* PHY defines */ -#define PHY_QS6612X 0x0181441 /* Quality TX */ -#define PHY_ICS1889 0x0015F41 /* ICS FX */ -#define PHY_ICS1890 0x0015F42 /* ICS TX */ -#define PHY_DP83840 0x20005C0 /* National TX */ +#define PHY_QS6612X 0x0181441 /* Quality TX */ +#define PHY_ICS1889 0x0015F41 /* ICS FX */ +#define PHY_ICS1890 0x0015F42 /* ICS TX */ +#define PHY_DP83840 0x20005C0 /* National TX */ -#define ADVANCE_RX_PTR(x) x=(x+1)&(RX_RING_ENTRIES-1) +#define ADVANCE_RX_PTR(x) (x) = ((x + 1) & (RX_RING_ENTRIES - 1)) \ No newline at end of file From davem@davemloft.net Sun Dec 18 03:56:50 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 18 Dec 2011 03:56:55 +0100 (CET) Received: from shards.monkeyblade.net ([198.137.202.13]:52335 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903751Ab1LRC4u (ORCPT ); Sun, 18 Dec 2011 03:56:50 +0100 Received: from localhost (cpe-66-65-61-233.nyc.res.rr.com [66.65.61.233]) (authenticated bits=0) by shards.monkeyblade.net (8.14.4/8.14.4) with ESMTP id pBI2uV7x020344 (version=TLSv1/SSLv3 cipher=RC4-SHA bits=128 verify=NO); Sat, 17 Dec 2011 18:56:34 -0800 Date: Sat, 17 Dec 2011 21:56:30 -0500 (EST) Message-Id: <20111217.215630.640392276998191183.davem@davemloft.net> To: kumba@gentoo.org Cc: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery From: David Miller In-Reply-To: <4EED3A3D.9080503@gentoo.org> References: <4EED3A3D.9080503@gentoo.org> X-Mailer: Mew version 6.4 on Emacs 23.3 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.6 (shards.monkeyblade.net [198.137.202.13]); Sat, 17 Dec 2011 18:56:35 -0800 (PST) X-archive-position: 32130 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14321 Content-Length: 1062 Lines: 31 From: Joshua Kinard Date: Sat, 17 Dec 2011 19:56:29 -0500 > +/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). > + * MACE Ethernet uses a 64 element hash table based on the Ethernet CRC. > + */ > +static int multicast_filter_limit = 32; > + > + Unnecessary empty line, only one is sufficient. I also don't see a reason to even define this value. If it's a constant then use a const type. > + /* Multicast filter. */ > + unsigned long mcast_filter; > + ... > + priv->mcast_filter = 0xffffffffffffffffUL; You're assuming that unsigned long is 64-bits here. You need to use a type which matches your expections regardless of the architecture that the code is built on. > + netdev_for_each_mc_addr(ha, dev) > + set_bit((ether_crc(ETH_ALEN, ha->addr) >> 26), > + (volatile long unsigned int *)&priv->mcast_filter); This makes an assumption not only about the size of the "unsigned long" type, but also of the endianness of the architecture this runs on. Please recode this to remove both assumptions. From davem@davemloft.net Sun Dec 18 04:00:42 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 18 Dec 2011 04:00:47 +0100 (CET) Received: from shards.monkeyblade.net ([198.137.202.13]:52362 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903750Ab1LRDAm (ORCPT ); Sun, 18 Dec 2011 04:00:42 +0100 Received: from localhost (cpe-66-65-61-233.nyc.res.rr.com [66.65.61.233]) (authenticated bits=0) by shards.monkeyblade.net (8.14.4/8.14.4) with ESMTP id pBI30XUs020538 (version=TLSv1/SSLv3 cipher=RC4-SHA bits=128 verify=NO); Sat, 17 Dec 2011 19:00:33 -0800 Date: Sat, 17 Dec 2011 22:00:32 -0500 (EST) Message-Id: <20111217.220032.683061606470374131.davem@davemloft.net> To: kumba@gentoo.org Cc: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH] net: meth: Some code cleanups for meth From: David Miller In-Reply-To: <4EED418E.40501@gentoo.org> References: <4EED418E.40501@gentoo.org> X-Mailer: Mew version 6.4 on Emacs 23.3 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.6 (shards.monkeyblade.net [198.137.202.13]); Sat, 17 Dec 2011 19:00:34 -0800 (PST) X-archive-position: 32131 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14326 Content-Length: 2310 Lines: 57 From: Joshua Kinard Date: Sat, 17 Dec 2011 20:27:42 -0500 > -#define WAIT_FOR_PHY(___rval) \ > - while ((___rval = mace->eth.phy_data) & MDIO_BUSY) { \ > - udelay(25); \ > +#define WAIT_FOR_PHY(___rval) \ > + while ((___rval = mace->eth.phy_data) & MDIO_BUSY) { \ > + udelay(25); \ I think using tabs at the end of the line to line up the "\" is much better than what you're changing it to, that being spaces. > - priv->phy_addr=i; > - p2=mdio_read(priv,2); > - p3=mdio_read(priv,3); > + > + for (i = 0; i < 32; i++){ > + priv->phy_addr = i; > + p2 = mdio_read(priv,2); > + p3 = mdio_read(priv,3); If you're going to put forth the effort to put spaces around the "=" characters, fix up the arguments to mdio_read() as well, there needs to be a space after the "," and right before the second argument. > + if ((p2 != 0xffff) && (p2 != 0x0000)) { There is no need for the new parenthesis you are adding here. It doesn't change things semantically, and it does not improve readability, it just makes for more characters a human has to parse in his mind. > - * Copyright (C) 2001 Alessandro Rubini and Jonathan Corbet > - * Copyright (C) 2001 O'Reilly & Associates > + * Copyright (C) 2001-2003 Ilya Volynets > + * Copyright (C) 2011 Joshua Kinard > * > - * The source code in this file can be freely used, adapted, > - * and redistributed in source or binary form, so long as an > - * acknowledgment appears in derived source files. The citation > - * should list that the code comes from the book "Linux Device > - * Drivers" by Alessandro Rubini and Jonathan Corbet, published > - * by O'Reilly & Associates. No warranty is attached; > - * we cannot take responsibility for errors or fitness for use. > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * as published by the Free Software Foundation; either version > + * 2 of the License, or (at your option) any later version. > */ I'm not sure at all that you have the ability to make this kind of change to the copyright and attributions here. There are probably a lot more problems with this patch, but I'm exhausted look at this stuff as-is. From kumba@gentoo.org Sun Dec 18 05:38:03 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 18 Dec 2011 05:38:06 +0100 (CET) Received: from qmta12.emeryville.ca.mail.comcast.net ([76.96.27.227]:35005 "EHLO qmta12.emeryville.ca.mail.comcast.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903692Ab1LREiD (ORCPT ); Sun, 18 Dec 2011 05:38:03 +0100 Received: from omta24.emeryville.ca.mail.comcast.net ([76.96.30.92]) by qmta12.emeryville.ca.mail.comcast.net with comcast id AUaw1i0021zF43QACUdonG; Sun, 18 Dec 2011 04:37:48 +0000 Received: from [192.168.1.13] ([76.106.69.86]) by omta24.emeryville.ca.mail.comcast.net with comcast id AVGc1i00c1rgsis8kVGd8n; Sun, 18 Dec 2011 05:16:38 +0000 Message-ID: <4EED6DED.50308@gentoo.org> Date: Sat, 17 Dec 2011 23:37:01 -0500 From: Joshua Kinard User-Agent: Mozilla/5.0 (Windows NT 6.0; WOW64; rv:8.0) Gecko/20111105 Thunderbird/8.0 MIME-Version: 1.0 To: David Miller CC: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery References: <4EED3A3D.9080503@gentoo.org> <20111217.215630.640392276998191183.davem@davemloft.net> In-Reply-To: <20111217.215630.640392276998191183.davem@davemloft.net> X-Enigmail-Version: 1.3.3 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 32132 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14330 Content-Length: 2671 Lines: 75 On 12/17/2011 21:56, David Miller wrote: > From: Joshua Kinard > Date: Sat, 17 Dec 2011 19:56:29 -0500 > >> +/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). >> + * MACE Ethernet uses a 64 element hash table based on the Ethernet CRC. >> + */ >> +static int multicast_filter_limit = 32; >> + >> + > > Unnecessary empty line, only one is sufficient. I also don't see a reason > to even define this value. If it's a constant then use a const type. Lifted straight out of another driver already in the tree and checked against the docs. I can spin a new patch to constify it, but the same fix is needed for several other drivers, too. >> + /* Multicast filter. */ >> + unsigned long mcast_filter; >> + > ... >> + priv->mcast_filter = 0xffffffffffffffffUL; > > You're assuming that unsigned long is 64-bits here. You need to use a > type which matches your expections regardless of the architecture that > the code is built on. MACE Ethernet only ever appears on the SGI O2 systems. It's part of the MACE chip and doesn't exist (as far as I know) in any kind of standalone form. It's virtually impossible for it to appear outside of any other architecture/machine. That said, would using 'u64' over 'unsigned long' work? The O2 codebase is far from pretty, and would need a LOT of cleanups along similar lines. This code simply matches what is already existing in-tree. >> + netdev_for_each_mc_addr(ha, dev) >> + set_bit((ether_crc(ETH_ALEN, ha->addr) >> 26), >> + (volatile long unsigned int *)&priv->mcast_filter); > > This makes an assumption not only about the size of the "unsigned long" > type, but also of the endianness of the architecture this runs on. > > Please recode this to remove both assumptions. See note above regarding the 'unsigned long' bit. The endian assumption is not directly visible to me, however. What, specifically, is incorrect? The call to ether_crc? The bitwise right-shift? set_bit? I lifted this out of au1000_eth.c (which is a little-endian MIPS device, if I recall correctly), and all the digging I could do states that the Ethernet CRC algorithm is LE anyways (ether_crc() calls crc32_le, bitrev32, and such). I couldn't find anything big-endian about it, even when I tested it against several other code samples that computed the 6-bit hash key from the Dst MAC address. Thanks, -- Joshua Kinard Gentoo/MIPS kumba@gentoo.org 4096R/D25D95E3 2011-03-28 "The past tempts us, the present confuses us, the future frightens us. And our lives slip away, moment by moment, lost in that vast, terrible in-between." --Emperor Turhan, Centauri Republic From kumba@gentoo.org Sun Dec 18 05:43:37 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 18 Dec 2011 05:43:41 +0100 (CET) Received: from qmta03.emeryville.ca.mail.comcast.net ([76.96.30.32]:35883 "EHLO qmta03.emeryville.ca.mail.comcast.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903692Ab1LREnh (ORCPT ); Sun, 18 Dec 2011 05:43:37 +0100 Received: from omta18.emeryville.ca.mail.comcast.net ([76.96.30.74]) by qmta03.emeryville.ca.mail.comcast.net with comcast id AUds1i0021bwxycA3UjK5J; Sun, 18 Dec 2011 04:43:19 +0000 Received: from [192.168.1.13] ([76.106.69.86]) by omta18.emeryville.ca.mail.comcast.net with comcast id AVFb1i0071rgsis8eVFcht; Sun, 18 Dec 2011 05:15:36 +0000 Message-ID: <4EED6F39.2030601@gentoo.org> Date: Sat, 17 Dec 2011 23:42:33 -0500 From: Joshua Kinard User-Agent: Mozilla/5.0 (Windows NT 6.0; WOW64; rv:8.0) Gecko/20111105 Thunderbird/8.0 MIME-Version: 1.0 To: David Miller CC: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH] net: meth: Some code cleanups for meth References: <4EED418E.40501@gentoo.org> <20111217.220032.683061606470374131.davem@davemloft.net> In-Reply-To: <20111217.220032.683061606470374131.davem@davemloft.net> X-Enigmail-Version: 1.3.3 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7BIT X-archive-position: 32133 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14331 Content-Length: 3514 Lines: 100 On 12/17/2011 22:00, David Miller wrote: > From: Joshua Kinard > Date: Sat, 17 Dec 2011 20:27:42 -0500 > >> -#define WAIT_FOR_PHY(___rval) \ >> - while ((___rval = mace->eth.phy_data) & MDIO_BUSY) { \ >> - udelay(25); \ >> +#define WAIT_FOR_PHY(___rval) \ >> + while ((___rval = mace->eth.phy_data) & MDIO_BUSY) { \ >> + udelay(25); \ > > I think using tabs at the end of the line to line up the "\" is much > better than what you're changing it to, that being spaces. Mistake from when I still had my editor switched to spaces mode. I set it to tab mode a little bit later and didn't think to go back and correct this. >> - priv->phy_addr=i; >> - p2=mdio_read(priv,2); >> - p3=mdio_read(priv,3); >> + >> + for (i = 0; i < 32; i++){ >> + priv->phy_addr = i; >> + p2 = mdio_read(priv,2); >> + p3 = mdio_read(priv,3); > > If you're going to put forth the effort to put spaces around the > "=" characters, fix up the arguments to mdio_read() as well, there > needs to be a space after the "," and right before the second > argument. > It's not that it took a lot of effort, I just simply missed the space after the comma. It still looks better :) >> + if ((p2 != 0xffff) && (p2 != 0x0000)) { > > There is no need for the new parenthesis you are adding here. It > doesn't change things semantically, and it does not improve > readability, it just makes for more characters a human has to parse in > his mind. > It's a habit -- I blame math from grade school years ago. I'll remove them in the next version. >> - * Copyright (C) 2001 Alessandro Rubini and Jonathan Corbet >> - * Copyright (C) 2001 O'Reilly & Associates >> + * Copyright (C) 2001-2003 Ilya Volynets >> + * Copyright (C) 2011 Joshua Kinard >> * >> - * The source code in this file can be freely used, adapted, >> - * and redistributed in source or binary form, so long as an >> - * acknowledgment appears in derived source files. The citation >> - * should list that the code comes from the book "Linux Device >> - * Drivers" by Alessandro Rubini and Jonathan Corbet, published >> - * by O'Reilly & Associates. No warranty is attached; >> - * we cannot take responsibility for errors or fitness for use. >> + * This program is free software; you can redistribute it and/or >> + * modify it under the terms of the GNU General Public License >> + * as published by the Free Software Foundation; either version >> + * 2 of the License, or (at your option) any later version. >> */ > > I'm not sure at all that you have the ability to make this kind of > change to the copyright and attributions here. Looking at the header file, I really cannot find anything that would bear in common with sample code from a book. If it was an actual driver file, maybe. But a header file containing specific definitions for hardware bits? I tracked down the first commit back in 2001 and put in the guy who initially submitted it. Is there a better way to handle this? I doubt that book had SGI O2 MACE Ethernet-specific defines in it. > There are probably a lot more problems with this patch, but I'm > exhausted look at this stuff as-is. Probably :) -- Joshua Kinard Gentoo/MIPS kumba@gentoo.org 4096R/D25D95E3 2011-03-28 "The past tempts us, the present confuses us, the future frightens us. And our lives slip away, moment by moment, lost in that vast, terrible in-between." --Emperor Turhan, Centauri Republic From davem@davemloft.net Sun Dec 18 06:19:33 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 18 Dec 2011 06:19:36 +0100 (CET) Received: from shards.monkeyblade.net ([198.137.202.13]:52933 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903692Ab1LRFTd (ORCPT ); Sun, 18 Dec 2011 06:19:33 +0100 Received: from localhost (cpe-66-65-61-233.nyc.res.rr.com [66.65.61.233]) (authenticated bits=0) by shards.monkeyblade.net (8.14.4/8.14.4) with ESMTP id pBI5JQDt025647 (version=TLSv1/SSLv3 cipher=RC4-SHA bits=128 verify=NO); Sat, 17 Dec 2011 21:19:29 -0800 Date: Sun, 18 Dec 2011 00:19:25 -0500 (EST) Message-Id: <20111218.001925.2108645748994734084.davem@davemloft.net> To: kumba@gentoo.org Cc: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery From: David Miller In-Reply-To: <4EED6DED.50308@gentoo.org> References: <4EED3A3D.9080503@gentoo.org> <20111217.215630.640392276998191183.davem@davemloft.net> <4EED6DED.50308@gentoo.org> X-Mailer: Mew version 6.4 on Emacs 23.3 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.6 (shards.monkeyblade.net [198.137.202.13]); Sat, 17 Dec 2011 21:19:29 -0800 (PST) X-archive-position: 32134 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14338 Content-Length: 378 Lines: 11 From: Joshua Kinard Date: Sat, 17 Dec 2011 23:37:01 -0500 > MACE Ethernet only ever appears on the SGI O2 systems. That has no bearing on my feedback, we simply do not put non-portable code like this into the tree at this point. Just because this driver has been maintained in an non-portable manner up to this point, doesn't mean we continue doing that. From dedekind1@gmail.com Sun Dec 18 12:45:48 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 18 Dec 2011 12:45:52 +0100 (CET) Received: from mail-iy0-f177.google.com ([209.85.210.177]:53550 "EHLO mail-iy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903724Ab1LRLps (ORCPT ); Sun, 18 Dec 2011 12:45:48 +0100 Received: by iadk27 with SMTP id k27so6676256iad.36 for ; Sun, 18 Dec 2011 03:45:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=message-id:subject:from:reply-to:to:cc:date:in-reply-to:references :content-type:x-mailer:mime-version; bh=eKjRWjBGbk53rad6ZTmEMFuJzAHC27UQZkfoeTTt5TI=; b=h4srjOCPseLDGW3rrm5DL7idT7o4tyhhwTG2y/bCzM/k44N+0DGOCtHCGRvDhCltwr V/zNmGPpzokWMx983jpeVoJMNREyUxQivlBZoxPt4dULSRoPKHB48vzBHumArAKE76/p JRi1VIfnmgofNVinMvNUWGBRt9/IlF0QHu8A0= Received: by 10.50.171.5 with SMTP id aq5mr20232268igc.76.1324208742232; Sun, 18 Dec 2011 03:45:42 -0800 (PST) Received: from [127.0.0.1] (jfdmzpr01-ext.jf.intel.com. [134.134.139.70]) by mx.google.com with ESMTPS id mb4sm26037528igc.1.2011.12.18.03.45.38 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 18 Dec 2011 03:45:41 -0800 (PST) Message-ID: <1324208821.17534.0.camel@sauron.fi.intel.com> Subject: Re: [PATCH 2/5] MTD: bcm63xxpart: make sure CFE and NVRAM partitions are at least 64K From: Artem Bityutskiy Reply-To: dedekind1@gmail.com To: Jonas Gorski Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, David Woodhouse , Florian Fainelli Date: Sun, 18 Dec 2011 13:47:01 +0200 In-Reply-To: References: <1324126698-9919-1-git-send-email-jonas.gorski@gmail.com> <1324126698-9919-3-git-send-email-jonas.gorski@gmail.com> <1324157643.2240.2.camel@koala> Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-E+Nd6eqYg0UMJjsoC+P8" X-Mailer: Evolution 3.2.2 (3.2.2-1.fc16) Mime-Version: 1.0 X-archive-position: 32135 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dedekind1@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14420 Content-Length: 1701 Lines: 46 --=-E+Nd6eqYg0UMJjsoC+P8 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sat, 2011-12-17 at 22:57 +0100, Jonas Gorski wrote: > On 17 December 2011 22:33, Artem Bityutskiy wrote: > > Not that I have any knowledge about BCM platform, but still, I think > > it is good idea to explain why these partitions have to be at least > > 64KiB. Could you please do this, just for the sake of having good > > commit messages? >=20 > Sure, no problem. Should I sent the whole series again or is a V2 of > this one enough? Just one patch is better - less traffic. --=20 Best Regards, Artem Bityutskiy --=-E+Nd6eqYg0UMJjsoC+P8 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJO7dK1AAoJECmIfjd9wqK0MIwQAICLA0YfLdDzGAVJRknYBXYb WP25czqUN/5tZ4jUbasSfQp/WTGyDOL6aZljCJaJ2FXDtYYNoZQgB7+i613Nn/gu wwdRphbrjqxhfxqzSLliBxp5ltyr5Dbi6nhCSx4Yx8PIfsuG7B9gvUDfvrFnaQRc 2r+zaYnoTIINS14wwRC0KXaXGTxRnyMJryyH7BYqhTtN23Plb4MfG6uNgmScv9+8 5+pwK+dFloEAitgbhU91/wfPtp6+zdJUTwWP3bQS68GopZAf/+1UFmzOs/+fMXNV EnBGKu9Tqedg0f7Y95xr5w3Hp6NjZYsuN/Sh3i2vxnaIyFLt0g9IOPjaJCeX8jNZ K/jlAluVi3jnYCB0aD7siljdR+7k5NEjSBeT6EyfaRm6a71OMTFSKN3+drmf6Dpa EYMjuL/Ic/DZtGtKoDggF8ZVSDv1pIkagSFnQz2gBmpkrDsl9nM6BozeAfXStjCh aMUXGUMSFmzJ4ST4MoMJstJdZ9lWZkOOVhwCoYgl2ViR/Npgp5lzzIwdqy4kzHjT oOj874RuyL7QAVqYsf4sva0F2XhGhfPEr0pHYfpAT7xGj2EY9416tbfKeXcYDOLl KvRXZjYmxtN3Fo9oH28e9cTZ6RmqGlczI8h46tyF1/hKl8YIO/KsbefNUnO9Bv8t Z3dOcwd3UPX3cvEGGJLV =mlpg -----END PGP SIGNATURE----- --=-E+Nd6eqYg0UMJjsoC+P8-- From sshtylyov@mvista.com Sun Dec 18 14:27:54 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 18 Dec 2011 14:27:59 +0100 (CET) Received: from mail-we0-f177.google.com ([74.125.82.177]:40075 "EHLO mail-we0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903728Ab1LRN1y (ORCPT ); Sun, 18 Dec 2011 14:27:54 +0100 Received: by wera10 with SMTP id a10so1177937wer.36 for ; Sun, 18 Dec 2011 05:27:48 -0800 (PST) Received: by 10.216.132.213 with SMTP id o63mr5824825wei.11.1324214868500; Sun, 18 Dec 2011 05:27:48 -0800 (PST) Received: from [192.168.2.2] ([91.79.83.96]) by mx.google.com with ESMTPS id hb10sm21458785wib.16.2011.12.18.05.27.46 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 18 Dec 2011 05:27:47 -0800 (PST) Message-ID: <4EEDEA17.4040006@mvista.com> Date: Sun, 18 Dec 2011 17:26:47 +0400 From: Sergei Shtylyov User-Agent: Mozilla/5.0 (Windows NT 5.1; rv:8.0) Gecko/20111105 Thunderbird/8.0 MIME-Version: 1.0 To: Joshua Kinard CC: netdev@vger.kernel.org, Linux MIPS List Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery References: <4EED3A3D.9080503@gentoo.org> In-Reply-To: <4EED3A3D.9080503@gentoo.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-archive-position: 32136 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: sshtylyov@mvista.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14440 Content-Length: 3424 Lines: 107 Hello. On 18-12-2011 4:56, Joshua Kinard wrote: > SGI IP32 (O2)'s ethernet driver (meth) lacks a set_rx_mode function, which > prevents IPv6 from working completely because any ICMPv6 neighbor > solicitation requests aren't picked up by the driver. So the machine can > ping out and connect to other systems, but other systems will have a very > hard time connecting to the O2. > Signed-off-by: Joshua Kinard > --- Some minor nits below... > drivers/net/ethernet/sgi/meth.c | 60 +++++++++++++++++++++++++++++++++++----- > 1 file changed, 53 insertions(+), 7 deletions(-) > --- a/drivers/net/ethernet/sgi/meth.c 2011-12-17 15:51:44.569166824 -0500 > +++ b/drivers/net/ethernet/sgi/meth.c 2011-12-17 15:51:20.259167050 -0500 [...] > @@ -57,6 +58,12 @@ static const char *meth_str="SGI O2 Fast > static int timeout = TX_TIMEOUT; > module_param(timeout, int, 0); > > +/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). > + * MACE Ethernet uses a 64 element hash table based on the Ethernet CRC. > + */ > +static int multicast_filter_limit = 32; > + > + On empty oine would be enough... > /* > * This structure is private to each device. It is used to pass > * packets in and out, so there is place for a packet > @@ -765,15 +775,51 @@ static int meth_ioctl(struct net_device > } > } > > +static void meth_set_rx_mode(struct net_device *dev) > +{ > + struct meth_private *priv = netdev_priv(dev); > + unsigned long flags; > + > + netif_stop_queue(dev); > + spin_lock_irqsave(&priv->meth_lock, flags); > + priv->mac_ctrl&= ~(METH_PROMISC); Parens not needed here. > + > + if (dev->flags & IFF_PROMISC) { > + priv->mac_ctrl |= METH_PROMISC; > + priv->mcast_filter = 0xffffffffffffffffUL; > + mace->eth.mac_ctrl = priv->mac_ctrl; > + mace->eth.mcast_filter = priv->mcast_filter; > + } else if ((netdev_mc_count(dev) > multicast_filter_limit) || > + (dev->flags & IFF_ALLMULTI)) { > + priv->mac_ctrl |= METH_ACCEPT_AMCAST; > + priv->mcast_filter = 0xffffffffffffffffUL; > + mace->eth.mac_ctrl = priv->mac_ctrl; > + mace->eth.mcast_filter = priv->mcast_filter; This block is over-indented. > + } else { > + struct netdev_hw_addr *ha; > + priv->mac_ctrl |= METH_ACCEPT_MCAST; > + > + netdev_for_each_mc_addr(ha, dev) > + set_bit((ether_crc(ETH_ALEN, ha->addr) >> 26), > + (volatile long unsigned int *)&priv->mcast_filter); > + > + mace->eth.mcast_filter = priv->mcast_filter; This last statement is common between all branches, so could be moved out of *if*... > + } > + > + spin_unlock_irqrestore(&priv->meth_lock, flags); > + netif_wake_queue(dev); > +} > + > static const struct net_device_ops meth_netdev_ops = { > - .ndo_open = meth_open, > - .ndo_stop = meth_release, > - .ndo_start_xmit = meth_tx, > - .ndo_do_ioctl = meth_ioctl, > - .ndo_tx_timeout = meth_tx_timeout, > - .ndo_change_mtu = eth_change_mtu, > - .ndo_validate_addr = eth_validate_addr, > + .ndo_open = meth_open, > + .ndo_stop = meth_release, > + .ndo_start_xmit = meth_tx, > + .ndo_do_ioctl = meth_ioctl, > + .ndo_tx_timeout = meth_tx_timeout, > + .ndo_change_mtu = eth_change_mtu, > + .ndo_validate_addr = eth_validate_addr, > .ndo_set_mac_address = eth_mac_addr, > + .ndo_set_rx_mode = meth_set_rx_mode, The intializer values are not aligned now, and they were before the patch. WBR, Sergei From kumba@gentoo.org Sun Dec 18 15:36:03 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 18 Dec 2011 15:36:07 +0100 (CET) Received: from qmta09.westchester.pa.mail.comcast.net ([76.96.62.96]:35024 "EHLO qmta09.westchester.pa.mail.comcast.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903728Ab1LROgD (ORCPT ); Sun, 18 Dec 2011 15:36:03 +0100 Received: from omta20.westchester.pa.mail.comcast.net ([76.96.62.71]) by qmta09.westchester.pa.mail.comcast.net with comcast id Adwz1i0061YDfWL59ebwDv; Sun, 18 Dec 2011 14:35:56 +0000 Received: from [192.168.1.13] ([76.106.69.86]) by omta20.westchester.pa.mail.comcast.net with comcast id Aebu1i00t1rgsis3gebvk8; Sun, 18 Dec 2011 14:35:56 +0000 Message-ID: <4EEDFA3B.9040701@gentoo.org> Date: Sun, 18 Dec 2011 09:35:39 -0500 From: Joshua Kinard User-Agent: Mozilla/5.0 (Windows NT 6.0; WOW64; rv:8.0) Gecko/20111105 Thunderbird/8.0 MIME-Version: 1.0 To: Sergei Shtylyov CC: netdev@vger.kernel.org, Linux MIPS List Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery References: <4EED3A3D.9080503@gentoo.org> <4EEDEA17.4040006@mvista.com> In-Reply-To: <4EEDEA17.4040006@mvista.com> X-Enigmail-Version: 1.3.3 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 32137 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14461 Content-Length: 3937 Lines: 129 On 12/18/2011 08:26, Sergei Shtylyov wrote: >> @@ -57,6 +58,12 @@ static const char *meth_str="SGI O2 Fast >> static int timeout = TX_TIMEOUT; >> module_param(timeout, int, 0); >> >> +/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). >> + * MACE Ethernet uses a 64 element hash table based on the Ethernet CRC. >> + */ >> +static int multicast_filter_limit = 32; >> + >> + > > On empty oine would be enough... > Fixed, as Dave pointed out. I converted it and the driver name to a macro anyways. >> /* >> * This structure is private to each device. It is used to pass >> * packets in and out, so there is place for a packet >> @@ -765,15 +775,51 @@ static int meth_ioctl(struct net_device >> } >> } >> >> +static void meth_set_rx_mode(struct net_device *dev) >> +{ >> + struct meth_private *priv = netdev_priv(dev); >> + unsigned long flags; >> + >> + netif_stop_queue(dev); >> + spin_lock_irqsave(&priv->meth_lock, flags); >> + priv->mac_ctrl&= ~(METH_PROMISC); > > Parens not needed here. > Yeah, I am a habitual parenthesis abuser. You should see the RTC driver I re-wrote :) >> + >> + if (dev->flags & IFF_PROMISC) { >> + priv->mac_ctrl |= METH_PROMISC; >> + priv->mcast_filter = 0xffffffffffffffffUL; >> + mace->eth.mac_ctrl = priv->mac_ctrl; >> + mace->eth.mcast_filter = priv->mcast_filter; >> + } else if ((netdev_mc_count(dev) > multicast_filter_limit) || >> + (dev->flags & IFF_ALLMULTI)) { >> + priv->mac_ctrl |= METH_ACCEPT_AMCAST; >> + priv->mcast_filter = 0xffffffffffffffffUL; >> + mace->eth.mac_ctrl = priv->mac_ctrl; >> + mace->eth.mcast_filter = priv->mcast_filter; > > This block is over-indented. > Weird. The editor I was using had the tabs set to an equivalent of 4 spaces, so it lined up for me *originally*, but after the patch was applied, it was out of alignment, too. I think I got it fixed this time, though. Not sure what was causing that. >> + } else { >> + struct netdev_hw_addr *ha; >> + priv->mac_ctrl |= METH_ACCEPT_MCAST; >> + >> + netdev_for_each_mc_addr(ha, dev) >> + set_bit((ether_crc(ETH_ALEN, ha->addr) >> 26), >> + (volatile long unsigned int *)&priv->mcast_filter); >> + >> + mace->eth.mcast_filter = priv->mcast_filter; > > This last statement is common between all branches, so could be moved out > of *if*... > Done. >> + } >> + >> + spin_unlock_irqrestore(&priv->meth_lock, flags); >> + netif_wake_queue(dev); >> +} >> + >> static const struct net_device_ops meth_netdev_ops = { >> - .ndo_open = meth_open, >> - .ndo_stop = meth_release, >> - .ndo_start_xmit = meth_tx, >> - .ndo_do_ioctl = meth_ioctl, >> - .ndo_tx_timeout = meth_tx_timeout, >> - .ndo_change_mtu = eth_change_mtu, >> - .ndo_validate_addr = eth_validate_addr, >> + .ndo_open = meth_open, >> + .ndo_stop = meth_release, >> + .ndo_start_xmit = meth_tx, >> + .ndo_do_ioctl = meth_ioctl, >> + .ndo_tx_timeout = meth_tx_timeout, >> + .ndo_change_mtu = eth_change_mtu, >> + .ndo_validate_addr = eth_validate_addr, >> .ndo_set_mac_address = eth_mac_addr, >> + .ndo_set_rx_mode = meth_set_rx_mode, > > The intializer values are not aligned now, and they were before the patch. Yeah, same problem as above. Not sure how my tabs got mangled. Should be fixed in the next revision once I test it. Thanks! -- Joshua Kinard Gentoo/MIPS kumba@gentoo.org 4096R/D25D95E3 2011-03-28 "The past tempts us, the present confuses us, the future frightens us. And our lives slip away, moment by moment, lost in that vast, terrible in-between." --Emperor Turhan, Centauri Republic From kumba@gentoo.org Sun Dec 18 15:40:47 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 18 Dec 2011 15:40:51 +0100 (CET) Received: from qmta03.westchester.pa.mail.comcast.net ([76.96.62.32]:46127 "EHLO qmta03.westchester.pa.mail.comcast.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903728Ab1LROkr (ORCPT ); Sun, 18 Dec 2011 15:40:47 +0100 Received: from omta13.westchester.pa.mail.comcast.net ([76.96.62.52]) by qmta03.westchester.pa.mail.comcast.net with comcast id Aedd1i00317dt5G53eghu9; Sun, 18 Dec 2011 14:40:41 +0000 Received: from [192.168.1.13] ([76.106.69.86]) by omta13.westchester.pa.mail.comcast.net with comcast id Aegh1i00G1rgsis3Zeghhy; Sun, 18 Dec 2011 14:40:41 +0000 Message-ID: <4EEDFB58.20904@gentoo.org> Date: Sun, 18 Dec 2011 09:40:24 -0500 From: Joshua Kinard User-Agent: Mozilla/5.0 (Windows NT 6.0; WOW64; rv:8.0) Gecko/20111105 Thunderbird/8.0 MIME-Version: 1.0 To: David Miller CC: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery References: <4EED3A3D.9080503@gentoo.org> <20111217.215630.640392276998191183.davem@davemloft.net> <4EED6DED.50308@gentoo.org> <20111218.001925.2108645748994734084.davem@davemloft.net> In-Reply-To: <20111218.001925.2108645748994734084.davem@davemloft.net> X-Enigmail-Version: 1.3.3 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7BIT X-archive-position: 32138 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14477 Content-Length: 1083 Lines: 33 On 12/18/2011 00:19, David Miller wrote: > From: Joshua Kinard > Date: Sat, 17 Dec 2011 23:37:01 -0500 > >> MACE Ethernet only ever appears on the SGI O2 systems. > > That has no bearing on my feedback, we simply do not put non-portable > code like this into the tree at this point. > > Just because this driver has been maintained in an non-portable manner > up to this point, doesn't mean we continue doing that. Agreed. However, I was simply trying to fix a problem that prevents IPv6 from working, not fix every little thing wrong with the code. While I want to tackle re-writing the driver to be more in line with existing network drivers, that's a future project. I'm still new to driver development/kernel work in general, so I'm learning here. Thanks for the feedback, though, -- Joshua Kinard Gentoo/MIPS kumba@gentoo.org 4096R/D25D95E3 2011-03-28 "The past tempts us, the present confuses us, the future frightens us. And our lives slip away, moment by moment, lost in that vast, terrible in-between." --Emperor Turhan, Centauri Republic From kumba@gentoo.org Sun Dec 18 16:14:00 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 18 Dec 2011 16:14:05 +0100 (CET) Received: from qmta12.emeryville.ca.mail.comcast.net ([76.96.27.227]:53414 "EHLO qmta12.emeryville.ca.mail.comcast.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903729Ab1LRPOA (ORCPT ); Sun, 18 Dec 2011 16:14:00 +0100 Received: from omta18.emeryville.ca.mail.comcast.net ([76.96.30.74]) by qmta12.emeryville.ca.mail.comcast.net with comcast id AfBP1i0011bwxycACfDnDh; Sun, 18 Dec 2011 15:13:47 +0000 Received: from [192.168.1.13] ([76.106.69.86]) by omta18.emeryville.ca.mail.comcast.net with comcast id AfmH1i0061rgsis8efmJG6; Sun, 18 Dec 2011 15:46:19 +0000 Message-ID: <4EEE0319.3050305@gentoo.org> Date: Sun, 18 Dec 2011 10:13:29 -0500 From: Joshua Kinard User-Agent: Mozilla/5.0 (Windows NT 6.0; WOW64; rv:8.0) Gecko/20111105 Thunderbird/8.0 MIME-Version: 1.0 To: David Miller CC: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery References: <4EED3A3D.9080503@gentoo.org> <20111217.215630.640392276998191183.davem@davemloft.net> In-Reply-To: <20111217.215630.640392276998191183.davem@davemloft.net> X-Enigmail-Version: 1.3.3 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 32139 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14491 Content-Length: 1189 Lines: 35 On 12/17/2011 21:56, David Miller wrote: >> + netdev_for_each_mc_addr(ha, dev) >> + set_bit((ether_crc(ETH_ALEN, ha->addr) >> 26), >> + (volatile long unsigned int *)&priv->mcast_filter); > > This makes an assumption not only about the size of the "unsigned long" > type, but also of the endianness of the architecture this runs on. > Can you give me some tips on this one? au1000_eth.c does the same thing, and I'm not seeing what the endian issue is exactly. Is it the >> 26 part or the use of ether_crc? I see there's an ether_crc_le, too, and some drivers also do the >> 26 bit on it as well. Which is correct? The few drivers I've looked at don't exactly spell out this part of the code, and are usually doing something different because most seem to access the multicast filter register in either 8-bits or 32-bits. MACE ethernet seems to be one of the few doing it in full 64-bits. Thanks, -- Joshua Kinard Gentoo/MIPS kumba@gentoo.org 4096R/D25D95E3 2011-03-28 "The past tempts us, the present confuses us, the future frightens us. And our lives slip away, moment by moment, lost in that vast, terrible in-between." --Emperor Turhan, Centauri Republic From jonas.gorski@gmail.com Mon Dec 19 11:36:51 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 19 Dec 2011 11:36:58 +0100 (CET) Received: from mail-ey0-f177.google.com ([209.85.215.177]:44379 "EHLO mail-ey0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903602Ab1LSKgv (ORCPT ); Mon, 19 Dec 2011 11:36:51 +0100 Received: by eaak12 with SMTP id k12so4969649eaa.36 for ; Mon, 19 Dec 2011 02:36:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=29OAhnzIw6HLVcB3SjCQ60EnCgSqR0nzSaGfqF8M3F0=; b=QsqRLcF8Xs+DVYD3M9RinyF8NPX3tIbrLakPPyJaSEtkWzhah9YjJQ/CxcUuwpC9qp 9nbF9jNx0aWr8yDPICSl+fKjayEYAZchnfdFq03+KYU2bRxgTxVTbvWsTsDvvdQGEu/4 GVHBei/sfZZAjiUiJHwfpRXOAYuwtIHtxWCTw= Received: by 10.205.138.5 with SMTP id iq5mr1240523bkc.76.1324291005678; Mon, 19 Dec 2011 02:36:45 -0800 (PST) Received: from shaker64.lan (dslb-088-073-137-229.pools.arcor-ip.net. [88.73.137.229]) by mx.google.com with ESMTPS id fa8sm40036609bkc.14.2011.12.19.02.36.43 (version=SSLv3 cipher=OTHER); Mon, 19 Dec 2011 02:36:44 -0800 (PST) From: Jonas Gorski To: Artem Bityutskiy Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, David Woodhouse , Florian Fainelli Subject: [PATCH V2 2/5] MTD: bcm63xxpart: make sure CFE and NVRAM partitions are at least 64K Date: Mon, 19 Dec 2011 11:36:04 +0100 Message-Id: <1324290964-14096-1-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324208821.17534.0.camel@sauron.fi.intel.com> References: <1324208821.17534.0.camel@sauron.fi.intel.com> X-archive-position: 32140 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14860 Content-Length: 3148 Lines: 94 The CFE boot loader on BCM63XX platforms assumes itself and the NVRAM partition to be 64 KiB (or erase block sized, if larger). Ensure this assumption is also met when creating the partitions to prevent accidential erasure of CFE or NVRAM. Signed-off-by: Jonas Gorski --- Changes V1 -> V2: Clarified the need for the minimum size. Hope this one's better :) drivers/mtd/bcm63xxpart.c | 22 +++++++++++++++------- 1 files changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/bcm63xxpart.c b/drivers/mtd/bcm63xxpart.c index 9933b34..23f6201 100644 --- a/drivers/mtd/bcm63xxpart.c +++ b/drivers/mtd/bcm63xxpart.c @@ -36,6 +36,9 @@ #define BCM63XX_EXTENDED_SIZE 0xBFC00000 /* Extended flash address */ +#define BCM63XX_MIN_CFE_SIZE 0x10000 /* always at least 64K */ +#define BCM63XX_MIN_NVRAM_SIZE 0x10000 /* always at least 64K */ + #define BCM63XX_CFE_MAGIC_OFFSET 0x4e0 static int bcm63xx_detect_cfe(struct mtd_info *master) @@ -74,6 +77,7 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, size_t retlen; unsigned int rootfsaddr, kerneladdr, spareaddr; unsigned int rootfslen, kernellen, sparelen, totallen; + unsigned int cfelen, nvramlen; int namelen = 0; int i; char *boardid; @@ -82,14 +86,18 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, if (bcm63xx_detect_cfe(master)) return -EINVAL; + cfelen = max_t(uint32_t, master->erasesize, BCM63XX_MIN_CFE_SIZE); + nvramlen = max_t(uint32_t, master->erasesize, BCM63XX_MIN_NVRAM_SIZE); + /* Allocate memory for buffer */ buf = vmalloc(sizeof(struct bcm_tag)); if (!buf) return -ENOMEM; /* Get the tag */ - ret = master->read(master, master->erasesize, sizeof(struct bcm_tag), - &retlen, (void *)buf); + ret = master->read(master, cfelen, sizeof(struct bcm_tag), &retlen, + (void *)buf); + if (retlen != sizeof(struct bcm_tag)) { vfree(buf); return -EIO; @@ -106,8 +114,8 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, kerneladdr = kerneladdr - BCM63XX_EXTENDED_SIZE; rootfsaddr = kerneladdr + kernellen; - spareaddr = roundup(totallen, master->erasesize) + master->erasesize; - sparelen = master->size - spareaddr - master->erasesize; + spareaddr = roundup(totallen, master->erasesize) + cfelen; + sparelen = master->size - spareaddr - nvramlen; rootfslen = spareaddr - rootfsaddr; /* Determine number of partitions */ @@ -131,7 +139,7 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, /* Start building partition list */ parts[curpart].name = "CFE"; parts[curpart].offset = 0; - parts[curpart].size = master->erasesize; + parts[curpart].size = cfelen; curpart++; if (kernellen > 0) { @@ -151,8 +159,8 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master, } parts[curpart].name = "nvram"; - parts[curpart].offset = master->size - master->erasesize; - parts[curpart].size = master->erasesize; + parts[curpart].offset = master->size - nvramlen; + parts[curpart].size = nvramlen; /* Global partition "linux" to make easy firmware upgrade */ curpart++; -- 1.7.2.5 From dedekind1@gmail.com Mon Dec 19 11:55:07 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 19 Dec 2011 11:55:11 +0100 (CET) Received: from mail-iy0-f177.google.com ([209.85.210.177]:41257 "EHLO mail-iy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903600Ab1LSKzH (ORCPT ); Mon, 19 Dec 2011 11:55:07 +0100 Received: by iadk27 with SMTP id k27so8241489iad.36 for ; Mon, 19 Dec 2011 02:55:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=message-id:subject:from:reply-to:to:cc:date:in-reply-to:references :content-type:x-mailer:mime-version; bh=hQjm1Gcjp1fqRLSRJqLgOWRNQMBxDN/qpFMd7MEvQV8=; b=qnxdtZdfzyr6sd92jEs87SoD8Wrx5Zh6pxsCBH9h+g0sLZwuWGsuPdYeplqHk+qvf4 2xxzgPN2LRLa+R63vzj/JVBT/6pOBG/nijV/ivM1zmzSJHRWHDBMu3pnXhnT4JYPzAsa QKLAOqNzrz1aEZLmaLHqpcR5jB6M/ohn/sUoo= Received: by 10.50.207.72 with SMTP id lu8mr26437129igc.23.1324292101116; Mon, 19 Dec 2011 02:55:01 -0800 (PST) Received: from [127.0.0.1] (jfdmzpr01-ext.jf.intel.com. [134.134.139.70]) by mx.google.com with ESMTPS id aq5sm19123464igc.5.2011.12.19.02.54.56 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 19 Dec 2011 02:54:59 -0800 (PST) Message-ID: <1324292192.32675.6.camel@sauron.fi.intel.com> Subject: Re: [PATCH V2 2/5] MTD: bcm63xxpart: make sure CFE and NVRAM partitions are at least 64K From: Artem Bityutskiy Reply-To: dedekind1@gmail.com To: Jonas Gorski Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, David Woodhouse , Florian Fainelli Date: Mon, 19 Dec 2011 12:56:32 +0200 In-Reply-To: <1324290964-14096-1-git-send-email-jonas.gorski@gmail.com> References: <1324208821.17534.0.camel@sauron.fi.intel.com> <1324290964-14096-1-git-send-email-jonas.gorski@gmail.com> Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-HZ8UQEm6HImn2CDjNfdP" X-Mailer: Evolution 3.2.2 (3.2.2-1.fc16) Mime-Version: 1.0 X-archive-position: 32141 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dedekind1@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14881 Content-Length: 1797 Lines: 47 --=-HZ8UQEm6HImn2CDjNfdP Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, 2011-12-19 at 11:36 +0100, Jonas Gorski wrote: > The CFE boot loader on BCM63XX platforms assumes itself and the NVRAM > partition to be 64 KiB (or erase block sized, if larger). > Ensure this assumption is also met when creating the partitions to > prevent accidential erasure of CFE or NVRAM. >=20 > Signed-off-by: Jonas Gorski If someone creates a partition smaller than 64 KiB, then why it is better to silently make it 64 KiB (and thus doing not what the user asked to do and possibly confusing him), rather than returning an error or just printing a warning? --=20 Best Regards, Artem Bityutskiy --=-HZ8UQEm6HImn2CDjNfdP Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJO7xhgAAoJECmIfjd9wqK0Yu4QAJuZQBWO0WhtiH6F2ykgVoCU LSLZoeC1QdQx2CMMnEE8+2U6bQmlTspP33J9yKxDpLI2KFpfRuFhEmFwzRWZ0FHV DrAB9DXJ1kTqBnDg1VyUPdvI3gAV+KwUUpfs1/q4oiZg64sdAlKXlqNu6G1XBSQd G74xecxyX+Cfr96x3RIjXKPPN2rqLWrcDJD+VBHsawD0ogEoQjOVuaY6R0SqgvT+ 2izECvxQywcWYUSdjt2WQcytiCzntfKmnQin6VjM5DnFY5jUQVXDPnTHU3OW3wTA NlhLe7hVcPRWvtd22hadhq5aCoOQGIxE+U/+GPA8ufbzJUy7NPn6aYnVYolIcuLh HBuQzhnH6Pl0DMmVr2JM4ivxscvrHoEyxSmjVs/JLogmoC8DHlgVvAXUtV/qhJc7 8VZDx3NZR4L+jHXmKByyHvACSrUBX8sEIBEpsyO3PBJsjwq30B2PvTwHtzwQbMzk FZJg1ajI8KF8OTC0Rs+wNqLYixivtTXNCP0JlbQQpp5qT3bAoH0M5tp0BvjZqzKW wxMYAkx1amY0vUjH132Wyo0TJGXd7U4eVLKSCOGWShujXNcChxBvknCHxA85w1ka VI+hFy62Cca/gdh3Gx/30NZCYboeHOtY/QMPcoX70gCO7Sqx7nwFBxCSaPy2ROJt rg4UzOZ813Qj3q72CSd+ =oLiF -----END PGP SIGNATURE----- --=-HZ8UQEm6HImn2CDjNfdP-- From jonas.gorski@gmail.com Mon Dec 19 13:02:03 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 19 Dec 2011 13:02:07 +0100 (CET) Received: from mail-we0-f177.google.com ([74.125.82.177]:58894 "EHLO mail-we0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903613Ab1LSMCD (ORCPT ); Mon, 19 Dec 2011 13:02:03 +0100 Received: by wera10 with SMTP id a10so1619240wer.36 for ; Mon, 19 Dec 2011 04:01:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type; bh=Ff2yP9SyBgpeFjFkt4azLm3OX/T+dqXtLUjgf7XlCDs=; b=RUuZ7qBWyFcOX9Ygqhdg8USmt1n5GGeNYQtEtHoceZ5s6yjaKDwEOvcjqU6IaLrDb0 GNFPFyyKD6tMe1tXM086Od/q5bHJAZWeieFiqM67QJ9Xkmrninr0J9QSZnst6SkXSR/2 /xOSh/V8X5iL20PfEy5sV7QoCnQPSVHJ9NdYA= Received: by 10.216.135.154 with SMTP id u26mr6624203wei.20.1324296118355; Mon, 19 Dec 2011 04:01:58 -0800 (PST) MIME-Version: 1.0 Received: by 10.223.117.2 with HTTP; Mon, 19 Dec 2011 04:01:37 -0800 (PST) In-Reply-To: <1324292192.32675.6.camel@sauron.fi.intel.com> References: <1324208821.17534.0.camel@sauron.fi.intel.com> <1324290964-14096-1-git-send-email-jonas.gorski@gmail.com> <1324292192.32675.6.camel@sauron.fi.intel.com> From: Jonas Gorski Date: Mon, 19 Dec 2011 13:01:37 +0100 Message-ID: Subject: Re: [PATCH V2 2/5] MTD: bcm63xxpart: make sure CFE and NVRAM partitions are at least 64K To: dedekind1@gmail.com Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, David Woodhouse , Florian Fainelli Content-Type: text/plain; charset=UTF-8 X-archive-position: 32142 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jonas.gorski@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 14927 Content-Length: 1946 Lines: 39 On 19 December 2011 11:56, Artem Bityutskiy wrote: > On Mon, 2011-12-19 at 11:36 +0100, Jonas Gorski wrote: >> The CFE boot loader on BCM63XX platforms assumes itself and the NVRAM >> partition to be 64 KiB (or erase block sized, if larger). >> Ensure this assumption is also met when creating the partitions to >> prevent accidential erasure of CFE or NVRAM. >> >> Signed-off-by: Jonas Gorski > > If someone creates a partition smaller than 64 KiB, then why it is > better to silently make it 64 KiB (and thus doing not what the user > asked to do and possibly confusing him), rather than returning an error > or just printing a warning? This adjustment to 64 KiB is only done for the CFE and NVRAM partitions, not for the rootfs or kernel partitions. The CFE and NVRAM lengths/offsets are defined in the CFE boot loader at build time and fixed, so to change them you would need to build and flash your own CFE (and the sources are not public, so you also need to be a Broadcom customer). I have yet to see a device where this was done, so this is currently just a theoretical possibility. Also you can't create/modify partitions arbitrarily as there is no partition table, just a fixed image header format (which the CFE parses on boot). So the only two partitions changeable from the outside are the kernel and rootfs partitions, which are defined in the image tag, which always resides at the beginning of the first erase block after the CFE. Changing the CFE length would result in a changed offset of the image tag, leading to a "wrong" image tag being read (or in case after patch 5, a warning that the image tag is likely corrupt, and no rootfs/kernel partitions created). Of course everything is done under the assumption the boot loader is CFE (there are a few devices with RedBoot out there), but the parser already bails out if no CFE is detected. Hope that clears things up. Jonas From ddaney.cavm@gmail.com Tue Dec 20 00:07:44 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 20 Dec 2011 00:07:51 +0100 (CET) Received: from mail-gy0-f177.google.com ([209.85.160.177]:59938 "EHLO mail-gy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903750Ab1LSXHo (ORCPT ); Tue, 20 Dec 2011 00:07:44 +0100 Received: by ghrr15 with SMTP id r15so2069023ghr.36 for ; Mon, 19 Dec 2011 15:07:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding; bh=YaiQwu1+uOsLwZXQ+JgvA7b9vleTNIWNeP9DIqLm1xs=; b=YAdam6Qpw7tFPQ7u5z2ELh2uhxQ893o4Y1Mw421tcIsIb4Q0KewiX0mpfPe8dcNlZx n120/exhBxb7BXgOZQdIRGUMmliT9lwT4B9SYoQQG/BZ9f98YllpvZfxo0PrGItuQs5K SOOZmJyduR5fO+omDi42n129MuxdH9d1L0T0k= Received: by 10.236.175.72 with SMTP id y48mr32376564yhl.17.1324336057716; Mon, 19 Dec 2011 15:07:37 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id w68sm32488441yhe.14.2011.12.19.15.07.36 (version=SSLv3 cipher=OTHER); Mon, 19 Dec 2011 15:07:36 -0800 (PST) Message-ID: <4EEFC3B7.9020008@gmail.com> Date: Mon, 19 Dec 2011 15:07:35 -0800 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: ralf@linux-mips.org, Linus Torvalds , Andrew Morton , linux-mips@linux-mips.org, Jeremy Fitzhardinge , Peter Zijlstra CC: linux-kernel@vger.kernel.org, Jason Baron , David Daney Subject: Re: [PATCH v2a] jump-label: initialize jump-label subsystem somewhat later References: <1323885279-26850-1-git-send-email-ddaney.cavm@gmail.com> In-Reply-To: <1323885279-26850-1-git-send-email-ddaney.cavm@gmail.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-archive-position: 32143 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 15587 Content-Length: 1717 Lines: 60 On 12/14/2011 09:54 AM, David Daney wrote: > From: David Daney > > commit 97ce2c88f9ad42e3c60a9beb9fca87abf3639faa > (jump-label: initialize jump-label subsystem much earlier) breaks MIPS. > > The jump-label initialization does I-Cache flushing after modifying > code. On MIPS this is done by calling through the function pointer > flush_icache_range(). This function pointer is initialized by > trap_init(). > > As things stand, we cannot be calling jump_label_init() until after > trap_init() completes, so we move the call down to satisfy this > constraint. > > Signed-off-by: David Daney NACK to myself: I now have a patch for MIPS that makes this one unnecessary. David Daney > --- > > Sorry for spamming this out again, but Sergei keeps flagging my poor > grammar. > > Difference from v2: Fix grammar and spelling issues in changelog. No > change to the patch. > > Difference from v1: Move jump_label_init() up one so it is now before > mm_init() instead of after it. > > > init/main.c | 3 +-- > 1 files changed, 1 insertions(+), 2 deletions(-) > > diff --git a/init/main.c b/init/main.c > index 217ed23..68ab12b 100644 > --- a/init/main.c > +++ b/init/main.c > @@ -513,8 +513,6 @@ asmlinkage void __init start_kernel(void) > __stop___param - __start___param, > &unknown_bootoption); > > - jump_label_init(); > - > /* > * These use large bootmem allocations and must precede > * kmem_cache_init() > @@ -524,6 +522,7 @@ asmlinkage void __init start_kernel(void) > vfs_caches_init_early(); > sort_main_extable(); > trap_init(); > + jump_label_init(); > mm_init(); > > /* From ddaney.cavm@gmail.com Tue Dec 20 00:16:55 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 20 Dec 2011 00:16:59 +0100 (CET) Received: from mail-gy0-f177.google.com ([209.85.160.177]:63751 "EHLO mail-gy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903752Ab1LSXQz (ORCPT ); Tue, 20 Dec 2011 00:16:55 +0100 Received: by ghrr15 with SMTP id r15so2072895ghr.36 for ; Mon, 19 Dec 2011 15:16:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=g5vULzkec4WJRXdLD71bRmpzehY9uTHgubWeUgT9zKs=; b=A7YRHJU+hYCq5OWf57A8CHhaTWKP/u7K4e2w5KpF1Da82On8ABqNGKcawy0K2dPeh7 z+usnkSDzJpjF45tpySObEyEcKbg2wvcG+t5YwZLo64xHmmDBw3bXpq5SfXmP4WkGTJh qf3JtKP1qF+NuWzaX++XtmsTOaO/lGrtd+lBw= Received: by 10.236.91.84 with SMTP id g60mr32100329yhf.90.1324336609078; Mon, 19 Dec 2011 15:16:49 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id f47sm32547926yhh.8.2011.12.19.15.16.48 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 19 Dec 2011 15:16:48 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBJNGk8e029861; Mon, 19 Dec 2011 15:16:46 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBJNGkaN029860; Mon, 19 Dec 2011 15:16:46 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: David Daney Subject: [PATCH 3/5] MIPS: Octeon: Use board_cache_error_setup for cache error handler setup. Date: Mon, 19 Dec 2011 15:16:40 -0800 Message-Id: <1324336602-29812-4-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1324336602-29812-1-git-send-email-ddaney.cavm@gmail.com> References: <1324336602-29812-1-git-send-email-ddaney.cavm@gmail.com> X-archive-position: 32144 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 15604 Content-Length: 1312 Lines: 56 From: David Daney Signed-off-by: David Daney --- arch/mips/mm/c-octeon.c | 14 ++++++++------ 1 files changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c index cf7895d..2d99a1d 100644 --- a/arch/mips/mm/c-octeon.c +++ b/arch/mips/mm/c-octeon.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -249,6 +250,11 @@ static void __cpuinit probe_octeon(void) } } +static void __cpuinit octeon_cache_error_setup(void) +{ + extern char except_vec2_octeon; + set_handler(0x100, &except_vec2_octeon, 0x80); +} /** * Setup the Octeon cache flush routines @@ -256,12 +262,6 @@ static void __cpuinit probe_octeon(void) */ void __cpuinit octeon_cache_init(void) { - extern unsigned long ebase; - extern char except_vec2_octeon; - - memcpy((void *)(ebase + 0x100), &except_vec2_octeon, 0x80); - octeon_flush_cache_sigtramp(ebase + 0x100); - probe_octeon(); shm_align_mask = PAGE_SIZE - 1; @@ -281,6 +281,8 @@ void __cpuinit octeon_cache_init(void) build_clear_page(); build_copy_page(); + + board_cache_error_setup = octeon_cache_error_setup; } /** -- 1.7.2.3 From ddaney.cavm@gmail.com Tue Dec 20 00:16:55 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 20 Dec 2011 00:17:22 +0100 (CET) Received: from mail-yx0-f177.google.com ([209.85.213.177]:49737 "EHLO mail-yx0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903754Ab1LSXQz (ORCPT ); Tue, 20 Dec 2011 00:16:55 +0100 Received: by yenl2 with SMTP id l2so3851980yen.36 for ; Mon, 19 Dec 2011 15:16:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=+Hq03BsPERqOUAKPfdDNRByY5IUctmh3ayM1IGe/1aE=; b=g8k3vE/h5egdlqI5J7MryC2PFS2/Pse6hlFrQgrE906VNEfGjRm6+PUR+NPCDF2WS4 PeqpDfMCPgbYqwXoUeQgiha+xIbnyETo4e1eF9MrD3iBPRdjtFv6h+z4jBNHN5xhWab1 osxChgBrIafiYD5rv9OOLP41t3B+UmMKHq1yM= Received: by 10.236.161.103 with SMTP id v67mr31104151yhk.87.1324336609304; Mon, 19 Dec 2011 15:16:49 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id v15sm18762839anq.4.2011.12.19.15.16.48 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 19 Dec 2011 15:16:48 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBJNGkog029853; Mon, 19 Dec 2011 15:16:46 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBJNGkXF029852; Mon, 19 Dec 2011 15:16:46 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: David Daney Subject: [PATCH 1/5] MIPS: Introduce board_cache_error_setup() hook. Date: Mon, 19 Dec 2011 15:16:38 -0800 Message-Id: <1324336602-29812-2-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1324336602-29812-1-git-send-email-ddaney.cavm@gmail.com> References: <1324336602-29812-1-git-send-email-ddaney.cavm@gmail.com> X-archive-position: 32145 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 15605 Content-Length: 1570 Lines: 47 From: David Daney This is used in subsequent patches. Signed-off-by: David Daney --- arch/mips/include/asm/traps.h | 1 + arch/mips/kernel/traps.c | 5 ++++- 2 files changed, 5 insertions(+), 1 deletions(-) diff --git a/arch/mips/include/asm/traps.h b/arch/mips/include/asm/traps.h index 90ff2f4..d4d0e76 100644 --- a/arch/mips/include/asm/traps.h +++ b/arch/mips/include/asm/traps.h @@ -24,5 +24,6 @@ extern int (*board_be_handler)(struct pt_regs *regs, int is_fixup); extern void (*board_nmi_handler_setup)(void); extern void (*board_ejtag_handler_setup)(void); extern void (*board_bind_eic_interrupt)(int irq, int regset); +extern void (*board_cache_error_setup)(void); #endif /* _ASM_TRAPS_H */ diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 363c476..f305c04 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -91,7 +91,7 @@ int (*board_be_handler)(struct pt_regs *regs, int is_fixup); void (*board_nmi_handler_setup)(void); void (*board_ejtag_handler_setup)(void); void (*board_bind_eic_interrupt)(int irq, int regset); - +void __cpuinitdata(*board_cache_error_setup)(void); static void show_raw_backtrace(unsigned long reg29) { @@ -1786,6 +1786,9 @@ void __init trap_init(void) set_except_vector(26, handle_dsp); + if (board_cache_error_setup) + board_cache_error_setup(); + if (cpu_has_vce) /* Special exception: R4[04]00 uses also the divec space. */ memcpy((void *)(ebase + 0x180), &except_vec3_r4000, 0x100); -- 1.7.2.3 From ddaney.cavm@gmail.com Tue Dec 20 00:16:55 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 20 Dec 2011 00:17:51 +0100 (CET) Received: from mail-gy0-f177.google.com ([209.85.160.177]:58553 "EHLO mail-gy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903755Ab1LSXQz (ORCPT ); Tue, 20 Dec 2011 00:16:55 +0100 Received: by ghrr15 with SMTP id r15so2072899ghr.36 for ; Mon, 19 Dec 2011 15:16:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=aRBFSDyQGridUBb0yT6+/SMbCPCSs6+VvI/jZl89UTU=; b=j9qTw7XISWF8Mw189vGbmG2s2mMkb+z7iol0FZ6UmkqkAm4c9LJXvvTcL9URJbvbRV 6hAJ6tRy+LA1h7vqWBxPxv2zUOft/4tahaCBvBr9XTDD7ojKpFzYlfta3hwGTbHO2g/F WQ1WuW8/91fzJuVzwkQBy5YkkeEUA4X5ziluo= Received: by 10.236.152.35 with SMTP id c23mr18082661yhk.58.1324336609676; Mon, 19 Dec 2011 15:16:49 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id j21sm976767ann.0.2011.12.19.15.16.48 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 19 Dec 2011 15:16:48 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBJNGkOs029849; Mon, 19 Dec 2011 15:16:46 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBJNGiTE029848; Mon, 19 Dec 2011 15:16:44 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: David Daney Subject: [PATCH 0/5] MIPS: Move cache setup earlier. Date: Mon, 19 Dec 2011 15:16:37 -0800 Message-Id: <1324336602-29812-1-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 X-archive-position: 32146 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 15607 Content-Length: 1453 Lines: 40 From: David Daney Found on 3.2-rc4, if jump label things are enabled, the kernel will not boot on MIPS. As noted in patch 5/5, this was caused by: commit 97ce2c88f9ad42e3c60a9beb9fca87abf3639faa (jump-label: initialize jump-label subsystem much earlier). The fix is to make flush_icache_range() usable earlier. I do this by calling cpu_cache_init() from setup_arch(). For the boot CPU we can no longer call this from per_cpu_trap_init(), so I add a flag to that function so we can skip the call if on the boot CPU. Some of the code in the various cpu_cache_init() functions however could not be called this early, so I moved it into functions called by the new board_cache_error_setup() hook. Tested on Octeon and ip32-R5000 David Daney (5): MIPS: Introduce board_cache_error_setup() hook. MIPS: Make set_handler() __cpuinit. MIPS: Octeon: Use board_cache_error_setup for cache error handler setup. MIPS: Use board_cache_error_setup for r4k cache error handler setup. MIPS: Move cache setup to setup_arch(). arch/mips/include/asm/system.h | 2 +- arch/mips/include/asm/traps.h | 1 + arch/mips/kernel/setup.c | 3 +++ arch/mips/kernel/smp.c | 2 +- arch/mips/kernel/traps.c | 15 ++++++++++----- arch/mips/mm/c-octeon.c | 14 ++++++++------ arch/mips/mm/c-r4k.c | 14 ++++++++++---- 7 files changed, 34 insertions(+), 17 deletions(-) -- 1.7.2.3 From ddaney.cavm@gmail.com Tue Dec 20 00:16:55 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 20 Dec 2011 00:18:17 +0100 (CET) Received: from mail-yw0-f49.google.com ([209.85.213.49]:54528 "EHLO mail-yw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903756Ab1LSXQz (ORCPT ); Tue, 20 Dec 2011 00:16:55 +0100 Received: by yhpp34 with SMTP id p34so4480305yhp.36 for ; Mon, 19 Dec 2011 15:16:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=ZrI+KC2Orbodh45amE49n7ycpbIYL/io/tp2Xz3A2V0=; b=AkatDZgDOYeNdwhOrN6ZY3lZ7g/C+YxeFwPtuZt+ppoBMnSi/tGjfzlidgzoENd1qJ WS8z7OqHYdqKx3cplUebdDcximXfaziGWd8eop6qBdoBPE3d4DG+CAYWwmELaV+mUUbI OkHcIKpn/XT4mtWC0iVq2ZB2+Dk4G1cpNBBJk= Received: by 10.236.165.98 with SMTP id d62mr32224807yhl.15.1324336609471; Mon, 19 Dec 2011 15:16:49 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id 3sm50945296anv.7.2011.12.19.15.16.48 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 19 Dec 2011 15:16:48 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBJNGlWS029865; Mon, 19 Dec 2011 15:16:47 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBJNGlQT029864; Mon, 19 Dec 2011 15:16:47 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: David Daney Subject: [PATCH 4/5] MIPS: Use board_cache_error_setup for r4k cache error handler setup. Date: Mon, 19 Dec 2011 15:16:41 -0800 Message-Id: <1324336602-29812-5-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1324336602-29812-1-git-send-email-ddaney.cavm@gmail.com> References: <1324336602-29812-1-git-send-email-ddaney.cavm@gmail.com> X-archive-position: 32147 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 15608 Content-Length: 1497 Lines: 55 From: David Daney Signed-off-by: David Daney --- arch/mips/mm/c-r4k.c | 14 ++++++++++---- 1 files changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index a79fe9a..036c004 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -33,7 +33,7 @@ #include #include #include /* for run_uncached() */ - +#include /* * Special Variant of smp_call_function for use by cache functions: @@ -1383,10 +1383,8 @@ static int __init setcoherentio(char *str) __setup("coherentio", setcoherentio); #endif -void __cpuinit r4k_cache_init(void) +static void __cpuinit r4k_cache_error_setup(void) { - extern void build_clear_page(void); - extern void build_copy_page(void); extern char __weak except_vec2_generic; extern char __weak except_vec2_sb1; struct cpuinfo_mips *c = ¤t_cpu_data; @@ -1401,6 +1399,13 @@ void __cpuinit r4k_cache_init(void) set_uncached_handler(0x100, &except_vec2_generic, 0x80); break; } +} + +void __cpuinit r4k_cache_init(void) +{ + extern void build_clear_page(void); + extern void build_copy_page(void); + struct cpuinfo_mips *c = ¤t_cpu_data; probe_pcache(); setup_scache(); @@ -1463,4 +1468,5 @@ void __cpuinit r4k_cache_init(void) local_r4k___flush_cache_all(NULL); #endif coherency_setup(); + board_cache_error_setup = r4k_cache_error_setup; } -- 1.7.2.3 From ddaney.cavm@gmail.com Tue Dec 20 00:16:56 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 20 Dec 2011 00:18:42 +0100 (CET) Received: from mail-yx0-f177.google.com ([209.85.213.177]:39865 "EHLO mail-yx0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903757Ab1LSXQ4 (ORCPT ); Tue, 20 Dec 2011 00:16:56 +0100 Received: by yenl2 with SMTP id l2so3851983yen.36 for ; Mon, 19 Dec 2011 15:16:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=AG6v+/bMhNzRCvyg5yrr8Q8pCDyi1zXuAAfIvONETMw=; b=Leoxg5Q1ggjs2QSyG3ro9eYzKLbprB0QYm2N4RGQBdZlbFN7oScYNe7zJ+Lx4nhGpm ofFozfNvnRJ2Icwqn9OUxJgOASCXjKIqlk6Z1IeYUBUjY7e/nZlbuaa+7U93sD3dZlI4 dr2p+o157Sn1AItRriODIxAaeWtFUtXY0bZ5Q= Received: by 10.236.155.194 with SMTP id j42mr31967789yhk.34.1324336609848; Mon, 19 Dec 2011 15:16:49 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id q16sm50921411anb.19.2011.12.19.15.16.48 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 19 Dec 2011 15:16:48 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBJNGkIh029857; Mon, 19 Dec 2011 15:16:46 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBJNGkb6029856; Mon, 19 Dec 2011 15:16:46 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: David Daney Subject: [PATCH 2/5] MIPS: Make set_handler() __cpuinit. Date: Mon, 19 Dec 2011 15:16:39 -0800 Message-Id: <1324336602-29812-3-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1324336602-29812-1-git-send-email-ddaney.cavm@gmail.com> References: <1324336602-29812-1-git-send-email-ddaney.cavm@gmail.com> X-archive-position: 32148 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 15609 Content-Length: 772 Lines: 25 From: David Daney Follow-on patched require this. Signed-off-by: David Daney --- arch/mips/kernel/traps.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index f305c04..0430700 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1623,7 +1623,7 @@ void __cpuinit per_cpu_trap_init(void) } /* Install CPU exception handler */ -void __init set_handler(unsigned long offset, void *addr, unsigned long size) +void __cpuinit set_handler(unsigned long offset, void *addr, unsigned long size) { memcpy((void *)(ebase + offset), addr, size); local_flush_icache_range(ebase + offset, ebase + offset + size); -- 1.7.2.3 From ddaney.cavm@gmail.com Tue Dec 20 00:16:56 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 20 Dec 2011 00:19:09 +0100 (CET) Received: from mail-yx0-f177.google.com ([209.85.213.177]:63483 "EHLO mail-yx0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903758Ab1LSXQ4 (ORCPT ); Tue, 20 Dec 2011 00:16:56 +0100 Received: by yenl2 with SMTP id l2so3851999yen.36 for ; Mon, 19 Dec 2011 15:16:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=82fXj28wcPsM65yHKeGeaQfA61vdmtOW8CHCmE1OhjY=; b=rViDqa4v2KfixKKLTJjQle+J/C6my1kQDi6hQ6IUZ6YHCZfuMzx/CxrpPW7mmDqLtn P5v692AeerotUc3CkM+OdvVDQaSpHCWmISm+w6bjKPvXA1rmd8HecoRpYqn03uQGorO3 RjB0JAeCI4BmpisTASXEStDjQXPcGkHH5a9aE= Received: by 10.236.73.230 with SMTP id v66mr31836794yhd.61.1324336610321; Mon, 19 Dec 2011 15:16:50 -0800 (PST) Received: from dd1.caveonetworks.com (64.2.3.195.ptr.us.xo.net. [64.2.3.195]) by mx.google.com with ESMTPS id x8sm23538229anh.17.2011.12.19.15.16.48 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 19 Dec 2011 15:16:48 -0800 (PST) Received: from dd1.caveonetworks.com (localhost.localdomain [127.0.0.1]) by dd1.caveonetworks.com (8.14.4/8.14.4) with ESMTP id pBJNGlXA029869; Mon, 19 Dec 2011 15:16:47 -0800 Received: (from ddaney@localhost) by dd1.caveonetworks.com (8.14.4/8.14.4/Submit) id pBJNGltF029868; Mon, 19 Dec 2011 15:16:47 -0800 From: David Daney To: linux-mips@linux-mips.org, ralf@linux-mips.org Cc: David Daney Subject: [PATCH 5/5] MIPS: Move cache setup to setup_arch(). Date: Mon, 19 Dec 2011 15:16:42 -0800 Message-Id: <1324336602-29812-6-git-send-email-ddaney.cavm@gmail.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1324336602-29812-1-git-send-email-ddaney.cavm@gmail.com> References: <1324336602-29812-1-git-send-email-ddaney.cavm@gmail.com> X-archive-position: 32149 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ddaney.cavm@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 15610 Content-Length: 3087 Lines: 102 From: David Daney commit 97ce2c88f9ad42e3c60a9beb9fca87abf3639faa (jump-label: initialize jump-label subsystem much earlier) breaks MIPS. The jump_label_init() call was moved before trap_init() which is where we initialize flush_icache_range(). In order to be good citizens, we move cache initialization earlier so that we don't jump through a null flush_icache_range function pointer when doing the jump label initialization. Signed-off-by: David Daney --- arch/mips/include/asm/system.h | 2 +- arch/mips/kernel/setup.c | 3 +++ arch/mips/kernel/smp.c | 2 +- arch/mips/kernel/traps.c | 8 +++++--- 4 files changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h index 6018c80..28f16a2 100644 --- a/arch/mips/include/asm/system.h +++ b/arch/mips/include/asm/system.h @@ -222,7 +222,7 @@ extern void *set_vi_handler(int n, vi_handler_t addr); extern void *set_except_vector(int n, void *addr); extern unsigned long ebase; -extern void per_cpu_trap_init(void); +extern void per_cpu_trap_init(bool); /* * See include/asm-ia64/system.h; prevents deadlock on SMP diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 84af26a..2e0bb49 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -547,6 +547,7 @@ static void __init resource_init(void) } } +extern void cpu_cache_init(void); void __init setup_arch(char **cmdline_p) { cpu_probe(); @@ -570,6 +571,8 @@ void __init setup_arch(char **cmdline_p) resource_init(); plat_smp_setup(); + + cpu_cache_init(); } unsigned long kernelsp[NR_CPUS]; diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index 32c1e95..43cd1ed 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c @@ -106,7 +106,7 @@ asmlinkage __cpuinit void start_secondary(void) #endif /* CONFIG_MIPS_MT_SMTC */ cpu_probe(); cpu_report(); - per_cpu_trap_init(); + per_cpu_trap_init(false); mips_clockevent_init(); mp_ops->init_secondary(); diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 0430700..0d55eb8 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1508,7 +1508,7 @@ static int __init ulri_disable(char *s) } __setup("noulri", ulri_disable); -void __cpuinit per_cpu_trap_init(void) +void __cpuinit per_cpu_trap_init(bool is_boot_cpu) { unsigned int cpu = smp_processor_id(); unsigned int status_set = ST0_CU0; @@ -1607,7 +1607,9 @@ void __cpuinit per_cpu_trap_init(void) #ifdef CONFIG_MIPS_MT_SMTC if (bootTC) { #endif /* CONFIG_MIPS_MT_SMTC */ - cpu_cache_init(); + /* Boot CPU's cache setup in setup_arch(). */ + if (!is_boot_cpu) + cpu_cache_init(); tlb_init(); #ifdef CONFIG_MIPS_MT_SMTC } else if (!secondaryTC) { @@ -1682,7 +1684,7 @@ void __init trap_init(void) ebase += (read_c0_ebase() & 0x3ffff000); } - per_cpu_trap_init(); + per_cpu_trap_init(true); /* * Copy the generic exception handlers to their final destination. -- 1.7.2.3 From manuel.lauss@googlemail.com Tue Dec 20 17:37:39 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 20 Dec 2011 17:37:51 +0100 (CET) Received: from mail-ee0-f49.google.com ([74.125.83.49]:58111 "EHLO mail-ee0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903705Ab1LTQhj (ORCPT ); Tue, 20 Dec 2011 17:37:39 +0100 Received: by eekc13 with SMTP id c13so5719268eek.36 for ; Tue, 20 Dec 2011 08:37:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=NLLY6KTY0ahn4kqTCQFjRHbE0GODDmEI5IgWtsS+HJI=; b=Z66l0qZUs/BiizggylwUNsBcKB78+IFYavTovPwpc/f1uYjm16iYN3+PKxS7onX4vT lx68dkMNO/avqppuSftFM0Sn5+XJoOeYUIGjDTHtUbpbaOxLENOYP1ueH0PCrOE+yZ2e 192cFqeWb2AZNehWN8TTQak0vTWfOuoFPcuEo= Received: by 10.213.114.140 with SMTP id e12mr685592ebq.78.1324399054253; Tue, 20 Dec 2011 08:37:34 -0800 (PST) Received: from flagship.roarinelk.net (188-22-146-24.adsl.highway.telekom.at. [188.22.146.24]) by mx.google.com with ESMTPS id j20sm8683364eej.8.2011.12.20.08.37.32 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 20 Dec 2011 08:37:33 -0800 (PST) From: Manuel Lauss To: Ralf Baechle , Linux-MIPS Cc: Manuel Lauss Subject: [PATCH] MIPS: Alchemy: increase minimum timeout for 32kHz timer. Date: Tue, 20 Dec 2011 17:37:29 +0100 Message-Id: <1324399049-6410-1-git-send-email-manuel.lauss@googlemail.com> X-Mailer: git-send-email 1.7.8 X-archive-position: 32150 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: manuel.lauss@googlemail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 16183 Content-Length: 1483 Lines: 37 Since a clocksource change post 3.2-rc1, tasks on my DB1500 board hang after random amounts of time (from a few minutes to a few hours), regardless of load. Debugging showed that the compare-match register value is a few seconds lower than the current counter value. The minimum value of 8 was initialy determined by a trial-and-error approach. Currently it is sufficient for all Alchemys (without PCI apparently), independent of CPU clock; only the DB1500 and DB1550 boards experience these timer-related tasks hangs now. This patch increases the minimum timeout by 1 (to 9 counter ticks) which seems sufficient since the systems are still working perfectly fine after over 24 hours. Signed-off-by: Manuel Lauss --- Please consider for 3.2 arch/mips/alchemy/common/time.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c index a594a85..63ba51f 100644 --- a/arch/mips/alchemy/common/time.c +++ b/arch/mips/alchemy/common/time.c @@ -146,7 +146,7 @@ static int __init alchemy_time_init(unsigned int m2int) cd->shift = 32; cd->mult = div_sc(32768, NSEC_PER_SEC, cd->shift); cd->max_delta_ns = clockevent_delta2ns(0xffffffff, cd); - cd->min_delta_ns = clockevent_delta2ns(8, cd); /* ~0.25ms */ + cd->min_delta_ns = clockevent_delta2ns(9, cd); /* ~0.28ms */ clockevents_register_device(cd); setup_irq(m2int, &au1x_rtcmatch2_irqaction); -- 1.7.8 From dedekind1@gmail.com Wed Dec 21 21:54:25 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 21 Dec 2011 21:54:29 +0100 (CET) Received: from mail-lpp01m010-f49.google.com ([209.85.215.49]:43683 "EHLO mail-lpp01m010-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903762Ab1LUUyZ (ORCPT ); Wed, 21 Dec 2011 21:54:25 +0100 Received: by lahc1 with SMTP id c1so6027608lah.36 for ; Wed, 21 Dec 2011 12:54:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=subject:from:reply-to:to:cc:date:in-reply-to:references :content-type:x-mailer:content-transfer-encoding:message-id :mime-version; bh=vvU7IdbwU18tlrQWMKIBXYChO5DWD4fsZfTH7ur7hdA=; b=pBSEgYM3JbbWJkpltHl1ER8ut6u1CkKCDgpMyCObnMU1V9O9RXDPS6rIb9aGUny6vI JsOGsCoKaAGsVVpHUOVzIEhb4ZS4UOMYJgCPnMJciPayC37QsyPoy/iWG0i1rTKG13EK SQYWDWZwNysFMfKmp+Yw2h5cvLUwUilzK2j/w= Received: by 10.152.134.50 with SMTP id ph18mr7207784lab.1.1324500859973; Wed, 21 Dec 2011 12:54:19 -0800 (PST) Received: from [192.168.255.2] (host-94-101-1-70.igua.fi. [94.101.1.70]) by mx.google.com with ESMTPS id pi7sm5438310lab.5.2011.12.21.12.54.16 (version=SSLv3 cipher=OTHER); Wed, 21 Dec 2011 12:54:18 -0800 (PST) Subject: Re: [PATCH V2 2/5] MTD: bcm63xxpart: make sure CFE and NVRAM partitions are at least 64K From: Artem Bityutskiy Reply-To: dedekind1@gmail.com To: Jonas Gorski Cc: linux-mtd@lists.infradead.org, linux-mips@linux-mips.org, David Woodhouse , Florian Fainelli Date: Wed, 21 Dec 2011 22:54:13 +0200 In-Reply-To: <1324290964-14096-1-git-send-email-jonas.gorski@gmail.com> References: <1324208821.17534.0.camel@sauron.fi.intel.com> <1324290964-14096-1-git-send-email-jonas.gorski@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.0.3 (3.0.3-1.fc15) Content-Transfer-Encoding: 7bit Message-ID: <1324500858.2110.1.camel@koala> Mime-Version: 1.0 X-archive-position: 32151 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: dedekind1@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 17466 Content-Length: 380 Lines: 10 On Mon, 2011-12-19 at 11:36 +0100, Jonas Gorski wrote: > The CFE boot loader on BCM63XX platforms assumes itself and the NVRAM > partition to be 64 KiB (or erase block sized, if larger). > Ensure this assumption is also met when creating the partitions to > prevent accidential erasure of CFE or NVRAM. > > Signed-off-by: Jonas Gorski Updated, thanks! From cjkernel@gmail.com Thu Dec 22 00:25:23 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 22 Dec 2011 00:25:26 +0100 (CET) Received: from mail-lpp01m010-f49.google.com ([209.85.215.49]:61217 "EHLO mail-lpp01m010-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903762Ab1LUXZX (ORCPT ); Thu, 22 Dec 2011 00:25:23 +0100 Received: by lahc1 with SMTP id c1so6131394lah.36 for ; Wed, 21 Dec 2011 15:25:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:date:message-id:subject:from:to:content-type; bh=PhvsXONvCVcB7SJQH1WmpI8j9fwnyfXmRsXXUs47gR0=; b=FlfAQaKH1/JZtnLtI4VeOlEs/apzgGHkZxV1+X1RLzSc4fx7IQvA3QNjAoc4zLJoNz BWc3MzqKu7nRbbqbdJMFyUHG8nN/ysfq3beuEoYrBRwjXxwQaJc44dLcjR4BBrvbyXX3 ldRi+Lg4GNnXHMYhpP4iTybmvudkXhx504QnA= MIME-Version: 1.0 Received: by 10.152.128.98 with SMTP id nn2mr7347650lab.14.1324509917983; Wed, 21 Dec 2011 15:25:17 -0800 (PST) Received: by 10.152.11.194 with HTTP; Wed, 21 Dec 2011 15:25:17 -0800 (PST) Date: Wed, 21 Dec 2011 17:25:17 -0600 Message-ID: Subject: Power management on ar71xx From: Harsha Chenji To: linux-mips@linux-mips.org Content-Type: text/plain; charset=ISO-8859-1 X-archive-position: 32152 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: cjkernel@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 17613 Content-Length: 266 Lines: 10 Hello list, I was trying to get some power savings working on my AR7161 chipset using OpenWRT, but I was unsuccessful. Since mips24kc supports the wait instruction, shouldn't sleeping be supported too? Is anyone working on this platform currently? Thanks, Harsha From ralf@linux-mips.org Thu Dec 22 13:47:03 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 22 Dec 2011 13:47:07 +0100 (CET) Received: from h5.dl5rb.org.uk ([81.2.74.5]:59729 "EHLO linux-mips.org" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1903608Ab1LVMrD (ORCPT ); Thu, 22 Dec 2011 13:47:03 +0100 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.4) with ESMTP id pBMCl1U8008892; Thu, 22 Dec 2011 12:47:01 GMT Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id pBMCl1GF008890; Thu, 22 Dec 2011 12:47:01 GMT Date: Thu, 22 Dec 2011 12:47:01 +0000 From: Ralf Baechle To: Harsha Chenji Cc: linux-mips@linux-mips.org Subject: Re: Power management on ar71xx Message-ID: <20111222124701.GA7072@linux-mips.org> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 32153 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18048 Content-Length: 600 Lines: 14 On Wed, Dec 21, 2011 at 05:25:17PM -0600, Harsha Chenji wrote: > I was trying to get some power savings working on my AR7161 chipset > using OpenWRT, but I was unsuccessful. > > Since mips24kc supports the wait instruction, shouldn't sleeping be > supported too? Is anyone working on this platform currently? The two things are pretty much unrelated. The WAIT instruction is used by the architecture specific code when there is no process available that could use the CPU. The power managment code deals with all other aspects of power saving. The two don't even know about each other. Ralf From tung7970@gmail.com Thu Dec 22 15:53:33 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 22 Dec 2011 15:53:40 +0100 (CET) Received: from mail-iy0-f177.google.com ([209.85.210.177]:53192 "EHLO mail-iy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903614Ab1LVOxd (ORCPT ); Thu, 22 Dec 2011 15:53:33 +0100 Received: by iadk27 with SMTP id k27so14569245iad.36 for ; Thu, 22 Dec 2011 06:53:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=date:from:to:subject:message-id:mime-version:content-type :content-disposition:user-agent; bh=nVEMytF4T5xa8cZgu7bS6imq8oQ70QM6UHAUGignoCQ=; b=sf0dW0uL8JswhST7/A8gWUsSPk5TWtSXQAZFtoXJSZWGPsqE34lsk0VvkDMXy88XMI FOyQ6+61vzg4ODMUtcxKQUi33/jk/2v4VVkRwiX+zOjNPjWM946CPh3RkR+fJVydg+w3 T12K+e22+AxFf7eRf4yIOctvmM+OZn1gdqkB4= Received: by 10.43.43.130 with SMTP id uc2mr11550290icb.35.1324565606749; Thu, 22 Dec 2011 06:53:26 -0800 (PST) Received: from hades ([58.210.254.98]) by mx.google.com with ESMTPS id j3sm29894366ibj.1.2011.12.22.06.53.22 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 22 Dec 2011 06:53:25 -0800 (PST) Date: Thu, 22 Dec 2011 22:53:17 +0800 From: Tony Wu To: linux-mips@linux-mips.org, ralf@linux-mips.org Subject: [PATCH] vmlinux.lds.S: remove duplicate _sdata symbol Message-ID: <20111222145317.GA411@hades> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 32154 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: tung7970@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18109 Content-Length: 815 Lines: 31 _sdata is defined twice in vmlinux.lds.S. According to vmlinux.ld.h in asm-generic, _sdata should be marked at the beginning RO_DATA_SECTION. * _sdata = .; * RO_DATA_SECTION(PAGE_SIZE) * RW_DATA_SECTION(...) * _edata = .; Remove the one that is marked at RW_DATA_SECTION. Signed-off-by: Tony Wu --- arch/mips/kernel/vmlinux.lds.S | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S index a81176f..924da5e 100644 --- a/arch/mips/kernel/vmlinux.lds.S +++ b/arch/mips/kernel/vmlinux.lds.S @@ -69,7 +69,6 @@ SECTIONS RODATA /* writeable */ - _sdata = .; /* Start of data section */ .data : { /* Data */ . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ -- 1.7.4.4 From ralf@linux-mips.org Thu Dec 22 18:18:36 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 22 Dec 2011 18:18:40 +0100 (CET) Received: from h5.dl5rb.org.uk ([81.2.74.5]:32931 "EHLO linux-mips.org" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S1903644Ab1LVRSg (ORCPT ); Thu, 22 Dec 2011 18:18:36 +0100 Received: from duck.linux-mips.net (duck.linux-mips.net [127.0.0.1]) by duck.linux-mips.net (8.14.4/8.14.4) with ESMTP id pBMHIZv7016910; Thu, 22 Dec 2011 17:18:35 GMT Received: (from ralf@localhost) by duck.linux-mips.net (8.14.4/8.14.4/Submit) id pBMHIXAO016903; Thu, 22 Dec 2011 17:18:33 GMT Date: Thu, 22 Dec 2011 17:18:33 +0000 From: Ralf Baechle To: "James E.J. Bottomley" Cc: linux-scsi@vger.kernel.org, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org Subject: [PATCH] SCSI: Change size of factor from u64 to unsigned int. Message-ID: <20111222171833.GA16435@linux-mips.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-archive-position: 32155 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18217 Content-Length: 945 Lines: 28 Struct scsi_device.sector_size is unsigned int, so the value of factor can have at most 23 significant bits. Adding a type check to do_div() caught these two do_div as the only invocations in the kernel passing a non-32-bit divisor. Signed-off-by: Ralf Baechle Cc: linux-scsi@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org --- drivers/scsi/sd.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c index fa3a591..42a1ff6 100644 --- a/drivers/scsi/sd.c +++ b/drivers/scsi/sd.c @@ -1335,8 +1335,7 @@ static unsigned int sd_completed_bytes(struct scsi_cmnd *scmd) start_lba <<= 1; end_lba <<= 1; } else { - /* be careful ... don't want any overflows */ - u64 factor = scmd->device->sector_size / 512; + unsigned int factor = scmd->device->sector_size / 512; do_div(start_lba, factor); do_div(end_lba, factor); } From consul.kautuk@gmail.com Fri Dec 23 12:17:48 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 12:18:00 +0100 (CET) Received: from mail-gx0-f177.google.com ([209.85.161.177]:56502 "EHLO mail-gx0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903609Ab1LWLRs (ORCPT ); Fri, 23 Dec 2011 12:17:48 +0100 Received: by ggnp4 with SMTP id p4so8403997ggn.36 for ; Fri, 23 Dec 2011 03:17:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; bh=vUaEn5/471LkvG/wqPFqpTqwg+9NoFmAywjoIdE885M=; b=pY2dOhGntT2xtCJdJvj5Ukpgr7Uj3ID0Ny6hRPDhUKvVLghi0uXkp6XEabVKf8ZpmO P+mdiWTAi6Dt6P9DnzjZfKOYBIfsXS7JJ8+j15qOWdPpzpVuyNjxlNvSkwQNnE0P1JLA 1NCOnHBi4i21jyPgyh7Rxi3mhHz0kbV9a3KkU= Received: by 10.50.168.4 with SMTP id zs4mr13107792igb.28.1324639061909; Fri, 23 Dec 2011 03:17:41 -0800 (PST) Received: from localhost.localdomain ([125.19.39.117]) by mx.google.com with ESMTPS id lu10sm19330510igc.0.2011.12.23.03.17.35 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 23 Dec 2011 03:17:41 -0800 (PST) From: Kautuk Consul To: Ralf Baechle , Ingo Molnar , Peter Zijlstra Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, "Mohd. Faris" , Kautuk Consul Subject: [PATCH 1/1] mips: fault.c: Port OOM changes to do_page_fault Date: Fri, 23 Dec 2011 16:52:42 +0530 Message-Id: <1324639362-18220-1-git-send-email-consul.kautuk@gmail.com> X-Mailer: git-send-email 1.7.6 X-archive-position: 32156 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: consul.kautuk@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18762 Content-Length: 2939 Lines: 97 From: Kautuk Consul Commit d065bd810b6deb67d4897a14bfe21f8eb526ba99 (mm: retry page fault when blocking on disk transfer) and commit 37b23e0525d393d48a7d59f870b3bc061a30ccdb (x86,mm: make pagefault killable) The above commits introduced changes into the x86 pagefault handler for making the page fault handler retryable as well as killable. These changes reduce the mmap_sem hold time, which is crucial during OOM killer invocation. Port these changes to MIPS. Without these changes, my MIPS board encounters many hang and livelock scenarios. After applying this patch, OOM feature performance improves according to my testing. Signed-off-by: Mohd. Faris Signed-off-by: Kautuk Consul --- arch/mips/mm/fault.c | 36 +++++++++++++++++++++++++++++------- 1 files changed, 29 insertions(+), 7 deletions(-) diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c index 937cf33..aae2cb3 100644 --- a/arch/mips/mm/fault.c +++ b/arch/mips/mm/fault.c @@ -42,6 +42,8 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, unsigned long writ const int field = sizeof(unsigned long) * 2; siginfo_t info; int fault; + unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE | + (write ? FAULT_FLAG_WRITE : 0); #if 0 printk("Cpu%d[%s:%d:%0*lx:%ld:%0*lx]\n", raw_smp_processor_id(), @@ -91,6 +93,7 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, unsigned long writ if (in_atomic() || !mm) goto bad_area_nosemaphore; +retry: down_read(&mm->mmap_sem); vma = find_vma(mm, address); if (!vma) @@ -144,7 +147,11 @@ good_area: * make sure we exit gracefully rather than endlessly redo * the fault. */ - fault = handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0); + fault = handle_mm_fault(mm, vma, address, flags); + + if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current)) + return; + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); if (unlikely(fault & VM_FAULT_ERROR)) { if (fault & VM_FAULT_OOM) @@ -153,12 +160,27 @@ good_area: goto do_sigbus; BUG(); } - if (fault & VM_FAULT_MAJOR) { - perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, address); - tsk->maj_flt++; - } else { - perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, address); - tsk->min_flt++; + if (flags & FAULT_FLAG_ALLOW_RETRY) { + if (fault & VM_FAULT_MAJOR) { + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, + regs, address); + tsk->maj_flt++; + } else { + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, + regs, address); + tsk->min_flt++; + } + if (fault & VM_FAULT_RETRY) { + flags &= ~FAULT_FLAG_ALLOW_RETRY; + + /* + * No need to up_read(&mm->mmap_sem) as we would + * have already released it in __lock_page_or_retry + * in mm/filemap.c. + */ + + goto retry; + } } up_read(&mm->mmap_sem); -- 1.7.6 From consul.kautuk@gmail.com Fri Dec 23 12:42:43 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 12:42:51 +0100 (CET) Received: from mail-we0-f177.google.com ([74.125.82.177]:46283 "EHLO mail-we0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903609Ab1LWLmn (ORCPT ); Fri, 23 Dec 2011 12:42:43 +0100 Received: by wera10 with SMTP id a10so5190361wer.36 for ; Fri, 23 Dec 2011 03:42:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=4ebwNC43TGzaymbTqLzk5uhjJHk+5oAff1jcTfe+JRc=; b=phr83DMk1qYm1QFzEcQEJcz0jk8cL2tS/bVROPS1vz6i/fRz/V7sReuUQ/8d8MMgSN gMnM/HRnZuGNQrWlKm0k+tM0DebAMuPuFn6eORt1hgZ1MRO58x8tLJwoJ8CMKk920DWP Vbqwb+1BRCDzs37XRUNZl5Y9qAaP7rWBe2BaY= MIME-Version: 1.0 Received: by 10.216.132.231 with SMTP id o81mr13678431wei.3.1324640558301; Fri, 23 Dec 2011 03:42:38 -0800 (PST) Received: by 10.180.107.232 with HTTP; Fri, 23 Dec 2011 03:42:38 -0800 (PST) In-Reply-To: <1324639362-18220-1-git-send-email-consul.kautuk@gmail.com> References: <1324639362-18220-1-git-send-email-consul.kautuk@gmail.com> Date: Fri, 23 Dec 2011 17:12:38 +0530 Message-ID: Subject: Re: [PATCH 1/1] mips: fault.c: Port OOM changes to do_page_fault From: Kautuk Consul To: Ralf Baechle , Ingo Molnar , Peter Zijlstra Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, "Mohd. Faris" , Kautuk Consul Content-Type: multipart/mixed; boundary=0016e6d778d7eec45f04b4c0e9cb X-archive-position: 32157 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: consul.kautuk@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18771 Content-Length: 6348 Lines: 102 --0016e6d778d7eec45f04b4c0e9cb Content-Type: text/plain; charset=ISO-8859-1 > > Without these changes, my MIPS board encounters many hang and livelock > scenarios. > After applying this patch, OOM feature performance improves according to > my testing. > Just to clarify the hang scenario I am talking about, the test case I used to reproduce this problem is attached to this email. Running this a few times hangs my console and then even Ctrl-C signals do not get handled and I also do not get back the command prompt. After applying this patch things seem to improve, but there are still some hangs which I encounter which I am further trying to debug. However, since the generic part of the kernel(mm/filemap.c) now supports killable and retryable page fault handling, I thought that this change would be valid for MIPS too. --0016e6d778d7eec45f04b4c0e9cb Content-Type: text/x-csrc; charset=US-ASCII; name="stress_32k.c" Content-Disposition: attachment; filename="stress_32k.c" Content-Transfer-Encoding: base64 X-Attachment-Id: f_gwj4w7ls0 I2luY2x1ZGUgPHN0ZGlvLmg+CiNpbmNsdWRlIDxzdGRsaWIuaD4KI2luY2x1ZGUgPHN0cmluZy5o PgojaW5jbHVkZSA8cHRocmVhZC5oPgojaW5jbHVkZSA8dW5pc3RkLmg+CgojZGVmaW5lIEFMTE9D X0JZVEUgNTEyKjEwMjQKI2RlZmluZSBDT1VOVCA1MAoKdm9pZCAqYWxsb2NfZnVuY3Rpb25fb25l KCB2b2lkICpwdHIgKTsKdm9pZCAqYWxsb2NfZnVuY3Rpb25fdHdvKCB2b2lkICpwdHIgKTsKdm9p ZCAqYWxsb2NfZnVuY3Rpb25fdGhyZWUoIHZvaWQgKnB0ciApOwp2b2lkICphbGxvY19mdW5jdGlv bl9mb3VyKCB2b2lkICpwdHIgKTsKdm9pZCAqYWxsb2NfZnVuY3Rpb25fZml2ZSggdm9pZCAqcHRy ICk7CnZvaWQgKmVuYWJsZV9mdW5jdGlvbiggdm9pZCAqcHRyICk7CgoKaW50IG1haW4oaW50IGFy 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rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903621Ab1LWM2H (ORCPT ); Fri, 23 Dec 2011 13:28:07 +0100 MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: TEXT/PLAIN Received: from euspt2 ([210.118.77.14]) by mailout4.w1.samsung.com (Sun Java(tm) System Messaging Server 6.3-8.04 (built Jul 29 2009; 32bit)) with ESMTP id <0LWN00MJQPAM6940@mailout4.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:58 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN003GZPALM1@spt2.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:58 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id 65CC2270051; Fri, 23 Dec 2011 13:39:23 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:19 +0100 From: Marek Szyprowski Subject: [PATCH 00/14] DMA-mapping framework redesign preparation To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.7.7.3 X-archive-position: 32158 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18791 Content-Length: 7816 Lines: 154 Hello eveyone, On Linaro Memory Management meeting in Budapest (May 2011) we have discussed about the design of DMA mapping framework. We tried to identify the drawbacks and limitations as well as to provide some a solution for them. The discussion was mainly about ARM architecture, but some of the conclusions need to be applied to cross-architecture code. The first issue we identified is the fact that on some platform (again, mainly ARM) there are several functions for allocating DMA buffers: dma_alloc_coherent, dma_alloc_writecombine and dma_alloc_noncoherent (not functional now). For each of them there is a match dma_free_* function. This gives us quite a lot of functions in the public API and complicates things when we need to have several different implementations for different devices selected in runtime (if IOMMU controller is available only for a few devices in the system). Also the drivers which use less common variants are less portable because of the lacks of dma_alloc_writecombine on other architectures. The solution we found is to introduce a new public dma mapping functions with additional attributes argument: dma_alloc_attrs and dma_free_attrs(). This way all different kinds of architecture specific buffer mappings can be hidden behind the attributes without the need of creating several versions of dma_alloc_ function. dma_alloc_coherent() can be wrapped on top of new dma_alloc_attrs() with NULL attrs parameter. dma_alloc_writecombine and dma_alloc_noncoherent can be implemented as a simple wrappers which sets attributes to DMA_ATTRS_WRITECOMBINE or DMA_ATTRS_NON_CONSISTENT respectively. These new attributes will be implemented only on the architectures that really support them, the others will simply ignore them defaulting to the dma_alloc_coherent equivalent. The next step in dma mapping framework update is the introduction of dma_mmap/dma_mmap_attrs() function. There are a number of drivers (mainly V4L2 and ALSA) that only exports the DMA buffers to user space. Creating a userspace mapping with correct page attributes is not an easy task for the driver. Also the DMA-mapping framework is the only place where the complete information about the allocated pages is available, especially if the implementation uses IOMMU controller to provide a contiguous buffer in DMA address space which is scattered in physical memory space. Usually these drivers don't touch the buffer data at all, so the mapping in kernel virtual address space is not needed. We can introduce DMA_ATTRIB_NO_KERNEL_MAPPING attribute which lets kernel to skip/ignore creation of kernel virtual mapping. This way we can save previous vmalloc area and simply some mapping operation on a few architectures. This patch series is a preparation for the above changes in the public dma mapping API. The main goal is to modify dma_map_ops structure and let all users to use for implementation of the new public funtions. The proof-of-concept patches for ARM architecture have been already posted a few times and now they are working resonably well. They perform conversion to dma_map_ops based implementation and add support for generic IOMMU-based dma mapping implementation. To get them merged we first need to get acceptance for the changes in the common, cross-architecture structures. More information about these patches can be found in the following threads: http://www.spinics.net/lists/linux-mm/msg19856.html http://www.spinics.net/lists/linux-mm/msg21241.html http://lists.linaro.org/pipermail/linaro-mm-sig/2011-September/000571.html http://lists.linaro.org/pipermail/linaro-mm-sig/2011-September/000577.html http://www.spinics.net/lists/linux-mm/msg25490.html The patches are prepared on top of Linux Kernel v3.2-rc6. I would appreciate any comments and help with getting this patch series into linux-next tree. The idea apllied in this patch set have been also presented during the Kernel Summit 2011 and ELC-E 2011 in Prague, in the presentation 'ARM DMA-Mapping Framework Redesign and IOMMU integration'. I'm really sorry if I missed any of the relevant architecture mailing lists. I've did my best to include everyone. Feel free to forward this patchset to all interested developers and maintainers. I've already feel like a nasty spammer. Best regards Marek Szyprowski Samsung Poland R&D Center Patch summary: Andrzej Pietrasiewicz (9): X86: adapt for dma_map_ops changes MIPS: adapt for dma_map_ops changes PowerPC: adapt for dma_map_ops changes IA64: adapt for dma_map_ops changes SPARC: adapt for dma_map_ops changes Alpha: adapt for dma_map_ops changes SH: adapt for dma_map_ops changes Microblaze: adapt for dma_map_ops changes Unicore32: adapt for dma_map_ops changes Marek Szyprowski (5): common: dma-mapping: introduce alloc_attrs and free_attrs methods common: dma-mapping: remove old alloc_coherent and free_coherent methods common: dma-mapping: introduce mmap method common: DMA-mapping: add WRITE_COMBINE attribute common: DMA-mapping: add NON-CONSISTENT attribute Documentation/DMA-attributes.txt | 19 +++++++++++++++++++ arch/alpha/include/asm/dma-mapping.h | 18 ++++++++++++------ arch/alpha/kernel/pci-noop.c | 10 ++++++---- arch/alpha/kernel/pci_iommu.c | 10 ++++++---- arch/ia64/hp/common/sba_iommu.c | 11 ++++++----- arch/ia64/include/asm/dma-mapping.h | 18 ++++++++++++------ arch/ia64/kernel/pci-swiotlb.c | 9 +++++---- arch/ia64/sn/pci/pci_dma.c | 9 +++++---- arch/microblaze/include/asm/dma-mapping.h | 18 ++++++++++++------ arch/microblaze/kernel/dma.c | 10 ++++++---- arch/mips/include/asm/dma-mapping.h | 18 ++++++++++++------ arch/mips/mm/dma-default.c | 8 ++++---- arch/powerpc/include/asm/dma-mapping.h | 24 ++++++++++++++++-------- arch/powerpc/kernel/dma-iommu.c | 10 ++++++---- arch/powerpc/kernel/dma-swiotlb.c | 4 ++-- arch/powerpc/kernel/dma.c | 10 ++++++---- arch/powerpc/kernel/ibmebus.c | 10 ++++++---- arch/powerpc/platforms/cell/iommu.c | 16 +++++++++------- arch/powerpc/platforms/ps3/system-bus.c | 13 +++++++------ arch/sh/include/asm/dma-mapping.h | 28 ++++++++++++++++++---------- arch/sh/kernel/dma-nommu.c | 4 ++-- arch/sh/mm/consistent.c | 6 ++++-- arch/sparc/include/asm/dma-mapping.h | 18 ++++++++++++------ arch/sparc/kernel/iommu.c | 10 ++++++---- arch/sparc/kernel/ioport.c | 18 ++++++++++-------- arch/sparc/kernel/pci_sun4v.c | 9 +++++---- arch/unicore32/include/asm/dma-mapping.h | 18 ++++++++++++------ arch/unicore32/mm/dma-swiotlb.c | 4 ++-- arch/x86/include/asm/dma-mapping.h | 26 ++++++++++++++++---------- arch/x86/kernel/amd_gart_64.c | 11 ++++++----- arch/x86/kernel/pci-calgary_64.c | 9 +++++---- arch/x86/kernel/pci-dma.c | 3 ++- arch/x86/kernel/pci-nommu.c | 6 +++--- arch/x86/kernel/pci-swiotlb.c | 12 +++++++----- arch/x86/xen/pci-swiotlb-xen.c | 4 ++-- drivers/iommu/amd_iommu.c | 10 ++++++---- drivers/iommu/intel-iommu.c | 9 +++++---- drivers/xen/swiotlb-xen.c | 5 +++-- include/linux/dma-attrs.h | 2 ++ include/linux/dma-mapping.h | 13 +++++++++---- include/linux/swiotlb.h | 6 ++++-- include/xen/swiotlb-xen.h | 6 ++++-- lib/swiotlb.c | 5 +++-- 43 files changed, 305 insertions(+), 182 deletions(-) -- 1.7.1.569.g6f426 From m.szyprowski@samsung.com Fri Dec 23 13:28:07 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 13:28:42 +0100 (CET) Received: from mailout1.w1.samsung.com ([210.118.77.11]:42876 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903609Ab1LWM2H (ORCPT ); Fri, 23 Dec 2011 13:28:07 +0100 Received: from euspt1 (mailout1.w1.samsung.com [210.118.77.11]) by mailout1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTP id <0LWN006EMPAMQK@mailout1.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:58 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN006YJPALCM@spt1.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:58 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id 7190B270052; Fri, 23 Dec 2011 13:39:23 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:20 +0100 From: Marek Szyprowski Subject: [PATCH 01/14] common: dma-mapping: introduce alloc_attrs and free_attrs methods In-reply-to: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-2-git-send-email-m.szyprowski@samsung.com> MIME-version: 1.0 X-Mailer: git-send-email 1.7.7.3 Content-type: TEXT/PLAIN Content-transfer-encoding: 7BIT References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-archive-position: 32159 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18792 Content-Length: 1473 Lines: 36 Introduce new generic alloc and free methods with attributes argument. Existing alloc_coherent and free_coherent can be implemented on top of the new calls with NULL attributes argument. Later also dma_alloc_non_coherent can be implemented using DMA_ATTR_NONCOHERENT attribute as well as dma_alloc_writecombine with separate DMA_ATTR_WRITECOMBINE attribute. This way the drivers will get more generic, platform independent way of allocating dma buffers with specific parameters. Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park --- include/linux/dma-mapping.h | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h index e13117c..8cc7f95 100644 --- a/include/linux/dma-mapping.h +++ b/include/linux/dma-mapping.h @@ -13,6 +13,12 @@ struct dma_map_ops { dma_addr_t *dma_handle, gfp_t gfp); void (*free_coherent)(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle); + void* (*alloc)(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t gfp, + struct dma_attrs *attrs); + void (*free)(struct device *dev, size_t size, + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs); dma_addr_t (*map_page)(struct device *dev, struct page *page, unsigned long offset, size_t size, enum dma_data_direction dir, -- 1.7.1.569.g6f426 From m.szyprowski@samsung.com Fri Dec 23 13:28:07 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 13:29:11 +0100 (CET) Received: from mailout2.w1.samsung.com ([210.118.77.12]:53181 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903622Ab1LWM2H (ORCPT ); Fri, 23 Dec 2011 13:28:07 +0100 Received: from euspt1 (mailout2.w1.samsung.com [210.118.77.12]) by mailout2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTP id <0LWN007OFPANV1@mailout2.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:59 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN006Z2PAMCM@spt1.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:59 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id 9CB2E270056; Fri, 23 Dec 2011 13:39:23 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:24 +0100 From: Marek Szyprowski Subject: [PATCH 05/14] IA64: adapt for dma_map_ops changes In-reply-to: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-6-git-send-email-m.szyprowski@samsung.com> MIME-version: 1.0 X-Mailer: git-send-email 1.7.7.3 Content-type: TEXT/PLAIN Content-transfer-encoding: 7BIT References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-archive-position: 32160 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18793 Content-Length: 5962 Lines: 154 From: Andrzej Pietrasiewicz Adapt core IA64 architecture code for dma_map_ops changes: replace alloc/free_coherent with generic alloc/free methods. Signed-off-by: Andrzej Pietrasiewicz Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park --- arch/ia64/hp/common/sba_iommu.c | 11 ++++++----- arch/ia64/include/asm/dma-mapping.h | 18 ++++++++++++------ arch/ia64/kernel/pci-swiotlb.c | 9 +++++---- arch/ia64/sn/pci/pci_dma.c | 9 +++++---- 4 files changed, 28 insertions(+), 19 deletions(-) diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c index f5f4ef1..e5eb9c4 100644 --- a/arch/ia64/hp/common/sba_iommu.c +++ b/arch/ia64/hp/common/sba_iommu.c @@ -1130,7 +1130,8 @@ void sba_unmap_single_attrs(struct device *dev, dma_addr_t iova, size_t size, * See Documentation/DMA-API-HOWTO.txt */ static void * -sba_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flags) +sba_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, + gfp_t flags, struct dma_attrs *attrs) { struct ioc *ioc; void *addr; @@ -1192,8 +1193,8 @@ sba_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp * * See Documentation/DMA-API-HOWTO.txt */ -static void sba_free_coherent (struct device *dev, size_t size, void *vaddr, - dma_addr_t dma_handle) +static void sba_free_coherent(struct device *dev, size_t size, void *vaddr, + dma_addr_t dma_handle, struct dma_attrs *attrs) { sba_unmap_single_attrs(dev, dma_handle, size, 0, NULL); free_pages((unsigned long) vaddr, get_order(size)); @@ -2213,8 +2214,8 @@ sba_page_override(char *str) __setup("sbapagesize=",sba_page_override); struct dma_map_ops sba_dma_ops = { - .alloc_coherent = sba_alloc_coherent, - .free_coherent = sba_free_coherent, + .alloc = sba_alloc_coherent, + .free = sba_free_coherent, .map_page = sba_map_page, .unmap_page = sba_unmap_page, .map_sg = sba_map_sg_attrs, diff --git a/arch/ia64/include/asm/dma-mapping.h b/arch/ia64/include/asm/dma-mapping.h index 4336d08..4f5e814 100644 --- a/arch/ia64/include/asm/dma-mapping.h +++ b/arch/ia64/include/asm/dma-mapping.h @@ -23,23 +23,29 @@ extern void machvec_dma_sync_single(struct device *, dma_addr_t, size_t, extern void machvec_dma_sync_sg(struct device *, struct scatterlist *, int, enum dma_data_direction); -static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *daddr, gfp_t gfp) +#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) + +static inline void *dma_alloc_attrs(struct device *dev, size_t size, + dma_addr_t *daddr, gfp_t gfp, + struct dma_attrs *attrs) { struct dma_map_ops *ops = platform_dma_get_ops(dev); void *caddr; - caddr = ops->alloc_coherent(dev, size, daddr, gfp); + caddr = ops->alloc(dev, size, daddr, gfp, attrs); debug_dma_alloc_coherent(dev, size, *daddr, caddr); return caddr; } -static inline void dma_free_coherent(struct device *dev, size_t size, - void *caddr, dma_addr_t daddr) +#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) + +static inline void dma_free_attrs(struct device *dev, size_t size, + void *caddr, dma_addr_t daddr, + struct dma_attrs *attrs) { struct dma_map_ops *ops = platform_dma_get_ops(dev); debug_dma_free_coherent(dev, size, caddr, daddr); - ops->free_coherent(dev, size, caddr, daddr); + ops->free(dev, size, caddr, daddr, attrs); } #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) diff --git a/arch/ia64/kernel/pci-swiotlb.c b/arch/ia64/kernel/pci-swiotlb.c index d9485d9..cc034c2 100644 --- a/arch/ia64/kernel/pci-swiotlb.c +++ b/arch/ia64/kernel/pci-swiotlb.c @@ -15,16 +15,17 @@ int swiotlb __read_mostly; EXPORT_SYMBOL(swiotlb); static void *ia64_swiotlb_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t gfp) + dma_addr_t *dma_handle, gfp_t gfp, + struct dma_attrs *attrs) { if (dev->coherent_dma_mask != DMA_BIT_MASK(64)) gfp |= GFP_DMA; - return swiotlb_alloc_coherent(dev, size, dma_handle, gfp); + return swiotlb_alloc_coherent(dev, size, dma_handle, gfp, attrs); } struct dma_map_ops swiotlb_dma_ops = { - .alloc_coherent = ia64_swiotlb_alloc_coherent, - .free_coherent = swiotlb_free_coherent, + .alloc = ia64_swiotlb_alloc_coherent, + .free = swiotlb_free_coherent, .map_page = swiotlb_map_page, .unmap_page = swiotlb_unmap_page, .map_sg = swiotlb_map_sg_attrs, diff --git a/arch/ia64/sn/pci/pci_dma.c b/arch/ia64/sn/pci/pci_dma.c index a9d310d..3290d6e 100644 --- a/arch/ia64/sn/pci/pci_dma.c +++ b/arch/ia64/sn/pci/pci_dma.c @@ -76,7 +76,8 @@ EXPORT_SYMBOL(sn_dma_set_mask); * more information. */ static void *sn_dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t * dma_handle, gfp_t flags) + dma_addr_t * dma_handle, gfp_t flags, + struct dma_attrs *attrs) { void *cpuaddr; unsigned long phys_addr; @@ -137,7 +138,7 @@ static void *sn_dma_alloc_coherent(struct device *dev, size_t size, * any associated IOMMU mappings. */ static void sn_dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, - dma_addr_t dma_handle) + dma_addr_t dma_handle, struct dma_attrs *attrs) { struct pci_dev *pdev = to_pci_dev(dev); struct sn_pcibus_provider *provider = SN_PCIDEV_BUSPROVIDER(pdev); @@ -466,8 +467,8 @@ int sn_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size) } static struct dma_map_ops sn_dma_ops = { - .alloc_coherent = sn_dma_alloc_coherent, - .free_coherent = sn_dma_free_coherent, + .alloc = sn_dma_alloc_coherent, + .free = sn_dma_free_coherent, .map_page = sn_dma_map_page, .unmap_page = sn_dma_unmap_page, .map_sg = sn_dma_map_sg, -- 1.7.1.569.g6f426 From m.szyprowski@samsung.com Fri Dec 23 13:28:07 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 13:29:39 +0100 (CET) Received: from mailout1.w1.samsung.com ([210.118.77.11]:42885 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903627Ab1LWM2H (ORCPT ); Fri, 23 Dec 2011 13:28:07 +0100 Received: from euspt1 (mailout1.w1.samsung.com [210.118.77.11]) by mailout1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTP id <0LWN006EMPAMQK@mailout1.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:58 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN008DGPALPZ@spt1.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:58 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id 86063270054; Fri, 23 Dec 2011 13:39:23 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:22 +0100 From: Marek Szyprowski Subject: [PATCH 03/14] MIPS: adapt for dma_map_ops changes In-reply-to: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-4-git-send-email-m.szyprowski@samsung.com> MIME-version: 1.0 X-Mailer: git-send-email 1.7.7.3 Content-type: TEXT/PLAIN Content-transfer-encoding: 7BIT References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-archive-position: 32161 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18805 Content-Length: 3341 Lines: 91 From: Andrzej Pietrasiewicz Adapt core MIPS architecture code for dma_map_ops changes: replace alloc/free_coherent with generic alloc/free methods. Signed-off-by: Andrzej Pietrasiewicz Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park --- arch/mips/include/asm/dma-mapping.h | 18 ++++++++++++------ arch/mips/mm/dma-default.c | 8 ++++---- 2 files changed, 16 insertions(+), 10 deletions(-) diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h index 7aa37dd..cbd41f5 100644 --- a/arch/mips/include/asm/dma-mapping.h +++ b/arch/mips/include/asm/dma-mapping.h @@ -57,25 +57,31 @@ dma_set_mask(struct device *dev, u64 mask) extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction); -static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t gfp) +#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) + +static inline void *dma_alloc_attrs(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t gfp, + struct dma_attrs *attrs) { void *ret; struct dma_map_ops *ops = get_dma_ops(dev); - ret = ops->alloc_coherent(dev, size, dma_handle, gfp); + ret = ops->alloc(dev, size, dma_handle, gfp, NULL); debug_dma_alloc_coherent(dev, size, *dma_handle, ret); return ret; } -static inline void dma_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle) +#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) + +static inline void dma_free_attrs(struct device *dev, size_t size, + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { struct dma_map_ops *ops = get_dma_ops(dev); - ops->free_coherent(dev, size, vaddr, dma_handle); + ops->free(dev, size, vaddr, dma_handle, NULL); debug_dma_free_coherent(dev, size, vaddr, dma_handle); } diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index 4608491..3fab204 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c @@ -98,7 +98,7 @@ void *dma_alloc_noncoherent(struct device *dev, size_t size, EXPORT_SYMBOL(dma_alloc_noncoherent); static void *mips_dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t * dma_handle, gfp_t gfp) + dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs) { void *ret; @@ -132,7 +132,7 @@ void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, EXPORT_SYMBOL(dma_free_noncoherent); static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr, - dma_addr_t dma_handle) + dma_addr_t dma_handle, struct dma_attrs *attrs) { unsigned long addr = (unsigned long) vaddr; int order = get_order(size); @@ -323,8 +323,8 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size, EXPORT_SYMBOL(dma_cache_sync); static struct dma_map_ops mips_default_dma_map_ops = { - .alloc_coherent = mips_dma_alloc_coherent, - .free_coherent = mips_dma_free_coherent, + .alloc = mips_dma_alloc_coherent, + .free = mips_dma_free_coherent, .map_page = mips_dma_map_page, .unmap_page = mips_dma_unmap_page, .map_sg = mips_dma_map_sg, -- 1.7.1.569.g6f426 From m.szyprowski@samsung.com Fri Dec 23 13:28:07 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 13:30:09 +0100 (CET) Received: from mailout4.w1.samsung.com ([210.118.77.14]:65463 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903628Ab1LWM2H (ORCPT ); Fri, 23 Dec 2011 13:28:07 +0100 MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: TEXT/PLAIN Received: from euspt2 ([210.118.77.14]) by mailout4.w1.samsung.com (Sun Java(tm) System Messaging Server 6.3-8.04 (built Jul 29 2009; 32bit)) with ESMTP id <0LWN005JWPAMO240@mailout4.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:58 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN003H0PALM1@spt2.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:58 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id 7BDB9270053; Fri, 23 Dec 2011 13:39:23 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:21 +0100 From: Marek Szyprowski Subject: [PATCH 02/14] X86: adapt for dma_map_ops changes In-reply-to: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-3-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.7.7.3 References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-archive-position: 32162 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18811 Content-Length: 14493 Lines: 411 From: Andrzej Pietrasiewicz Adapt core X86 architecture code for dma_map_ops changes: replace alloc/free_coherent with generic alloc/free methods. Signed-off-by: Andrzej Pietrasiewicz Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park --- arch/x86/include/asm/dma-mapping.h | 26 ++++++++++++++++---------- arch/x86/kernel/amd_gart_64.c | 11 ++++++----- arch/x86/kernel/pci-calgary_64.c | 9 +++++---- arch/x86/kernel/pci-dma.c | 3 ++- arch/x86/kernel/pci-nommu.c | 6 +++--- arch/x86/kernel/pci-swiotlb.c | 12 +++++++----- arch/x86/xen/pci-swiotlb-xen.c | 4 ++-- drivers/iommu/amd_iommu.c | 10 ++++++---- drivers/iommu/intel-iommu.c | 9 +++++---- drivers/xen/swiotlb-xen.c | 5 +++-- include/linux/swiotlb.h | 6 ++++-- include/xen/swiotlb-xen.h | 6 ++++-- lib/swiotlb.c | 5 +++-- 13 files changed, 66 insertions(+), 46 deletions(-) diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h index ed3065f..4b4331d 100644 --- a/arch/x86/include/asm/dma-mapping.h +++ b/arch/x86/include/asm/dma-mapping.h @@ -59,7 +59,8 @@ extern int dma_supported(struct device *hwdev, u64 mask); extern int dma_set_mask(struct device *dev, u64 mask); extern void *dma_generic_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_addr, gfp_t flag); + dma_addr_t *dma_addr, gfp_t flag, + struct dma_attrs *attrs); static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) { @@ -111,9 +112,11 @@ static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp) return gfp; } +#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) + static inline void * -dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, - gfp_t gfp) +dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, + gfp_t gfp, struct dma_attrs *attrs) { struct dma_map_ops *ops = get_dma_ops(dev); void *memory; @@ -129,18 +132,21 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, if (!is_device_dma_capable(dev)) return NULL; - if (!ops->alloc_coherent) + if (!ops->alloc) return NULL; - memory = ops->alloc_coherent(dev, size, dma_handle, - dma_alloc_coherent_gfp_flags(dev, gfp)); + memory = ops->alloc(dev, size, dma_handle, + dma_alloc_coherent_gfp_flags(dev, gfp), attrs); debug_dma_alloc_coherent(dev, size, *dma_handle, memory); return memory; } -static inline void dma_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t bus) +#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) + +static inline void dma_free_attrs(struct device *dev, size_t size, + void *vaddr, dma_addr_t bus, + struct dma_attrs *attrs) { struct dma_map_ops *ops = get_dma_ops(dev); @@ -150,8 +156,8 @@ static inline void dma_free_coherent(struct device *dev, size_t size, return; debug_dma_free_coherent(dev, size, vaddr, bus); - if (ops->free_coherent) - ops->free_coherent(dev, size, vaddr, bus); + if (ops->free) + ops->free(dev, size, vaddr, bus, attrs); } #endif diff --git a/arch/x86/kernel/amd_gart_64.c b/arch/x86/kernel/amd_gart_64.c index b1e7c7f..e663112 100644 --- a/arch/x86/kernel/amd_gart_64.c +++ b/arch/x86/kernel/amd_gart_64.c @@ -477,7 +477,7 @@ error: /* allocate and map a coherent mapping */ static void * gart_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_addr, - gfp_t flag) + gfp_t flag, struct dma_attrs *attrs) { dma_addr_t paddr; unsigned long align_mask; @@ -500,7 +500,8 @@ gart_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_addr, } __free_pages(page, get_order(size)); } else - return dma_generic_alloc_coherent(dev, size, dma_addr, flag); + return dma_generic_alloc_coherent(dev, size, dma_addr, flag, + attrs); return NULL; } @@ -508,7 +509,7 @@ gart_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_addr, /* free a coherent mapping */ static void gart_free_coherent(struct device *dev, size_t size, void *vaddr, - dma_addr_t dma_addr) + dma_addr_t dma_addr, struct dma_attrs *attrs) { gart_unmap_page(dev, dma_addr, size, DMA_BIDIRECTIONAL, NULL); free_pages((unsigned long)vaddr, get_order(size)); @@ -700,8 +701,8 @@ static struct dma_map_ops gart_dma_ops = { .unmap_sg = gart_unmap_sg, .map_page = gart_map_page, .unmap_page = gart_unmap_page, - .alloc_coherent = gart_alloc_coherent, - .free_coherent = gart_free_coherent, + .alloc = gart_alloc_coherent, + .free = gart_free_coherent, .mapping_error = gart_mapping_error, }; diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c index 726494b..07b587c 100644 --- a/arch/x86/kernel/pci-calgary_64.c +++ b/arch/x86/kernel/pci-calgary_64.c @@ -431,7 +431,7 @@ static void calgary_unmap_page(struct device *dev, dma_addr_t dma_addr, } static void* calgary_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag) + dma_addr_t *dma_handle, gfp_t flag, struct dma_attrs *attrs) { void *ret = NULL; dma_addr_t mapping; @@ -464,7 +464,8 @@ error: } static void calgary_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle) + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { unsigned int npages; struct iommu_table *tbl = find_iommu_table(dev); @@ -477,8 +478,8 @@ static void calgary_free_coherent(struct device *dev, size_t size, } static struct dma_map_ops calgary_dma_ops = { - .alloc_coherent = calgary_alloc_coherent, - .free_coherent = calgary_free_coherent, + .alloc = calgary_alloc_coherent, + .free = calgary_free_coherent, .map_sg = calgary_map_sg, .unmap_sg = calgary_unmap_sg, .map_page = calgary_map_page, diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c index 80dc793..b8b9e47 100644 --- a/arch/x86/kernel/pci-dma.c +++ b/arch/x86/kernel/pci-dma.c @@ -87,7 +87,8 @@ void __init pci_iommu_alloc(void) } } void *dma_generic_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_addr, gfp_t flag) + dma_addr_t *dma_addr, gfp_t flag, + struct dma_attrs *attrs) { unsigned long dma_mask; struct page *page; diff --git a/arch/x86/kernel/pci-nommu.c b/arch/x86/kernel/pci-nommu.c index 3af4af8..f960506 100644 --- a/arch/x86/kernel/pci-nommu.c +++ b/arch/x86/kernel/pci-nommu.c @@ -75,7 +75,7 @@ static int nommu_map_sg(struct device *hwdev, struct scatterlist *sg, } static void nommu_free_coherent(struct device *dev, size_t size, void *vaddr, - dma_addr_t dma_addr) + dma_addr_t dma_addr, struct dma_attrs *attrs) { free_pages((unsigned long)vaddr, get_order(size)); } @@ -96,8 +96,8 @@ static void nommu_sync_sg_for_device(struct device *dev, } struct dma_map_ops nommu_dma_ops = { - .alloc_coherent = dma_generic_alloc_coherent, - .free_coherent = nommu_free_coherent, + .alloc = dma_generic_alloc_coherent, + .free = nommu_free_coherent, .map_sg = nommu_map_sg, .map_page = nommu_map_page, .sync_single_for_device = nommu_sync_single_for_device, diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c index 8f972cb..fa462a3 100644 --- a/arch/x86/kernel/pci-swiotlb.c +++ b/arch/x86/kernel/pci-swiotlb.c @@ -15,21 +15,23 @@ int swiotlb __read_mostly; static void *x86_swiotlb_alloc_coherent(struct device *hwdev, size_t size, - dma_addr_t *dma_handle, gfp_t flags) + dma_addr_t *dma_handle, gfp_t flags, + struct dma_attrs *attrs) { void *vaddr; - vaddr = dma_generic_alloc_coherent(hwdev, size, dma_handle, flags); + vaddr = dma_generic_alloc_coherent(hwdev, size, dma_handle, flags, + attrs); if (vaddr) return vaddr; - return swiotlb_alloc_coherent(hwdev, size, dma_handle, flags); + return swiotlb_alloc_coherent(hwdev, size, dma_handle, flags, attrs); } static struct dma_map_ops swiotlb_dma_ops = { .mapping_error = swiotlb_dma_mapping_error, - .alloc_coherent = x86_swiotlb_alloc_coherent, - .free_coherent = swiotlb_free_coherent, + .alloc = x86_swiotlb_alloc_coherent, + .free = swiotlb_free_coherent, .sync_single_for_cpu = swiotlb_sync_single_for_cpu, .sync_single_for_device = swiotlb_sync_single_for_device, .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, diff --git a/arch/x86/xen/pci-swiotlb-xen.c b/arch/x86/xen/pci-swiotlb-xen.c index b480d42..967633a 100644 --- a/arch/x86/xen/pci-swiotlb-xen.c +++ b/arch/x86/xen/pci-swiotlb-xen.c @@ -12,8 +12,8 @@ int xen_swiotlb __read_mostly; static struct dma_map_ops xen_swiotlb_dma_ops = { .mapping_error = xen_swiotlb_dma_mapping_error, - .alloc_coherent = xen_swiotlb_alloc_coherent, - .free_coherent = xen_swiotlb_free_coherent, + .alloc = xen_swiotlb_alloc_coherent, + .free = xen_swiotlb_free_coherent, .sync_single_for_cpu = xen_swiotlb_sync_single_for_cpu, .sync_single_for_device = xen_swiotlb_sync_single_for_device, .sync_sg_for_cpu = xen_swiotlb_sync_sg_for_cpu, diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index 4ee277a..fc36f1e 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c @@ -2335,7 +2335,8 @@ static void unmap_sg(struct device *dev, struct scatterlist *sglist, * The exported alloc_coherent function for dma_ops. */ static void *alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_addr, gfp_t flag) + dma_addr_t *dma_addr, gfp_t flag, + struct dma_attrs *attrs) { unsigned long flags; void *virt_addr; @@ -2393,7 +2394,8 @@ out_free: * The exported free_coherent function for dma_ops. */ static void free_coherent(struct device *dev, size_t size, - void *virt_addr, dma_addr_t dma_addr) + void *virt_addr, dma_addr_t dma_addr, + struct dma_attrs *attrs) { unsigned long flags; struct protection_domain *domain; @@ -2463,8 +2465,8 @@ static void prealloc_protection_domains(void) } static struct dma_map_ops amd_iommu_dma_ops = { - .alloc_coherent = alloc_coherent, - .free_coherent = free_coherent, + .alloc = alloc_coherent, + .free = free_coherent, .map_page = map_page, .unmap_page = unmap_page, .map_sg = map_sg, diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index bdc447f..22982184 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -2925,7 +2925,8 @@ static void intel_unmap_page(struct device *dev, dma_addr_t dev_addr, } static void *intel_alloc_coherent(struct device *hwdev, size_t size, - dma_addr_t *dma_handle, gfp_t flags) + dma_addr_t *dma_handle, gfp_t flags, + struct dma_attrs *attrs) { void *vaddr; int order; @@ -2957,7 +2958,7 @@ static void *intel_alloc_coherent(struct device *hwdev, size_t size, } static void intel_free_coherent(struct device *hwdev, size_t size, void *vaddr, - dma_addr_t dma_handle) + dma_addr_t dma_handle, struct dma_attrs *attrs) { int order; @@ -3102,8 +3103,8 @@ static int intel_mapping_error(struct device *dev, dma_addr_t dma_addr) } struct dma_map_ops intel_dma_ops = { - .alloc_coherent = intel_alloc_coherent, - .free_coherent = intel_free_coherent, + .alloc = intel_alloc_coherent, + .free = intel_free_coherent, .map_sg = intel_map_sg, .unmap_sg = intel_unmap_sg, .map_page = intel_map_page, diff --git a/drivers/xen/swiotlb-xen.c b/drivers/xen/swiotlb-xen.c index 284798a..6c67ed4 100644 --- a/drivers/xen/swiotlb-xen.c +++ b/drivers/xen/swiotlb-xen.c @@ -204,7 +204,8 @@ error: void * xen_swiotlb_alloc_coherent(struct device *hwdev, size_t size, - dma_addr_t *dma_handle, gfp_t flags) + dma_addr_t *dma_handle, gfp_t flags, + struct dma_attrs *attrs) { void *ret; int order = get_order(size); @@ -253,7 +254,7 @@ EXPORT_SYMBOL_GPL(xen_swiotlb_alloc_coherent); void xen_swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, - dma_addr_t dev_addr) + dma_addr_t dev_addr, struct dma_attrs *attrs) { int order = get_order(size); phys_addr_t phys; diff --git a/include/linux/swiotlb.h b/include/linux/swiotlb.h index 445702c..769f8bc 100644 --- a/include/linux/swiotlb.h +++ b/include/linux/swiotlb.h @@ -50,11 +50,13 @@ extern void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size, extern void *swiotlb_alloc_coherent(struct device *hwdev, size_t size, - dma_addr_t *dma_handle, gfp_t flags); + dma_addr_t *dma_handle, gfp_t flags, + struct dma_attrs *attrs); extern void swiotlb_free_coherent(struct device *hwdev, size_t size, - void *vaddr, dma_addr_t dma_handle); + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs); extern dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, unsigned long offset, size_t size, diff --git a/include/xen/swiotlb-xen.h b/include/xen/swiotlb-xen.h index 2ea2fdc..4f4d449 100644 --- a/include/xen/swiotlb-xen.h +++ b/include/xen/swiotlb-xen.h @@ -7,11 +7,13 @@ extern void xen_swiotlb_init(int verbose); extern void *xen_swiotlb_alloc_coherent(struct device *hwdev, size_t size, - dma_addr_t *dma_handle, gfp_t flags); + dma_addr_t *dma_handle, gfp_t flags, + struct dma_attrs *attrs); extern void xen_swiotlb_free_coherent(struct device *hwdev, size_t size, - void *vaddr, dma_addr_t dma_handle); + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs); extern dma_addr_t xen_swiotlb_map_page(struct device *dev, struct page *page, unsigned long offset, size_t size, diff --git a/lib/swiotlb.c b/lib/swiotlb.c index 99093b3..10a4f68 100644 --- a/lib/swiotlb.c +++ b/lib/swiotlb.c @@ -565,7 +565,8 @@ EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single); void * swiotlb_alloc_coherent(struct device *hwdev, size_t size, - dma_addr_t *dma_handle, gfp_t flags) + dma_addr_t *dma_handle, gfp_t flags, + struct dma_attrs *attrs) { dma_addr_t dev_addr; void *ret; @@ -614,7 +615,7 @@ EXPORT_SYMBOL(swiotlb_alloc_coherent); void swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, - dma_addr_t dev_addr) + dma_addr_t dev_addr, struct dma_attrs *attrs) { phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); -- 1.7.1.569.g6f426 From m.szyprowski@samsung.com Fri Dec 23 13:28:07 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 13:30:39 +0100 (CET) Received: from mailout2.w1.samsung.com ([210.118.77.12]:53181 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903629Ab1LWM2H (ORCPT ); Fri, 23 Dec 2011 13:28:07 +0100 Received: from euspt1 (mailout2.w1.samsung.com [210.118.77.12]) by mailout2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTP id <0LWN007OFPANV1@mailout2.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:28:00 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN008E1PAMPZ@spt1.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:59 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id B14BB270058; Fri, 23 Dec 2011 13:39:23 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:26 +0100 From: Marek Szyprowski Subject: [PATCH 07/14] Alpha: adapt for dma_map_ops changes In-reply-to: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-8-git-send-email-m.szyprowski@samsung.com> MIME-version: 1.0 X-Mailer: git-send-email 1.7.7.3 Content-type: TEXT/PLAIN Content-transfer-encoding: 7BIT References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-archive-position: 32163 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18818 Content-Length: 4592 Lines: 120 From: Andrzej Pietrasiewicz Adapt core Alpha architecture code for dma_map_ops changes: replace alloc/free_coherent with generic alloc/free methods. Signed-off-by: Andrzej Pietrasiewicz Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park --- arch/alpha/include/asm/dma-mapping.h | 18 ++++++++++++------ arch/alpha/kernel/pci-noop.c | 10 ++++++---- arch/alpha/kernel/pci_iommu.c | 10 ++++++---- 3 files changed, 24 insertions(+), 14 deletions(-) diff --git a/arch/alpha/include/asm/dma-mapping.h b/arch/alpha/include/asm/dma-mapping.h index 4567aca..dfa32f0 100644 --- a/arch/alpha/include/asm/dma-mapping.h +++ b/arch/alpha/include/asm/dma-mapping.h @@ -12,16 +12,22 @@ static inline struct dma_map_ops *get_dma_ops(struct device *dev) #include -static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t gfp) +#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) + +static inline void *dma_alloc_attrs(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t gfp, + struct dma_attrs *attrs) { - return get_dma_ops(dev)->alloc_coherent(dev, size, dma_handle, gfp); + return get_dma_ops(dev)->alloc(dev, size, dma_handle, gfp, attrs); } -static inline void dma_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle) +#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) + +static inline void dma_free_attrs(struct device *dev, size_t size, + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { - get_dma_ops(dev)->free_coherent(dev, size, vaddr, dma_handle); + get_dma_ops(dev)->free(dev, size, vaddr, dma_handle, attrs); } static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) diff --git a/arch/alpha/kernel/pci-noop.c b/arch/alpha/kernel/pci-noop.c index 246100e..c337fb8 100644 --- a/arch/alpha/kernel/pci-noop.c +++ b/arch/alpha/kernel/pci-noop.c @@ -108,7 +108,8 @@ sys_pciconfig_write(unsigned long bus, unsigned long dfn, } static void *alpha_noop_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t gfp) + dma_addr_t *dma_handle, gfp_t gfp, + struct dma_attrs *attrs) { void *ret; @@ -123,7 +124,8 @@ static void *alpha_noop_alloc_coherent(struct device *dev, size_t size, } static void alpha_noop_free_coherent(struct device *dev, size_t size, - void *cpu_addr, dma_addr_t dma_addr) + void *cpu_addr, dma_addr_t dma_addr, + struct dma_attrs *attrs) { free_pages((unsigned long)cpu_addr, get_order(size)); } @@ -174,8 +176,8 @@ static int alpha_noop_set_mask(struct device *dev, u64 mask) } struct dma_map_ops alpha_noop_ops = { - .alloc_coherent = alpha_noop_alloc_coherent, - .free_coherent = alpha_noop_free_coherent, + .alloc = alpha_noop_alloc_coherent, + .free = alpha_noop_free_coherent, .map_page = alpha_noop_map_page, .map_sg = alpha_noop_map_sg, .mapping_error = alpha_noop_mapping_error, diff --git a/arch/alpha/kernel/pci_iommu.c b/arch/alpha/kernel/pci_iommu.c index 4361080..cd63479 100644 --- a/arch/alpha/kernel/pci_iommu.c +++ b/arch/alpha/kernel/pci_iommu.c @@ -434,7 +434,8 @@ static void alpha_pci_unmap_page(struct device *dev, dma_addr_t dma_addr, else DMA_ADDRP is undefined. */ static void *alpha_pci_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_addrp, gfp_t gfp) + dma_addr_t *dma_addrp, gfp_t gfp, + struct dma_attrs *attrs) { struct pci_dev *pdev = alpha_gendev_to_pci(dev); void *cpu_addr; @@ -478,7 +479,8 @@ try_again: DMA_ADDR past this call are illegal. */ static void alpha_pci_free_coherent(struct device *dev, size_t size, - void *cpu_addr, dma_addr_t dma_addr) + void *cpu_addr, dma_addr_t dma_addr, + struct dma_attrs *attrs) { struct pci_dev *pdev = alpha_gendev_to_pci(dev); pci_unmap_single(pdev, dma_addr, size, PCI_DMA_BIDIRECTIONAL); @@ -952,8 +954,8 @@ static int alpha_pci_set_mask(struct device *dev, u64 mask) } struct dma_map_ops alpha_pci_ops = { - .alloc_coherent = alpha_pci_alloc_coherent, - .free_coherent = alpha_pci_free_coherent, + .alloc = alpha_pci_alloc_coherent, + .free = alpha_pci_free_coherent, .map_page = alpha_pci_map_page, .unmap_page = alpha_pci_unmap_page, .map_sg = alpha_pci_map_sg, -- 1.7.1.569.g6f426 From m.szyprowski@samsung.com Fri Dec 23 13:28:08 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 13:31:02 +0100 (CET) Received: from mailout1.w1.samsung.com ([210.118.77.11]:42885 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903630Ab1LWM2I (ORCPT ); Fri, 23 Dec 2011 13:28:08 +0100 Received: from euspt2 (mailout1.w1.samsung.com [210.118.77.11]) by mailout1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTP id <0LWN007I9PAN06@mailout1.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:59 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN003I1PAMM1@spt2.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:59 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id C4D3C27005A; Fri, 23 Dec 2011 13:39:23 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:28 +0100 From: Marek Szyprowski Subject: [PATCH 09/14] Microblaze: adapt for dma_map_ops changes In-reply-to: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-10-git-send-email-m.szyprowski@samsung.com> MIME-version: 1.0 X-Mailer: git-send-email 1.7.7.3 Content-type: TEXT/PLAIN Content-transfer-encoding: 7BIT References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-archive-position: 32164 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18824 Content-Length: 3627 Lines: 96 From: Andrzej Pietrasiewicz Adapt core Microblaze architecture code for dma_map_ops changes: replace alloc/free_coherent with generic alloc/free methods. Signed-off-by: Andrzej Pietrasiewicz Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park --- arch/microblaze/include/asm/dma-mapping.h | 18 ++++++++++++------ arch/microblaze/kernel/dma.c | 10 ++++++---- 2 files changed, 18 insertions(+), 10 deletions(-) diff --git a/arch/microblaze/include/asm/dma-mapping.h b/arch/microblaze/include/asm/dma-mapping.h index 3a3e5b8..0ee58d2 100644 --- a/arch/microblaze/include/asm/dma-mapping.h +++ b/arch/microblaze/include/asm/dma-mapping.h @@ -123,28 +123,34 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag) +#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) + +static inline void *dma_alloc_attrs(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag, + struct dma_attrs *attrs) { struct dma_map_ops *ops = get_dma_ops(dev); void *memory; BUG_ON(!ops); - memory = ops->alloc_coherent(dev, size, dma_handle, flag); + memory = ops->alloc(dev, size, dma_handle, flag, attrs); debug_dma_alloc_coherent(dev, size, *dma_handle, memory); return memory; } -static inline void dma_free_coherent(struct device *dev, size_t size, - void *cpu_addr, dma_addr_t dma_handle) +#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) + +static inline void dma_free_attrs(struct device *dev, size_t size, + void *cpu_addr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { struct dma_map_ops *ops = get_dma_ops(dev); BUG_ON(!ops); debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); - ops->free_coherent(dev, size, cpu_addr, dma_handle); + ops->free(dev, size, cpu_addr, dma_handle, attrs); } static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, diff --git a/arch/microblaze/kernel/dma.c b/arch/microblaze/kernel/dma.c index 65a4af4..a2bfa2c 100644 --- a/arch/microblaze/kernel/dma.c +++ b/arch/microblaze/kernel/dma.c @@ -33,7 +33,8 @@ static unsigned long get_dma_direct_offset(struct device *dev) #define NOT_COHERENT_CACHE static void *dma_direct_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag) + dma_addr_t *dma_handle, gfp_t flag, + struct dma_attrs *attrs) { #ifdef NOT_COHERENT_CACHE return consistent_alloc(flag, size, dma_handle); @@ -57,7 +58,8 @@ static void *dma_direct_alloc_coherent(struct device *dev, size_t size, } static void dma_direct_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle) + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { #ifdef NOT_COHERENT_CACHE consistent_free(size, vaddr); @@ -176,8 +178,8 @@ dma_direct_sync_sg_for_device(struct device *dev, } struct dma_map_ops dma_direct_ops = { - .alloc_coherent = dma_direct_alloc_coherent, - .free_coherent = dma_direct_free_coherent, + .alloc = dma_direct_alloc_coherent, + .free = dma_direct_free_coherent, .map_sg = dma_direct_map_sg, .unmap_sg = dma_direct_unmap_sg, .dma_supported = dma_direct_dma_supported, -- 1.7.1.569.g6f426 From m.szyprowski@samsung.com Fri Dec 23 13:28:08 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 13:31:26 +0100 (CET) Received: from mailout4.w1.samsung.com ([210.118.77.14]:65463 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903631Ab1LWM2I (ORCPT ); Fri, 23 Dec 2011 13:28:08 +0100 MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: TEXT/PLAIN Received: from euspt2 ([210.118.77.14]) by mailout4.w1.samsung.com (Sun Java(tm) System Messaging Server 6.3-8.04 (built Jul 29 2009; 32bit)) with ESMTP id <0LWN005JWPAMO240@mailout4.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:58 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN009AHPAL85@spt2.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:58 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id 90459270055; Fri, 23 Dec 2011 13:39:23 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:23 +0100 From: Marek Szyprowski Subject: [PATCH 04/14] PowerPC: adapt for dma_map_ops changes In-reply-to: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-5-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.7.7.3 References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-archive-position: 32165 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18829 Content-Length: 11112 Lines: 297 From: Andrzej Pietrasiewicz Adapt core PowerPC architecture code for dma_map_ops changes: replace alloc/free_coherent with generic alloc/free methods. Signed-off-by: Andrzej Pietrasiewicz Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park --- arch/powerpc/include/asm/dma-mapping.h | 24 ++++++++++++++++-------- arch/powerpc/kernel/dma-iommu.c | 10 ++++++---- arch/powerpc/kernel/dma-swiotlb.c | 4 ++-- arch/powerpc/kernel/dma.c | 10 ++++++---- arch/powerpc/kernel/ibmebus.c | 10 ++++++---- arch/powerpc/platforms/cell/iommu.c | 16 +++++++++------- arch/powerpc/platforms/ps3/system-bus.c | 13 +++++++------ 7 files changed, 52 insertions(+), 35 deletions(-) diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h index dd70fac..62678e3 100644 --- a/arch/powerpc/include/asm/dma-mapping.h +++ b/arch/powerpc/include/asm/dma-mapping.h @@ -22,9 +22,11 @@ /* Some dma direct funcs must be visible for use in other dma_ops */ extern void *dma_direct_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag); + dma_addr_t *dma_handle, gfp_t flag, + struct dma_attrs *attrs); extern void dma_direct_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle); + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs); #ifdef CONFIG_NOT_COHERENT_CACHE @@ -130,23 +132,29 @@ static inline int dma_supported(struct device *dev, u64 mask) extern int dma_set_mask(struct device *dev, u64 dma_mask); -static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag) +#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) + +static inline void *dma_alloc_attrs(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag, + struct dma_attrs *attrs) { struct dma_map_ops *dma_ops = get_dma_ops(dev); void *cpu_addr; BUG_ON(!dma_ops); - cpu_addr = dma_ops->alloc_coherent(dev, size, dma_handle, flag); + cpu_addr = dma_ops->alloc(dev, size, dma_handle, flag, attrs); debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); return cpu_addr; } -static inline void dma_free_coherent(struct device *dev, size_t size, - void *cpu_addr, dma_addr_t dma_handle) +#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) + +static inline void dma_free_attrs(struct device *dev, size_t size, + void *cpu_addr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { struct dma_map_ops *dma_ops = get_dma_ops(dev); @@ -154,7 +162,7 @@ static inline void dma_free_coherent(struct device *dev, size_t size, debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); - dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); + dma_ops->free(dev, size, cpu_addr, dma_handle, attrs); } static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c index 3f6464b..bcfdcd2 100644 --- a/arch/powerpc/kernel/dma-iommu.c +++ b/arch/powerpc/kernel/dma-iommu.c @@ -17,7 +17,8 @@ * to the dma address (mapping) of the first page. */ static void *dma_iommu_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag) + dma_addr_t *dma_handle, gfp_t flag, + struct dma_attrs *attrs) { return iommu_alloc_coherent(dev, get_iommu_table_base(dev), size, dma_handle, dev->coherent_dma_mask, flag, @@ -25,7 +26,8 @@ static void *dma_iommu_alloc_coherent(struct device *dev, size_t size, } static void dma_iommu_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle) + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { iommu_free_coherent(get_iommu_table_base(dev), size, vaddr, dma_handle); } @@ -105,8 +107,8 @@ static u64 dma_iommu_get_required_mask(struct device *dev) } struct dma_map_ops dma_iommu_ops = { - .alloc_coherent = dma_iommu_alloc_coherent, - .free_coherent = dma_iommu_free_coherent, + .alloc = dma_iommu_alloc_coherent, + .free = dma_iommu_free_coherent, .map_sg = dma_iommu_map_sg, .unmap_sg = dma_iommu_unmap_sg, .dma_supported = dma_iommu_dma_supported, diff --git a/arch/powerpc/kernel/dma-swiotlb.c b/arch/powerpc/kernel/dma-swiotlb.c index 1ebc918..4ab88da 100644 --- a/arch/powerpc/kernel/dma-swiotlb.c +++ b/arch/powerpc/kernel/dma-swiotlb.c @@ -47,8 +47,8 @@ static u64 swiotlb_powerpc_get_required(struct device *dev) * for everything else. */ struct dma_map_ops swiotlb_dma_ops = { - .alloc_coherent = dma_direct_alloc_coherent, - .free_coherent = dma_direct_free_coherent, + .alloc = dma_direct_alloc_coherent, + .free = dma_direct_free_coherent, .map_sg = swiotlb_map_sg_attrs, .unmap_sg = swiotlb_unmap_sg_attrs, .dma_supported = swiotlb_dma_supported, diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c index 7d0233c..b1ec983 100644 --- a/arch/powerpc/kernel/dma.c +++ b/arch/powerpc/kernel/dma.c @@ -26,7 +26,8 @@ void *dma_direct_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag) + dma_addr_t *dma_handle, gfp_t flag, + struct dma_attrs *attrs) { void *ret; #ifdef CONFIG_NOT_COHERENT_CACHE @@ -54,7 +55,8 @@ void *dma_direct_alloc_coherent(struct device *dev, size_t size, } void dma_direct_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle) + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { #ifdef CONFIG_NOT_COHERENT_CACHE __dma_free_coherent(size, vaddr); @@ -150,8 +152,8 @@ static inline void dma_direct_sync_single(struct device *dev, #endif struct dma_map_ops dma_direct_ops = { - .alloc_coherent = dma_direct_alloc_coherent, - .free_coherent = dma_direct_free_coherent, + .alloc = dma_direct_alloc_coherent, + .free = dma_direct_free_coherent, .map_sg = dma_direct_map_sg, .unmap_sg = dma_direct_unmap_sg, .dma_supported = dma_direct_dma_supported, diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c index d39ae60..716d918 100644 --- a/arch/powerpc/kernel/ibmebus.c +++ b/arch/powerpc/kernel/ibmebus.c @@ -65,7 +65,8 @@ static struct of_device_id __initdata ibmebus_matches[] = { static void *ibmebus_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, - gfp_t flag) + gfp_t flag, + struct dma_attrs *attrs) { void *mem; @@ -77,7 +78,8 @@ static void *ibmebus_alloc_coherent(struct device *dev, static void ibmebus_free_coherent(struct device *dev, size_t size, void *vaddr, - dma_addr_t dma_handle) + dma_addr_t dma_handle, + struct dma_attrs *attrs) { kfree(vaddr); } @@ -136,8 +138,8 @@ static u64 ibmebus_dma_get_required_mask(struct device *dev) } static struct dma_map_ops ibmebus_dma_ops = { - .alloc_coherent = ibmebus_alloc_coherent, - .free_coherent = ibmebus_free_coherent, + .alloc = ibmebus_alloc_coherent, + .free = ibmebus_free_coherent, .map_sg = ibmebus_map_sg, .unmap_sg = ibmebus_unmap_sg, .dma_supported = ibmebus_dma_supported, diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c index 592c3d5..471c955 100644 --- a/arch/powerpc/platforms/cell/iommu.c +++ b/arch/powerpc/platforms/cell/iommu.c @@ -564,7 +564,8 @@ static struct iommu_table *cell_get_iommu_table(struct device *dev) /* A coherent allocation implies strong ordering */ static void *dma_fixed_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag) + dma_addr_t *dma_handle, gfp_t flag, + struct dma_attrs *attrs) { if (iommu_fixed_is_weak) return iommu_alloc_coherent(dev, cell_get_iommu_table(dev), @@ -572,18 +573,19 @@ static void *dma_fixed_alloc_coherent(struct device *dev, size_t size, device_to_mask(dev), flag, dev_to_node(dev)); else - return dma_direct_ops.alloc_coherent(dev, size, dma_handle, - flag); + return dma_direct_ops.alloc(dev, size, dma_handle, flag, + attrs); } static void dma_fixed_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle) + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { if (iommu_fixed_is_weak) iommu_free_coherent(cell_get_iommu_table(dev), size, vaddr, dma_handle); else - dma_direct_ops.free_coherent(dev, size, vaddr, dma_handle); + dma_direct_ops.free(dev, size, vaddr, dma_handle, attrs); } static dma_addr_t dma_fixed_map_page(struct device *dev, struct page *page, @@ -642,8 +644,8 @@ static int dma_fixed_dma_supported(struct device *dev, u64 mask) static int dma_set_mask_and_switch(struct device *dev, u64 dma_mask); struct dma_map_ops dma_iommu_fixed_ops = { - .alloc_coherent = dma_fixed_alloc_coherent, - .free_coherent = dma_fixed_free_coherent, + .alloc = dma_fixed_alloc_coherent, + .free = dma_fixed_free_coherent, .map_sg = dma_fixed_map_sg, .unmap_sg = dma_fixed_unmap_sg, .dma_supported = dma_fixed_dma_supported, diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c index 880eb9c..5606fe3 100644 --- a/arch/powerpc/platforms/ps3/system-bus.c +++ b/arch/powerpc/platforms/ps3/system-bus.c @@ -515,7 +515,8 @@ core_initcall(ps3_system_bus_init); * to the dma address (mapping) of the first page. */ static void * ps3_alloc_coherent(struct device *_dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag) + dma_addr_t *dma_handle, gfp_t flag, + struct dma_attrs *attrs) { int result; struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev); @@ -552,7 +553,7 @@ clean_none: } static void ps3_free_coherent(struct device *_dev, size_t size, void *vaddr, - dma_addr_t dma_handle) + dma_addr_t dma_handle, struct dma_attrs *attrs) { struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev); @@ -701,8 +702,8 @@ static u64 ps3_dma_get_required_mask(struct device *_dev) } static struct dma_map_ops ps3_sb_dma_ops = { - .alloc_coherent = ps3_alloc_coherent, - .free_coherent = ps3_free_coherent, + .alloc = ps3_alloc_coherent, + .free = ps3_free_coherent, .map_sg = ps3_sb_map_sg, .unmap_sg = ps3_sb_unmap_sg, .dma_supported = ps3_dma_supported, @@ -712,8 +713,8 @@ static struct dma_map_ops ps3_sb_dma_ops = { }; static struct dma_map_ops ps3_ioc0_dma_ops = { - .alloc_coherent = ps3_alloc_coherent, - .free_coherent = ps3_free_coherent, + .alloc = ps3_alloc_coherent, + .free = ps3_free_coherent, .map_sg = ps3_ioc0_map_sg, .unmap_sg = ps3_ioc0_unmap_sg, .dma_supported = ps3_dma_supported, -- 1.7.1.569.g6f426 From m.szyprowski@samsung.com Fri Dec 23 13:28:08 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 13:31:50 +0100 (CET) Received: from mailout2.w1.samsung.com ([210.118.77.12]:53181 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903650Ab1LWM2I (ORCPT ); Fri, 23 Dec 2011 13:28:08 +0100 Received: from euspt1 (mailout2.w1.samsung.com [210.118.77.12]) by mailout2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTP id <0LWN007OFPANV1@mailout2.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:28:00 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN006Z3PAMCM@spt1.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:59 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id BB2EF270059; Fri, 23 Dec 2011 13:39:23 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:27 +0100 From: Marek Szyprowski Subject: [PATCH 08/14] SH: adapt for dma_map_ops changes In-reply-to: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-9-git-send-email-m.szyprowski@samsung.com> MIME-version: 1.0 X-Mailer: git-send-email 1.7.7.3 Content-type: TEXT/PLAIN Content-transfer-encoding: 7BIT References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-archive-position: 32166 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18831 Content-Length: 4221 Lines: 119 From: Andrzej Pietrasiewicz Adapt core SH architecture code for dma_map_ops changes: replace alloc/free_coherent with generic alloc/free methods. Signed-off-by: Andrzej Pietrasiewicz Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park --- arch/sh/include/asm/dma-mapping.h | 28 ++++++++++++++++++---------- arch/sh/kernel/dma-nommu.c | 4 ++-- arch/sh/mm/consistent.c | 6 ++++-- 3 files changed, 24 insertions(+), 14 deletions(-) diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h index 1a73c3e..8bd965e 100644 --- a/arch/sh/include/asm/dma-mapping.h +++ b/arch/sh/include/asm/dma-mapping.h @@ -52,25 +52,31 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) return dma_addr == 0; } -static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t gfp) +#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) + +static inline void *dma_alloc_attrs(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t gfp, + struct dma_attrs *attrs) { struct dma_map_ops *ops = get_dma_ops(dev); void *memory; if (dma_alloc_from_coherent(dev, size, dma_handle, &memory)) return memory; - if (!ops->alloc_coherent) + if (!ops->alloc) return NULL; - memory = ops->alloc_coherent(dev, size, dma_handle, gfp); + memory = ops->alloc(dev, size, dma_handle, gfp, attrs); debug_dma_alloc_coherent(dev, size, *dma_handle, memory); return memory; } -static inline void dma_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle) +#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) + +static inline void dma_free_attrs(struct device *dev, size_t size, + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { struct dma_map_ops *ops = get_dma_ops(dev); @@ -78,14 +84,16 @@ static inline void dma_free_coherent(struct device *dev, size_t size, return; debug_dma_free_coherent(dev, size, vaddr, dma_handle); - if (ops->free_coherent) - ops->free_coherent(dev, size, vaddr, dma_handle); + if (ops->free) + ops->free(dev, size, vaddr, dma_handle, attrs); } /* arch/sh/mm/consistent.c */ extern void *dma_generic_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_addr, gfp_t flag); + dma_addr_t *dma_addr, gfp_t flag, + struct dma_attrs *attrs); extern void dma_generic_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle); + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs); #endif /* __ASM_SH_DMA_MAPPING_H */ diff --git a/arch/sh/kernel/dma-nommu.c b/arch/sh/kernel/dma-nommu.c index 3c55b87..5b0bfcd 100644 --- a/arch/sh/kernel/dma-nommu.c +++ b/arch/sh/kernel/dma-nommu.c @@ -63,8 +63,8 @@ static void nommu_sync_sg(struct device *dev, struct scatterlist *sg, #endif struct dma_map_ops nommu_dma_ops = { - .alloc_coherent = dma_generic_alloc_coherent, - .free_coherent = dma_generic_free_coherent, + .alloc = dma_generic_alloc_coherent, + .free = dma_generic_free_coherent, .map_page = nommu_map_page, .map_sg = nommu_map_sg, #ifdef CONFIG_DMA_NONCOHERENT diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c index f251b5f..b81d9db 100644 --- a/arch/sh/mm/consistent.c +++ b/arch/sh/mm/consistent.c @@ -33,7 +33,8 @@ static int __init dma_init(void) fs_initcall(dma_init); void *dma_generic_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t gfp) + dma_addr_t *dma_handle, gfp_t gfp, + struct dma_attrs *attrs) { void *ret, *ret_nocache; int order = get_order(size); @@ -64,7 +65,8 @@ void *dma_generic_alloc_coherent(struct device *dev, size_t size, } void dma_generic_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle) + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { int order = get_order(size); unsigned long pfn = dma_handle >> PAGE_SHIFT; -- 1.7.1.569.g6f426 From m.szyprowski@samsung.com Fri Dec 23 13:28:08 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 13:32:19 +0100 (CET) Received: from mailout4.w1.samsung.com ([210.118.77.14]:65463 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903652Ab1LWM2I (ORCPT ); Fri, 23 Dec 2011 13:28:08 +0100 MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: TEXT/PLAIN Received: from euspt2 ([210.118.77.14]) by mailout4.w1.samsung.com (Sun Java(tm) System Messaging Server 6.3-8.04 (built Jul 29 2009; 32bit)) with ESMTP id <0LWN005K3PANO240@mailout4.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:59 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN009B0PAN85@spt2.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:59 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id D85EB27005C; Fri, 23 Dec 2011 13:39:23 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:30 +0100 From: Marek Szyprowski Subject: [PATCH 11/14] common: dma-mapping: remove old alloc_coherent and free_coherent methods In-reply-to: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-12-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.7.7.3 References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-archive-position: 32167 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18837 Content-Length: 890 Lines: 27 Remove old, unused alloc_coherent and free_coherent methods from dma_map_ops structure. Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park --- include/linux/dma-mapping.h | 4 ---- 1 files changed, 0 insertions(+), 4 deletions(-) diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h index 8cc7f95..2fc413a 100644 --- a/include/linux/dma-mapping.h +++ b/include/linux/dma-mapping.h @@ -9,10 +9,6 @@ #include struct dma_map_ops { - void* (*alloc_coherent)(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t gfp); - void (*free_coherent)(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle); void* (*alloc)(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp, struct dma_attrs *attrs); -- 1.7.1.569.g6f426 From m.szyprowski@samsung.com Fri Dec 23 13:28:08 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 13:32:47 +0100 (CET) Received: from mailout2.w1.samsung.com ([210.118.77.12]:53181 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903753Ab1LWM2I (ORCPT ); Fri, 23 Dec 2011 13:28:08 +0100 Received: from euspt1 (mailout2.w1.samsung.com [210.118.77.12]) by mailout2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTP id <0LWN007OFPANV1@mailout2.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:28:01 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN008E0PAMPZ@spt1.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:59 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id A741B270057; Fri, 23 Dec 2011 13:39:23 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:25 +0100 From: Marek Szyprowski Subject: [PATCH 06/14] SPARC: adapt for dma_map_ops changes In-reply-to: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-7-git-send-email-m.szyprowski@samsung.com> MIME-version: 1.0 X-Mailer: git-send-email 1.7.7.3 Content-type: TEXT/PLAIN Content-transfer-encoding: 7BIT References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-archive-position: 32168 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18838 Content-Length: 6784 Lines: 192 From: Andrzej Pietrasiewicz Adapt core SPARC architecture code for dma_map_ops changes: replace alloc/free_coherent with generic alloc/free methods. Signed-off-by: Andrzej Pietrasiewicz Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park --- arch/sparc/include/asm/dma-mapping.h | 18 ++++++++++++------ arch/sparc/kernel/iommu.c | 10 ++++++---- arch/sparc/kernel/ioport.c | 18 ++++++++++-------- arch/sparc/kernel/pci_sun4v.c | 9 +++++---- 4 files changed, 33 insertions(+), 22 deletions(-) diff --git a/arch/sparc/include/asm/dma-mapping.h b/arch/sparc/include/asm/dma-mapping.h index 8c0e4f7..48a7c65 100644 --- a/arch/sparc/include/asm/dma-mapping.h +++ b/arch/sparc/include/asm/dma-mapping.h @@ -26,24 +26,30 @@ static inline struct dma_map_ops *get_dma_ops(struct device *dev) #include -static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag) +#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) + +static inline void *dma_alloc_attrs(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag, + struct dma_attrs *attrs) { struct dma_map_ops *ops = get_dma_ops(dev); void *cpu_addr; - cpu_addr = ops->alloc_coherent(dev, size, dma_handle, flag); + cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs); debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); return cpu_addr; } -static inline void dma_free_coherent(struct device *dev, size_t size, - void *cpu_addr, dma_addr_t dma_handle) +#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) + +static inline void dma_free_attrs(struct device *dev, size_t size, + void *cpu_addr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { struct dma_map_ops *ops = get_dma_ops(dev); debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); - ops->free_coherent(dev, size, cpu_addr, dma_handle); + ops->free(dev, size, cpu_addr, dma_handle, attrs); } static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c index 4643d68..070ed14 100644 --- a/arch/sparc/kernel/iommu.c +++ b/arch/sparc/kernel/iommu.c @@ -280,7 +280,8 @@ static inline void iommu_free_ctx(struct iommu *iommu, int ctx) } static void *dma_4u_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_addrp, gfp_t gfp) + dma_addr_t *dma_addrp, gfp_t gfp, + struct dma_attrs *attrs) { unsigned long flags, order, first_page; struct iommu *iommu; @@ -330,7 +331,8 @@ static void *dma_4u_alloc_coherent(struct device *dev, size_t size, } static void dma_4u_free_coherent(struct device *dev, size_t size, - void *cpu, dma_addr_t dvma) + void *cpu, dma_addr_t dvma, + struct dma_attrs *attrs) { struct iommu *iommu; unsigned long flags, order, npages; @@ -825,8 +827,8 @@ static void dma_4u_sync_sg_for_cpu(struct device *dev, } static struct dma_map_ops sun4u_dma_ops = { - .alloc_coherent = dma_4u_alloc_coherent, - .free_coherent = dma_4u_free_coherent, + .alloc = dma_4u_alloc_coherent, + .free = dma_4u_free_coherent, .map_page = dma_4u_map_page, .unmap_page = dma_4u_unmap_page, .map_sg = dma_4u_map_sg, diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c index d0479e2..21bd739 100644 --- a/arch/sparc/kernel/ioport.c +++ b/arch/sparc/kernel/ioport.c @@ -261,7 +261,8 @@ EXPORT_SYMBOL(sbus_set_sbus64); * CPU may access them without any explicit flushing. */ static void *sbus_alloc_coherent(struct device *dev, size_t len, - dma_addr_t *dma_addrp, gfp_t gfp) + dma_addr_t *dma_addrp, gfp_t gfp, + struct dma_attrs *attrs) { struct platform_device *op = to_platform_device(dev); unsigned long len_total = PAGE_ALIGN(len); @@ -315,7 +316,7 @@ err_nopages: } static void sbus_free_coherent(struct device *dev, size_t n, void *p, - dma_addr_t ba) + dma_addr_t ba, struct dma_attrs *attrs) { struct resource *res; struct page *pgv; @@ -407,8 +408,8 @@ static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg, } struct dma_map_ops sbus_dma_ops = { - .alloc_coherent = sbus_alloc_coherent, - .free_coherent = sbus_free_coherent, + .alloc = sbus_alloc_coherent, + .free = sbus_free_coherent, .map_page = sbus_map_page, .unmap_page = sbus_unmap_page, .map_sg = sbus_map_sg, @@ -436,7 +437,8 @@ arch_initcall(sparc_register_ioport); * hwdev should be valid struct pci_dev pointer for PCI devices. */ static void *pci32_alloc_coherent(struct device *dev, size_t len, - dma_addr_t *pba, gfp_t gfp) + dma_addr_t *pba, gfp_t gfp, + struct dma_attrs *attrs) { unsigned long len_total = PAGE_ALIGN(len); void *va; @@ -489,7 +491,7 @@ err_nopages: * past this call are illegal. */ static void pci32_free_coherent(struct device *dev, size_t n, void *p, - dma_addr_t ba) + dma_addr_t ba, struct dma_attrs *attrs) { struct resource *res; @@ -645,8 +647,8 @@ static void pci32_sync_sg_for_device(struct device *device, struct scatterlist * } struct dma_map_ops pci32_dma_ops = { - .alloc_coherent = pci32_alloc_coherent, - .free_coherent = pci32_free_coherent, + .alloc = pci32_alloc_coherent, + .free = pci32_free_coherent, .map_page = pci32_map_page, .unmap_page = pci32_unmap_page, .map_sg = pci32_map_sg, diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c index b272cda..a8756e3 100644 --- a/arch/sparc/kernel/pci_sun4v.c +++ b/arch/sparc/kernel/pci_sun4v.c @@ -128,7 +128,8 @@ static inline long iommu_batch_end(void) } static void *dma_4v_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_addrp, gfp_t gfp) + dma_addr_t *dma_addrp, gfp_t gfp, + struct dma_attrs *attrs) { unsigned long flags, order, first_page, npages, n; struct iommu *iommu; @@ -198,7 +199,7 @@ range_alloc_fail: } static void dma_4v_free_coherent(struct device *dev, size_t size, void *cpu, - dma_addr_t dvma) + dma_addr_t dvma, struct dma_attrs *attrs) { struct pci_pbm_info *pbm; struct iommu *iommu; @@ -527,8 +528,8 @@ static void dma_4v_unmap_sg(struct device *dev, struct scatterlist *sglist, } static struct dma_map_ops sun4v_dma_ops = { - .alloc_coherent = dma_4v_alloc_coherent, - .free_coherent = dma_4v_free_coherent, + .alloc = dma_4v_alloc_coherent, + .free = dma_4v_free_coherent, .map_page = dma_4v_map_page, .unmap_page = dma_4v_unmap_page, .map_sg = dma_4v_map_sg, -- 1.7.1.569.g6f426 From m.szyprowski@samsung.com Fri Dec 23 13:28:09 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 13:33:10 +0100 (CET) Received: from mailout4.w1.samsung.com ([210.118.77.14]:65463 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903776Ab1LWM2J (ORCPT ); Fri, 23 Dec 2011 13:28:09 +0100 MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: TEXT/PLAIN Received: from euspt2 ([210.118.77.14]) by mailout4.w1.samsung.com (Sun Java(tm) System Messaging Server 6.3-8.04 (built Jul 29 2009; 32bit)) with ESMTP id <0LWN005K3PANO240@mailout4.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:59 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN00K8RPAN36@spt2.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:59 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id EBF6F27005E; Fri, 23 Dec 2011 13:39:23 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:32 +0100 From: Marek Szyprowski Subject: [PATCH 13/14] common: DMA-mapping: add WRITE_COMBINE attribute In-reply-to: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-14-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.7.7.3 References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-archive-position: 32169 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18839 Content-Length: 1529 Lines: 44 DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be buffered to improve performance. It will be used by the replacement for ARM/ARV32 specific dma_alloc_writecombine() function. Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park --- Documentation/DMA-attributes.txt | 10 ++++++++++ include/linux/dma-attrs.h | 1 + 2 files changed, 11 insertions(+), 0 deletions(-) diff --git a/Documentation/DMA-attributes.txt b/Documentation/DMA-attributes.txt index b768cc0..811a5d4 100644 --- a/Documentation/DMA-attributes.txt +++ b/Documentation/DMA-attributes.txt @@ -31,3 +31,13 @@ may be weakly ordered, that is that reads and writes may pass each other. Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING, those that do not will simply ignore the attribute and exhibit default behavior. + +DMA_ATTR_WRITE_COMBINE +---------------------- + +DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be +buffered to improve performance. + +Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE, +those that do not will simply ignore the attribute and exhibit default +behavior. diff --git a/include/linux/dma-attrs.h b/include/linux/dma-attrs.h index 71ad34e..ada61e1 100644 --- a/include/linux/dma-attrs.h +++ b/include/linux/dma-attrs.h @@ -13,6 +13,7 @@ enum dma_attr { DMA_ATTR_WRITE_BARRIER, DMA_ATTR_WEAK_ORDERING, + DMA_ATTR_WRITE_COMBINE, DMA_ATTR_MAX, }; -- 1.7.1.569.g6f426 From m.szyprowski@samsung.com Fri Dec 23 13:28:09 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 13:33:36 +0100 (CET) Received: from mailout2.w1.samsung.com ([210.118.77.12]:53181 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903777Ab1LWM2J (ORCPT ); Fri, 23 Dec 2011 13:28:09 +0100 Received: from euspt1 (mailout2.w1.samsung.com [210.118.77.12]) by mailout2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTP id <0LWN007OFPANV1@mailout2.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:28:02 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN00KFUPAMDS@spt1.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:59 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id CE90E27005B; Fri, 23 Dec 2011 13:39:23 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:29 +0100 From: Marek Szyprowski Subject: [PATCH 10/14] Unicore32: adapt for dma_map_ops changes In-reply-to: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-11-git-send-email-m.szyprowski@samsung.com> MIME-version: 1.0 X-Mailer: git-send-email 1.7.7.3 Content-type: TEXT/PLAIN Content-transfer-encoding: 7BIT References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-archive-position: 32170 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18840 Content-Length: 2524 Lines: 68 From: Andrzej Pietrasiewicz Adapt core Unicore32 architecture code for dma_map_ops changes: replace alloc/free_coherent with generic alloc/free methods. Signed-off-by: Andrzej Pietrasiewicz Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park --- arch/unicore32/include/asm/dma-mapping.h | 18 ++++++++++++------ arch/unicore32/mm/dma-swiotlb.c | 4 ++-- 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/arch/unicore32/include/asm/dma-mapping.h b/arch/unicore32/include/asm/dma-mapping.h index 9258e59..366460a 100644 --- a/arch/unicore32/include/asm/dma-mapping.h +++ b/arch/unicore32/include/asm/dma-mapping.h @@ -82,20 +82,26 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask) return 0; } -static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag) +#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) + +static inline void *dma_alloc_attrs(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag, + struct dma_attrs *attrs) { struct dma_map_ops *dma_ops = get_dma_ops(dev); - return dma_ops->alloc_coherent(dev, size, dma_handle, flag); + return dma_ops->alloc(dev, size, dma_handle, flag, attrs); } -static inline void dma_free_coherent(struct device *dev, size_t size, - void *cpu_addr, dma_addr_t dma_handle) +#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) + +static inline void dma_free_attrs(struct device *dev, size_t size, + void *cpu_addr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { struct dma_map_ops *dma_ops = get_dma_ops(dev); - dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); + dma_ops->free(dev, size, cpu_addr, dma_handle, attrs); } #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) diff --git a/arch/unicore32/mm/dma-swiotlb.c b/arch/unicore32/mm/dma-swiotlb.c index bfa9fbb..ff70c2d 100644 --- a/arch/unicore32/mm/dma-swiotlb.c +++ b/arch/unicore32/mm/dma-swiotlb.c @@ -18,8 +18,8 @@ #include struct dma_map_ops swiotlb_dma_map_ops = { - .alloc_coherent = swiotlb_alloc_coherent, - .free_coherent = swiotlb_free_coherent, + .alloc = swiotlb_alloc_coherent, + .free = swiotlb_free_coherent, .map_sg = swiotlb_map_sg_attrs, .unmap_sg = swiotlb_unmap_sg_attrs, .dma_supported = swiotlb_dma_supported, -- 1.7.1.569.g6f426 From m.szyprowski@samsung.com Fri Dec 23 13:28:09 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 13:34:01 +0100 (CET) Received: from mailout4.w1.samsung.com ([210.118.77.14]:65463 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903778Ab1LWM2J (ORCPT ); Fri, 23 Dec 2011 13:28:09 +0100 MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: TEXT/PLAIN Received: from euspt2 ([210.118.77.14]) by mailout4.w1.samsung.com (Sun Java(tm) System Messaging Server 6.3-8.04 (built Jul 29 2009; 32bit)) with ESMTP id <0LWN005K3PANO240@mailout4.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:28:00 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN009B1PAN85@spt2.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:59 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id E20A027005D; Fri, 23 Dec 2011 13:39:23 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:31 +0100 From: Marek Szyprowski Subject: [PATCH 12/14] common: dma-mapping: introduce mmap method In-reply-to: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-13-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.7.7.3 References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-archive-position: 32171 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18841 Content-Length: 1015 Lines: 28 Introduce new generic mmap method with attributes argument. This method lets drivers to create a userspace mapping for a DMA buffer in generic, architecture independent way. Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park --- include/linux/dma-mapping.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h index 2fc413a..b903a20 100644 --- a/include/linux/dma-mapping.h +++ b/include/linux/dma-mapping.h @@ -15,6 +15,9 @@ struct dma_map_ops { void (*free)(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle, struct dma_attrs *attrs); + int (*mmap)(struct device *, struct vm_area_struct *, + void *, dma_addr_t, size_t, struct dma_attrs *attrs); + dma_addr_t (*map_page)(struct device *dev, struct page *page, unsigned long offset, size_t size, enum dma_data_direction dir, -- 1.7.1.569.g6f426 From m.szyprowski@samsung.com Fri Dec 23 13:28:09 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 13:34:27 +0100 (CET) Received: from mailout2.w1.samsung.com ([210.118.77.12]:53181 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903779Ab1LWM2J (ORCPT ); Fri, 23 Dec 2011 13:28:09 +0100 Received: from euspt1 (mailout2.w1.samsung.com [210.118.77.12]) by mailout2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTP id <0LWN007OFPANV1@mailout2.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:28:02 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN008ECPANPZ@spt1.w1.samsung.com> for linux-mips@linux-mips.org; Fri, 23 Dec 2011 12:27:59 +0000 (GMT) Received: from mcdsrvbld02.digital.local (unknown [106.116.37.23]) by linux.samsung.com (Postfix) with ESMTP id 01AB627005F; Fri, 23 Dec 2011 13:39:24 +0100 (CET) Date: Fri, 23 Dec 2011 13:27:33 +0100 From: Marek Szyprowski Subject: [PATCH 14/14] common: DMA-mapping: add NON-CONSISTENT attribute In-reply-to: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> To: linux-kernel@vger.kernel.org Cc: Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Marek Szyprowski , Kyungmin Park , Andrzej Pietrasiewicz Message-id: <1324643253-3024-15-git-send-email-m.szyprowski@samsung.com> MIME-version: 1.0 X-Mailer: git-send-email 1.7.7.3 Content-type: TEXT/PLAIN Content-transfer-encoding: 7BIT References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> X-archive-position: 32172 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18842 Content-Length: 1695 Lines: 45 DMA_ATTR_NON_CONSISTENT lets the platform to choose to return either consistent or non-consistent memory as it sees fit. By using this API, you are guaranteeing to the platform that you have all the correct and necessary sync points for this memory in the driver should it choose to return non-consistent memory. Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park --- Documentation/DMA-attributes.txt | 9 +++++++++ include/linux/dma-attrs.h | 1 + 2 files changed, 10 insertions(+), 0 deletions(-) diff --git a/Documentation/DMA-attributes.txt b/Documentation/DMA-attributes.txt index 811a5d4..9120de2 100644 --- a/Documentation/DMA-attributes.txt +++ b/Documentation/DMA-attributes.txt @@ -41,3 +41,12 @@ buffered to improve performance. Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE, those that do not will simply ignore the attribute and exhibit default behavior. + +DMA_ATTR_NON_CONSISTENT +----------------------- + +DMA_ATTR_NON_CONSISTENT lets the platform to choose to return either +consistent or non-consistent memory as it sees fit. By using this API, +you are guaranteeing to the platform that you have all the correct and +necessary sync points for this memory in the driver should it choose to +return non-consistent memory. diff --git a/include/linux/dma-attrs.h b/include/linux/dma-attrs.h index ada61e1..547ab56 100644 --- a/include/linux/dma-attrs.h +++ b/include/linux/dma-attrs.h @@ -14,6 +14,7 @@ enum dma_attr { DMA_ATTR_WRITE_BARRIER, DMA_ATTR_WEAK_ORDERING, DMA_ATTR_WRITE_COMBINE, + DMA_ATTR_NON_CONSISTENT, DMA_ATTR_MAX, }; -- 1.7.1.569.g6f426 From matthew@wil.cx Fri Dec 23 17:35:22 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 17:35:27 +0100 (CET) Received: from palinux.external.hp.com ([192.25.206.14]:37481 "EHLO mail.parisc-linux.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903617Ab1LWQfW (ORCPT ); Fri, 23 Dec 2011 17:35:22 +0100 Received: by mail.parisc-linux.org (Postfix, from userid 26919) id 098C7494005; Fri, 23 Dec 2011 09:35:16 -0700 (MST) Date: Fri, 23 Dec 2011 09:35:16 -0700 From: Matthew Wilcox To: Marek Szyprowski Cc: linux-kernel@vger.kernel.org, Benjamin Herrenschmidt , Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Kyungmin Park , Andrzej Pietrasiewicz Subject: Re: [PATCH 00/14] DMA-mapping framework redesign preparation Message-ID: <20111223163516.GO20129@parisc-linux.org> References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> User-Agent: Mutt/1.5.18 (2008-05-17) X-archive-position: 32173 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: matthew@wil.cx Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 18988 Content-Length: 1981 Lines: 37 On Fri, Dec 23, 2011 at 01:27:19PM +0100, Marek Szyprowski wrote: > The first issue we identified is the fact that on some platform (again, > mainly ARM) there are several functions for allocating DMA buffers: > dma_alloc_coherent, dma_alloc_writecombine and dma_alloc_noncoherent Is this write-combining from the point of view of the device (ie iommu), or from the point of view of the CPU, or both? > The next step in dma mapping framework update is the introduction of > dma_mmap/dma_mmap_attrs() function. There are a number of drivers > (mainly V4L2 and ALSA) that only exports the DMA buffers to user space. > Creating a userspace mapping with correct page attributes is not an easy > task for the driver. Also the DMA-mapping framework is the only place > where the complete information about the allocated pages is available, > especially if the implementation uses IOMMU controller to provide a > contiguous buffer in DMA address space which is scattered in physical > memory space. Surely we only need a helper which drivrs can call from their mmap routine to solve this? > Usually these drivers don't touch the buffer data at all, so the mapping > in kernel virtual address space is not needed. We can introduce > DMA_ATTRIB_NO_KERNEL_MAPPING attribute which lets kernel to skip/ignore > creation of kernel virtual mapping. This way we can save previous > vmalloc area and simply some mapping operation on a few architectures. I really think this wants to be a separate function. dma_alloc_coherent is for allocating memory to be shared between the kernel and a driver; we already have dma_map_sg for mapping userspace I/O as an alternative interface. This feels like it's something different again rather than an option to dma_alloc_coherent. -- Matthew Wilcox Intel Open Source Technology Centre "Bill, look, we understand that you're interested in selling us this operating system, but compare it to ours. We can't possibly take such a retrograde step." From juhosg@openwrt.org Fri Dec 23 19:26:05 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:26:13 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46053 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903617Ab1LWS0F (ORCPT ); Fri, 23 Dec 2011 19:26:05 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id DD29F23C0090; Fri, 23 Dec 2011 19:26:04 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 00/16] MIPS: ath79: add initial support for the Atheros AR934X SoCs Date: Fri, 23 Dec 2011 19:25:26 +0100 Message-Id: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 X-archive-position: 32174 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19084 Content-Length: 2775 Lines: 55 This patch set adds initial support for the Atheros AR934X SoCs. The patch set is created against the mips-for-linux-next branch of the git://git.linux-mips.org/pub/scm/ralf/upstream-sfr.git tree, and it depends on these sets: http://patchwork.linux-mips.org/bundle/juhosg/ath79-cleanup-AR724X-PCI-support-code-v4/ http://patchwork.linux-mips.org/bundle/juhosg/ath79-AR724X-PCI-fixes-and-AR71XX-PCI-support-v2/ Gabor Juhos (16): MIPS: ath79: add early_printk support for AR934X MIPS: ath79: sort case statements in ath79_detect_sys_type MIPS: ath79: add SoC detection code for AR934X MIPS: ath79: add clock initialization code for AR934X MIPS: ath79: add GPIO support code for AR934X MIPS: ath79: rework IP2/IP3 interrupt handling MIPS: ath79: add IRQ handling code for AR934X MIPS: ath79: add AR934X specific glue to ath79_device_reset_{clear,set} MIPS: ath79: register UART device for AR934X SoCs MIPS: ath79: add WMAC registration code for AR934X MIPS: ath79: add USB platform setup code for AR934X MIPS: ath79: add PCI_AR724X Kconfig symbol MIPS: ath79: add PCI registration code for AR934X MIPS: ath79: add initial support for the Atheros DB120 board USB: ehci-ath79: add device_id entry for the AR934X SoCs watchdog: ath79_wdt: flush register writes arch/mips/ath79/Kconfig | 24 ++++- arch/mips/ath79/Makefile | 1 + arch/mips/ath79/clock.c | 81 ++++++++++++ arch/mips/ath79/common.c | 9 ++- arch/mips/ath79/dev-common.c | 3 +- arch/mips/ath79/dev-usb.c | 28 +++++ arch/mips/ath79/dev-wmac.c | 30 +++++- arch/mips/ath79/early_printk.c | 3 + arch/mips/ath79/gpio.c | 47 +++++++- arch/mips/ath79/irq.c | 147 +++++++++++++++++++---- arch/mips/ath79/mach-db120.c | 155 ++++++++++++++++++++++++ arch/mips/ath79/machtypes.h | 1 + arch/mips/ath79/pci.c | 13 ++- arch/mips/ath79/setup.c | 45 +++++-- arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 126 +++++++++++++++++++- arch/mips/include/asm/mach-ath79/ath79.h | 23 ++++ arch/mips/include/asm/mach-ath79/irq.h | 6 +- arch/mips/include/asm/mach-ath79/pci.h | 2 +- arch/mips/pci/Makefile | 2 +- drivers/usb/host/Kconfig | 2 +- drivers/usb/host/ehci-ath79.c | 4 + drivers/watchdog/ath79_wdt.c | 6 + 22 files changed, 711 insertions(+), 47 deletions(-) create mode 100644 arch/mips/ath79/mach-db120.c -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:09 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:26:39 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46068 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903621Ab1LWS0J (ORCPT ); Fri, 23 Dec 2011 19:26:09 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id 0B3BC23C007C; Fri, 23 Dec 2011 19:26:07 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 01/16] MIPS: ath79: add early_printk support for AR934X Date: Fri, 23 Dec 2011 19:25:27 +0100 Message-Id: <1324664742-3648-2-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32175 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19085 Content-Length: 1950 Lines: 54 The patch allows to see kernel messages on AR934X SoCs in early boot stage. Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez --- arch/mips/ath79/early_printk.c | 3 +++ arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 6 +++++- 2 files changed, 8 insertions(+), 1 deletions(-) diff --git a/arch/mips/ath79/early_printk.c b/arch/mips/ath79/early_printk.c index 6a51ced..dc938cb 100644 --- a/arch/mips/ath79/early_printk.c +++ b/arch/mips/ath79/early_printk.c @@ -71,6 +71,9 @@ static void prom_putchar_init(void) case REV_ID_MAJOR_AR7241: case REV_ID_MAJOR_AR7242: case REV_ID_MAJOR_AR913X: + case REV_ID_MAJOR_AR9341: + case REV_ID_MAJOR_AR9342: + case REV_ID_MAJOR_AR9344: _prom_putchar = prom_putchar_ar71xx; break; diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index 2f0becb..b7df674 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -1,10 +1,11 @@ /* * Atheros AR71XX/AR724X/AR913X SoC register definitions * + * Copyright (C) 2010-2011 Jaiganesh Narayanan * Copyright (C) 2008-2010 Gabor Juhos * Copyright (C) 2008 Imre Kaloz * - * Parts of this file are based on Atheros' 2.6.15 BSP + * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published @@ -249,6 +250,9 @@ #define REV_ID_MAJOR_AR7242 0x1100 #define REV_ID_MAJOR_AR9330 0x0110 #define REV_ID_MAJOR_AR9331 0x1110 +#define REV_ID_MAJOR_AR9341 0x0120 +#define REV_ID_MAJOR_AR9342 0x1120 +#define REV_ID_MAJOR_AR9344 0x2120 #define AR71XX_REV_ID_MINOR_MASK 0x3 #define AR71XX_REV_ID_MINOR_AR7130 0x0 -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:10 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:27:05 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46075 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903622Ab1LWS0K (ORCPT ); Fri, 23 Dec 2011 19:26:10 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id 84EDD23C007C; Fri, 23 Dec 2011 19:26:09 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 02/16] MIPS: ath79: sort case statements in ath79_detect_sys_type Date: Fri, 23 Dec 2011 19:25:28 +0100 Message-Id: <1324664742-3648-3-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32176 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19088 Content-Length: 1377 Lines: 54 Sort the case statements alphabetically in order to improve readability. Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez --- arch/mips/ath79/setup.c | 24 ++++++++++++------------ 1 files changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c index 80a7d40..24dfedf 100644 --- a/arch/mips/ath79/setup.c +++ b/arch/mips/ath79/setup.c @@ -116,18 +116,6 @@ static void __init ath79_detect_sys_type(void) rev = id & AR724X_REV_ID_REVISION_MASK; break; - case REV_ID_MAJOR_AR9330: - ath79_soc = ATH79_SOC_AR9330; - chip = "9330"; - rev = id & AR933X_REV_ID_REVISION_MASK; - break; - - case REV_ID_MAJOR_AR9331: - ath79_soc = ATH79_SOC_AR9331; - chip = "9331"; - rev = id & AR933X_REV_ID_REVISION_MASK; - break; - case REV_ID_MAJOR_AR913X: minor = id & AR913X_REV_ID_MINOR_MASK; rev = id >> AR913X_REV_ID_REVISION_SHIFT; @@ -145,6 +133,18 @@ static void __init ath79_detect_sys_type(void) } break; + case REV_ID_MAJOR_AR9330: + ath79_soc = ATH79_SOC_AR9330; + chip = "9330"; + rev = id & AR933X_REV_ID_REVISION_MASK; + break; + + case REV_ID_MAJOR_AR9331: + ath79_soc = ATH79_SOC_AR9331; + chip = "9331"; + rev = id & AR933X_REV_ID_REVISION_MASK; + break; + default: panic("ath79: unknown SoC, id:0x%08x", id); } -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:11 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:27:34 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46079 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903627Ab1LWS0L (ORCPT ); Fri, 23 Dec 2011 19:26:11 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id 62EB923C008D; Fri, 23 Dec 2011 19:26:10 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 03/16] MIPS: ath79: add SoC detection code for AR934X Date: Fri, 23 Dec 2011 19:25:29 +0100 Message-Id: <1324664742-3648-4-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32177 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19089 Content-Length: 3561 Lines: 126 Also add 'soc_is_ar934[124x]' helper functions and a Kconfig symbol for the AR934X SoCs. Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez --- arch/mips/ath79/Kconfig | 4 ++++ arch/mips/ath79/setup.c | 21 ++++++++++++++++++++- arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 ++ arch/mips/include/asm/mach-ath79/ath79.h | 23 +++++++++++++++++++++++ 4 files changed, 49 insertions(+), 1 deletions(-) diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig index bc6edad..7db8e89 100644 --- a/arch/mips/ath79/Kconfig +++ b/arch/mips/ath79/Kconfig @@ -69,6 +69,10 @@ config SOC_AR933X select USB_ARCH_HAS_EHCI def_bool n +config SOC_AR934X + select USB_ARCH_HAS_EHCI + def_bool n + config ATH79_DEV_GPIO_BUTTONS def_bool n diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c index 24dfedf..60d212e 100644 --- a/arch/mips/ath79/setup.c +++ b/arch/mips/ath79/setup.c @@ -1,10 +1,11 @@ /* * Atheros AR71XX/AR724X/AR913X specific setup * + * Copyright (C) 2010-2011 Jaiganesh Narayanan * Copyright (C) 2008-2011 Gabor Juhos * Copyright (C) 2008 Imre Kaloz * - * Parts of this file are based on Atheros' 2.6.15 BSP + * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published @@ -145,6 +146,24 @@ static void __init ath79_detect_sys_type(void) rev = id & AR933X_REV_ID_REVISION_MASK; break; + case REV_ID_MAJOR_AR9341: + ath79_soc = ATH79_SOC_AR9341; + chip = "9341"; + rev = id & AR934X_REV_ID_REVISION_MASK; + break; + + case REV_ID_MAJOR_AR9342: + ath79_soc = ATH79_SOC_AR9342; + chip = "9342"; + rev = id & AR934X_REV_ID_REVISION_MASK; + break; + + case REV_ID_MAJOR_AR9344: + ath79_soc = ATH79_SOC_AR9344; + chip = "9344"; + rev = id & AR934X_REV_ID_REVISION_MASK; + break; + default: panic("ath79: unknown SoC, id:0x%08x", id); } diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index b7df674..4e3c55d 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -271,6 +271,8 @@ #define AR724X_REV_ID_REVISION_MASK 0x3 +#define AR934X_REV_ID_REVISION_MASK 0xf + /* * SPI block */ diff --git a/arch/mips/include/asm/mach-ath79/ath79.h b/arch/mips/include/asm/mach-ath79/ath79.h index 6d0c6c9..4f248c3 100644 --- a/arch/mips/include/asm/mach-ath79/ath79.h +++ b/arch/mips/include/asm/mach-ath79/ath79.h @@ -29,6 +29,9 @@ enum ath79_soc_type { ATH79_SOC_AR9132, ATH79_SOC_AR9330, ATH79_SOC_AR9331, + ATH79_SOC_AR9341, + ATH79_SOC_AR9342, + ATH79_SOC_AR9344, }; extern enum ath79_soc_type ath79_soc; @@ -75,6 +78,26 @@ static inline int soc_is_ar933x(void) ath79_soc == ATH79_SOC_AR9331); } +static inline int soc_is_ar9341(void) +{ + return (ath79_soc == ATH79_SOC_AR9341); +} + +static inline int soc_is_ar9342(void) +{ + return (ath79_soc == ATH79_SOC_AR9342); +} + +static inline int soc_is_ar9344(void) +{ + return (ath79_soc == ATH79_SOC_AR9344); +} + +static inline int soc_is_ar934x(void) +{ + return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344(); +} + extern void __iomem *ath79_ddr_base; extern void __iomem *ath79_pll_base; extern void __iomem *ath79_reset_base; -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:12 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:28:01 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46083 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903628Ab1LWS0M (ORCPT ); Fri, 23 Dec 2011 19:26:12 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id 40D8E23C0092; Fri, 23 Dec 2011 19:26:11 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 04/16] MIPS: ath79: add clock initialization code for AR934X Date: Fri, 23 Dec 2011 19:25:30 +0100 Message-Id: <1324664742-3648-5-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32178 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19090 Content-Length: 7341 Lines: 196 Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez --- arch/mips/ath79/clock.c | 81 ++++++++++++++++++++++++ arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 53 +++++++++++++++ 2 files changed, 134 insertions(+), 0 deletions(-) diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c index 54d0eb4..b91ad3e 100644 --- a/arch/mips/ath79/clock.c +++ b/arch/mips/ath79/clock.c @@ -1,8 +1,11 @@ /* * Atheros AR71XX/AR724X/AR913X common routines * + * Copyright (C) 2010-2011 Jaiganesh Narayanan * Copyright (C) 2011 Gabor Juhos * + * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP + * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published * by the Free Software Foundation. @@ -163,6 +166,82 @@ static void __init ar933x_clocks_init(void) ath79_uart_clk.rate = ath79_ref_clk.rate; } +static void __init ar934x_clocks_init(void) +{ + u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; + u32 cpu_pll, ddr_pll; + u32 bootstrap; + + bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); + if (bootstrap & AR934X_BOOTSTRAP_REF_CLK_40) + ath79_ref_clk.rate = 40 * 1000 * 1000; + else + ath79_ref_clk.rate = 25 * 1000 * 1000; + + pll = ath79_pll_rr(AR934X_PLL_CPU_CONFIG_REG); + out_div = (pll >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & + AR934X_PLL_CPU_CONFIG_OUTDIV_MASK; + ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) & + AR934X_PLL_CPU_CONFIG_REFDIV_MASK; + nint = (pll >> AR934X_PLL_CPU_CONFIG_NINT_SHIFT) & + AR934X_PLL_CPU_CONFIG_NINT_MASK; + frac = (pll >> AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT) & + AR934X_PLL_CPU_CONFIG_NFRAC_MASK; + + cpu_pll = nint * ath79_ref_clk.rate / ref_div; + cpu_pll += frac * ath79_ref_clk.rate / (ref_div * (2 << 6)); + cpu_pll /= (1 << out_div); + + pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG); + out_div = (pll >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & + AR934X_PLL_DDR_CONFIG_OUTDIV_MASK; + ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) & + AR934X_PLL_DDR_CONFIG_REFDIV_MASK; + nint = (pll >> AR934X_PLL_DDR_CONFIG_NINT_SHIFT) & + AR934X_PLL_DDR_CONFIG_NINT_MASK; + frac = (pll >> AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT) & + AR934X_PLL_DDR_CONFIG_NFRAC_MASK; + + ddr_pll = nint * ath79_ref_clk.rate / ref_div; + ddr_pll += frac * ath79_ref_clk.rate / (ref_div * (2 << 10)); + ddr_pll /= (1 << out_div); + + clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG); + + postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) & + AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK; + + if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS) + ath79_cpu_clk.rate = ath79_ref_clk.rate; + else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL) + ath79_cpu_clk.rate = cpu_pll / (postdiv + 1); + else + ath79_cpu_clk.rate = ddr_pll / (postdiv + 1); + + postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) & + AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK; + + if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS) + ath79_ddr_clk.rate = ath79_ref_clk.rate; + else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL) + ath79_ddr_clk.rate = ddr_pll / (postdiv + 1); + else + ath79_ddr_clk.rate = cpu_pll / (postdiv + 1); + + postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) & + AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK; + + if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS) + ath79_ahb_clk.rate = ath79_ref_clk.rate; + else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL) + ath79_ahb_clk.rate = ddr_pll / (postdiv + 1); + else + ath79_ahb_clk.rate = cpu_pll / (postdiv + 1); + + ath79_wdt_clk.rate = ath79_ref_clk.rate; + ath79_uart_clk.rate = ath79_ref_clk.rate; +} + void __init ath79_clocks_init(void) { if (soc_is_ar71xx()) @@ -173,6 +252,8 @@ void __init ath79_clocks_init(void) ar913x_clocks_init(); else if (soc_is_ar933x()) ar933x_clocks_init(); + else if (soc_is_ar934x()) + ar934x_clocks_init(); else BUG(); diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index 4e3c55d..bc1c345 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -151,6 +151,41 @@ #define AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT 15 #define AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK 0x7 +#define AR934X_PLL_CPU_CONFIG_REG 0x00 +#define AR934X_PLL_DDR_CONFIG_REG 0x04 +#define AR934X_PLL_CPU_DDR_CLK_CTRL_REG 0x08 + +#define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 +#define AR934X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f +#define AR934X_PLL_CPU_CONFIG_NINT_SHIFT 6 +#define AR934X_PLL_CPU_CONFIG_NINT_MASK 0x3f +#define AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 +#define AR934X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f +#define AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 +#define AR934X_PLL_CPU_CONFIG_OUTDIV_MASK 0x3 + +#define AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT 0 +#define AR934X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff +#define AR934X_PLL_DDR_CONFIG_NINT_SHIFT 10 +#define AR934X_PLL_DDR_CONFIG_NINT_MASK 0x3f +#define AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 +#define AR934X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f +#define AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 +#define AR934X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 + +#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS BIT(2) +#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS BIT(3) +#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS BIT(4) +#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT 5 +#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK 0x1f +#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT 10 +#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK 0x1f +#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT 15 +#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK 0x1f +#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL BIT(20) +#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) +#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) + /* * USB_CONFIG block */ @@ -186,6 +221,8 @@ #define AR933X_RESET_REG_RESET_MODULE 0x1c #define AR933X_RESET_REG_BOOTSTRAP 0xac +#define AR934X_RESET_REG_BOOTSTRAP 0xb0 + #define MISC_INT_ETHSW BIT(12) #define MISC_INT_TIMER4 BIT(10) #define MISC_INT_TIMER3 BIT(9) @@ -242,6 +279,22 @@ #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) +#define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) +#define AR934X_BOOTSTRAP_SW_OPTION7 BIT(22) +#define AR934X_BOOTSTRAP_SW_OPTION6 BIT(21) +#define AR934X_BOOTSTRAP_SW_OPTION5 BIT(20) +#define AR934X_BOOTSTRAP_SW_OPTION4 BIT(19) +#define AR934X_BOOTSTRAP_SW_OPTION3 BIT(18) +#define AR934X_BOOTSTRAP_SW_OPTION2 BIT(17) +#define AR934X_BOOTSTRAP_SW_OPTION1 BIT(16) +#define AR934X_BOOTSTRAP_USB_MODE_DEVICE BIT(7) +#define AR934X_BOOTSTRAP_PCIE_RC BIT(6) +#define AR934X_BOOTSTRAP_EJTAG_MODE BIT(5) +#define AR934X_BOOTSTRAP_REF_CLK_40 BIT(4) +#define AR934X_BOOTSTRAP_BOOT_FROM_SPI BIT(2) +#define AR934X_BOOTSTRAP_SDRAM_DISABLED BIT(1) +#define AR934X_BOOTSTRAP_DDR1 BIT(0) + #define REV_ID_MAJOR_MASK 0xfff0 #define REV_ID_MAJOR_AR71XX 0x00a0 #define REV_ID_MAJOR_AR913X 0x00b0 -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:13 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:28:25 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46088 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903629Ab1LWS0N (ORCPT ); Fri, 23 Dec 2011 19:26:13 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id 8585123C008D; Fri, 23 Dec 2011 19:26:12 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 05/16] MIPS: ath79: add GPIO support code for AR934X Date: Fri, 23 Dec 2011 19:25:31 +0100 Message-Id: <1324664742-3648-6-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32179 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19092 Content-Length: 3178 Lines: 100 Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez --- arch/mips/ath79/gpio.c | 47 +++++++++++++++++++++++- arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 + 2 files changed, 47 insertions(+), 1 deletions(-) diff --git a/arch/mips/ath79/gpio.c b/arch/mips/ath79/gpio.c index a2f8ca6..29054f2 100644 --- a/arch/mips/ath79/gpio.c +++ b/arch/mips/ath79/gpio.c @@ -1,9 +1,12 @@ /* * Atheros AR71XX/AR724X/AR913X GPIO API support * - * Copyright (C) 2008-2010 Gabor Juhos + * Copyright (C) 2010-2011 Jaiganesh Narayanan + * Copyright (C) 2008-2011 Gabor Juhos * Copyright (C) 2008 Imre Kaloz * + * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP + * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published * by the Free Software Foundation. @@ -89,6 +92,42 @@ static int ath79_gpio_direction_output(struct gpio_chip *chip, return 0; } +static int ar934x_gpio_direction_input(struct gpio_chip *chip, unsigned offset) +{ + void __iomem *base = ath79_gpio_base; + unsigned long flags; + + spin_lock_irqsave(&ath79_gpio_lock, flags); + + __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << offset), + base + AR71XX_GPIO_REG_OE); + + spin_unlock_irqrestore(&ath79_gpio_lock, flags); + + return 0; +} + +static int ar934x_gpio_direction_output(struct gpio_chip *chip, unsigned offset, + int value) +{ + void __iomem *base = ath79_gpio_base; + unsigned long flags; + + spin_lock_irqsave(&ath79_gpio_lock, flags); + + if (value) + __raw_writel(1 << offset, base + AR71XX_GPIO_REG_SET); + else + __raw_writel(1 << offset, base + AR71XX_GPIO_REG_CLEAR); + + __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << offset), + base + AR71XX_GPIO_REG_OE); + + spin_unlock_irqrestore(&ath79_gpio_lock, flags); + + return 0; +} + static struct gpio_chip ath79_gpio_chip = { .label = "ath79", .get = ath79_gpio_get_value, @@ -155,11 +194,17 @@ void __init ath79_gpio_init(void) ath79_gpio_count = AR913X_GPIO_COUNT; else if (soc_is_ar933x()) ath79_gpio_count = AR933X_GPIO_COUNT; + else if (soc_is_ar934x()) + ath79_gpio_count = AR934X_GPIO_COUNT; else BUG(); ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); ath79_gpio_chip.ngpio = ath79_gpio_count; + if (soc_is_ar934x()) { + ath79_gpio_chip.direction_input = ar934x_gpio_direction_input; + ath79_gpio_chip.direction_output = ar934x_gpio_direction_output; + } err = gpiochip_add(&ath79_gpio_chip); if (err) diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index bc1c345..1a9234b 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -367,5 +367,6 @@ #define AR724X_GPIO_COUNT 18 #define AR913X_GPIO_COUNT 22 #define AR933X_GPIO_COUNT 30 +#define AR934X_GPIO_COUNT 23 #endif /* __ASM_MACH_AR71XX_REGS_H */ -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:14 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:28:48 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46092 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903631Ab1LWS0O (ORCPT ); Fri, 23 Dec 2011 19:26:14 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id 535E623C008D; Fri, 23 Dec 2011 19:26:13 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 06/16] MIPS: ath79: rework IP2/IP3 interrupt handling Date: Fri, 23 Dec 2011 19:25:32 +0100 Message-Id: <1324664742-3648-7-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32180 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19093 Content-Length: 4417 Lines: 154 The current implementation assumes that flushing the DDR writeback buffer is required for IP2/IP3 interrupts, however this is not true for all SoCs. Use SoC specific IP2/IP3 handlers instead of flushing the buffers in the dispatcher code. Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez --- arch/mips/ath79/irq.c | 92 ++++++++++++++++++++++++++++++++++++++----------- 1 files changed, 72 insertions(+), 20 deletions(-) diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c index 1b073de..9f87ade 100644 --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c @@ -1,7 +1,7 @@ /* * Atheros AR71xx/AR724x/AR913x specific interrupt handling * - * Copyright (C) 2008-2010 Gabor Juhos + * Copyright (C) 2008-2011 Gabor Juhos * Copyright (C) 2008 Imre Kaloz * * Parts of this file are based on Atheros' 2.6.15 BSP @@ -23,8 +23,8 @@ #include #include "common.h" -static unsigned int ath79_ip2_flush_reg; -static unsigned int ath79_ip3_flush_reg; +static void (*ath79_ip2_handler)(void); +static void (*ath79_ip3_handler)(void); static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc) { @@ -152,10 +152,8 @@ asmlinkage void plat_irq_dispatch(void) if (pending & STATUSF_IP7) do_IRQ(ATH79_CPU_IRQ_TIMER); - else if (pending & STATUSF_IP2) { - ath79_ddr_wb_flush(ath79_ip2_flush_reg); - do_IRQ(ATH79_CPU_IRQ_IP2); - } + else if (pending & STATUSF_IP2) + ath79_ip2_handler(); else if (pending & STATUSF_IP4) do_IRQ(ATH79_CPU_IRQ_GE0); @@ -163,10 +161,8 @@ asmlinkage void plat_irq_dispatch(void) else if (pending & STATUSF_IP5) do_IRQ(ATH79_CPU_IRQ_GE1); - else if (pending & STATUSF_IP3) { - ath79_ddr_wb_flush(ath79_ip3_flush_reg); - do_IRQ(ATH79_CPU_IRQ_USB); - } + else if (pending & STATUSF_IP3) + ath79_ip3_handler(); else if (pending & STATUSF_IP6) do_IRQ(ATH79_CPU_IRQ_MISC); @@ -175,22 +171,78 @@ asmlinkage void plat_irq_dispatch(void) spurious_interrupt(); } +/* + * The IP2/IP3 lines are tied to a PCI/WMAC/USB device. Drivers for + * these devices typically allocate coherent DMA memory, however the + * DMA controller may still have some unsynchronized data in the FIFO. + * Issue a flush in the handlers to ensure that the driver sees + * the update. + */ +static void ar71xx_ip2_handler(void) +{ + ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_PCI); + do_IRQ(ATH79_CPU_IRQ_IP2); +} + +static void ar724x_ip2_handler(void) +{ + ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_PCIE); + do_IRQ(ATH79_CPU_IRQ_IP2); +} + +static void ar913x_ip2_handler(void) +{ + ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_WMAC); + do_IRQ(ATH79_CPU_IRQ_IP2); +} + +static void ar933x_ip2_handler(void) +{ + ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_WMAC); + do_IRQ(ATH79_CPU_IRQ_IP2); +} + +static void ar71xx_ip3_handler(void) +{ + ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_USB); + do_IRQ(ATH79_CPU_IRQ_USB); +} + +static void ar724x_ip3_handler(void) +{ + ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_USB); + do_IRQ(ATH79_CPU_IRQ_USB); +} + +static void ar913x_ip3_handler(void) +{ + ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_USB); + do_IRQ(ATH79_CPU_IRQ_USB); +} + +static void ar933x_ip3_handler(void) +{ + ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_USB); + do_IRQ(ATH79_CPU_IRQ_USB); +} + void __init arch_init_irq(void) { if (soc_is_ar71xx()) { - ath79_ip2_flush_reg = AR71XX_DDR_REG_FLUSH_PCI; - ath79_ip3_flush_reg = AR71XX_DDR_REG_FLUSH_USB; + ath79_ip2_handler = ar71xx_ip2_handler; + ath79_ip3_handler = ar71xx_ip3_handler; } else if (soc_is_ar724x()) { - ath79_ip2_flush_reg = AR724X_DDR_REG_FLUSH_PCIE; - ath79_ip3_flush_reg = AR724X_DDR_REG_FLUSH_USB; + ath79_ip2_handler = ar724x_ip2_handler; + ath79_ip3_handler = ar724x_ip3_handler; } else if (soc_is_ar913x()) { - ath79_ip2_flush_reg = AR913X_DDR_REG_FLUSH_WMAC; - ath79_ip3_flush_reg = AR913X_DDR_REG_FLUSH_USB; + ath79_ip2_handler = ar913x_ip2_handler; + ath79_ip3_handler = ar913x_ip3_handler; } else if (soc_is_ar933x()) { - ath79_ip2_flush_reg = AR933X_DDR_REG_FLUSH_WMAC; - ath79_ip3_flush_reg = AR933X_DDR_REG_FLUSH_USB; - } else + ath79_ip2_handler = ar933x_ip2_handler; + ath79_ip3_handler = ar933x_ip3_handler; + } else { BUG(); + } cp0_perfcount_irq = ATH79_MISC_IRQ_PERFC; mips_cpu_irq_init(); -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:16 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:29:12 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46099 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903650Ab1LWS0Q (ORCPT ); Fri, 23 Dec 2011 19:26:16 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id DA86C23C008B; Fri, 23 Dec 2011 19:26:14 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 07/16] MIPS: ath79: add IRQ handling code for AR934X Date: Fri, 23 Dec 2011 19:25:33 +0100 Message-Id: <1324664742-3648-8-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32181 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19094 Content-Length: 6187 Lines: 194 Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez --- arch/mips/ath79/irq.c | 55 +++++++++++++++++++++++- arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 25 +++++++++++ arch/mips/include/asm/mach-ath79/irq.h | 6 ++- 3 files changed, 83 insertions(+), 3 deletions(-) diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c index 9f87ade..90d09fc 100644 --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c @@ -1,10 +1,11 @@ /* * Atheros AR71xx/AR724x/AR913x specific interrupt handling * + * Copyright (C) 2010-2011 Jaiganesh Narayanan * Copyright (C) 2008-2011 Gabor Juhos * Copyright (C) 2008 Imre Kaloz * - * Parts of this file are based on Atheros' 2.6.15 BSP + * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published @@ -129,7 +130,7 @@ static void __init ath79_misc_irq_init(void) if (soc_is_ar71xx() || soc_is_ar913x()) ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask; - else if (soc_is_ar724x() || soc_is_ar933x()) + else if (soc_is_ar724x() || soc_is_ar933x() || soc_is_ar934x()) ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; else BUG(); @@ -143,6 +144,39 @@ static void __init ath79_misc_irq_init(void) irq_set_chained_handler(ATH79_CPU_IRQ_MISC, ath79_misc_irq_handler); } +static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc) +{ + u32 status; + + disable_irq_nosync(irq); + + status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS); + + if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) { + ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_PCIE); + generic_handle_irq(ATH79_IP2_IRQ(0)); + } else if (status & AR934X_PCIE_WMAC_INT_WMAC_ALL) { + ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_WMAC); + generic_handle_irq(ATH79_IP2_IRQ(1)); + } else { + spurious_interrupt(); + } + + enable_irq(irq); +} + +static void ar934x_ip2_irq_init(void) +{ + int i; + + for (i = ATH79_IP2_IRQ_BASE; + i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) + irq_set_chip_and_handler(i, &dummy_irq_chip, + handle_level_irq); + + irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar934x_ip2_irq_dispatch); +} + asmlinkage void plat_irq_dispatch(void) { unsigned long pending; @@ -202,6 +236,11 @@ static void ar933x_ip2_handler(void) do_IRQ(ATH79_CPU_IRQ_IP2); } +static void ar934x_ip2_handler(void) +{ + do_IRQ(ATH79_CPU_IRQ_IP2); +} + static void ar71xx_ip3_handler(void) { ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_USB); @@ -226,6 +265,12 @@ static void ar933x_ip3_handler(void) do_IRQ(ATH79_CPU_IRQ_USB); } +static void ar934x_ip3_handler(void) +{ + ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_USB); + do_IRQ(ATH79_CPU_IRQ_USB); +} + void __init arch_init_irq(void) { if (soc_is_ar71xx()) { @@ -240,6 +285,9 @@ void __init arch_init_irq(void) } else if (soc_is_ar933x()) { ath79_ip2_handler = ar933x_ip2_handler; ath79_ip3_handler = ar933x_ip3_handler; + } else if (soc_is_ar934x()) { + ath79_ip2_handler = ar934x_ip2_handler; + ath79_ip3_handler = ar934x_ip3_handler; } else { BUG(); } @@ -247,4 +295,7 @@ void __init arch_init_irq(void) cp0_perfcount_irq = ATH79_MISC_IRQ_PERFC; mips_cpu_irq_init(); ath79_misc_irq_init(); + + if (soc_is_ar934x()) + ar934x_ip2_irq_init(); } diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index 1a9234b..d6af4eb 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -92,6 +92,12 @@ #define AR933X_DDR_REG_FLUSH_USB 0x84 #define AR933X_DDR_REG_FLUSH_WMAC 0x88 +#define AR934X_DDR_REG_FLUSH_GE0 0x9c +#define AR934X_DDR_REG_FLUSH_GE1 0xa0 +#define AR934X_DDR_REG_FLUSH_USB 0xa4 +#define AR934X_DDR_REG_FLUSH_PCIE 0xa8 +#define AR934X_DDR_REG_FLUSH_WMAC 0xac + /* * PLL block */ @@ -222,6 +228,7 @@ #define AR933X_RESET_REG_BOOTSTRAP 0xac #define AR934X_RESET_REG_BOOTSTRAP 0xb0 +#define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac #define MISC_INT_ETHSW BIT(12) #define MISC_INT_TIMER4 BIT(10) @@ -295,6 +302,24 @@ #define AR934X_BOOTSTRAP_SDRAM_DISABLED BIT(1) #define AR934X_BOOTSTRAP_DDR1 BIT(0) +#define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0) +#define AR934X_PCIE_WMAC_INT_WMAC_TX BIT(1) +#define AR934X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) +#define AR934X_PCIE_WMAC_INT_WMAC_RXHP BIT(3) +#define AR934X_PCIE_WMAC_INT_PCIE_RC BIT(4) +#define AR934X_PCIE_WMAC_INT_PCIE_RC0 BIT(5) +#define AR934X_PCIE_WMAC_INT_PCIE_RC1 BIT(6) +#define AR934X_PCIE_WMAC_INT_PCIE_RC2 BIT(7) +#define AR934X_PCIE_WMAC_INT_PCIE_RC3 BIT(8) +#define AR934X_PCIE_WMAC_INT_WMAC_ALL \ + (AR934X_PCIE_WMAC_INT_WMAC_MISC | AR934X_PCIE_WMAC_INT_WMAC_TX | \ + AR934X_PCIE_WMAC_INT_WMAC_RXLP | AR934X_PCIE_WMAC_INT_WMAC_RXHP) + +#define AR934X_PCIE_WMAC_INT_PCIE_ALL \ + (AR934X_PCIE_WMAC_INT_PCIE_RC | AR934X_PCIE_WMAC_INT_PCIE_RC0 | \ + AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \ + AR934X_PCIE_WMAC_INT_PCIE_RC3) + #define REV_ID_MAJOR_MASK 0xfff0 #define REV_ID_MAJOR_AR71XX 0x00a0 #define REV_ID_MAJOR_AR913X 0x00b0 diff --git a/arch/mips/include/asm/mach-ath79/irq.h b/arch/mips/include/asm/mach-ath79/irq.h index 6ae2646..0968f69 100644 --- a/arch/mips/include/asm/mach-ath79/irq.h +++ b/arch/mips/include/asm/mach-ath79/irq.h @@ -10,7 +10,7 @@ #define __ASM_MACH_ATH79_IRQ_H #define MIPS_CPU_IRQ_BASE 0 -#define NR_IRQS 46 +#define NR_IRQS 48 #define ATH79_MISC_IRQ_BASE 8 #define ATH79_MISC_IRQ_COUNT 32 @@ -19,6 +19,10 @@ #define ATH79_PCI_IRQ_COUNT 6 #define ATH79_PCI_IRQ(_x) (ATH79_PCI_IRQ_BASE + (_x)) +#define ATH79_IP2_IRQ_BASE (ATH79_PCI_IRQ_BASE + ATH79_PCI_IRQ_COUNT) +#define ATH79_IP2_IRQ_COUNT 2 +#define ATH79_IP2_IRQ(_x) (ATH79_IP2_IRQ_BASE + (_x)) + #define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2) #define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3) #define ATH79_CPU_IRQ_GE0 (MIPS_CPU_IRQ_BASE + 4) -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:16 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:29:38 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46104 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903652Ab1LWS0Q (ORCPT ); Fri, 23 Dec 2011 19:26:16 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id E8BFF23C008B; Fri, 23 Dec 2011 19:26:15 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 08/16] MIPS: ath79: add AR934X specific glue to ath79_device_reset_{clear,set} Date: Fri, 23 Dec 2011 19:25:34 +0100 Message-Id: <1324664742-3648-9-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32182 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19095 Content-Length: 2041 Lines: 58 Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez --- arch/mips/ath79/common.c | 9 ++++++++- arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 + 2 files changed, 9 insertions(+), 1 deletions(-) diff --git a/arch/mips/ath79/common.c b/arch/mips/ath79/common.c index f0fda98..5a4adfc 100644 --- a/arch/mips/ath79/common.c +++ b/arch/mips/ath79/common.c @@ -1,9 +1,12 @@ /* * Atheros AR71XX/AR724X/AR913X common routines * - * Copyright (C) 2008-2010 Gabor Juhos + * Copyright (C) 2010-2011 Jaiganesh Narayanan + * Copyright (C) 2008-2011 Gabor Juhos * Copyright (C) 2008 Imre Kaloz * + * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP + * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published * by the Free Software Foundation. @@ -67,6 +70,8 @@ void ath79_device_reset_set(u32 mask) reg = AR913X_RESET_REG_RESET_MODULE; else if (soc_is_ar933x()) reg = AR933X_RESET_REG_RESET_MODULE; + else if (soc_is_ar934x()) + reg = AR934X_RESET_REG_RESET_MODULE; else BUG(); @@ -91,6 +96,8 @@ void ath79_device_reset_clear(u32 mask) reg = AR913X_RESET_REG_RESET_MODULE; else if (soc_is_ar933x()) reg = AR933X_RESET_REG_RESET_MODULE; + else if (soc_is_ar934x()) + reg = AR934X_RESET_REG_RESET_MODULE; else BUG(); diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index d6af4eb..32abbf9 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -227,6 +227,7 @@ #define AR933X_RESET_REG_RESET_MODULE 0x1c #define AR933X_RESET_REG_BOOTSTRAP 0xac +#define AR934X_RESET_REG_RESET_MODULE 0x1c #define AR934X_RESET_REG_BOOTSTRAP 0xb0 #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:18 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:30:00 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46112 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903753Ab1LWS0S (ORCPT ); Fri, 23 Dec 2011 19:26:18 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id E846923C008B; Fri, 23 Dec 2011 19:26:16 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 09/16] MIPS: ath79: register UART device for AR934X SoCs Date: Fri, 23 Dec 2011 19:25:35 +0100 Message-Id: <1324664742-3648-10-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32183 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19097 Content-Length: 699 Lines: 23 Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez --- arch/mips/ath79/dev-common.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/arch/mips/ath79/dev-common.c b/arch/mips/ath79/dev-common.c index f4956f8..45efc63 100644 --- a/arch/mips/ath79/dev-common.c +++ b/arch/mips/ath79/dev-common.c @@ -89,7 +89,8 @@ void __init ath79_register_uart(void) if (soc_is_ar71xx() || soc_is_ar724x() || - soc_is_ar913x()) { + soc_is_ar913x() || + soc_is_ar934x()) { ath79_uart_data[0].uartclk = clk_get_rate(clk); platform_device_register(&ath79_uart_device); } else if (soc_is_ar933x()) { -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:19 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:30:25 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46118 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903776Ab1LWS0T (ORCPT ); Fri, 23 Dec 2011 19:26:19 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id 482AF23C008B; Fri, 23 Dec 2011 19:26:18 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 10/16] MIPS: ath79: add WMAC registration code for AR934X Date: Fri, 23 Dec 2011 19:25:36 +0100 Message-Id: <1324664742-3648-11-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32184 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19098 Content-Length: 3715 Lines: 116 Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez --- arch/mips/ath79/Kconfig | 2 +- arch/mips/ath79/dev-wmac.c | 30 ++++++++++++++++++++++- arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 3 ++ 3 files changed, 32 insertions(+), 3 deletions(-) diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig index 7db8e89..5fa3d7b 100644 --- a/arch/mips/ath79/Kconfig +++ b/arch/mips/ath79/Kconfig @@ -86,7 +86,7 @@ config ATH79_DEV_USB def_bool n config ATH79_DEV_WMAC - depends on (SOC_AR913X || SOC_AR933X) + depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X) def_bool n endif diff --git a/arch/mips/ath79/dev-wmac.c b/arch/mips/ath79/dev-wmac.c index e215070..0a431af 100644 --- a/arch/mips/ath79/dev-wmac.c +++ b/arch/mips/ath79/dev-wmac.c @@ -1,9 +1,12 @@ /* * Atheros AR913X/AR933X SoC built-in WMAC device support * + * Copyright (C) 2010-2011 Jaiganesh Narayanan * Copyright (C) 2008-2011 Gabor Juhos * Copyright (C) 2008 Imre Kaloz * + * Parts of this file are based on Atheros 2.6.15/2.6.31 BSP + * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published * by the Free Software Foundation. @@ -26,8 +29,7 @@ static struct resource ath79_wmac_resources[] = { /* .start and .end fields are filled dynamically */ .flags = IORESOURCE_MEM, }, { - .start = ATH79_CPU_IRQ_IP2, - .end = ATH79_CPU_IRQ_IP2, + /* .start and .end fields are filled dynamically */ .flags = IORESOURCE_IRQ, }, }; @@ -53,6 +55,8 @@ static void __init ar913x_wmac_setup(void) ath79_wmac_resources[0].start = AR913X_WMAC_BASE; ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1; + ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2; + ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2; } @@ -79,6 +83,8 @@ static void __init ar933x_wmac_setup(void) ath79_wmac_resources[0].start = AR933X_WMAC_BASE; ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1; + ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2; + ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2; t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); if (t & AR933X_BOOTSTRAP_REF_CLK_40) @@ -92,12 +98,32 @@ static void __init ar933x_wmac_setup(void) ath79_wmac_data.external_reset = ar933x_wmac_reset; } +static void ar934x_wmac_setup(void) +{ + u32 t; + + ath79_wmac_device.name = "ar934x_wmac"; + + ath79_wmac_resources[0].start = AR934X_WMAC_BASE; + ath79_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1; + ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); + ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); + + t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); + if (t & AR934X_BOOTSTRAP_REF_CLK_40) + ath79_wmac_data.is_clk_25mhz = false; + else + ath79_wmac_data.is_clk_25mhz = true; +} + void __init ath79_register_wmac(u8 *cal_data) { if (soc_is_ar913x()) ar913x_wmac_setup(); else if (soc_is_ar933x()) ar933x_wmac_setup(); + else if (soc_is_ar934x()) + ar934x_wmac_setup(); else BUG(); diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index 32abbf9..1caa78a 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -61,6 +61,9 @@ #define AR933X_EHCI_BASE 0x1b000000 #define AR933X_EHCI_SIZE 0x1000 +#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) +#define AR934X_WMAC_SIZE 0x20000 + /* * DDR_CTRL block */ -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:19 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:30:49 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46124 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903777Ab1LWS0T (ORCPT ); Fri, 23 Dec 2011 19:26:19 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id 1EB9423C008B; Fri, 23 Dec 2011 19:26:19 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 11/16] MIPS: ath79: add USB platform setup code for AR934X Date: Fri, 23 Dec 2011 19:25:37 +0100 Message-Id: <1324664742-3648-12-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32185 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19099 Content-Length: 3472 Lines: 109 Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez --- arch/mips/ath79/dev-usb.c | 28 +++++++++++++++++++ arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 35 ++++++++++++++++++++++++ 2 files changed, 63 insertions(+), 0 deletions(-) diff --git a/arch/mips/ath79/dev-usb.c b/arch/mips/ath79/dev-usb.c index 002d6d2..08ca26c 100644 --- a/arch/mips/ath79/dev-usb.c +++ b/arch/mips/ath79/dev-usb.c @@ -180,6 +180,32 @@ static void __init ar933x_usb_setup(void) platform_device_register(&ath79_ehci_device); } +static void __init ar934x_usb_setup(void) +{ + u32 bootstrap; + + bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); + if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) + return; + + ath79_device_reset_clear(AR934X_RESET_USBSUS_OVERRIDE); + udelay(1000); + + ath79_device_reset_set(AR934X_RESET_USB_PHY); + udelay(1000); + + ath79_device_reset_set(AR934X_RESET_USB_PHY_ANALOG); + udelay(1000); + + ath79_device_reset_set(AR934X_RESET_USB_HOST); + udelay(1000); + + ath79_ehci_resources[0].start = AR934X_EHCI_BASE; + ath79_ehci_resources[0].end = AR934X_EHCI_BASE + AR934X_EHCI_SIZE - 1; + ath79_ehci_device.name = "ar934x-ehci"; + platform_device_register(&ath79_ehci_device); +} + void __init ath79_register_usb(void) { if (soc_is_ar71xx()) @@ -192,6 +218,8 @@ void __init ath79_register_usb(void) ar913x_usb_setup(); else if (soc_is_ar933x()) ar933x_usb_setup(); + else if (soc_is_ar934x()) + ar934x_usb_setup(); else BUG(); } diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index 1caa78a..4d64b88 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -63,6 +63,8 @@ #define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) #define AR934X_WMAC_SIZE 0x20000 +#define AR934X_EHCI_BASE 0x1b000000 +#define AR934X_EHCI_SIZE 0x1000 /* * DDR_CTRL block @@ -288,6 +290,39 @@ #define AR933X_RESET_USB_PHY BIT(4) #define AR933X_RESET_USBSUS_OVERRIDE BIT(3) +#define AR934X_RESET_HOST BIT(31) +#define AR934X_RESET_SLIC BIT(30) +#define AR934X_RESET_HDMA BIT(29) +#define AR934X_RESET_EXTERNAL BIT(28) +#define AR934X_RESET_RTC BIT(27) +#define AR934X_RESET_PCIE_EP_INT BIT(26) +#define AR934X_RESET_CHKSUM_ACC BIT(25) +#define AR934X_RESET_FULL_CHIP BIT(24) +#define AR934X_RESET_GE1_MDIO BIT(23) +#define AR934X_RESET_GE0_MDIO BIT(22) +#define AR934X_RESET_CPU_NMI BIT(21) +#define AR934X_RESET_CPU_COLD BIT(20) +#define AR934X_RESET_HOST_RESET_INT BIT(19) +#define AR934X_RESET_PCIE_EP BIT(18) +#define AR934X_RESET_UART1 BIT(17) +#define AR934X_RESET_DDR BIT(16) +#define AR934X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) +#define AR934X_RESET_NANDF BIT(14) +#define AR934X_RESET_GE1_MAC BIT(13) +#define AR934X_RESET_ETH_SWITCH_ANALOG BIT(12) +#define AR934X_RESET_USB_PHY_ANALOG BIT(11) +#define AR934X_RESET_HOST_DMA_INT BIT(10) +#define AR934X_RESET_GE0_MAC BIT(9) +#define AR934X_RESET_ETH_SIWTCH BIT(8) +#define AR934X_RESET_PCIE_PHY BIT(7) +#define AR934X_RESET_PCIE BIT(6) +#define AR934X_RESET_USB_HOST BIT(5) +#define AR934X_RESET_USB_PHY BIT(4) +#define AR934X_RESET_USBSUS_OVERRIDE BIT(3) +#define AR934X_RESET_LUT BIT(2) +#define AR934X_RESET_MBOX BIT(1) +#define AR934X_RESET_I2S BIT(0) + #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:21 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:31:16 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46131 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903778Ab1LWS0V (ORCPT ); Fri, 23 Dec 2011 19:26:21 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id 5008723C007C; Fri, 23 Dec 2011 19:26:20 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 12/16] MIPS: ath79: add PCI_AR724X Kconfig symbol Date: Fri, 23 Dec 2011 19:25:38 +0100 Message-Id: <1324664742-3648-13-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32186 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19100 Content-Length: 2018 Lines: 66 The AR724X specific PCI code can be used for the AR934X SoCs, however it can be selected only if SOC_AR724X is set. Introduce a new Kconfig symbol in order to be able to use the code for AR934X as well. Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez --- arch/mips/ath79/Kconfig | 4 ++++ arch/mips/include/asm/mach-ath79/pci.h | 2 +- arch/mips/pci/Makefile | 2 +- 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig index 5fa3d7b..123cc37 100644 --- a/arch/mips/ath79/Kconfig +++ b/arch/mips/ath79/Kconfig @@ -59,6 +59,7 @@ config SOC_AR724X select USB_ARCH_HAS_EHCI select USB_ARCH_HAS_OHCI select HW_HAS_PCI + select PCI_AR724X if PCI def_bool n config SOC_AR913X @@ -73,6 +74,9 @@ config SOC_AR934X select USB_ARCH_HAS_EHCI def_bool n +config PCI_AR724X + def_bool n + config ATH79_DEV_GPIO_BUTTONS def_bool n diff --git a/arch/mips/include/asm/mach-ath79/pci.h b/arch/mips/include/asm/mach-ath79/pci.h index 58d065f..0af4de3 100644 --- a/arch/mips/include/asm/mach-ath79/pci.h +++ b/arch/mips/include/asm/mach-ath79/pci.h @@ -19,7 +19,7 @@ int ar71xx_pcibios_init(void); static inline int ar71xx_pcibios_init(void) { return 0 }; #endif -#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X) +#if defined(CONFIG_PCI_AR724X) int ar724x_pcibios_init(int irq); #else static inline int ar724x_pcibios_init(int irq) { return 0 }; diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index b1c0a1c..43c5138 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -20,7 +20,7 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \ ops-bcm63xx.o obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o obj-$(CONFIG_SOC_AR71XX) += pci-ar71xx.o -obj-$(CONFIG_SOC_AR724X) += pci-ar724x.o +obj-$(CONFIG_PCI_AR724X) += pci-ar724x.o # # These are still pretty much in the old state, watch, go blind. -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:23 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:31:42 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46136 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903779Ab1LWS0X (ORCPT ); Fri, 23 Dec 2011 19:26:23 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id 8862D23C007C; Fri, 23 Dec 2011 19:26:21 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 13/16] MIPS: ath79: add PCI registration code for AR934X Date: Fri, 23 Dec 2011 19:25:39 +0100 Message-Id: <1324664742-3648-14-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32187 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19101 Content-Length: 1758 Lines: 60 Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez --- arch/mips/ath79/Kconfig | 2 ++ arch/mips/ath79/pci.c | 13 ++++++++++++- 2 files changed, 14 insertions(+), 1 deletions(-) diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig index 123cc37..ea28e89 100644 --- a/arch/mips/ath79/Kconfig +++ b/arch/mips/ath79/Kconfig @@ -72,6 +72,8 @@ config SOC_AR933X config SOC_AR934X select USB_ARCH_HAS_EHCI + select HW_HAS_PCI + select PCI_AR724X if PCI def_bool n config PCI_AR724X diff --git a/arch/mips/ath79/pci.c b/arch/mips/ath79/pci.c index bc40070..ca83abd 100644 --- a/arch/mips/ath79/pci.c +++ b/arch/mips/ath79/pci.c @@ -14,6 +14,7 @@ #include #include +#include #include #include #include @@ -57,7 +58,9 @@ int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) if (soc_is_ar71xx()) { ath79_pci_irq_map = ar71xx_pci_irq_map; ath79_pci_nr_irqs = ARRAY_SIZE(ar71xx_pci_irq_map); - } else if (soc_is_ar724x()) { + } else if (soc_is_ar724x() || + soc_is_ar9342() || + soc_is_ar9344()) { ath79_pci_irq_map = ar724x_pci_irq_map; ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map); } else { @@ -115,5 +118,13 @@ int __init ath79_register_pci(void) if (soc_is_ar724x()) return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2); + if (soc_is_ar9342() || soc_is_ar9344()) { + u32 bootstrap; + + bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); + if (bootstrap & AR934X_BOOTSTRAP_PCIE_RC) + return ar724x_pcibios_init(ATH79_IP2_IRQ(0)); + } + return -ENODEV; } -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:23 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:32:05 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46144 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903780Ab1LWS0X (ORCPT ); Fri, 23 Dec 2011 19:26:23 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id 790EC23C008D; Fri, 23 Dec 2011 19:26:22 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos Subject: [PATCH 14/16] MIPS: ath79: add initial support for the Atheros DB120 board Date: Fri, 23 Dec 2011 19:25:40 +0100 Message-Id: <1324664742-3648-15-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32188 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19102 Content-Length: 6932 Lines: 220 Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez --- arch/mips/ath79/Kconfig | 12 +++ arch/mips/ath79/Makefile | 1 + arch/mips/ath79/mach-db120.c | 155 ++++++++++++++++++++++++++++++++++++++++++ arch/mips/ath79/machtypes.h | 1 + 4 files changed, 169 insertions(+), 0 deletions(-) create mode 100644 arch/mips/ath79/mach-db120.c diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig index ea28e89..f44feee 100644 --- a/arch/mips/ath79/Kconfig +++ b/arch/mips/ath79/Kconfig @@ -26,6 +26,18 @@ config ATH79_MACH_AP81 Say 'Y' here if you want your kernel to support the Atheros AP81 reference board. +config ATH79_MACH_DB120 + bool "Atheros DB120 reference board" + select SOC_AR934X + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_SPI + select ATH79_DEV_USB + select ATH79_DEV_WMAC + help + Say 'Y' here if you want your kernel to support the + Atheros DB120 reference board. + config ATH79_MACH_PB44 bool "Atheros PB44 reference board" select SOC_AR71XX diff --git a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile index 221a76a9..2b54d98 100644 --- a/arch/mips/ath79/Makefile +++ b/arch/mips/ath79/Makefile @@ -28,5 +28,6 @@ obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o # obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o +obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o diff --git a/arch/mips/ath79/mach-db120.c b/arch/mips/ath79/mach-db120.c new file mode 100644 index 0000000..075c3dc --- /dev/null +++ b/arch/mips/ath79/mach-db120.c @@ -0,0 +1,155 @@ +/* + * Atheros DB120 reference board support + * + * Copyright (c) 2011 Qualcomm Atheros + * Copyright (c) 2011 Gabor Juhos + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted (subject to the limitations in the + * disclaimer below) provided that the following conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * * Neither the name of Qualcomm Atheros nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE + * GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN + * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include + +#include "machtypes.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-spi.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "pci.h" + +#define DB120_GPIO_LED_WLAN_5G 12 +#define DB120_GPIO_LED_WLAN_2G 13 +#define DB120_GPIO_LED_STATUS 14 +#define DB120_GPIO_LED_WPS 15 + +#define DB120_GPIO_BTN_WPS 16 + +#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */ +#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL) + +#define DB120_WMAC_CALDATA_OFFSET 0x1000 +#define DB120_PCIE_CALDATA_OFFSET 0x5000 + +static struct gpio_led db120_leds_gpio[] __initdata = { + { + .name = "db120:green:status", + .gpio = DB120_GPIO_LED_STATUS, + .active_low = 1, + }, + { + .name = "db120:green:wps", + .gpio = DB120_GPIO_LED_WPS, + .active_low = 1, + }, + { + .name = "db120:green:wlan-5g", + .gpio = DB120_GPIO_LED_WLAN_5G, + .active_low = 1, + }, + { + .name = "db120:green:wlan-2g", + .gpio = DB120_GPIO_LED_WLAN_2G, + .active_low = 1, + }, +}; + +static struct gpio_keys_button db120_gpio_keys[] __initdata = { + { + .desc = "WPS button", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL, + .gpio = DB120_GPIO_BTN_WPS, + .active_low = 1, + }, +}; + +static struct spi_board_info db120_spi_info[] = { + { + .bus_num = 0, + .chip_select = 0, + .max_speed_hz = 25000000, + .modalias = "s25sl064a", + } +}; + +static struct ath79_spi_platform_data db120_spi_data = { + .bus_num = 0, + .num_chipselect = 1, +}; + +#ifdef CONFIG_PCI +static struct ath9k_platform_data db120_ath9k_data; + +static int db120_pci_plat_dev_init(struct pci_dev *dev) +{ + switch (PCI_SLOT(dev->devfn)) { + case 0: + dev->dev.platform_data = &db120_ath9k_data; + break; + } + + return 0; +} + +static void __init db120_pci_init(u8 *eeprom) +{ + memcpy(db120_ath9k_data.eeprom_data, eeprom, + sizeof(db120_ath9k_data.eeprom_data)); + + ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init); + ath79_register_pci(); +} +#else +static inline void db120_pci_init(void) {} +#endif /* CONFIG_PCI */ + +static void __init db120_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio), + db120_leds_gpio); + ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL, + ARRAY_SIZE(db120_gpio_keys), + db120_gpio_keys); + ath79_register_spi(&db120_spi_data, db120_spi_info, + ARRAY_SIZE(db120_spi_info)); + ath79_register_usb(); + ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET); + db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); +} + +MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board", + db120_setup); diff --git a/arch/mips/ath79/machtypes.h b/arch/mips/ath79/machtypes.h index 9a1f382..af92e5c 100644 --- a/arch/mips/ath79/machtypes.h +++ b/arch/mips/ath79/machtypes.h @@ -18,6 +18,7 @@ enum ath79_mach_type { ATH79_MACH_GENERIC = 0, ATH79_MACH_AP121, /* Atheros AP121 reference board */ ATH79_MACH_AP81, /* Atheros AP81 reference board */ + ATH79_MACH_DB120, /* Atheros DB120 reference board */ ATH79_MACH_PB44, /* Atheros PB44 reference board */ ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */ }; -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:24 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:32:29 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46150 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903781Ab1LWS0Y (ORCPT ); Fri, 23 Dec 2011 19:26:24 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id D6F0A23C007C; Fri, 23 Dec 2011 19:26:23 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos , Alan Stern , Greg Kroah-Hartman , linux-usb@vger.kernel.org Subject: [PATCH 15/16] USB: ehci-ath79: add device_id entry for the AR934X SoCs Date: Fri, 23 Dec 2011 19:25:41 +0100 Message-Id: <1324664742-3648-16-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32189 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19103 Content-Length: 1351 Lines: 43 Also make the USB_EHCI_ATH79 selectable for the AR934X SoCs. Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez Cc: Alan Stern Cc: Greg Kroah-Hartman Cc: linux-usb@vger.kernel.org --- drivers/usb/host/Kconfig | 2 +- drivers/usb/host/ehci-ath79.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletions(-) diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 8b094b4..d5c8fb6 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -210,7 +210,7 @@ config USB_CNS3XXX_EHCI config USB_EHCI_ATH79 bool "EHCI support for AR7XXX/AR9XXX SoCs" - depends on USB_EHCI_HCD && (SOC_AR71XX || SOC_AR724X || SOC_AR913X || SOC_AR933X) + depends on USB_EHCI_HCD && (SOC_AR71XX || SOC_AR724X || SOC_AR913X || SOC_AR933X || SOC_AR934X) select USB_EHCI_ROOT_HUB_TT default y ---help--- diff --git a/drivers/usb/host/ehci-ath79.c b/drivers/usb/host/ehci-ath79.c index f1424f9..2a21733 100644 --- a/drivers/usb/host/ehci-ath79.c +++ b/drivers/usb/host/ehci-ath79.c @@ -37,6 +37,10 @@ static const struct platform_device_id ehci_ath79_id_table[] = { .driver_data = EHCI_ATH79_IP_V2, }, { + .name = "ar934x-ehci", + .driver_data = EHCI_ATH79_IP_V2, + }, + { /* terminating entry */ }, }; -- 1.7.2.1 From juhosg@openwrt.org Fri Dec 23 19:26:26 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 23 Dec 2011 19:32:53 +0100 (CET) Received: from arrakis.dune.hu ([78.24.191.176]:46159 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903782Ab1LWS00 (ORCPT ); Fri, 23 Dec 2011 19:26:26 +0100 X-Virus-Scanned: at arrakis.dune.hu Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id EF6EA23C007C; Fri, 23 Dec 2011 19:26:24 +0100 (CET) From: Gabor Juhos To: Ralf Baechle Cc: linux-mips@linux-mips.org, "Luis R. Rodriguez" , mcgrof@infradead.org, Gabor Juhos , Wim Van Sebroeck , linux-watchdog@vger.kernel.org Subject: [PATCH 16/16] watchdog: ath79_wdt: flush register writes Date: Fri, 23 Dec 2011 19:25:42 +0100 Message-Id: <1324664742-3648-17-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> References: <1324664742-3648-1-git-send-email-juhosg@openwrt.org> X-archive-position: 32190 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: juhosg@openwrt.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19104 Content-Length: 1290 Lines: 44 The watchdog register writes required to have a flush in order to commit the values to the register. Without the flush, the driver not function correctly on AR934X SoCs. Signed-off-by: Gabor Juhos Acked-by: Luis R. Rodriguez Cc: Wim Van Sebroeck Cc: linux-watchdog@vger.kernel.org --- drivers/watchdog/ath79_wdt.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/drivers/watchdog/ath79_wdt.c b/drivers/watchdog/ath79_wdt.c index 725c84b..9db8083 100644 --- a/drivers/watchdog/ath79_wdt.c +++ b/drivers/watchdog/ath79_wdt.c @@ -68,17 +68,23 @@ static int max_timeout; static inline void ath79_wdt_keepalive(void) { ath79_reset_wr(AR71XX_RESET_REG_WDOG, wdt_freq * timeout); + /* flush write */ + ath79_reset_rr(AR71XX_RESET_REG_WDOG); } static inline void ath79_wdt_enable(void) { ath79_wdt_keepalive(); ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_FCR); + /* flush write */ + ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL); } static inline void ath79_wdt_disable(void) { ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_NONE); + /* flush write */ + ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL); } static int ath79_wdt_set_timeout(int val) -- 1.7.2.1 From benh@kernel.crashing.org Sat Dec 24 08:00:56 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sat, 24 Dec 2011 08:01:41 +0100 (CET) Received: from gate.crashing.org ([63.228.1.57]:42020 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903559Ab1LXHA4 (ORCPT ); Sat, 24 Dec 2011 08:00:56 +0100 Received: from [IPv6:::1] (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id pBO70F5h021853; Sat, 24 Dec 2011 01:00:16 -0600 Message-ID: <1324710014.6632.23.camel@pasglop> Subject: Re: [PATCH 00/14] DMA-mapping framework redesign preparation From: Benjamin Herrenschmidt To: Matthew Wilcox Cc: Marek Szyprowski , linux-kernel@vger.kernel.org, Thomas Gleixner , Andrew Morton , Arnd Bergmann , Stephen Rothwell , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, Jonathan Corbet , Kyungmin Park , Andrzej Pietrasiewicz Date: Sat, 24 Dec 2011 18:00:14 +1100 In-Reply-To: <20111223163516.GO20129@parisc-linux.org> References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> <20111223163516.GO20129@parisc-linux.org> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.2- Content-Transfer-Encoding: 7bit Mime-Version: 1.0 X-archive-position: 32191 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: benh@kernel.crashing.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19287 Content-Length: 1156 Lines: 26 On Fri, 2011-12-23 at 09:35 -0700, Matthew Wilcox wrote: > I really think this wants to be a separate function. > dma_alloc_coherent > is for allocating memory to be shared between the kernel and a driver; > we already have dma_map_sg for mapping userspace I/O as an alternative > interface. This feels like it's something different again rather than > an option to dma_alloc_coherent. Depends. There can be some interesting issues with some of the ARM stuff out there (and to a lesser extent older ppc embedded stuff). For example, some devices really want a physically contiguous chunk, and are not cache coherent. In that case, you can't keep the linear mapping around. But you also don't waste your precious kernel virtual space creating a separate non-cachable mapping for those. In general, dma mapping attributes as a generic feature make sense, whether this specific attribute does or not though. And we probably want space for platform specific attributes, for example, FSL embedded iommu's have "interesting" features for directing data toward a specific core cache etc... that we might want to expose using such attributes. Cheers, Ben. From kumba@gentoo.org Sun Dec 25 02:46:07 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Sun, 25 Dec 2011 02:46:12 +0100 (CET) Received: from qmta14.emeryville.ca.mail.comcast.net ([76.96.27.212]:59006 "EHLO qmta14.emeryville.ca.mail.comcast.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903593Ab1LYBqH (ORCPT ); Sun, 25 Dec 2011 02:46:07 +0100 Received: from omta16.emeryville.ca.mail.comcast.net ([76.96.30.72]) by qmta14.emeryville.ca.mail.comcast.net with comcast id DDjk1i0011ZMdJ4AEDlyDf; Sun, 25 Dec 2011 01:45:58 +0000 Received: from [192.168.1.13] ([76.106.69.86]) by omta16.emeryville.ca.mail.comcast.net with comcast id DDWx1i00C1rgsis8cDWyl3; Sun, 25 Dec 2011 01:30:59 +0000 Message-ID: <4EF6803C.9060203@gentoo.org> Date: Sat, 24 Dec 2011 20:45:32 -0500 From: Joshua Kinard User-Agent: Mozilla/5.0 (Windows NT 6.0; WOW64; rv:8.0) Gecko/20111105 Thunderbird/8.0 MIME-Version: 1.0 To: netdev@vger.kernel.org, Linux MIPS List Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery References: <4EED3A3D.9080503@gentoo.org> In-Reply-To: <4EED3A3D.9080503@gentoo.org> X-Enigmail-Version: 1.3.4 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 32192 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19395 Content-Length: 6369 Lines: 206 SGI IP32 (O2)'s ethernet driver (meth) lacks meth_set_rx_mode, which prevents IPv6 from working completely because any ICMPv6 neighbor solicitation requests aren't picked up by the driver. So the machine can ping out and connect to other systems, but other systems will have a very hard time connecting to the O2. Signed-off-by: Joshua Kinard --- arch/mips/include/asm/ip32/mace.h | 52 +++++++++++++++---------------- drivers/net/ethernet/sgi/meth.c | 62 ++++++++++++++++++++++++++++++++++---- 2 files changed, 82 insertions(+), 32 deletions(-) diff -Naurp a/arch/mips/include/asm/ip32/mace.h b/arch/mips/include/asm/ip32/mace.h --- a/arch/mips/include/asm/ip32/mace.h 2011-12-24 16:19:46.703561171 -0500 +++ b/arch/mips/include/asm/ip32/mace.h 2011-12-24 16:27:40.613556791 -0500 @@ -95,35 +95,35 @@ struct mace_video { * Ethernet interface */ struct mace_ethernet { - volatile unsigned long mac_ctrl; - volatile unsigned long int_stat; - volatile unsigned long dma_ctrl; - volatile unsigned long timer; - volatile unsigned long tx_int_al; - volatile unsigned long rx_int_al; - volatile unsigned long tx_info; - volatile unsigned long tx_info_al; - volatile unsigned long rx_buff; - volatile unsigned long rx_buff_al1; - volatile unsigned long rx_buff_al2; - volatile unsigned long diag; - volatile unsigned long phy_data; - volatile unsigned long phy_regs; - volatile unsigned long phy_trans_go; - volatile unsigned long backoff_seed; + volatile u64 mac_ctrl; + volatile u64 int_stat; + volatile u64 dma_ctrl; + volatile u64 timer; + volatile u64 tx_int_al; + volatile u64 rx_int_al; + volatile u64 tx_info; + volatile u64 tx_info_al; + volatile u64 rx_buff; + volatile u64 rx_buff_al1; + volatile u64 rx_buff_al2; + volatile u64 diag; + volatile u64 phy_data; + volatile u64 phy_regs; + volatile u64 phy_trans_go; + volatile u64 backoff_seed; /*===================================*/ - volatile unsigned long imq_reserved[4]; - volatile unsigned long mac_addr; - volatile unsigned long mac_addr2; - volatile unsigned long mcast_filter; - volatile unsigned long tx_ring_base; + volatile u64 imq_reserved[4]; + volatile u64 mac_addr; + volatile u64 mac_addr2; + volatile u64 mcast_filter; + volatile u64 tx_ring_base; /* Following are read-only registers for debugging */ - volatile unsigned long tx_pkt1_hdr; - volatile unsigned long tx_pkt1_ptr[3]; - volatile unsigned long tx_pkt2_hdr; - volatile unsigned long tx_pkt2_ptr[3]; + volatile u64 tx_pkt1_hdr; + volatile u64 tx_pkt1_ptr[3]; + volatile u64 tx_pkt2_hdr; + volatile u64 tx_pkt2_ptr[3]; /*===================================*/ - volatile unsigned long rx_fifo; + volatile u64 rx_fifo; }; /* diff -Naurp a/drivers/net/ethernet/sgi/meth.c b/drivers/net/ethernet/sgi/meth.c --- a/drivers/net/ethernet/sgi/meth.c 2011-12-24 16:20:06.743560985 -0500 +++ b/drivers/net/ethernet/sgi/meth.c 2011-12-24 16:27:18.743556993 -0500 @@ -28,6 +28,7 @@ #include /* struct tcphdr */ #include #include /* MII definitions */ +#include #include #include @@ -48,9 +49,6 @@ #define MFE_RX_DEBUG 0 #endif - -static const char *meth_str="SGI O2 Fast Ethernet"; - /* The maximum time waited (in jiffies) before assuming a Tx failed. (400ms) */ #define TX_TIMEOUT (400*HZ/1000) @@ -58,27 +56,44 @@ static int timeout = TX_TIMEOUT; module_param(timeout, int, 0); /* + * Maximum number of multicast addresses to filter (vs. Rx-all-multicast). + * MACE Ethernet uses a 64 element hash table based on the Ethernet CRC. + */ +#define METH_MCF_LIMIT 32 + +/* Driver name */ +#define METH_DRV_NAME "SGI O2 Fast Ethernet" + +/* * This structure is private to each device. It is used to pass * packets in and out, so there is place for a packet */ struct meth_private { /* in-memory copy of MAC Control register */ - unsigned long mac_ctrl; + u64 mac_ctrl; + /* in-memory copy of DMA Control register */ - unsigned long dma_ctrl; + u64 dma_ctrl; + /* address of PHY, used by mdio_* functions, initialized in mdio_probe */ unsigned long phy_addr; + + /* TX bits */ tx_packet *tx_ring; dma_addr_t tx_ring_dma; struct sk_buff *tx_skbs[TX_RING_ENTRIES]; dma_addr_t tx_skb_dmas[TX_RING_ENTRIES]; unsigned long tx_read, tx_write, tx_count; + /* RX bits */ rx_packet *rx_ring[RX_RING_ENTRIES]; dma_addr_t rx_ring_dmas[RX_RING_ENTRIES]; struct sk_buff *rx_skbs[RX_RING_ENTRIES]; unsigned long rx_write; + /* Multicast filter. */ + u64 mcast_filter; + spinlock_t meth_lock; }; @@ -323,7 +338,7 @@ static int meth_open(struct net_device * if (ret < 0) goto out_free_tx_ring; - ret = request_irq(dev->irq, meth_interrupt, 0, meth_str, dev); + ret = request_irq(dev->irq, meth_interrupt, 0, METH_DRV_NAME, dev); if (ret) { printk(KERN_ERR "%s: Can't get irq %d\n", dev->name, dev->irq); goto out_free_rx_ring; @@ -765,6 +780,40 @@ static int meth_ioctl(struct net_device } } +static void meth_set_rx_mode(struct net_device *dev) +{ + struct meth_private *priv = netdev_priv(dev); + unsigned long flags; + + netif_stop_queue(dev); + spin_lock_irqsave(&priv->meth_lock, flags); + priv->mac_ctrl &= ~METH_PROMISC; + + if (dev->flags & IFF_PROMISC) { + priv->mac_ctrl |= METH_PROMISC; + priv->mcast_filter = 0xffffffffffffffffUL; + } else if ((netdev_mc_count(dev) > METH_MCF_LIMIT) || + (dev->flags & IFF_ALLMULTI)) { + priv->mac_ctrl |= METH_ACCEPT_AMCAST; + priv->mcast_filter = 0xffffffffffffffffUL; + } else { + struct netdev_hw_addr *ha; + priv->mac_ctrl |= METH_ACCEPT_MCAST; + + netdev_for_each_mc_addr(ha, dev) + set_bit((ether_crc(ETH_ALEN, ha->addr) >> 26), + (volatile unsigned long *)&priv->mcast_filter); + } + + /* Write the changes to the chip registers. */ + mace->eth.mac_ctrl = priv->mac_ctrl; + mace->eth.mcast_filter = priv->mcast_filter; + + /* Done! */ + spin_unlock_irqrestore(&priv->meth_lock, flags); + netif_wake_queue(dev); +} + static const struct net_device_ops meth_netdev_ops = { .ndo_open = meth_open, .ndo_stop = meth_release, @@ -774,6 +823,7 @@ static const struct net_device_ops meth_ .ndo_change_mtu = eth_change_mtu, .ndo_validate_addr = eth_validate_addr, .ndo_set_mac_address = eth_mac_addr, + .ndo_set_rx_mode = meth_set_rx_mode, }; /* From davem@davemloft.net Mon Dec 26 21:17:24 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 26 Dec 2011 21:17:28 +0100 (CET) Received: from shards.monkeyblade.net ([198.137.202.13]:50914 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903595Ab1LZURY (ORCPT ); Mon, 26 Dec 2011 21:17:24 +0100 Received: from localhost (nat-pool-rdu.redhat.com [66.187.233.202]) (authenticated bits=0) by shards.monkeyblade.net (8.14.4/8.14.4) with ESMTP id pBQKHDEQ014809 (version=TLSv1/SSLv3 cipher=RC4-SHA bits=128 verify=NO); Mon, 26 Dec 2011 12:17:14 -0800 Date: Mon, 26 Dec 2011 15:17:13 -0500 (EST) Message-Id: <20111226.151713.2002746283994460284.davem@davemloft.net> To: kumba@gentoo.org Cc: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery From: David Miller In-Reply-To: <4EF6803C.9060203@gentoo.org> References: <4EED3A3D.9080503@gentoo.org> <4EF6803C.9060203@gentoo.org> X-Mailer: Mew version 6.4 on Emacs 23.3 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.6 (shards.monkeyblade.net [198.137.202.13]); Mon, 26 Dec 2011 12:17:15 -0800 (PST) X-archive-position: 32193 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19726 Content-Length: 667 Lines: 16 From: Joshua Kinard Date: Sat, 24 Dec 2011 20:45:32 -0500 > SGI IP32 (O2)'s ethernet driver (meth) lacks meth_set_rx_mode, which > prevents IPv6 from working completely because any ICMPv6 neighbor > solicitation requests aren't picked up by the driver. So the machine can > ping out and connect to other systems, but other systems will have a very > hard time connecting to the O2. > > Signed-off-by: Joshua Kinard Lots of completely unrelated changes here, the IRQ name string has nothing to do with specifically fixing the ICMPv6 neighbour discovery bug. Do not mix changes like this, one change per patch please, thanks. From kumba@gentoo.org Tue Dec 27 05:55:09 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 27 Dec 2011 05:55:14 +0100 (CET) Received: from qmta14.emeryville.ca.mail.comcast.net ([76.96.27.212]:38524 "EHLO qmta14.emeryville.ca.mail.comcast.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903554Ab1L0EzJ (ORCPT ); Tue, 27 Dec 2011 05:55:09 +0100 Received: from omta04.emeryville.ca.mail.comcast.net ([76.96.30.35]) by qmta14.emeryville.ca.mail.comcast.net with comcast id E4ue1i0010lTkoCAE4uv4E; Tue, 27 Dec 2011 04:54:55 +0000 Received: from [192.168.1.13] ([76.106.69.86]) by omta04.emeryville.ca.mail.comcast.net with comcast id E4lh1i01T1rgsis8Q4liLC; Tue, 27 Dec 2011 04:45:43 +0000 Message-ID: <4EF94F8F.7060506@gentoo.org> Date: Mon, 26 Dec 2011 23:54:39 -0500 From: Joshua Kinard User-Agent: Mozilla/5.0 (Windows NT 6.0; WOW64; rv:8.0) Gecko/20111105 Thunderbird/8.0 MIME-Version: 1.0 To: David Miller CC: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery References: <4EED3A3D.9080503@gentoo.org> <4EF6803C.9060203@gentoo.org> <20111226.151713.2002746283994460284.davem@davemloft.net> In-Reply-To: <20111226.151713.2002746283994460284.davem@davemloft.net> X-Enigmail-Version: 1.3.4 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 32194 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19801 Content-Length: 1280 Lines: 37 On 12/26/2011 15:17, David Miller wrote: > From: Joshua Kinard > Date: Sat, 24 Dec 2011 20:45:32 -0500 > >> SGI IP32 (O2)'s ethernet driver (meth) lacks meth_set_rx_mode, which >> prevents IPv6 from working completely because any ICMPv6 neighbor >> solicitation requests aren't picked up by the driver. So the machine can >> ping out and connect to other systems, but other systems will have a very >> hard time connecting to the O2. >> >> Signed-off-by: Joshua Kinard > > Lots of completely unrelated changes here, the IRQ name string has > nothing to do with specifically fixing the ICMPv6 neighbour discovery > bug. > > Do not mix changes like this, one change per patch please, thanks. Noted. I dropped the name change patch and minimized the changes to the mace registers to just the two registers needed for this specific case. I'll send two separate patches for the remaining registers and the name bit to just linux-mips later on. Patch to follow. Thanks, -- Joshua Kinard Gentoo/MIPS kumba@gentoo.org 4096R/D25D95E3 2011-03-28 "The past tempts us, the present confuses us, the future frightens us. And our lives slip away, moment by moment, lost in that vast, terrible in-between." --Emperor Turhan, Centauri Republic From kumba@gentoo.org Tue Dec 27 06:06:44 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 27 Dec 2011 06:06:52 +0100 (CET) Received: from qmta15.westchester.pa.mail.comcast.net ([76.96.59.228]:41108 "EHLO qmta15.westchester.pa.mail.comcast.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903605Ab1L0FGo (ORCPT ); Tue, 27 Dec 2011 06:06:44 +0100 Received: from omta06.westchester.pa.mail.comcast.net ([76.96.62.51]) by qmta15.westchester.pa.mail.comcast.net with comcast id E56Y1i00616LCl05F56eTU; Tue, 27 Dec 2011 05:06:38 +0000 Received: from [192.168.1.13] ([76.106.69.86]) by omta06.westchester.pa.mail.comcast.net with comcast id E56d1i0071rgsis3S56eH9; Tue, 27 Dec 2011 05:06:38 +0000 Message-ID: <4EF95247.7000403@gentoo.org> Date: Tue, 27 Dec 2011 00:06:15 -0500 From: Joshua Kinard User-Agent: Mozilla/5.0 (Windows NT 6.0; WOW64; rv:8.0) Gecko/20111105 Thunderbird/8.0 MIME-Version: 1.0 To: netdev@vger.kernel.org, Linux MIPS List Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery References: <4EED3A3D.9080503@gentoo.org> In-Reply-To: <4EED3A3D.9080503@gentoo.org> X-Enigmail-Version: 1.3.4 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 32195 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19807 Content-Length: 3774 Lines: 118 SGI IP32 (O2)'s ethernet driver (meth) lacks a set_rx_mode function, which prevents IPv6 from working completely because any ICMPv6 neighbor solicitation requests aren't picked up by the driver. So the machine can ping out and connect to other systems, but other systems will have a very hard time connecting to the O2. Signed-off-by: Joshua Kinard --- arch/mips/include/asm/ip32/mace.h | 2 - drivers/net/ethernet/sgi/meth.c | 48 +++++++++++++++++++++++++++++++++++++- 2 files changed, 48 insertions(+), 2 deletions(-) diff -Naurp a/arch/mips/include/asm/ip32/mace.h b/arch/mips/include/asm/ip32/mace.h --- a/arch/mips/include/asm/ip32/mace.h 2011-12-24 16:19:46.703561171 -0500 +++ b/arch/mips/include/asm/ip32/mace.h 2011-12-26 20:04:15.281839510 -0500 @@ -95,7 +95,7 @@ struct mace_video { * Ethernet interface */ struct mace_ethernet { - volatile unsigned long mac_ctrl; + volatile u64 mac_ctrl; volatile unsigned long int_stat; volatile unsigned long dma_ctrl; volatile unsigned long timer; diff -Naurp a/drivers/net/ethernet/sgi/meth.c b/drivers/net/ethernet/sgi/meth.c --- a/drivers/net/ethernet/sgi/meth.c 2011-12-24 16:20:06.743560985 -0500 +++ b/drivers/net/ethernet/sgi/meth.c 2011-12-26 20:03:53.471839710 -0500 @@ -28,6 +28,7 @@ #include /* struct tcphdr */ #include #include /* MII definitions */ +#include #include #include @@ -58,12 +59,19 @@ static int timeout = TX_TIMEOUT; module_param(timeout, int, 0); /* + * Maximum number of multicast addresses to filter (vs. Rx-all-multicast). + * MACE Ethernet uses a 64 element hash table based on the Ethernet CRC. + */ +#define METH_MCF_LIMIT 32 + +/* * This structure is private to each device. It is used to pass * packets in and out, so there is place for a packet */ struct meth_private { /* in-memory copy of MAC Control register */ - unsigned long mac_ctrl; + u64 mac_ctrl; + /* in-memory copy of DMA Control register */ unsigned long dma_ctrl; /* address of PHY, used by mdio_* functions, initialized in mdio_probe */ @@ -79,6 +87,9 @@ struct meth_private { struct sk_buff *rx_skbs[RX_RING_ENTRIES]; unsigned long rx_write; + /* Multicast filter. */ + u64 mcast_filter; + spinlock_t meth_lock; }; @@ -765,6 +776,40 @@ static int meth_ioctl(struct net_device } } +static void meth_set_rx_mode(struct net_device *dev) +{ + struct meth_private *priv = netdev_priv(dev); + unsigned long flags; + + netif_stop_queue(dev); + spin_lock_irqsave(&priv->meth_lock, flags); + priv->mac_ctrl &= ~METH_PROMISC; + + if (dev->flags & IFF_PROMISC) { + priv->mac_ctrl |= METH_PROMISC; + priv->mcast_filter = 0xffffffffffffffffUL; + } else if ((netdev_mc_count(dev) > METH_MCF_LIMIT) || + (dev->flags & IFF_ALLMULTI)) { + priv->mac_ctrl |= METH_ACCEPT_AMCAST; + priv->mcast_filter = 0xffffffffffffffffUL; + } else { + struct netdev_hw_addr *ha; + priv->mac_ctrl |= METH_ACCEPT_MCAST; + + netdev_for_each_mc_addr(ha, dev) + set_bit((ether_crc(ETH_ALEN, ha->addr) >> 26), + (volatile unsigned long *)&priv->mcast_filter); + } + + /* Write the changes to the chip registers. */ + mace->eth.mac_ctrl = priv->mac_ctrl; + mace->eth.mcast_filter = priv->mcast_filter; + + /* Done! */ + spin_unlock_irqrestore(&priv->meth_lock, flags); + netif_wake_queue(dev); +} + static const struct net_device_ops meth_netdev_ops = { .ndo_open = meth_open, .ndo_stop = meth_release, @@ -774,6 +819,7 @@ static const struct net_device_ops meth_ .ndo_change_mtu = eth_change_mtu, .ndo_validate_addr = eth_validate_addr, .ndo_set_mac_address = eth_mac_addr, + .ndo_set_rx_mode = meth_set_rx_mode, }; /* From m.szyprowski@samsung.com Tue Dec 27 09:25:47 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 27 Dec 2011 09:26:01 +0100 (CET) Received: from mailout1.w1.samsung.com ([210.118.77.11]:57490 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903617Ab1L0IZr (ORCPT ); Tue, 27 Dec 2011 09:25:47 +0100 Received: from euspt1 (mailout1.w1.samsung.com [210.118.77.11]) by mailout1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTP id <0LWU003OMSQQFV@mailout1.w1.samsung.com> for linux-mips@linux-mips.org; Tue, 27 Dec 2011 08:25:38 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWU00IWXSQQN9@spt1.w1.samsung.com> for linux-mips@linux-mips.org; Tue, 27 Dec 2011 08:25:38 +0000 (GMT) Received: from AMDC159 (unknown [106.116.37.153]) by linux.samsung.com (Postfix) with ESMTP id 36F9F27004A; Tue, 27 Dec 2011 09:37:33 +0100 (CET) Date: Tue, 27 Dec 2011 09:25:25 +0100 From: Marek Szyprowski Subject: RE: [PATCH 00/14] DMA-mapping framework redesign preparation In-reply-to: <20111223163516.GO20129@parisc-linux.org> To: 'Matthew Wilcox' Cc: linux-kernel@vger.kernel.org, 'Benjamin Herrenschmidt' , 'Thomas Gleixner' , 'Andrew Morton' , 'Arnd Bergmann' , 'Stephen Rothwell' , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, 'Jonathan Corbet' , 'Kyungmin Park' , Andrzej Pietrasiewicz Message-id: <000901ccc471$15db8bc0$4192a340$%szyprowski@samsung.com> Organization: SPRC MIME-version: 1.0 X-Mailer: Microsoft Office Outlook 12.0 Content-type: text/plain; charset=us-ascii Content-language: pl Content-transfer-encoding: 7BIT Thread-index: AczBkN6KMgxtoNoIReeb7jeu/nBm0QC3D65A References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> <20111223163516.GO20129@parisc-linux.org> X-archive-position: 32196 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 19857 Content-Length: 3325 Lines: 70 Hello, On Friday, December 23, 2011 5:35 PM Matthew Wilcox wrote: > On Fri, Dec 23, 2011 at 01:27:19PM +0100, Marek Szyprowski wrote: > > The first issue we identified is the fact that on some platform (again, > > mainly ARM) there are several functions for allocating DMA buffers: > > dma_alloc_coherent, dma_alloc_writecombine and dma_alloc_noncoherent > > Is this write-combining from the point of view of the device (ie iommu), > or from the point of view of the CPU, or both? It is about write-combining from the CPU point of view. Right now there are no devices with such advanced memory interface to do write combining on the DMA side, but I believe that they might appear at some point in the future as well. > > The next step in dma mapping framework update is the introduction of > > dma_mmap/dma_mmap_attrs() function. There are a number of drivers > > (mainly V4L2 and ALSA) that only exports the DMA buffers to user space. > > Creating a userspace mapping with correct page attributes is not an easy > > task for the driver. Also the DMA-mapping framework is the only place > > where the complete information about the allocated pages is available, > > especially if the implementation uses IOMMU controller to provide a > > contiguous buffer in DMA address space which is scattered in physical > > memory space. > > Surely we only need a helper which drivrs can call from their mmap routine > to solve this? On ARM architecture it is already implemented this way and a bunch of drivers use dma_mmap_coherent/dma_mmap_writecombine calls. We would like to standardize these calls across all architectures. > > Usually these drivers don't touch the buffer data at all, so the mapping > > in kernel virtual address space is not needed. We can introduce > > DMA_ATTRIB_NO_KERNEL_MAPPING attribute which lets kernel to skip/ignore > > creation of kernel virtual mapping. This way we can save previous > > vmalloc area and simply some mapping operation on a few architectures. > > I really think this wants to be a separate function. dma_alloc_coherent > is for allocating memory to be shared between the kernel and a driver; > we already have dma_map_sg for mapping userspace I/O as an alternative > interface. This feels like it's something different again rather than > an option to dma_alloc_coherent. That is just a starting point for the discussion. I thought about this API a bit and came to conclusion that there is no much difference between a dma_alloc_coherent which creates a mapping in kernel virtual space and the one that does not. It is just a hint from the driver that it will not use that mapping at all. Of course this attribute makes sense only together with adding a dma_mmap_attrs() call, because otherwise drivers won't be able to get access to the buffer data. On coherent architectures where dma_alloc_coherent is just a simple wrapper around alloc_pages_exact() such attribute can be simply ignored without any impact on the drivers (that's the main idea behind dma attributes!). However such hint will help a lot on non-coherent architectures where additional work need to be done to provide a cohenent mapping in kernel address space. It also saves some precious kernel resources like vmalloc address range. Best regards -- Marek Szyprowski Samsung Poland R&D Center From James.Bottomley@HansenPartnership.com Tue Dec 27 18:53:30 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 27 Dec 2011 18:53:37 +0100 (CET) Received: from bedivere.hansenpartnership.com ([66.63.167.143]:37254 "EHLO bedivere.hansenpartnership.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903627Ab1L0Rxa (ORCPT ); Tue, 27 Dec 2011 18:53:30 +0100 Received: from localhost (localhost [127.0.0.1]) by bedivere.hansenpartnership.com (Postfix) with ESMTP id 177948EE0E4; Tue, 27 Dec 2011 09:53:22 -0800 (PST) Received: from bedivere.hansenpartnership.com ([127.0.0.1]) by localhost (bedivere.hansenpartnership.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id faUfMhRSVqP9; Tue, 27 Dec 2011 09:53:21 -0800 (PST) Received: from [192.168.10.225] (unknown [192.168.10.225]) by bedivere.hansenpartnership.com (Postfix) with ESMTPSA id E1E618EE081; Tue, 27 Dec 2011 09:53:15 -0800 (PST) Subject: RE: [PATCH 00/14] DMA-mapping framework redesign preparation From: James Bottomley To: Marek Szyprowski Cc: 'Matthew Wilcox' , linux-kernel@vger.kernel.org, 'Benjamin Herrenschmidt' , 'Thomas Gleixner' , 'Andrew Morton' , 'Arnd Bergmann' , 'Stephen Rothwell' , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, 'Jonathan Corbet' , 'Kyungmin Park' , Andrzej Pietrasiewicz In-Reply-To: <000901ccc471$15db8bc0$4192a340$%szyprowski@samsung.com> References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> <20111223163516.GO20129@parisc-linux.org> <000901ccc471$15db8bc0$4192a340$%szyprowski@samsung.com> Content-Type: text/plain; charset="UTF-8" Date: Tue, 27 Dec 2011 17:53:13 +0000 Message-ID: <1325008393.14252.5.camel@dabdike> Mime-Version: 1.0 X-Mailer: Evolution 2.32.1 Content-Transfer-Encoding: 7bit X-archive-position: 32197 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: James.Bottomley@HansenPartnership.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 20059 Content-Length: 2368 Lines: 44 On Tue, 2011-12-27 at 09:25 +0100, Marek Szyprowski wrote: [...] > > > Usually these drivers don't touch the buffer data at all, so the mapping > > > in kernel virtual address space is not needed. We can introduce > > > DMA_ATTRIB_NO_KERNEL_MAPPING attribute which lets kernel to skip/ignore > > > creation of kernel virtual mapping. This way we can save previous > > > vmalloc area and simply some mapping operation on a few architectures. > > > > I really think this wants to be a separate function. dma_alloc_coherent > > is for allocating memory to be shared between the kernel and a driver; > > we already have dma_map_sg for mapping userspace I/O as an alternative > > interface. This feels like it's something different again rather than > > an option to dma_alloc_coherent. > > That is just a starting point for the discussion. > > I thought about this API a bit and came to conclusion that there is no much > difference between a dma_alloc_coherent which creates a mapping in kernel > virtual space and the one that does not. It is just a hint from the driver > that it will not use that mapping at all. Of course this attribute makes sense > only together with adding a dma_mmap_attrs() call, because otherwise drivers > won't be able to get access to the buffer data. This depends. On Virtually indexed systems like PA-RISC, there are two ways of making a DMA range coherent. One is to make the range uncached. This is incredibly slow and not what we do by default, but it can be used to make multiple mappings coherent. The other is to load the virtual address up as a coherence index into the IOMMU. This makes it a full peer in the coherence process, but means we can only designate a single virtual range to be coherent (not multiple mappings unless they happen to be congruent). Perhaps it doesn't matter that much, since I don't see a use for this on PA, but if any other architecture works the same, you'd have to designate a single mapping as the coherent one and essentially promise not to use the other mapping if we followed our normal coherence protocols. Obviously, the usual range we currently make coherent is the kernel mapping (that's actually the only virtual address we have by the time we're deep in the iommu code), so designating a different virtual address would need some surgery to the guts of the iommu code. James From davem@davemloft.net Tue Dec 27 19:17:54 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 27 Dec 2011 19:17:58 +0100 (CET) Received: from shards.monkeyblade.net ([198.137.202.13]:59373 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903617Ab1L0SRy (ORCPT ); Tue, 27 Dec 2011 19:17:54 +0100 Received: from localhost (nat-pool-rdu.redhat.com [66.187.233.202]) (authenticated bits=0) by shards.monkeyblade.net (8.14.4/8.14.4) with ESMTP id pBRIHhWi014261 (version=TLSv1/SSLv3 cipher=RC4-SHA bits=128 verify=NO); Tue, 27 Dec 2011 10:17:44 -0800 Date: Tue, 27 Dec 2011 13:17:43 -0500 (EST) Message-Id: <20111227.131743.1555029258883745131.davem@davemloft.net> To: kumba@gentoo.org Cc: netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery From: David Miller In-Reply-To: <4EF95247.7000403@gentoo.org> References: <4EED3A3D.9080503@gentoo.org> <4EF95247.7000403@gentoo.org> X-Mailer: Mew version 6.4 on Emacs 23.3 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.6 (shards.monkeyblade.net [198.137.202.13]); Tue, 27 Dec 2011 10:17:44 -0800 (PST) X-archive-position: 32198 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 20074 Content-Length: 492 Lines: 12 From: Joshua Kinard Date: Tue, 27 Dec 2011 00:06:15 -0500 > SGI IP32 (O2)'s ethernet driver (meth) lacks a set_rx_mode function, which > prevents IPv6 from working completely because any ICMPv6 neighbor > solicitation requests aren't picked up by the driver. So the machine can > ping out and connect to other systems, but other systems will have a very > hard time connecting to the O2. > > Signed-off-by: Joshua Kinard Applied to net-next, thanks. From shemminger@vyatta.com Tue Dec 27 19:34:12 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 27 Dec 2011 19:34:16 +0100 (CET) Received: from mail.vyatta.com ([76.74.103.46]:47736 "EHLO mail.vyatta.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903617Ab1L0SeM (ORCPT ); Tue, 27 Dec 2011 19:34:12 +0100 Received: from localhost (localhost.localdomain [127.0.0.1]) by mail.vyatta.com (Postfix) with ESMTP id 3BD251410002; Tue, 27 Dec 2011 10:34:10 -0800 (PST) X-Virus-Scanned: amavisd-new at tahiti.vyatta.com Received: from mail.vyatta.com ([127.0.0.1]) by localhost (mail.vyatta.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id X9T3Q1BWkCPh; Tue, 27 Dec 2011 10:34:09 -0800 (PST) Received: from nehalam.linuxnetplumber.net (static-50-53-80-93.bvtn.or.frontiernet.net [50.53.80.93]) by mail.vyatta.com (Postfix) with ESMTPSA id 729CE1410001; Tue, 27 Dec 2011 10:34:09 -0800 (PST) Date: Tue, 27 Dec 2011 10:34:08 -0800 From: Stephen Hemminger To: Joshua Kinard Cc: netdev@vger.kernel.org, Linux MIPS List Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery Message-ID: <20111227103408.01aad10e@nehalam.linuxnetplumber.net> In-Reply-To: <4EF95247.7000403@gentoo.org> References: <4EED3A3D.9080503@gentoo.org> <4EF95247.7000403@gentoo.org> Organization: Vyatta X-Mailer: Claws Mail 3.7.10 (GTK+ 2.24.8; x86_64-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-archive-position: 32199 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: shemminger@vyatta.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 20079 Content-Length: 438 Lines: 17 On Tue, 27 Dec 2011 00:06:15 -0500 Joshua Kinard wrote: > @@ -95,7 +95,7 @@ struct mace_video { > * Ethernet interface > */ > struct mace_ethernet { > - volatile unsigned long mac_ctrl; > + volatile u64 mac_ctrl; > volatile unsigned long int_stat; > volatile unsigned long dma_ctrl; > volatile unsigned long timer; This device driver writer needs to read: Documentation/volatile-considered-harmful.txt From davem@davemloft.net Tue Dec 27 19:52:16 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 27 Dec 2011 19:52:20 +0100 (CET) Received: from shards.monkeyblade.net ([198.137.202.13]:59610 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903622Ab1L0SwQ (ORCPT ); Tue, 27 Dec 2011 19:52:16 +0100 Received: from localhost (nat-pool-rdu.redhat.com [66.187.233.202]) (authenticated bits=0) by shards.monkeyblade.net (8.14.4/8.14.4) with ESMTP id pBRIq95Q015881 (version=TLSv1/SSLv3 cipher=RC4-SHA bits=128 verify=NO); Tue, 27 Dec 2011 10:52:10 -0800 Date: Tue, 27 Dec 2011 13:52:09 -0500 (EST) Message-Id: <20111227.135209.1552228715466981902.davem@davemloft.net> To: shemminger@vyatta.com Cc: kumba@gentoo.org, netdev@vger.kernel.org, linux-mips@linux-mips.org Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery From: David Miller In-Reply-To: <20111227103408.01aad10e@nehalam.linuxnetplumber.net> References: <4EED3A3D.9080503@gentoo.org> <4EF95247.7000403@gentoo.org> <20111227103408.01aad10e@nehalam.linuxnetplumber.net> X-Mailer: Mew version 6.4 on Emacs 23.3 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.6 (shards.monkeyblade.net [198.137.202.13]); Tue, 27 Dec 2011 10:52:11 -0800 (PST) X-archive-position: 32200 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: davem@davemloft.net Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 20098 Content-Length: 632 Lines: 22 From: Stephen Hemminger Date: Tue, 27 Dec 2011 10:34:08 -0800 > On Tue, 27 Dec 2011 00:06:15 -0500 > Joshua Kinard wrote: > >> @@ -95,7 +95,7 @@ struct mace_video { >> * Ethernet interface >> */ >> struct mace_ethernet { >> - volatile unsigned long mac_ctrl; >> + volatile u64 mac_ctrl; >> volatile unsigned long int_stat; >> volatile unsigned long dma_ctrl; >> volatile unsigned long timer; > > > This device driver writer needs to read: > Documentation/volatile-considered-harmful.txt This driver has a lot of problems, some of which I've made Joshua aware of already. From kumba@gentoo.org Tue Dec 27 22:30:20 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 27 Dec 2011 22:30:26 +0100 (CET) Received: from qmta10.emeryville.ca.mail.comcast.net ([76.96.30.17]:41440 "EHLO qmta10.emeryville.ca.mail.comcast.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903627Ab1L0VaU (ORCPT ); Tue, 27 Dec 2011 22:30:20 +0100 Received: from omta21.emeryville.ca.mail.comcast.net ([76.96.30.88]) by qmta10.emeryville.ca.mail.comcast.net with comcast id EM4e1i0251u4NiLAAMW6fv; Tue, 27 Dec 2011 21:30:06 +0000 Received: from [192.168.1.13] ([76.106.69.86]) by omta21.emeryville.ca.mail.comcast.net with comcast id EMx71i00E1rgsis8hMx8dP; Tue, 27 Dec 2011 21:57:10 +0000 Message-ID: <4EFA38D5.1000602@gentoo.org> Date: Tue, 27 Dec 2011 16:29:57 -0500 From: Joshua Kinard User-Agent: Mozilla/5.0 (Windows NT 6.0; WOW64; rv:8.0) Gecko/20111105 Thunderbird/8.0 MIME-Version: 1.0 To: Stephen Hemminger CC: netdev@vger.kernel.org, Linux MIPS List Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery References: <4EED3A3D.9080503@gentoo.org> <4EF95247.7000403@gentoo.org> <20111227103408.01aad10e@nehalam.linuxnetplumber.net> In-Reply-To: <20111227103408.01aad10e@nehalam.linuxnetplumber.net> X-Enigmail-Version: 1.3.4 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 32201 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 20153 Content-Length: 1466 Lines: 42 On 12/27/2011 13:34, Stephen Hemminger wrote: > On Tue, 27 Dec 2011 00:06:15 -0500 > Joshua Kinard wrote: > >> @@ -95,7 +95,7 @@ struct mace_video { >> * Ethernet interface >> */ >> struct mace_ethernet { >> - volatile unsigned long mac_ctrl; >> + volatile u64 mac_ctrl; >> volatile unsigned long int_stat; >> volatile unsigned long dma_ctrl; >> volatile unsigned long timer; > > > This device driver writer needs to read: > Documentation/volatile-considered-harmful.txt MIPS I/O registers are always memory-mapped, and to prevent the compiler from trying to over-optimize, volatile is used to make sure we always read a value from the hardware and not from some cached value. See MIPS Run (2nd Ed), pp 307, section 10.5.2 highlights an example of this, which is viewable here: http://books.google.com/books?id=kk8G2gK4Tw8C&pg=PA307&lpg=PA308#v=onepage&q&f=false But other than that, yeah, this driver needs to pretty much be stripped down to the nuts and bolts and re-written. Maybe something to tackle in the future. I still haven't gotten around to submitting the RTC driver for O2's (that I re-wrote from a patch sent into LKML years ago) upstream yet. -- Joshua Kinard Gentoo/MIPS kumba@gentoo.org 4096R/D25D95E3 2011-03-28 "The past tempts us, the present confuses us, the future frightens us. And our lives slip away, moment by moment, lost in that vast, terrible in-between." --Emperor Turhan, Centauri Republic From shemminger@vyatta.com Tue Dec 27 23:34:46 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 27 Dec 2011 23:34:59 +0100 (CET) Received: from mail.vyatta.com ([76.74.103.46]:34798 "EHLO mail.vyatta.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903622Ab1L0Weq (ORCPT ); Tue, 27 Dec 2011 23:34:46 +0100 Received: from localhost (localhost.localdomain [127.0.0.1]) by mail.vyatta.com (Postfix) with ESMTP id E7FBB1420010; Tue, 27 Dec 2011 14:34:43 -0800 (PST) X-Virus-Scanned: amavisd-new at tahiti.vyatta.com Received: from mail.vyatta.com ([127.0.0.1]) by localhost (mail.vyatta.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id KIaohGOrb16U; Tue, 27 Dec 2011 14:34:43 -0800 (PST) Received: from nehalam.linuxnetplumber.net (static-50-53-80-93.bvtn.or.frontiernet.net [50.53.80.93]) by mail.vyatta.com (Postfix) with ESMTPSA id 1B694142000F; Tue, 27 Dec 2011 14:34:43 -0800 (PST) Date: Tue, 27 Dec 2011 14:34:41 -0800 From: Stephen Hemminger To: Joshua Kinard Cc: netdev@vger.kernel.org, Linux MIPS List Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery Message-ID: <20111227143441.30d2c42f@nehalam.linuxnetplumber.net> In-Reply-To: <4EFA38D5.1000602@gentoo.org> References: <4EED3A3D.9080503@gentoo.org> <4EF95247.7000403@gentoo.org> <20111227103408.01aad10e@nehalam.linuxnetplumber.net> <4EFA38D5.1000602@gentoo.org> Organization: Vyatta X-Mailer: Claws Mail 3.7.10 (GTK+ 2.24.8; x86_64-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-archive-position: 32202 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: shemminger@vyatta.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 20177 Content-Length: 489 Lines: 11 On Tue, 27 Dec 2011 16:29:57 -0500 Joshua Kinard wrote: > MIPS I/O registers are always memory-mapped, and to prevent the compiler > from trying to over-optimize, volatile is used to make sure we always read a > value from the hardware and not from some cached value. Almost every other network driver had memory mapped register. The problem is volatile is that the compiler is stupid and wrong. Using explicit barriers is preferred and ensures correct and fast code. From kumba@gentoo.org Tue Dec 27 23:49:01 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 27 Dec 2011 23:49:05 +0100 (CET) Received: from qmta14.emeryville.ca.mail.comcast.net ([76.96.27.212]:55467 "EHLO qmta14.emeryville.ca.mail.comcast.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903622Ab1L0WtB (ORCPT ); Tue, 27 Dec 2011 23:49:01 +0100 Received: from omta16.emeryville.ca.mail.comcast.net ([76.96.30.72]) by qmta14.emeryville.ca.mail.comcast.net with comcast id ENAh1i0041ZMdJ4AENon8B; Tue, 27 Dec 2011 22:48:47 +0000 Received: from [192.168.1.13] ([76.106.69.86]) by omta16.emeryville.ca.mail.comcast.net with comcast id ENZ51i00Q1rgsis8cNZ7gG; Tue, 27 Dec 2011 22:33:07 +0000 Message-ID: <4EFA4B40.8090502@gentoo.org> Date: Tue, 27 Dec 2011 17:48:32 -0500 From: Joshua Kinard User-Agent: Mozilla/5.0 (Windows NT 6.0; WOW64; rv:8.0) Gecko/20111105 Thunderbird/8.0 MIME-Version: 1.0 To: Stephen Hemminger CC: netdev@vger.kernel.org, Linux MIPS List Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery References: <4EED3A3D.9080503@gentoo.org> <4EF95247.7000403@gentoo.org> <20111227103408.01aad10e@nehalam.linuxnetplumber.net> <4EFA38D5.1000602@gentoo.org> <20111227143441.30d2c42f@nehalam.linuxnetplumber.net> In-Reply-To: <20111227143441.30d2c42f@nehalam.linuxnetplumber.net> X-Enigmail-Version: 1.3.4 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7BIT X-archive-position: 32203 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: kumba@gentoo.org Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 20180 Content-Length: 1065 Lines: 30 On 12/27/2011 17:34, Stephen Hemminger wrote: > On Tue, 27 Dec 2011 16:29:57 -0500 > Joshua Kinard wrote: > >> MIPS I/O registers are always memory-mapped, and to prevent the compiler >> from trying to over-optimize, volatile is used to make sure we always read a >> value from the hardware and not from some cached value. > > Almost every other network driver had memory mapped register. > The problem is volatile is that the compiler is stupid and wrong. > Using explicit barriers is preferred and ensures correct and fast > code. I am somewhat new to driver development, so I do not know all the tricks of the trade just yet. Do you have references to doing explicit barriers that I can look at? Might be worth trying on the RTC driver I have to get the hang of them. -- Joshua Kinard Gentoo/MIPS kumba@gentoo.org 4096R/D25D95E3 2011-03-28 "The past tempts us, the present confuses us, the future frightens us. And our lives slip away, moment by moment, lost in that vast, terrible in-between." --Emperor Turhan, Centauri Republic From shemminger@vyatta.com Wed Dec 28 01:29:07 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 28 Dec 2011 01:29:12 +0100 (CET) Received: from mail.vyatta.com ([76.74.103.46]:35884 "EHLO mail.vyatta.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903622Ab1L1A3H (ORCPT ); Wed, 28 Dec 2011 01:29:07 +0100 Received: from localhost (localhost.localdomain [127.0.0.1]) by mail.vyatta.com (Postfix) with ESMTP id 3C5761420010; Tue, 27 Dec 2011 16:29:06 -0800 (PST) X-Virus-Scanned: amavisd-new at tahiti.vyatta.com Received: from mail.vyatta.com ([127.0.0.1]) by localhost (mail.vyatta.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id NYqqRoJfFpyn; Tue, 27 Dec 2011 16:29:05 -0800 (PST) Received: from nehalam.linuxnetplumber.net (static-50-53-80-93.bvtn.or.frontiernet.net [50.53.80.93]) by mail.vyatta.com (Postfix) with ESMTPSA id 3F046142000F; Tue, 27 Dec 2011 16:29:05 -0800 (PST) Date: Tue, 27 Dec 2011 16:29:03 -0800 From: Stephen Hemminger To: Joshua Kinard Cc: netdev@vger.kernel.org, Linux MIPS List Subject: Re: [PATCH] net: meth: Add set_rx_mode hook to fix ICMPv6 neighbor discovery Message-ID: <20111227162903.48c6c619@nehalam.linuxnetplumber.net> In-Reply-To: <4EFA4B40.8090502@gentoo.org> References: <4EED3A3D.9080503@gentoo.org> <4EF95247.7000403@gentoo.org> <20111227103408.01aad10e@nehalam.linuxnetplumber.net> <4EFA38D5.1000602@gentoo.org> <20111227143441.30d2c42f@nehalam.linuxnetplumber.net> <4EFA4B40.8090502@gentoo.org> Organization: Vyatta X-Mailer: Claws Mail 3.7.10 (GTK+ 2.24.8; x86_64-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-archive-position: 32204 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: shemminger@vyatta.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 20229 Content-Length: 1080 Lines: 27 On Tue, 27 Dec 2011 17:48:32 -0500 Joshua Kinard wrote: > On 12/27/2011 17:34, Stephen Hemminger wrote: > > > On Tue, 27 Dec 2011 16:29:57 -0500 > > Joshua Kinard wrote: > > > >> MIPS I/O registers are always memory-mapped, and to prevent the compiler > >> from trying to over-optimize, volatile is used to make sure we always read a > >> value from the hardware and not from some cached value. > > > > Almost every other network driver had memory mapped register. > > The problem is volatile is that the compiler is stupid and wrong. > > Using explicit barriers is preferred and ensures correct and fast > > code. > > > I am somewhat new to driver development, so I do not know all the tricks of > the trade just yet. Do you have references to doing explicit barriers that > I can look at? Might be worth trying on the RTC driver I have to get the > hang of them. > Start by reading volatile considered harmful and memory barriers in kernel Documentation directory. Paul does a better job of explaining it than I could ever do :-) From m.szyprowski@samsung.com Wed Dec 28 13:53:02 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 28 Dec 2011 13:53:10 +0100 (CET) Received: from mailout1.w1.samsung.com ([210.118.77.11]:28372 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903568Ab1L1MxC (ORCPT ); Wed, 28 Dec 2011 13:53:02 +0100 Received: from euspt1 (mailout1.w1.samsung.com [210.118.77.11]) by mailout1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTP id <0LWW0097PZS5K1@mailout1.w1.samsung.com> for linux-mips@linux-mips.org; Wed, 28 Dec 2011 12:52:53 +0000 (GMT) Received: from linux.samsung.com ([106.116.38.10]) by spt1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWW002P1ZS4E9@spt1.w1.samsung.com> for linux-mips@linux-mips.org; Wed, 28 Dec 2011 12:52:53 +0000 (GMT) Received: from AMDC159 (unknown [106.116.37.153]) by linux.samsung.com (Postfix) with ESMTP id 7B41227004A; Wed, 28 Dec 2011 14:04:54 +0100 (CET) Date: Wed, 28 Dec 2011 13:52:45 +0100 From: Marek Szyprowski Subject: RE: [PATCH 00/14] DMA-mapping framework redesign preparation In-reply-to: <1325008393.14252.5.camel@dabdike> To: 'James Bottomley' Cc: 'Matthew Wilcox' , linux-kernel@vger.kernel.org, 'Benjamin Herrenschmidt' , 'Thomas Gleixner' , 'Andrew Morton' , 'Arnd Bergmann' , 'Stephen Rothwell' , microblaze-uclinux@itee.uq.edu.au, linux-arch@vger.kernel.org, x86@kernel.org, linux-sh@vger.kernel.org, linux-alpha@vger.kernel.org, sparclinux@vger.kernel.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mips@linux-mips.org, discuss@x86-64.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linaro-mm-sig@lists.linaro.org, 'Jonathan Corbet' , 'Kyungmin Park' , Andrzej Pietrasiewicz Message-id: <003a01ccc55f$98dc6f50$ca954df0$%szyprowski@samsung.com> Organization: SPRC MIME-version: 1.0 X-Mailer: Microsoft Office Outlook 12.0 Content-type: text/plain; charset=UTF-8 Content-language: pl Content-transfer-encoding: 7BIT Thread-index: AczEwG5Jc0rEXHLyR72j2XGo7DHGOwAdkvRw References: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com> <20111223163516.GO20129@parisc-linux.org> <000901ccc471$15db8bc0$4192a340$%szyprowski@samsung.com> <1325008393.14252.5.camel@dabdike> X-archive-position: 32205 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: m.szyprowski@samsung.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 20380 Content-Length: 3473 Lines: 70 Hello, On Tuesday, December 27, 2011 6:53 PM James Bottomley wrote: > On Tue, 2011-12-27 at 09:25 +0100, Marek Szyprowski wrote: > [...] > > > > Usually these drivers don't touch the buffer data at all, so the mapping > > > > in kernel virtual address space is not needed. We can introduce > > > > DMA_ATTRIB_NO_KERNEL_MAPPING attribute which lets kernel to skip/ignore > > > > creation of kernel virtual mapping. This way we can save previous > > > > vmalloc area and simply some mapping operation on a few architectures. > > > > > > I really think this wants to be a separate function. dma_alloc_coherent > > > is for allocating memory to be shared between the kernel and a driver; > > > we already have dma_map_sg for mapping userspace I/O as an alternative > > > interface. This feels like it's something different again rather than > > > an option to dma_alloc_coherent. > > > > That is just a starting point for the discussion. > > > > I thought about this API a bit and came to conclusion that there is no much > > difference between a dma_alloc_coherent which creates a mapping in kernel > > virtual space and the one that does not. It is just a hint from the driver > > that it will not use that mapping at all. Of course this attribute makes sense > > only together with adding a dma_mmap_attrs() call, because otherwise drivers > > won't be able to get access to the buffer data. > > This depends. On Virtually indexed systems like PA-RISC, there are two > ways of making a DMA range coherent. One is to make the range uncached. > This is incredibly slow and not what we do by default, but it can be > used to make multiple mappings coherent. The other is to load the > virtual address up as a coherence index into the IOMMU. This makes it a > full peer in the coherence process, but means we can only designate a > single virtual range to be coherent (not multiple mappings unless they > happen to be congruent). Perhaps it doesn't matter that much, since I > don't see a use for this on PA, but if any other architecture works the > same, you'd have to designate a single mapping as the coherent one and > essentially promise not to use the other mapping if we followed our > normal coherence protocols. > > Obviously, the usual range we currently make coherent is the kernel > mapping (that's actually the only virtual address we have by the time > we're deep in the iommu code), so designating a different virtual > address would need some surgery to the guts of the iommu code. I see, in this case not much can be achieved by dropping the kernel mapping for the allocated buffer. I'm also not sure how to mmap the buffer into userspace meet the cpu requirements? Is it possible to use non-cached mapping in userspace together with coherent mapping in kernel virtual space? However on some other architectures this attribute allows using HIGH_MEM for the allocated coherent buffer. The other possibility is to allocate it in chunks and map them contiguously into dma address space. With NO_KERNEL_MAPPING attribute we avoid consuming vmalloc range for the newly allocated buffer for which we cannot use the linear mapping (because it is scattered). Of course this attribute will be implemented by the architectures where it gives some benefits. All other can simply ignore it and return plain coherent buffer with ordinary kernel virtual mapping. The driver will just ignore it. Best regards -- Marek Szyprowski Samsung Poland R&D Center From xiangfu@openmobilefree.net Fri Dec 30 09:32:13 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 30 Dec 2011 09:32:19 +0100 (CET) Received: from mail-we0-f177.google.com ([74.125.82.177]:52548 "EHLO mail-we0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903650Ab1L3IcN (ORCPT ); Fri, 30 Dec 2011 09:32:13 +0100 Received: by wera10 with SMTP id a10so8482653wer.36 for ; Fri, 30 Dec 2011 00:32:07 -0800 (PST) Received: by 10.216.82.138 with SMTP id o10mr17965863wee.35.1325233927102; Fri, 30 Dec 2011 00:32:07 -0800 (PST) Received: from [10.8.0.6] (fidelio.qi-hardware.com. [213.239.211.82]) by mx.google.com with ESMTPS id fy5sm90306668wib.7.2011.12.30.00.31.59 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 30 Dec 2011 00:32:05 -0800 (PST) Message-ID: <4EFD76F9.50204@openmobilefree.net> Date: Fri, 30 Dec 2011 16:31:53 +0800 From: Xiangfu Liu User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:8.0) Gecko/20111124 Thunderbird/8.0 MIME-Version: 1.0 To: john stultz CC: Matt Turner , linux-mips@linux-mips.org, jz47xx-kernel@lists.en.qi-hardware.com, rtc-linux@googlegroups.com Subject: Re: select() to /dev/rtc0 to wait for clock tick timed out References: <1313777242.2970.131.camel@work-vm> <1313783990.2970.136.camel@work-vm> In-Reply-To: <1313783990.2970.136.camel@work-vm> Content-Type: multipart/mixed; boundary="------------030306060802010500060401" X-archive-position: 32206 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: xiangfu@openmobilefree.net Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 21083 Content-Length: 12633 Lines: 208 This is a multi-part message in MIME format. --------------030306060802010500060401 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi John Stultz I meet the same problem on MIPS jz4740, here is the step I try to find out the problem: 1. when I direct run 'hwclock' it will give "select() to /dev/rtc0 to wait for clock tick timed out" attachment 'hwclock.time.out' is the strace log 2. run 'rtctest' program. it works fine. the output is here[1] 3. after 'rtctest', run 'hwclock' again. then it works fine attachment 'hwclock.wors' is the strace log without 'rtctest' run first. 'hwclock' never works. the hwclock works fine in 2.6.27.6, failed under '3.0.0' Please give me some tips how to fix this problem. shoule I modify the driver code or is that relate to 'CONFIG_RTC_INTF_DEV_UIE_EMUL'? thanks in advance. xiangfu [1] root@BenNanoNote:~# ./rtctest RTC Driver Test Example. Current RTC date/time is 30-12-2011, 08:25:55. Alarm time now set to 08:26:00. Waiting 5 seconds for alarm... okay. Alarm rang. Periodic IRQ rate is 64Hz. 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bmRzCikgPSA0NApleGl0X2dyb3VwKDApICAgICAgICAgICAgICAgICAgICAgICAgICAgPSA/ Cg== --------------030306060802010500060401-- From robherring2@gmail.com Fri Dec 30 16:30:55 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 30 Dec 2011 16:30:59 +0100 (CET) Received: from mail-gy0-f177.google.com ([209.85.160.177]:53994 "EHLO mail-gy0-f177.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903650Ab1L3Paz (ORCPT ); Fri, 30 Dec 2011 16:30:55 +0100 Received: by ghrr15 with SMTP id r15so6324171ghr.36 for ; Fri, 30 Dec 2011 07:30:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding; bh=Ri18Vu4l5NSWJJkZUTJnqKi4Df6FT87zd9WPUHSkI8o=; b=Y6/QPLzFe771loX90WxizKUCwOg/eftJ4MlXw+T/EF7Iee3eGHoQP7JlOWF5aK8nf/ ElQibTcvzso2C5vS/JWgHXP7XP3FTJBtzsqRLnLGwLmsTxaBwiLHfqlFoAYg66ShDDs1 Z3PsdkfDWh4s28BrqhUiNi+zw+3p+nVdP+rr0= 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[65.36.72.55]) by mx.google.com with ESMTPS id q33sm37923563anh.4.2011.12.30.07.30.46 (version=SSLv3 cipher=OTHER); Fri, 30 Dec 2011 07:30:47 -0800 (PST) Message-ID: <4EFDD925.3050806@gmail.com> Date: Fri, 30 Dec 2011 09:30:45 -0600 From: Rob Herring User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:8.0) Gecko/20111124 Thunderbird/8.0 MIME-Version: 1.0 To: David Daney CC: Thomas Gleixner , devicetree-discuss@lists.ozlabs.org, Grant Likely , Rob Herring , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, David Daney Subject: Re: [PATCH v2 0/4] irq/of: Cleanup and Enchance irq_domain support. References: <1323916330-8865-1-git-send-email-ddaney.cavm@gmail.com> In-Reply-To: <1323916330-8865-1-git-send-email-ddaney.cavm@gmail.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-archive-position: 32207 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: robherring2@gmail.com Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 21168 Content-Length: 2428 Lines: 59 David, On 12/14/2011 08:32 PM, David Daney wrote: > From: David Daney > > Back in early Nov. I send the first version of this patch set. Now > things are heating up again in the world of irq_domain, so I wanted to > try to get some closure on the issues I had. The Octeon patch is > included here to show how I am using irq_domain, but is part of a much > larger effort to merge Octeon device tree support. > > The basic problem I am attempting to solve is using irq domains when > there is a 'non-linear' mapping of hwirq <--> irq within a domain. > Octeon has a single set of irq numbers that is used across two > different implementations of the interrupt controller as well as more > than 10 different SOCs all which use different subsets of the irq > number space. The result is that the hwirq to irq mapping function > contains many gaps and discontinuities, it is really quite random. > > The existing irq domain infrastructure assumes a continuous linear > mapping of hwirq to irq that can be encapsulated by the irq_base, > hwirq_base and nr_irq elements of struct irq_domain. This is not > suitable for the Octeon implementation. > > The gist of my change is to add an optional iterator function to > irq_domain_ops which knows how to iterate over the irq numbers in a > given domain. For simple linear domains (those currently supported), > we iterate using the current method based on irq_base, hwirq_base and > nr_irq. > > Summary of the patches: > > 1) Get rid of some unused code to make subsequent changes simpler. > > 2) Cleanup the data type used by various hwirq functions and users. > > 3) Add the irq iterator, and fix up the ARM GIC code to use it instead > of the current irq_domain_for_each_irq(). > > 4) Add the Octeon users of the interface. > > In an earlier exchange, Rob Herring had said: > > ... Handling sparse irqs is a potentially common problem, so we > should address that in the core irqdomain code. > > Which is what this patch set is doing. > > There was a suggestion that perhaps having .to_irq() return a magic > value if there was no mapping would also work. However I prefer this > approach as it separates the concepts of iteration and mapping of irq > numbers. > > Please comment. Can we first have a patch that just allows irq domains to be enabled on MIPS. It collides because of multiple versions of irq_create_of_mapping. Rob From grant.likely@secretlab.ca Fri Dec 30 19:20:03 2011 Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 30 Dec 2011 19:20:06 +0100 (CET) Received: from mail-pw0-f49.google.com ([209.85.160.49]:45481 "EHLO mail-pw0-f49.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S1903650Ab1L3SUD convert rfc822-to-8bit (ORCPT ); Fri, 30 Dec 2011 19:20:03 +0100 Received: by pbaa11 with SMTP id a11so11034302pba.36 for ; Fri, 30 Dec 2011 10:19:56 -0800 (PST) Received: by 10.68.191.34 with SMTP id gv2mr95031909pbc.101.1325269196142; Fri, 30 Dec 2011 10:19:56 -0800 (PST) MIME-Version: 1.0 Received: by 10.68.8.9 with HTTP; Fri, 30 Dec 2011 10:19:35 -0800 (PST) In-Reply-To: <4EFDD925.3050806@gmail.com> References: <1323916330-8865-1-git-send-email-ddaney.cavm@gmail.com> <4EFDD925.3050806@gmail.com> From: Grant Likely Date: Fri, 30 Dec 2011 11:19:35 -0700 X-Google-Sender-Auth: 3VPxvko1byOfmPLKtGgNG3_7ZfY Message-ID: Subject: Re: [PATCH v2 0/4] irq/of: Cleanup and Enchance irq_domain support. To: Rob Herring Cc: David Daney , Thomas Gleixner , devicetree-discuss@lists.ozlabs.org, Rob Herring , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, David Daney Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT X-archive-position: 32208 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: grant.likely@secretlab.ca Precedence: bulk X-list: linux-mips Return-Path: X-Keywords: X-UID: 21218 Content-Length: 2965 Lines: 71 On Fri, Dec 30, 2011 at 8:30 AM, Rob Herring wrote: > David, > > On 12/14/2011 08:32 PM, David Daney wrote: >> From: David Daney >> >> Back in early Nov. I send the first version of this patch set.  Now >> things are heating up again in the world of irq_domain, so I wanted to >> try to get some closure on the issues I had.  The Octeon patch is >> included here to show how I am using irq_domain, but is part of a much >> larger effort to merge Octeon device tree support. >> >> The basic problem I am attempting to solve is using irq domains when >> there is a 'non-linear' mapping of hwirq <--> irq within a domain. >> Octeon has a single set of irq numbers that is used across two >> different implementations of the interrupt controller as well as more >> than 10 different SOCs all which use different subsets of the irq >> number space.  The result is that the hwirq to irq mapping function >> contains many gaps and discontinuities, it is really quite random. >> >> The existing irq domain infrastructure assumes a continuous linear >> mapping of hwirq to irq that can be encapsulated by the irq_base, >> hwirq_base and nr_irq elements of struct irq_domain.  This is not >> suitable for the Octeon implementation. >> >> The gist of my change is to add an optional iterator function to >> irq_domain_ops which knows how to iterate over the irq numbers in a >> given domain.  For simple linear domains (those currently supported), >> we iterate using the current method based on irq_base, hwirq_base and >> nr_irq. >> >> Summary of the patches: >> >> 1) Get rid of some unused code to make subsequent changes simpler. >> >> 2) Cleanup the data type used by various hwirq functions and users. >> >> 3) Add the irq iterator, and fix up the ARM GIC code to use it instead >> of the current irq_domain_for_each_irq(). >> >> 4) Add the Octeon users of the interface. >> >> In an earlier exchange, Rob Herring had said: >> >>    ... Handling sparse irqs is a potentially common problem, so we >>    should address that in the core irqdomain code. >> >> Which is what this patch set is doing. >> >> There was a suggestion that perhaps having .to_irq() return a magic >> value if there was no mapping would also work.  However I prefer this >> approach as it separates the concepts of iteration and mapping of irq >> numbers. >> >> Please comment. > > Can we first have a patch that just allows irq domains to be enabled on > MIPS. It collides because of multiple versions of irq_create_of_mapping. I'm working on this. I made some poor decisions when first implementing irq_domain which have made it difficult to bring into sync with powerpc. Right now I'm working on a series to replace the new irq_domain with the existing (working-for-years) powerpc code and converting over all the users. Basically what I should have done in the first place. g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd.