| Message ID | - |
|---|---|
| State | Accepted |
| Delegated to: | Ralf Baechle |
| Headers | show |
Hello. On 3/12/2015 6:51 AM, Huacai Chen wrote: > HPET irq is routed to i8259 and then to MIPS CPU irq (cascade). After IRQ. > commit a3e6c1eff5 (MIPS: IRQ: Fix disable_irq on CPU IRQs), if without "If" not needed, I think. > IRQF_NO_SUSPEND in cascade_irqaction, HPET interrupts will lost during Will be lost. > suspend. The result is machine cannot be waken up. Woken up. > Cc: <> > Signed-off-by: Huacai Chen <> Perhaps Ralf could fix these when applying... WBR, Sergei
diff --git a/arch/mips/loongson/loongson-3/irq.c b/arch/mips/loongson/loongson-3/irq.c index 21221ed..0f75b6b 100644 --- a/arch/mips/loongson/loongson-3/irq.c +++ b/arch/mips/loongson/loongson-3/irq.c @@ -44,6 +44,7 @@ void mach_irq_dispatch(unsigned int pending) static struct irqaction cascade_irqaction = { .handler = no_action, + .flags = IRQF_NO_SUSPEND, .name = "cascade", };
HPET irq is routed to i8259 and then to MIPS CPU irq (cascade). After commit a3e6c1eff5 (MIPS: IRQ: Fix disable_irq on CPU IRQs), if without IRQF_NO_SUSPEND in cascade_irqaction, HPET interrupts will lost during suspend. The result is machine cannot be waken up. Cc: <> Signed-off-by: Huacai Chen <> --- arch/mips/loongson/loongson-3/irq.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)